Back contact solar cell and photovoltaic module

Abstract

The application provides a back contact solar cell and a photovoltaic module. The back contact solar cell comprises a silicon substrate, a back surface of the silicon substrate comprises first regions and second regions arranged alternately, the first regions correspond to P-type regions of the back contact solar cell, the second regions correspond to N-type regions of the back contact solar cell, and grid lines are arranged in the P-type regions and the N-type regions; the back surface of the silicon substrate further comprises third regions and fourth regions, the third regions extend along a first direction and are connected to the same end of at least two second regions to conductively connect the grid lines in the at least two second regions; and the fourth regions are arranged around edges of the silicon substrate and are located outside the third regions. The application can make the carriers generated by the metallized broken grid regions transmit to the adjacent N-type doped regions without the broken grid through the third regions to be collected by the metallized grid lines, and improve the edge passivation effect of the back contact solar cell, so that the performance of the back contact solar cell is improved.

Description

Technical Field

[0001] This application relates to the field of solar cells, and more particularly to a back-contact solar cell and photovoltaic module. Background Technology

[0002] A solar cell is a device that converts solar energy into electrical energy. It has the advantages of being clean and pollution-free, and has been widely used in the power generation industry.

[0003] HTBC (Heterojunction Tunnel Oxide Back Contact) solar cell technology is a high-efficiency crystalline silicon solar cell technology. It combines the technical features of TBC (Tunnel Oxide Back Contact) cells and heterojunction cells, making it a highly promising high-performance crystalline silicon solar cell. HTBC cells use a printing method to form grid lines on the back of the cell; however, the unavoidable existence of grid breaks in existing HTBC cells affects the performance of HTBC solar cells. Summary of the Invention

[0004] To address the aforementioned technical problems, this application discloses a back-contact solar cell and photovoltaic module to avoid the impact of grid line breakage on cell performance and improve the performance of the back-contact solar cell.

[0005] In a first aspect, this application provides a back-contact solar cell, comprising: A silicon substrate, the back side of which includes an alternately arranged first region and a second region, the first region corresponding to the P-type region of the back contact solar cell, and the second region corresponding to the N-type region of the back contact solar cell, wherein grid lines are provided in the P-type region and the N-type region; The back side of the silicon substrate further includes a third region and a fourth region, the third region extending along a first direction and connected to the same end of at least two of the second regions to electrically connect the gate lines in at least two of the second regions; The fourth region is disposed around the edge of the silicon substrate, and the fourth region is located outside the third region; The first direction is perpendicular to the length direction of the gate line and parallel to the plane where the silicon substrate is located.

[0006] In some embodiments of this application, the width of the third region is W1, where 50μm≤W1≤300μm.

[0007] In some embodiments of this application, the length of the third region is L, where L ≥ 500 μm.

[0008] In some embodiments of this application, the fourth region includes a first sub-region, which is a region adjacent to the third region, and the width of the first sub-region is W2, where 10μm≤W2≤200μm.

[0009] In some embodiments of this application, 100μm≤W1+W2≤500μm.

[0010] In some embodiments of this application, the fourth region further includes a second sub-region, which is the region in the fourth region other than the first sub-region, and the width of the second sub-region is W3, where 10μm≤W3≤400μm.

[0011] In some embodiments of this application, in the second region, the back side of the silicon substrate is sequentially provided with a doped inner expansion layer, a second interface passivation layer, an N-type doped polycrystalline silicon layer, a first interface passivation layer, a P-type doped amorphous silicon layer, and a transparent conductive oxide layer. In the first region, a first interface passivation layer, a P-type doped amorphous silicon layer and a transparent conductive oxide layer are sequentially disposed on the back side of the silicon substrate, and the back side of the silicon substrate has a textured back surface structure.

[0012] In some embodiments of this application, the third region has the same film structure as the second region; wherein the film structure includes a film layer disposed in a direction away from the silicon substrate.

[0013] In some embodiments of this application, the fourth region has the same membrane structure as the second region; Alternatively, the fourth region has the same membrane structure as the first region; Alternatively, a portion of the fourth region may have the same film structure as the first region, and another portion of the fourth region may have the same film structure as the second region; The film structure includes a film layer disposed in a direction opposite to the silicon substrate.

[0014] In some embodiments of this application, where the fourth region has the same film structure as the first region: A first isolation structure is provided between the fourth region and the third region. The width of the first isolation structure is W4, and 20μm≤W4≤120μm.

[0015] In some embodiments of this application, a second isolation structure is provided between the third region and the first region, and the width of the second isolation structure is W5, where 20μm≤W5≤120μm.

[0016] In some embodiments of this application, the film structure of the third region is, in sequence, a doped inner extension layer, a second interface passivation layer, an N-type doped polysilicon layer, and a transparent conductive oxide layer. The transparent conductive oxide layer constitutes the carrier transport structure of the third region. The length extension direction of the carrier transport structure is the same as the length extension direction of the third region, and the carrier transport structure is located in the middle of the third region.

[0017] In some embodiments of this application, the width of the carrier transport structure is W6, where 20μm≤W6≤400μm.

[0018] In some embodiments of this application, a first insulating groove is provided on the back edge of the back contact solar cell, and the width of the first insulating groove is W7, 50μm≤W7≤200μm.

[0019] In some embodiments of this application, a first N-type doped polycrystalline silicon layer is provided on the sidewall of the back contact solar cell, and the area of ​​the first N-type doped polycrystalline silicon layer accounts for 30% to 95% of the total area of ​​the sidewall.

[0020] In some embodiments of this application, a second insulating groove is provided between the outermost N-type region of the back contact solar cell and the adjacent P-type region, and the width of the second insulating groove is W8, 20μm≤W8≤120μm; And / or, the width of the N-type region located on the outermost side of the back contact solar cell is W9, 20μm≤W9≤300μm.

[0021] In some embodiments of this application, a second N-type doped polycrystalline silicon layer is provided on the sidewall of the back contact solar cell, and the area of ​​the second N-type doped polycrystalline silicon layer accounts for 80% to 100% of the total area of ​​the sidewall.

[0022] Secondly, this application provides a photovoltaic module, which includes a back-contact solar cell as described in the first aspect.

[0023] Compared with the prior art, this application has at least the following beneficial effects: This application provides a back-contact solar cell and a photovoltaic module. The back-contact solar cell includes a silicon substrate. The back side of the silicon substrate includes alternating first and second regions. The first region corresponds to the P-type region of the back-contact solar cell, and the second region corresponds to the N-type region of the back-contact solar cell. The back side of the silicon substrate also includes a third and a fourth region. The third region extends along a first direction and is connected to the same end of at least two second regions to electrically connect the gate lines in at least two second regions, forming an anti-gate breakage structure for the back-contact solar cell. This allows the charge carriers generated in the metallized gate breakage region to be transported through the third region to the adjacent unbroken N-type doped region for collection by the metallized gate lines. Furthermore, the fourth region is disposed around the edge of the silicon substrate and is located outside the third region, forming an edge passivation region for the back-contact solar cell. This improves the edge passivation effect of the back-contact solar cell and enhances its passivation performance (e.g., iFF, iVoc), especially improving the iFF and iVoc of the back-contact solar cell. In addition, it can also avoid cell leakage caused by edge etching and plating around the N-type doped polycrystalline silicon layer. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic diagram of the structure of a back-contact solar cell in one embodiment of this application; Figure 2 This is a schematic diagram of the back-contact solar cell in another embodiment of this application; Figure 3 for Figure 1 A magnified view of the area within the square region indicated by the dashed line. Figure 4 for Figure 2 A magnified view of the area within the square region indicated by the dashed line. Figure 5 This is a schematic diagram of the back contact solar cell in another embodiment of this application; Figure 6 This is a schematic diagram of the membrane structure in the third region of one embodiment of this application; Figure 7 This is a schematic diagram of the membrane structure of the fourth region in one embodiment of this application; Figure 8 This is a schematic diagram of the membrane structure of the fourth region in another embodiment of this application; Figure 9This is a schematic diagram of a carrier transport structure in one embodiment of this application; Figure 10 This is a schematic diagram of the carrier transport structure in another embodiment of this application; Figure 11 This is a schematic diagram of the structure of the back contact solar cell edge in one embodiment of this application; Figure 12 This is a schematic diagram of the structure of the back contact solar cell edge in another embodiment of this application.

[0026] Figure reference numerals: Silicon substrate-1, Intrinsic amorphous silicon layer-2, Insulating layer-3, Main gate-4, Front textured structure-10, Front passivation layer-11, Anti-reflection layer-12, Back textured structure-20, First region-21, Second region-22, Doped inner extension layer-23, Second interface passivation layer-24, N-type doped polysilicon layer-25, Passivation protection sacrificial layer-26, First interface passivation layer-27, P-type doped amorphous silicon layer-28, Transparent conductive oxide layer-29, Back gate line-30, Third region-31, Fourth region-32, First sub-region-321, Second sub-region-322, First isolation structure-41, Second isolation structure-42, First isolation trench-43, Second isolation trench-44, First N-type doped polysilicon layer-251, Second N-type doped polysilicon layer-252. Detailed Implementation

[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0029] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0030] Furthermore, the terms "installation," "setup," "equipped with," "connection," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0031] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, components, or parts (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, components, or parts. Unless otherwise stated, "a plurality of" means two or more.

[0032] The technical solution of this application will be further described below with reference to the embodiments and accompanying drawings.

[0033] Firstly, this application provides a back-contact solar cell, with reference to... Figure 1 The back-contact solar cell includes a silicon substrate 1. The back side of the silicon substrate 1 includes alternately arranged first regions 21 and second regions 22. First region 21 corresponds to the P-type region of the back-contact solar cell, and second region 22 corresponds to the N-type region. Both first region 21 and second region 22 are provided with grid lines, wherein the grid lines located in the first region 21 are P-type electrodes, and the grid lines located in the second region 22 are N-type electrodes. The back side of the silicon substrate 1 also includes a third region 31 and a fourth region 32. The third region 31 extends along a first direction and connects to the same end of at least two second regions 22 to electrically connect the grid lines in each second region 22. The number of second regions connected by the third region can be 2, 3, 4, 5, 6, 7, 8, etc.; or, the third region connects all second regions on the same side of the back-contact solar cell. The functional film layer in the third region 31 constitutes the anti-breakage grid structure of the back-contact solar cell, and the transparent conductive oxide layer therein serves to electrically connect the grid lines in the second regions. In addition, an insulating layer 3 is provided between the main gate 4 and the back gate line 30.

[0034] In one alternative implementation, refer to Figure 1 and Figure 2 The third region 31 extends along the first direction and connects to the left ends of two adjacent second regions 22.

[0035] In another alternative implementation, refer to Figure 3 and Figure 4 The third region 31 extends along the first direction and connects to the left ends of the three adjacent second regions 22.

[0036] refer to Figure 1 and Figure 3 The fourth region 32 is disposed around the edge of the silicon substrate 1, and the fourth region 32 is located outside the third region 31. In this application, the first direction is perpendicular to the length direction of the gate line and parallel to the plane where the silicon substrate 1 is located.

[0037] In some embodiments of this application, reference is made to Figure 2 The width of the third region 31 is W1, where 50μm ≤ W1 ≤ 300μm. For example, W1 can be 50μm, 100μm, 150μm, 200μm, or 300μm. The anti-breakage gate structure of this application includes a transparent conductive oxide (TCO) layer. If W1 is too small, the TCO layer in the third region becomes too narrow, making it prone to breakage, or its width becomes too small to meet carrier transport requirements, potentially leading to the breakage of the anti-breakage gate structure or a small effective transport area, resulting in gate structure failure. If W1 is too large, the edge region widens, causing photogenerated carriers generated at the edge of the silicon substrate to travel a long distance to reach the carrier collection region of the P-region or N-region. During this transport, the probability of carrier recombination increases, leading to lower current and a lower fill factor (FF). When W1 is within the above range, not only can gate structure failure be avoided, but the effective carrier collection area can also be guaranteed.

[0038] In some embodiments of this application, reference is made to Figure 2 The length of the third region 31 is L, where L ≥ 500 μm. For example, L can be 500 μm, 800 μm, 1000 μm, or 1500 μm. Within the above range, L can effectively connect the grid lines in at least two of the second regions, improving the grid breakage prevention effect.

[0039] In some embodiments of this application, reference is made to Figure 2 The fourth region 32 includes the first sub-region 321, which is adjacent to the third region 31; see reference. Figure 2 The width of the first sub-region 321 is W2, where 10μm ≤ W2 ≤ 200μm. For example, W2 can be 10μm, 30μm, 50μm, 100μm, or 200μm. If W2 is too small, the laser will have difficulty engraving the fourth region, affecting the subsequent passivation effect on the edge region; if W2 is too large, it will encroach on the width of the third region, easily leading to the failure of the anti-breakage grid structure. When W2 is within the above range, it can improve the edge passivation effect of the back contact solar cell without affecting the failure of the anti-breakage grid structure.

[0040] In some embodiments of this application, reference is made to Figure 2100μm≤W1+W2≤500μm, that is, the sum of the widths of the third region 31 and the first sub-region 321 is 100μm~500μm. For example, W1+W2 can be 100μm, 200μm, 300μm, 400μm or 500μm. In this way, not only can the failure of the anti-breakage grid structure be avoided, but the effective carrier collection area can also be guaranteed.

[0041] In some embodiments of this application, reference is made to Figure 2 The fourth region 32 also includes a second sub-region 322, which is the region in the fourth region other than the first sub-region. The width of the second sub-region 322 is W3, where W3 = W2 + W1. For example, W3 can be 100 μm, 200 μm, 300 μm, 400 μm, or 500 μm. W3 within the above range can improve the edge passivation effect of the back contact solar cell.

[0042] In some embodiments of this application, reference is made to Figure 5 In the second region 22, a doped inner layer 23, a second interface passivation layer 24, an N-type doped polycrystalline silicon layer 25, a first interface passivation layer 27, a P-type doped amorphous silicon layer 28, and a transparent conductive oxide layer 29 are sequentially disposed on the back side of the silicon substrate 1. In the first region 21, a first interface passivation layer 27, a P-type doped amorphous silicon layer 28, and a transparent conductive oxide layer 29 are sequentially disposed on the back side of the silicon substrate 1, and the back side of the silicon substrate has a back textured structure 20. In addition, a front textured structure 10 is disposed on the front side of the back contact solar cell, and a front passivation layer 11 and an anti-reflection layer 12 are disposed on the surface of the front textured structure 10. Back gate lines 30 are respectively disposed in the first region 21 and the second region 22.

[0043] In some embodiments of this application, the third region has the same membrane structure as the second region. For example, refer to... Figure 6 In the third region 31, the back side of the silicon substrate 1 is sequentially provided with a doped inner expansion layer 23, a second interface passivation layer 24, an N-type doped polycrystalline silicon layer 25, a first interface passivation layer 27, a P-type doped amorphous silicon layer 28, and a transparent conductive oxide layer 29. The transparent conductive oxide layer 29 in the third region 31 is electrically connected to the gate line in the second region.

[0044] In some embodiments of this application, the fourth region may have the same membrane structure as the second region. For example, refer to... Figure 7 In the fourth region 32, the back side of the silicon substrate 1 is sequentially provided with a doped inner expansion layer 23, a second interface passivation layer 24, an N-type doped polycrystalline silicon layer 25, a first interface passivation layer 27, a P-type doped amorphous silicon layer 28, and a transparent conductive oxide layer 29.

[0045] In another case, the fourth region 32 may have the same membrane structure as the first region 21. For example, refer to... Figure 8 In the fourth region 32, a first interface passivation layer 27, a P-type doped amorphous silicon layer 28 and a transparent conductive oxide layer 29 are sequentially disposed on the back side of the silicon substrate 1.

[0046] In another case, refer to Figure 12 A portion of the fourth region 32 has the same membrane structure as the first region (i.e., the P-type region), and another portion of the fourth region 32 has the same membrane structure as the second region (i.e., the N-type region).

[0047] The film structure includes film layers disposed along a direction away from the silicon substrate, and these film layers may have a patterned structure. For example, for a transparent conductive oxide layer located on the surface of the fourth region, a transparent conductive oxide layer with a patterned structure can be formed by removing a portion of the transparent conductive oxide layer.

[0048] In some embodiments of this application, where the fourth region 32 and the first region 21 have the same film structure, reference is made to... Figure 2 A first isolation structure 41 is provided between the fourth region 32 and the third region 31. The width of the first isolation structure 41 is W4, which is 20μm≤W4≤120μm, preferably 50μm≤W4≤60μm. For example, W4 is 20μm, 50μm, 60μm, 100μm, or 120μm. The first isolation structure can be an isolation structure formed by removing the TCO layer through wet etching, etching paste etching, or laser etching, which can separate the fourth region 32 and the third region 31 to achieve physical insulation.

[0049] In some embodiments of this application, reference is made to Figure 2 A second isolation structure 42 is provided between the third region 31 and the first region 21. The width of the second isolation structure 42 is W5, which is 20μm≤W5≤120μm, preferably 50μm≤W5≤60μm. For example, W5 is 20μm, 50μm, 60μm, 100μm, or 120μm. The second isolation structure can be an isolation structure formed by removing the TCO layer through wet etching, etching paste etching, or laser etching, which can separate the third region 31 from the first region 21 to achieve physical insulation.

[0050] In some embodiments of this application, reference is made to Figure 9 and Figure 10The film structure of the third region 31 consists of a doped inner extension layer 23, a second interface passivation layer 24, an N-type doped polycrystalline silicon layer 25, and a transparent conductive oxide layer 29, which constitutes the carrier transport structure of the third region. The length extension direction of the carrier transport structure is the same as that of the third region 31, and the carrier transport structure is located in the middle of the third region 31. The carrier transport structure can be formed by removing the first interface passivation layer and the P-type doped amorphous silicon layer locally on the surface of the N-type doped polycrystalline silicon layer in the third region 31 using laser or wet processing, and then depositing a TCO thin film.

[0051] In some embodiments of this application, reference is made to Figure 9 and Figure 10 The width of the charge carrier transport structure is W6, with 20μm≤W6≤400μm, preferably 100μm≤W6≤300μm. It should be noted that the width of the charge carrier transport structure refers to the width at its widest point.

[0052] In some embodiments of this application, reference is made to Figure 11 A first insulating groove 43 is provided on the back edge of the back contact solar cell. The width of the first insulating groove 43 is W7, 50μm≤W7≤200μm, which effectively prevents leakage at the edge of the cell. Figure 11 As shown, the film structure on the back side of the back contact solar cell edge can be considered to be consistent with the film structure of the P-type region, and this edge back side region can be located in the fourth region.

[0053] In some embodiments of this application, reference is made to Figure 11 The sidewall of the back contact solar cell is provided with a first N-type doped polycrystalline silicon layer 251, the area of ​​which accounts for 30% to 95% of the total area of ​​the sidewall, thus providing a good edge passivation effect for the cell. At this time, the sidewall of the back contact solar cell is sequentially provided with a doped inner expansion layer 23, a second interface passivation layer 24, a first N-type doped polycrystalline silicon layer 251, a first interface passivation layer 27, and a P-type doped amorphous silicon layer 28.

[0054] In some embodiments of this application, reference is made to Figure 12 A second insulating groove 44 is provided between the outermost N-type region of the back-contact solar cell and the adjacent P-type region. The width of the second insulating groove 44 is W8, 20μm≤W8≤120μm; and / or, the width of the outermost N-type region of the back-contact solar cell is W9, 20μm≤W9≤300μm. This effectively prevents leakage at the edge of the solar cell. Figure 12 As shown, the film structure on the back side of the back contact solar cell edge can be considered to be consistent with the film structure of the N-type region, and this edge back side region can be located within the fourth region 32.

[0055] In some embodiments of this application, reference is made to Figure 12 A second N-type doped polycrystalline silicon layer 252 is disposed on the sidewall of the back contact solar cell, and the area of ​​the second N-type doped polycrystalline silicon layer 252 accounts for 80% to 100% of the total area of ​​the sidewall. In this way, a good edge passivation effect of the solar cell can be achieved. At this time, the sidewall of the back contact solar cell is sequentially disposed with a doped inner expansion layer 23, a second interface passivation layer 24, a second N-type doped polycrystalline silicon layer 252, a first interface passivation layer 27, a P-type doped amorphous silicon layer 28, and a transparent conductive oxide layer 29.

[0056] In this application, the second interface passivation layer can be a silicon oxide tunneling oxide layer with a thickness of 0.5 nm to 3 nm; the N-type doped polycrystalline silicon layer can be a phosphorus-doped polycrystalline silicon layer (n-poly) with a thickness of 50 nm to 200 nm; the first interface passivation layer can be an intrinsic hydrogenated amorphous silicon layer (ia-Si:H) with a thickness of 1 nm to 10 nm; the P-type doped amorphous silicon layer can be a boron-doped hydrogenated amorphous silicon layer (pa-Si:H) with a thickness of 10 nm to 50 nm; the transparent conductive oxide layer can be an indium tin oxide (ITO) layer with a thickness of 10 nm to 100 nm; the P-type doped amorphous silicon layer can be a boron-doped hydrogenated amorphous silicon layer (pa-Si:H) with a thickness of 10 nm to 50 nm; the front passivation layer can be an aluminum oxide layer with a thickness of 2 nm to 20 nm; and the antireflection layer can be a silicon nitride layer, a silicon oxynitride layer, or a silicon oxide layer, etc., with a thickness of 30 nm to 180 nm.

[0057] The aforementioned functional films can be formed using existing equipment and / or processes and / or materials. This application does not impose any particular restrictions, as long as the purpose of this application can be achieved. For example, the front passivation layer 11 can be formed using atomic layer deposition (ALD) equipment, plasma-enhanced atomic layer deposition (PE-ALD) equipment, or magnetron sputtering equipment; the antireflection layer 12 can be formed using a plate-type plasma-enhanced chemical vapor deposition (PECVD) equipment; the first interface passivation layer 27 and the P-type doped amorphous silicon layer 28 can be formed using a plate-type PECVD equipment; the transparent conductive oxide layer 29 can be formed using a plate-type physical vapor deposition (PVD) equipment; and the second interface passivation layer 24 can be formed using a tubular low-pressure chemical vapor deposition (LPCVD) equipment.

[0058] Secondly, this application provides a photovoltaic module, which includes a back-contact solar cell as described in the first aspect.

[0059] This application also provides a photovoltaic module for converting received light energy into electrical energy and transmitting it to an external load. The photovoltaic module includes: at least one cell string, which is formed by connecting multiple back-contact solar cells as described above; an encapsulating film for covering the surface of the cell string; and a cover plate for covering the surface of the encapsulating film facing away from the cell string. The foregoing provides a detailed description of a back-contact solar cell and photovoltaic module disclosed in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for helping to understand the technical solutions and core inventive points of the embodiments of this application. Furthermore, for those skilled in the art, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A back-contact solar cell, characterized in that, include: A silicon substrate, the back side of which includes an alternately arranged first region and a second region, the first region corresponding to the P-type region of the back contact solar cell, and the second region corresponding to the N-type region of the back contact solar cell, wherein grid lines are provided in the P-type region and the N-type region; The back side of the silicon substrate further includes a third region and a fourth region, the third region extending along a first direction and connected to the same end of at least two of the second regions to electrically connect the gate lines in at least two of the second regions; The fourth region is disposed around the edge of the silicon substrate, and the fourth region is located outside the third region; The first direction is perpendicular to the length direction of the gate line and parallel to the plane where the silicon substrate is located.

2. The back-contact solar cell according to claim 1, characterized in that, The width of the third region is W1, where 50μm≤W1≤300μm.

3. The back-contact solar cell according to claim 1, characterized in that, The length of the third region is L, where L ≥ 500 μm.

4. The back-contact solar cell according to claim 1, characterized in that, The fourth region includes a first sub-region, which is an area adjacent to the third region. The width of the first sub-region is W2, and 10μm≤W2≤200μm.

5. The back-contact solar cell according to claim 1, characterized in that, 100μm≤W1+W2≤500μm.

6. The back-contact solar cell according to claim 4, characterized in that, The fourth region also includes a second sub-region, which is the region in the fourth region other than the first sub-region. The width of the second sub-region is W3, and 10μm≤W3≤400μm.

7. The back-contact solar cell according to claim 1, characterized in that, In the second region, the back side of the silicon substrate is sequentially provided with a doped inner expansion layer, a second interface passivation layer, an N-type doped polycrystalline silicon layer, a first interface passivation layer, a P-type doped amorphous silicon layer, and a transparent conductive oxide layer. In the first region, a first interface passivation layer, a P-type doped amorphous silicon layer and a transparent conductive oxide layer are sequentially disposed on the back side of the silicon substrate, and the back side of the silicon substrate has a textured back surface structure.

8. The back-contact solar cell according to claim 7, characterized in that, The third region has the same film structure as the second region; wherein the film structure includes a film layer disposed in a direction away from the silicon substrate.

9. The back-contact solar cell according to claim 8, characterized in that, The fourth region has the same membrane structure as the second region; Alternatively, the fourth region has the same membrane structure as the first region; Alternatively, a portion of the fourth region may have the same film structure as the first region, and another portion of the fourth region may have the same film structure as the second region; The film structure includes a film layer disposed in a direction opposite to the silicon substrate.

10. The back-contact solar cell according to claim 9, characterized in that, In the case where the fourth region has the same film structure as the first region: A first isolation structure is provided between the fourth region and the third region. The width of the first isolation structure is W4, and 20μm≤W4≤120μm.

11. The back-contact solar cell according to claim 1, characterized in that, A second isolation structure is provided between the third region and the first region. The width of the second isolation structure is W5, and 20μm≤W5≤120μm.

12. The back-contact solar cell according to claim 1, characterized in that, The film structure of the third region consists of a doped inner extension layer, a second interface passivation layer, an N-type doped polysilicon layer, and a transparent conductive oxide layer. The transparent conductive oxide layer constitutes the carrier transport structure of the third region. The length extension direction of the carrier transport structure is the same as the length extension direction of the third region, and the carrier transport structure is located in the middle of the third region.

13. The back-contact solar cell according to claim 12, characterized in that, The width of the carrier transport structure is W6, where 20μm≤W6≤400μm.

14. The back-contact solar cell according to claim 1, characterized in that, The back edge of the back contact solar cell is provided with a first insulating groove, the width of which is W7, 50μm≤W7≤200μm.

15. The back-contact solar cell according to claim 14, characterized in that, The sidewall of the back-contact solar cell is provided with a first N-type doped polycrystalline silicon layer, the area of ​​which accounts for 30% to 95% of the total area of ​​the sidewall.

16. The back-contact solar cell according to claim 1, characterized in that, A second insulating groove is provided between the outermost N-type region and the adjacent P-type region of the back contact solar cell. The width of the second insulating groove is W8, and 20μm≤W8≤120μm. And / or, the width of the N-type region located on the outermost side of the back contact solar cell is W9, 20μm≤W9≤300μm.

17. The back-contact solar cell according to claim 16, characterized in that, The back-contact solar cell has a second N-type doped polycrystalline silicon layer on its sidewall, and the area of ​​the second N-type doped polycrystalline silicon layer accounts for 80% to 100% of the total area of ​​the sidewall.

18. A photovoltaic module, characterized in that, The photovoltaic module includes the back-contact solar cell as described in any one of claims 1 to 17.

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