Semiconductor structure and method of manufacturing the same

Abstract

A method of fabricating a semiconductor structure includes forming a bottom layer on a substrate; forming a photoresist layer on the bottom layer; performing an exposure process to define a plurality of exposed regions of the photoresist layer; performing a post-exposure bake process to activate the plurality of exposed regions to form a plurality of activated regions in the photoresist layer, wherein a bottom width of each activated region is greater than a top width of each activated region; removing the activated regions, wherein after the activated regions are removed, unactivated regions of the photoresist layer remain on the bottom layer, and a top width of each unactivated region is greater than a bottom width of each unactivated region; and forming a plurality of trim portions around the unactivated regions to form a plurality of hybrid mask features on the bottom layer, wherein a sidewall of the hybrid mask features is substantially perpendicular to a top surface of the bottom layer. By this method, the profile of the sidewall of the opening is modified such that the difference between the bottom and the top of the opening is reduced, and the sidewall of the opening becomes more vertical.

Description

Technical Field

[0001] This invention relates to a semiconductor structure and its manufacturing method. Background Technology

[0002] The integrated circuit (IC) industry has experienced exponential growth. Technological advancements in IC materials and design have led to the production of several generations of ICs, each featuring smaller and more complex circuits than the previous generation. In the development of ICs, the size of semiconductor components has steadily decreased to meet the ever-increasing demands for computing power. However, this shrinking process introduces various new problems, and these problems continue to increase in both number and complexity. Therefore, the challenges of improving quality, yield, performance, and reliability, while reducing complexity, remain ongoing. Summary of the Invention

[0003] One embodiment of the present invention provides a method for manufacturing a semiconductor structure, comprising forming an underlayer on a substrate; forming a photoresist layer on the underlayer; performing an exposure process to define a plurality of exposed regions of the photoresist layer; performing a post-exposure baking process to activate the plurality of exposed regions, thereby forming a plurality of activated regions in the photoresist layer, wherein the bottom width of each activated region is greater than the top width of each activated region; removing the activated regions, wherein after removing the activated regions, unactivated regions of the photoresist layer remain on the underlayer, and the top width of each unactivated region is greater than the bottom width of each unactivated region; and forming a plurality of modification portions around the unactivated regions to form a plurality of hybrid mask features on the underlayer, wherein the sidewalls of the hybrid mask features are substantially perpendicular to the top surface of the underlayer.

[0004] In some embodiments, the photoresist layer comprises an unactivated polymer resin and a photoacid generator, wherein the unactivated polymer resin and the photoacid generator together constitute a positive chemical amplification photoresist system.

[0005] In some embodiments, the step of forming a plurality of modified portions includes performing multiple cycles, each cycle including conformally depositing a modified layer on an unactivated region and an underlying layer; and performing a directional etching process to remove portions of the modified layer not protected by the unactivated region.

[0006] In some embodiments, the conformally deposited modified layer comprises depositing a boron nitride layer on an unactivated region and an underlying layer.

[0007] In some embodiments, performing a directional etching process includes plasma etching using argon gas, with a bias power of 50 watts for the plasma etching.

[0008] In some embodiments, after the post-exposure baking process is performed, the contours of the activated regions differ from those of the exposed regions.

[0009] In some embodiments, each modified portion is a multilayer structure containing boron and nitrogen.

[0010] In some embodiments, the method further includes performing a soft baking process prior to performing an exposure process.

[0011] In some embodiments, the method further includes etching the underlying layer using a hybrid mask feature as a mask.

[0012] In some embodiments, the sidewalls of the hybrid mask feature are the outer surface of the modified portion.

[0013] In some embodiments, the modification portion includes modifying the outline of a plurality of openings between the unactivated regions.

[0014] In some embodiments, after the decorative portion is formed, the difference between the top width and the bottom width of each opening is reduced.

[0015] Another embodiment of the present invention is a semiconductor structure comprising a substrate, a bottom layer on the substrate, and a hard mask layer on the bottom layer. The hard mask layer includes a plurality of hybrid mask features and a plurality of modified openings between the hybrid mask features, the sidewalls of the modified openings being substantially perpendicular to the top surface of the bottom layer.

[0016] In some embodiments, the hybrid mask feature includes a photoresist body and a decorative portion surrounding the photoresist body, wherein the top width of the photoresist body is greater than the bottom width of the photoresist body.

[0017] In some embodiments, the material of the modified portion is different from the material of the photoresist body.

[0018] In some embodiments, the inner surface of the modified portion directly contacts the sidewall of the photoresist body, and the outer surface of the modified portion is substantially perpendicular to the top surface of the underlying layer.

[0019] In some embodiments, the sidewalls of the photoresist body are inclined or curved.

[0020] In some embodiments, the photoresist body is an unactivated polymer resin of a positive chemical amplification photoresist system.

[0021] In some embodiments, the modified portion is a multilayer structure comprising boron and nitrogen.

[0022] In some embodiments, the modified portion is entirely below the top surface of the photoresist body.

[0023] The undercut problem that occurs in positive chemical amplification photoresist systems can be solved by adding a modification portion next to the photoresist body using the semiconductor structure and manufacturing method of this invention. The contour of the hybrid mask feature is modified to be more vertical, and the critical dimension of the hybrid mask feature can be better controlled. Attached Figure Description

[0024] To make the objectives, features, advantages, and embodiments of the present invention more apparent and understandable, the accompanying drawings are described in detail below: Figures 1 to 10 These are schematic diagrams illustrating different steps of various embodiments of a method for manufacturing a semiconductor structure according to the present invention. Detailed Implementation

[0025] The following describes several embodiments of the present invention with reference to the accompanying drawings. For clarity, many practical details will be described in the following description. However, it should be understood that these practical details are not intended to limit the invention. That is, in some embodiments of the invention, these practical details are not essential. Furthermore, for the sake of simplicity, some conventional structures and elements will be shown in the drawings in a simple schematic manner, and in all drawings, the same reference numerals will be used to denote the same or similar elements. And, where feasible, features of different embodiments may be applied interchangeably.

[0026] Furthermore, relative terms, such as "below" or "bottom" and "above" or "top," are used to describe the relationship between one element and another shown in the accompanying drawings. It is understandable that relative terms are used to describe different orientations of the device beyond those depicted in the drawings. For example, if the device in the drawings were flipped, an element originally described as being "below" another element would be oriented as being "above" another element. The illustrative term "below" can encompass both "below" and "above" orientations depending on the specific orientation of the drawing.

[0027] Reference Figures 1 to 10 These are schematic diagrams illustrating different steps of various embodiments of a method for manufacturing a semiconductor structure according to the present invention. Figure 1 As shown, the method for manufacturing a semiconductor structure begins in step S10, where a substrate 100 is provided, and a bottom layer 110 is formed on the substrate 100.

[0028] In some embodiments, substrate 100 may be a bulk semiconductor substrate, which is entirely composed of at least one semiconductor material; the bulk semiconductor substrate does not contain any dielectric, insulating layer, or conductive features. For example, the bulk semiconductor substrate may comprise elemental semiconductors, compound semiconductors, or combinations thereof, where elemental semiconductors are such as silicon or germanium, and compound semiconductors are such as silicon germanium, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, indium antimonide, or other group III-V or group II-VI compound semiconductors. In some embodiments, substrate 100 may comprise an insulator-on-semiconductor structure, which, from bottom to top, comprises a handle substrate, an insulating layer, and an uppermost semiconductor material layer.

[0029] In some embodiments, the terms "substrate" and "wafer" used interchangeably both refer to processes performed on a surface or a portion thereof. Those skilled in the art will also understand that, unless the context clearly indicates otherwise, reference to the substrate may also refer to only a portion of the substrate. Furthermore, reference to deposition on the substrate can refer to a bare substrate and a substrate on which one or more thin films or features are deposited or formed.

[0030] The bottom layer 110 may be a patterned blanket layer. For example, the bottom layer 110 may be a dielectric layer, a barrier layer, an adhesive layer, or an etch stop layer. For example, the dielectric layer may comprise silicon oxide, borosilicate glass, undoped silicate glass, fluorinated silicate glass, a low-dielectric-constant dielectric material, the like, or combinations thereof. The low-dielectric-constant dielectric material has a dielectric constant of less than 3.0 or even less than 2.5. In some embodiments, the low-dielectric-constant dielectric material has a dielectric constant of less than 2.0. Conductive features may be electrically coupled to device elements.

[0031] In some embodiments, the bottom layer 110 may include a plurality of conductive features (not shown for clarity). The plurality of conductive features may include a plurality of interconnect layers and a plurality of conductive vias. The plurality of conductive features may be electrically coupled to the plurality of device elements.

[0032] Step S10 of the method for manufacturing a semiconductor structure further includes forming a photoresist layer 120 on the substrate 110. In some embodiments, the photoresist layer 120 may include a solvent, a nonactivated polymer resin, and a photoacid generator (PGA). In some embodiments, the photoresist layer 120 may also include a crosslinking agent, a dye, or other additives.

[0033] In some embodiments, the photoresist layer 120 can be formed on the substrate 110 by a spin coating process. For example, during spin coating, a photoresist mixture within a solvent carrier can be dispensed onto the surface of the substrate 110, which can be considered as an intermediate semiconductor element. The intermediate semiconductor element continues to spin rapidly until the solvent carrier is substantially removed, and the photoresist mixture can be dried into a film of uniform thickness across the entire surface of the substrate 110. The photoresist mixture may include an unactivated polymer resin and a photoacid generator. In some embodiments, the solvent carrier may include propylene glycol monomethyl ether acetate, water, or a volatile amine-containing compound.

[0034] Unactivated polymer resins and photoacid generators can be configured together to form a chemically amplified photoresist system. Typically, the photoacid generator is exposed to a radiation source and converted into photoacid. The photoacid then excites an activation reaction in the unactivated polymer resin.

[0035] In some embodiments, the chemical amplification photoresist system is a positive chemical amplification photoresist system. In an example of a positive chemical amplification photoresist system, photoacid catalyzes the deprotection of the protecting groups on the unactivated polymer resin, increasing the polarity of the resin and thus increasing its solubility in an aqueous matrix. Therefore, the activation reaction of the positive chemical amplification photoresist transforms the nonpolar, insoluble polymer resin into a polar, soluble polymer resin.

[0036] Reference Figure 2 The method for manufacturing the semiconductor structure proceeds to step S12, where a soft baking process is performed. In some embodiments, during the soft baking process, such as Figure 1 The described intermediate semiconductor element is heated to near the glass-transition temperature Tg of the unactivated polymer resin in order to remove the additional residual solvent carrier from the photoresist layer 120. Figure 2 The arrows indicate that any remaining solvent carriers have been removed. For example, additional remaining solvent carriers may include propylene glycol monomethyl ether acetate, water, or volatile amine-containing compounds.

[0037] Reference Figure 3The method for manufacturing the semiconductor structure proceeds to step S14, where an exposure process 300 is performed using a mask 200. The pattern of the mask 200 may include a pattern for transfer to the photoresist layer 120. After aligning the mask 200 with the aforementioned intermediate semiconductor element, the exposure process 300 is performed using a radiation source. For example, the radiation source may be ultraviolet radiation, deep ultraviolet radiation (typically 193 nm and 248 nm), or extreme ultraviolet radiation (typically 13.5 nm). The exposure process 300 may require the use of sophisticated development equipment (e.g., ArF immersion lithography) and precise masking techniques to ensure that radiation is precisely applied only to the intended exposed portion of the photoresist layer 120, which serves as the exposed area 121.

[0038] Reference Figure 4 The method for manufacturing the semiconductor structure proceeds to step S16, where a post-exposure baking process is performed. In some embodiments, the post-exposure baking process can be performed immediately after the exposure process 300. During the post-exposure baking process, Figure 3 The intermediate semiconductor element described herein can withstand temperatures on the order of the ionization transition temperature (Tg) of the unactivated polymer resin. The thermal energy applied to the photoresist layer 120 during the post-exposure baking process can cause photoacids to diffuse into the photoresist layer 120. In some embodiments, the diffusion of photoacids can fully activate the exposed region 121 exposed to the radiation source (see...). Figure 3 The unactivated resin in the photoresist layer 120 can also suppress the standing wave effect at the edges of the exposed region 121 of the photoresist layer 120. An example photo-acid activation reaction is shown in equation (1): …(1) In formula (1), photoacids can cause the conversion of unactivated polymer resin (insoluble) into a soluble product containing polar hydroxyl groups. The unstable leaving group may spontaneously decompose and generate byproducts such as carbon dioxide, isobutylene, and protons. The protons generated from the decomposition of the leaving group can further catalyze the conversion of the unactivated polymer resin. In some other embodiments, other byproducts may also be generated during the post-exposure baking process, such as propylene glycol monomethyl ether acetate, water, carbon dioxide, alcohols, volatile amine compounds, hydrocarbons, aldehydes, and / or vinyl ethers.

[0039] In some embodiments, depending on the chemically amplified photoresist system used, activation of the polymer resin can occur primarily during exposure process 300 or the post-exposure baking process. Multiple chemically amplified photoresists are high activation energy systems, and these multiple chemically amplified photoresists are, for example, t-BOC protected by the polymer resin described in the illustrative activation reaction. This means that even during exposure process 300, photoacids (H+) are generated by photoacid generators. + After that, additional heat energy is required to initiate activation, and this heat energy is provided by the post-exposure baking process.

[0040] In some embodiments, due to the concentration distribution curve of the photoacid, the contour of the activated region 122 may differ from that of the activated region 122. Figure 3 The outline of the exposed region 121 is shown, and the bottom width W2 of the activated region 122 is greater than the top width W1 of the activated region 122. Conversely, the unactivated region 124 in the photoresist layer 120 is the portion protected by a mask and not exposed to the radiation source. The top width W3 of the unactivated region 124 is greater than the bottom width W4 of the unactivated region 124.

[0041] Reference Figure 5 The method for manufacturing the semiconductor structure proceeds to step S18, where a developing process is performed to dissolve and remove the activated region 122 (e.g., Figure 4 As shown), and the unactivated region 124 in the photoresist layer 120 remains on the bottom layer 110.

[0042] In some embodiments, the unactivated regions 124 of the photoresist layer 120 retained on the bottom layer 110 have sloping sidewalls 126, and the unactivated regions 124 have a wider top width W3 and a narrower bottom width W4. Therefore, an undesirable undercut 128 is formed between the sloping sidewalls 126 of the unactivated regions 124 and the top surface 112 of the bottom layer 110. Consequently, the bottom width W6 of the opening OP between the unactivated regions 124 is greater than the top width W5.

[0043] Reference Figure 6 The method for manufacturing the semiconductor structure proceeds to step S20, where a modification layer 130 is conformally formed on the unactivated region 124 of the photoresist layer 120 and the exposed top surface 112 of the bottom layer 110. In some embodiments, the modification layer 130 is formed using a deposition process with nitrogen and boron trichloride, thereby forming a thin boron nitride film as the modification layer 130, which is formed on the unactivated region 124 and the bottom layer 110, and the byproduct chlorine gas dissipates.

[0044] In some embodiments, portions 132 of the modification layer 130 are deposited between the undercut 128 of the sidewall 126 of the unactivated region 124 and the top surface 112 of the bottom layer 110. These portions 132 of the modification layer 130 are covered and protected by the wider top surface of the unactivated region 124.

[0045] Reference Figure 7 The method for manufacturing semiconductor structures proceeds to step S22, where directional etching is performed to remove... Figure 6 The portion of the decorative layer 130 that is not protected, while the portion 132 of the decorative layer 130 that is covered and protected by the wider top surface of the unactivated region 124, is retained. In some embodiments, the thickness of the decorative layer 130 is insufficient to completely fill the area such as... Figure 6 As shown in the diagram, the undercut 128' still exists near the portion 132 of the decorative layer 130.

[0046] In some embodiments, the directional etching process includes low-power plasma etching. For example, the plasma etching may be argon-based plasma etching with a bias power of approximately 50 watts. In this way, the lateral portion of the modification layer 130 exposed between the unactivated regions 124 is removed, while the portion 132 of the modification layer 130 near the undercut 128' is retained.

[0047] After the deposition and etching of the finishing layer 130, a portion 132 of the remaining finishing layer 130 will exist at the bottom corner of the opening OP. Figure 6 The undercut 128 will be partially filled by part 132 of the decorative layer 130, thus becoming Figure 7 The undercut is reduced to 128'. Figure 7 The bottom width W6' of the opening OP in the middle will be smaller than that of the opening OP in the middle. Figure 5 The bottom width of the opening OP is W6. In other words, by adding part 132 of the embellishment layer 130 at the bottom corner of the opening OP, the outline of the sidewall of the opening OP is embellished, thereby reducing the difference between the bottom and top of the opening OP and making the sidewall of the opening OP more vertical.

[0048] Next refer to Figure 8 and Figure 9The steps S20 for forming the modification layer and S22 for directional etching are repeated multiple times. An additional modification layer 134 is conformally deposited on the unactivated regions 124 of the photoresist layer 120, the exposed top surface of the bottom layer 110, and the sidewalls and top surface of portions 132 of the modification layer 130. In some embodiments, the additional modification layer 134 comprises nitrogen and boron and is formed by a suitable deposition process. Directional etching, such as plasma etching, is used to remove the lateral portions of the modification layer 134 exposed between the unactivated regions 124, while the additional portions 136 of the additional modification layer 134 are retained near the reduced undercut 128'. The bottom width of the opening OP between the unactivated regions 124 is further reduced, and the sidewalls of the opening OP become increasingly vertical.

[0049] Reference Figure 10 After repeated steps S20 (forming the modification layer) and S22 (directional etching), a hard mask layer 140 is formed on the base layer 110. The hard mask layer 140 includes a plurality of hybrid mask features 150 and a plurality of unmodified openings 160 between the hybrid mask features 150. Each hybrid mask feature 150 includes a photoresist body 152, which is an unactivated photoresist material, such as an unactivated polymer resin from a positive chemical amplification photoresist system. The photoresist body 152 has beveled or curved sidewalls such that the top width W7 of the photoresist body 152 is greater than the bottom width W8 of the photoresist body 152.

[0050] The hybrid mask feature 150 further includes a embellishment portion 154 disposed around the photoresist body 152. In some embodiments, the embellishment portion 154 is completely beneath the top surface of the photoresist body 152. The inner surface of the embellishment portion 154 directly contacts the sidewall of the photoresist body 152, and the outer surface of the embellishment portion 154 is substantially perpendicular to the top surface 112 of the base layer 110. The material of the embellishment portion 154 is different from the material of the photoresist body 152. For example, the material of the embellishment portion 154 comprises nitrogen and boron. In some embodiments, the embellishment portion 154 is a multilayer structure comprising a plurality of boron nitride films 156.

[0051] Next, please refer to the following: Figure 5 and Figure 10 ,exist Figure 5 As shown, the undercut 128 at the bottom of the unactivated region 124 is filled by the modified portion 154, as illustrated. Figure 10 As shown, the modification portion 154 is formed by multiple deposition and etching cycles. Because the modification portion 154 is defined by directional etching, the outer surface of the modification portion 154 is substantially perpendicular to the top surface 112 of the bottom layer 110, and the sidewall S1 of the modification opening 160 and the hybrid mask feature 150 is also perpendicular to the top surface 112 of the bottom layer 110.

[0052] Continue to refer to Figure 10 The method for manufacturing the semiconductor structure proceeds to step S24, which includes etching the underlying layer 110 using a hybrid mask feature 150 as a mask. A hard mask layer 140 containing the hybrid mask feature 150 can be used to selectively etch the underlying layer 110 to form a semiconductor structure with high precision and shape and size control. The undercut problem that occurs in conventional positive chemical amplification photoresist systems can be solved by adding a modification portion 154 next to the photoresist body 152. The contour of the hybrid mask feature 150 is modified to be more vertical, and the critical dimension of the hybrid mask feature 150 can be better controlled.

[0053] Although the present invention has been disclosed above by way of embodiments, it is not intended to limit the present invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

[0054] [Symbol Explanation] 100: Substrate 110: Bottom Floor 112: Top surface 120: Photoresist layer 121: Region 122: Activated area 124: Unactivated area 126: Sidewall 128, 128': Undercut 130, 134: Modification layers 132, 136: Partial 140: Hard mask layer 150: Mixed Mask Feature 152: Photoresist main body 154: Modifications 156: Boron nitride thin film 160: Modified opening 200: Mask 300: Exposure process OP: Opening S1: Sidewall S10, S12, S14, S16, S18, S20, S22, S24: Steps W1, W3, W5, W7: Top width W2, W4, W6, W6', W8: Bottom width.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that, Include: The bottom layer is formed on the substrate; A photoresist layer is formed on the underlying layer; An exposure process is performed to define multiple exposed areas of the photoresist layer; A post-exposure baking process is performed to activate the plurality of exposed areas, thereby forming a plurality of activated areas in the photoresist layer, wherein the bottom width of each activated area is greater than the top width of each activated area; Remove the plurality of activated regions, wherein after removing the plurality of activated regions, a plurality of unactivated regions of the photoresist layer remain on the bottom layer, and the top width of each of the unactivated regions is greater than the bottom width of each of the unactivated regions; as well as Multiple modified portions are formed around the multiple unactivated regions to form multiple hybrid masking features on the substrate, wherein the sidewalls of the multiple hybrid masking features are substantially perpendicular to the top surface of the substrate.

2. The method according to claim 1, wherein the photoresist layer comprises an unactivated polymer resin and a photoacid generator, wherein the unactivated polymer resin and the photoacid generator together constitute a positive chemical amplification photoresist system.

3. The method of claim 1, wherein the step of forming a plurality of modified portions comprises performing a plurality of loops, each loop comprising: Conformally deposited modified layers on the plurality of unactivated regions and the underlying layer; and A directional etching process is performed to remove portions of the modified layer that are not protected by the plurality of unactivated regions.

4. The method of claim 3, wherein conformally depositing the modified layer comprises depositing a boron nitride layer on the plurality of unactivated regions and the underlying layer.

5. The method of claim 3, wherein performing the directional etching process comprises plasma etching using argon gas, and the bias power of the plasma etching is 50 watts.

6. The method of claim 1, wherein after the post-exposure baking process is performed, the contour of each of the activated regions is different from the contour of each of the exposed regions.

7. The method according to claim 1, wherein each of the modified portions is a multilayer structure comprising boron and nitrogen.

8. The method according to claim 1, wherein, It also includes performing a soft baking process before performing the exposure process.

9. The method according to claim 1, wherein, It also includes etching the underlying layer using the plurality of hybrid mask features as a mask.

10. The method of claim 1, wherein the sidewalls of the plurality of hybrid masking features are the outer surfaces of the plurality of decorative portions.

11. The method of claim 1, wherein forming the plurality of modified portions comprises modifying the outline of the plurality of openings between the plurality of inactive regions.

12. The method of claim 11, wherein after the plurality of decorative portions are formed, the difference between the top width and the bottom width of each of the openings is reduced.

13. A semiconductor structure, characterized in that, Include: substrate; The bottom layer, on the substrate; and A hard masking layer on the underlying layer, wherein the hard masking layer includes a plurality of hybrid masking features and a plurality of modified openings between the plurality of hybrid masking features, the sidewalls of the plurality of modified openings being substantially perpendicular to the top surface of the underlying layer.

14. The semiconductor structure of claim 13, wherein each of the hybrid masking features comprises: A photoresist body, wherein the top width of the photoresist body is greater than the bottom width of the photoresist body; and The modification portion surrounds the photoresist body.

15. The semiconductor structure according to claim 14, wherein the material of the modified portion is different from the material of the photoresist body.

16. The semiconductor structure of claim 14, wherein the inner surface of the modified portion directly contacts the sidewall of the photoresist body, and the outer surface of the modified portion is substantially perpendicular to the top surface of the underlying layer.

17. The semiconductor structure according to claim 16, wherein the sidewall of the photoresist body is an inclined surface or a curved surface.

18. The semiconductor structure according to claim 14, wherein the photoresist body is an unactivated polymer resin of a positive chemical amplification photoresist system.

19. The semiconductor structure according to claim 14, wherein the modified portion is a multilayer structure comprising boron and nitrogen.

20. The semiconductor structure of claim 14, wherein the modified portion is entirely below the top surface of the photoresist body.

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