Method of manufacturing a semiconductor structure and semiconductor structure

Abstract

The application provides a semiconductor structure manufacturing method and a semiconductor structure. The manufacturing method comprises the following steps: arranging a conductive layer on one side of a carrier plate; forming a first insulating layer on the side of the conductive layer away from the carrier plate; forming a first through hole and a second through hole penetrating through the first insulating layer, and forming a first conductive column partially located in the first through hole and a conductive part at least partially located in the second through hole; the distance from the surface of the first conductive column away from the carrier plate to the carrier plate is greater than the thickness of the first insulating layer; mounting a first electrical element on the side of the first insulating layer away from the carrier plate, and electrically connecting an electrode of the first electrical element with the conductive part; forming a first plastic sealing layer; the first plastic sealing layer at least encapsulates the side surface of the first electrical element and the first conductive column, and the surface of the first conductive column away from the conductive layer is exposed from the first plastic sealing layer.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for manufacturing a semiconductor structure and the semiconductor structure itself. Background Technology

[0002] In common semiconductor packaging processes, when it is necessary to bring the solder pads from the front of the chip to the back, the packaging process may include the following steps: First, a conductive layer and conductive pillars are formed on a substrate; then, the chip is mounted on the conductive layer with the chip's solder pads facing the substrate; finally, a molding compound is formed to encapsulate the chip and the conductive pillars. In this way, the conductive pillars bring the chip's solder pads to the back of the chip for electrical connection with electrical components located on the back of the chip.

[0003] However, during the above process, the conductive pillars are prone to tipping over during subsequent process steps after their formation, which affects the product yield. Summary of the Invention

[0004] This application provides a method for manufacturing a semiconductor structure and a semiconductor structure.

[0005] A first aspect of this application provides a method for manufacturing a semiconductor structure. The manufacturing method includes:

[0006] A conductive layer is provided on one side of the carrier plate;

[0007] A first insulating layer is formed on the side of the conductive layer away from the carrier plate;

[0008] A first through-hole and a second through-hole are formed through the first insulating layer, and a first conductive post is partially located in the first through-hole and a conductive portion is at least partially located in the second through-hole; the distance from the surface of the first conductive post away from the carrier plate to the carrier plate is greater than the thickness of the first insulating layer;

[0009] The first electrical component is mounted on the side of the first insulating layer away from the carrier plate, and the electrodes of the first electrical component are electrically connected to the conductive part.

[0010] A first molding compound is formed; the first molding compound at least encapsulates the side of the first electrical component and the first conductive post, and the surface of the first conductive post away from the conductive layer is exposed outside the first molding compound.

[0011] In one embodiment, the conductive part is made of solder.

[0012] In one embodiment, the material of the conductive portion is different from the material of the first conductive pillar; the melting point of the first conductive pillar is higher than the melting point of the conductive portion.

[0013] In one embodiment, forming a first through-hole and a second through-hole penetrating the first insulating layer, and forming a first conductive post partially located in the first through-hole and a conductive portion at least partially located in the second through-hole, includes:

[0014] A second through-hole is formed that penetrates the first insulating layer, and a conductive portion is formed that is at least partially located within the second through-hole;

[0015] A first through-hole is formed through the first insulating layer, and a second insulating layer is provided on the side of the first insulating layer away from the carrier plate to cover the conductive part. The second insulating layer is provided with a third through-hole that exposes the second through-hole.

[0016] A first sub-conductive post is formed within the first through hole and the third through hole;

[0017] A third insulating layer with a fourth through hole is provided on the side of the second insulating layer away from the first insulating layer, and a second sub-conductive post is formed in the fourth through hole. The second sub-conductive post is connected to the first sub-conductive post, thus obtaining a conductive post including the first sub-conductive post and the second conductive post.

[0018] Remove the second insulating layer and the third insulating layer.

[0019] In one embodiment, the first insulating layer has a plurality of second through holes, and a conductive post is formed in each of the second through holes; the step of forming the conductive portion includes:

[0020] The conductive part is formed by electroplating.

[0021] In one embodiment, after forming the first molding compound on the side of the first insulating layer away from the carrier substrate, the method of manufacturing the semiconductor structure further includes:

[0022] A first trace layer is formed on the side of the first molding layer away from the carrier plate; the first trace layer is electrically connected to the first conductive post;

[0023] A second electrical component is mounted on the side of the first trace layer away from the first molding layer, and the electrodes of the second electrical component are electrically connected to the first trace layer.

[0024] A second molding layer is formed to encapsulate the first trace layer and the second electrical component.

[0025] In one embodiment, after forming the first molding compound on the side of the first insulating layer away from the carrier substrate, the method of manufacturing the semiconductor structure further includes:

[0026] Remove the carrier plate and the conductive layer;

[0027] A fourth insulating layer is formed on the side of the first insulating layer away from the first electrical component;

[0028] Multiple hollow areas are formed that penetrate the fourth insulating layer; each of the first conductive pillars is exposed by one of the hollow areas, and each of the conductive portions is exposed by one of the hollow areas;

[0029] A second trace layer and a second conductive post are formed. The second trace layer includes a plurality of traces, each of which is located within a cutout area. The second conductive post is located on the side of the second trace layer away from the first insulating layer and is connected to the trace. The conductive part and the first conductive post are respectively electrically connected to the trace.

[0030] A third electrical component is mounted on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer.

[0031] A third molding layer is formed, which encapsulates the third electrical component and the second conductive post.

[0032] In one embodiment, after forming the first molding compound on the side of the first insulating layer away from the carrier substrate, the method of manufacturing the semiconductor structure further includes:

[0033] Remove the carrier plate to expose the conductive layer;

[0034] The conductive layer is patterned to obtain a second trace layer, which includes multiple traces. The conductive part and the first conductive post are electrically connected to the traces respectively.

[0035] A second conductive post is formed on the side of the second trace layer away from the first insulating layer, and the second conductive post is electrically connected to the trace.

[0036] A third electrical component is mounted on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer.

[0037] A third molding layer is formed, which encapsulates the third electrical component, the second trace layer, and the second conductive post.

[0038] A second aspect of this application provides a semiconductor structure, the semiconductor structure comprising:

[0039] The first insulating layer is provided with a first through hole and a second through hole;

[0040] The first conductive post is partially located within the first through hole, and the first conductive post extends beyond the first insulating layer.

[0041] The conductive portion is at least partially inside the second through hole;

[0042] A first electrical component is attached to one side of the first insulating layer and is located on the same side of the first insulating layer as the portion of the first conductive post that extends beyond the first insulating layer. The electrodes of the first electrical component are electrically connected to the conductive portion.

[0043] The first molding compound encapsulates at least the side of the first electrical component and the portion of the first conductive post that extends beyond the first insulating layer, with the surface of the first conductive post away from the first insulating layer exposed by the first molding compound.

[0044] In one embodiment, the conductive part is made of solder; the material of the conductive part is different from the material of the first conductive post, and the melting point of the first conductive post is higher than that of the conductive part.

[0045] In one embodiment, the semiconductor structure further includes:

[0046] The first trace layer is located on the side of the first molding layer away from the first insulating layer; the first trace layer is electrically connected to the first conductive pillar;

[0047] The second electrical component is located on the side of the first trace layer away from the first molding layer, and the electrodes of the second electrical component are electrically connected to the first trace layer.

[0048] The second molding layer encapsulates the first trace layer and the second electrical component;

[0049] And / or,

[0050] The semiconductor structure also includes:

[0051] A fourth insulating layer is located on the side of the first insulating layer away from the first electrical component. The fourth insulating layer has a plurality of cutout areas. Each of the first conductive posts is exposed by one of the cutout areas. Each of the conductive portions is exposed by one of the cutout areas.

[0052] The second trace layer includes multiple traces, each of which is located within a cutout area; the first conductive post and the conductive part are respectively electrically connected to the trace.

[0053] The second conductive post is located on the side of the second trace layer away from the first insulating layer and is connected to the trace;

[0054] A third electrical component is located on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer.

[0055] The third molding layer encapsulates the third electrical component and the second conductive post.

[0056] The main technical effects achieved by the embodiments of this application are:

[0057] The semiconductor structure manufacturing method and semiconductor structure provided in this application embodiment first form a first insulating layer, then form a first through hole and a second through hole penetrating the first insulating layer, and form a first conductive post partially located in the first through hole and a conductive part located in the second through hole. After the first conductive post is formed, since the end of the first conductive post is covered by the first insulating layer, the first insulating layer can play the role of fixing the first conductive post. Even if the first conductive post is subjected to external force in subsequent process steps, it is not easy to tilt or break. Compared with the solution where the end of the first conductive post is not covered by the insulating layer, the embodiment of this application can greatly reduce the risk of the first conductive post tilting and breaking, and improve the yield of the semiconductor structure. Attached Figure Description

[0058] Figure 1 This is a flowchart of a method for manufacturing a semiconductor structure provided in an exemplary embodiment of this application;

[0059] Figure 2 This is a partial cross-sectional view of the first intermediate structure provided in an exemplary embodiment of this application;

[0060] Figure 3 This is a partial cross-sectional view of the second intermediate structure provided in an exemplary embodiment of this application;

[0061] Figure 4 This is a partial cross-sectional view of the third intermediate structure provided in an exemplary embodiment of this application;

[0062] Figure 5 This is a partial cross-sectional view of the fourth intermediate structure provided in an exemplary embodiment of this application;

[0063] Figure 6 This is a partial cross-sectional view of the fifth intermediate structure provided in an exemplary embodiment of this application;

[0064] Figure 7 This is a partial cross-sectional view of the sixth intermediate structure provided in an exemplary embodiment of this application;

[0065] Figure 8 This is a partial cross-sectional view of the seventh intermediate structure provided in an exemplary embodiment of this application;

[0066] Figure 9 This is a partial cross-sectional view of the eighth intermediate structure provided in an exemplary embodiment of this application;

[0067] Figure 10This is a partial cross-sectional view of the ninth intermediate structure provided in an exemplary embodiment of this application;

[0068] Figure 11 This is a partial cross-sectional view of the tenth intermediate structure provided in an exemplary embodiment of this application;

[0069] Figure 12 This is a partial cross-sectional view of the eleventh intermediate structure provided in an exemplary embodiment of this application;

[0070] Figure 13 This is a partial cross-sectional view of the twelfth intermediate structure provided in an exemplary embodiment of this application;

[0071] Figure 14 This is a partial cross-sectional view of the thirteenth intermediate structure provided in an exemplary embodiment of this application;

[0072] Figure 15 This is a partial cross-sectional view of the fourteenth intermediate structure provided in an exemplary embodiment of this application;

[0073] Figure 16 This is a partial cross-sectional view of the fifteenth intermediate structure provided in an exemplary embodiment of this application;

[0074] Figure 17 This is a partial cross-sectional view of the sixteenth intermediate structure provided in an exemplary embodiment of this application;

[0075] Figure 18 This is a partial cross-sectional view of the seventeenth intermediate structure provided in an exemplary embodiment of this application;

[0076] Figure 19 This is a partial cross-sectional view of the eighteenth intermediate structure provided in an exemplary embodiment of this application;

[0077] Figure 20 This is a partial cross-sectional view of the nineteenth intermediate structure provided in an exemplary embodiment of this application;

[0078] Figure 21 This is a partial cross-sectional view of the twentieth intermediate structure provided in an exemplary embodiment of this application;

[0079] Figure 22 This is a partial cross-sectional view of the twenty-first intermediate structure provided in an exemplary embodiment of this application;

[0080] Figure 23 This is a partial cross-sectional view of the twenty-second intermediate structure provided in an exemplary embodiment of this application;

[0081] Figure 24 This is a partial cross-sectional view of the twenty-third intermediate structure provided in an exemplary embodiment of this application;

[0082] Figure 25 This is a partial cross-sectional view of a semiconductor structure provided in an exemplary embodiment of this application;

[0083] Figure 26 This is a partial cross-sectional view of a semiconductor structure provided in another exemplary embodiment of this application. Specific Implementation

[0084] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0085] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0086] It should be understood that although the terms first, second, third, etc., may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to determination."

[0087] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0088] This application provides a method for manufacturing a semiconductor structure. See also... Figure 1 The method for manufacturing the semiconductor structure includes the following steps 110 to 150.

[0089] In step 110, a conductive layer is provided on one side of the carrier plate.

[0090] In step 120, a first insulating layer is formed on the side of the conductive layer away from the carrier plate.

[0091] In step 130, a first through hole and a second through hole are formed through the first insulating layer, and a first conductive post is formed partially located in the first through hole and a conductive portion is formed at least partially located in the second through hole; the distance from the surface of the first conductive post away from the carrier plate to the carrier plate is greater than the thickness of the first insulating layer.

[0092] In step 140, the first electrical component is attached to the side of the first insulating layer away from the carrier plate, and the electrodes of the first electrical component are electrically connected to the conductive part.

[0093] In step 150, a first molding compound is formed; the first molding compound at least encapsulates the side of the first electrical component and the first conductive post, and the surface of the first conductive post away from the conductive layer is exposed in the first molding compound.

[0094] The semiconductor structure manufacturing method provided in this application first forms a first insulating layer, then forms a first through-hole and a second through-hole penetrating the first insulating layer, and forms a first conductive pillar partially located in the first through-hole and a conductive portion located in the second through-hole. After the first conductive pillar is formed, since the end of the first conductive pillar is covered by the first insulating layer, the first insulating layer can fix the first conductive pillar. Even if the first conductive pillar is subjected to external force in subsequent process steps, it is not easy to tilt or break. Compared with the solution where the end of the first conductive pillar is not covered by the insulating layer, the embodiment of this application can greatly reduce the risk of the first conductive pillar tilting and breaking, and improve the yield of the semiconductor structure.

[0095] The following will describe in detail each step of the semiconductor structure manufacturing method provided in the embodiments of this application.

[0096] In step 110, a conductive layer is provided on one side of the carrier plate.

[0097] In one embodiment, step 110 can be achieved by mounting a substrate with a conductive layer on a carrier plate. In this embodiment, step 110 can yield the following result: Figure 2 The semiconductor intermediate structure is shown. (As shown in the image) Figure 2 As shown, substrate 20 is attached to carrier plate 11 via adhesive layer 12. Substrate 20 includes support plate 21 and conductive layer 22 located on the side of support plate 21 away from carrier plate 11. Attaching substrate 20, which has support plate 21 and conductive layer 22, to carrier plate 11 helps avoid warping of conductive layer 22 compared to directly attaching conductive layer to carrier plate 11.

[0098] In one embodiment, the support plate 21 may be made of ceramic, and the conductive layer 22 may be made of copper.

[0099] In one embodiment, the thickness of the substrate 20 is less than or equal to 150 μm. This reduces the time required for the grinding process when removing the substrate 20 or its support plate 21 in subsequent process steps.

[0100] In one embodiment, the adhesive layer 12 may be made of an easily peelable material so that the carrier plate can be peeled off in subsequent steps. For example, the adhesive layer 12 may be made of a heat-removable material that can be de-adhesive by heating.

[0101] In one embodiment, the carrier plate 11 may be circular, rectangular, or other shapes. The carrier plate 11 may be a small-sized wafer substrate or a larger-sized carrier plate, such as a stainless steel plate substrate, a polymer substrate, etc.

[0102] In step 120, a first insulating layer is formed on the side of the conductive layer away from the carrier plate.

[0103] This step yields the following result: Figure 3 The second intermediate structure shown. (As shown) Figure 3 As shown, the first insulating layer 31 covers at least a portion of the surface of the conductive layer 22.

[0104] In one embodiment, the material of the first insulating layer 31 may be a photosensitive material, so as to facilitate the patterning of the first insulating layer 31 in subsequent steps, while ensuring the strength and high temperature resistance of the first insulating layer 31.

[0105] In step 130, a first through hole and a second through hole are formed through the first insulating layer, and a first conductive post is formed partially located in the first through hole and a conductive portion is formed at least partially located in the second through hole; the distance from the surface of the first conductive post away from the carrier plate to the carrier plate is greater than the thickness of the first insulating layer.

[0106] In one embodiment, the conductive part is made of solder. This configuration ensures good solder wettability during subsequent soldering steps between the electrodes of the first electrical component and the conductive part, effectively improving the soldering quality and preventing poor mounting of the first electrical component. Even if the distance between the electrodes of the first electrical component is small, the soldering process can correct any misalignment of the first electrical component relative to the conductive part. In some embodiments, the conductive part is made of tin.

[0107] In one embodiment, when the conductive part is made of solder, the first conductive post is made of a different material than the conductive part, and the melting point of the first conductive post is higher than that of the conductive part. Because the conductive part is made of solder, which has a lower melting point, and the first conductive post is made of a different material than the conductive part, and its melting point is higher, this avoids the problem of the first conductive post melting during the mounting of the first electrical component, which could alter its shape and thus affect the quality of the semiconductor structure.

[0108] In one embodiment, step 130 above may include the following process:

[0109] First, a second through-hole is formed that penetrates the first insulating layer.

[0110] This step yields the following result: Figure 4 The third intermediate structure shown. (As shown in the image) Figure 4 As shown, the first insulating layer 31 has a plurality of spaced second through holes 311. The second through holes 311 can be formed by an exposure and development process, and the first insulating layer 31 is cured after exposure and development.

[0111] Subsequently, a conductive portion is formed, at least partially located within the second through hole.

[0112] This step yields the following result: Figure 5 The fourth intermediate structure is shown. (As shown in the image.) Figure 5 As shown, a conductive part 32 is formed in each of the second through holes 311.

[0113] In one embodiment, the step of forming the conductive portion includes the following process: forming the conductive portion using an electroplating process. Compared to forming the conductive portion using an adhesive dispensing process, forming the conductive portion using an electroplating process results in better height uniformity of each conductive portion, which is beneficial to ensuring the reliability of the welding between each conductive portion and the first electrical component.

[0114] In one embodiment, the surface of the conductive portion away from the conductive layer extends beyond the surface of the first insulating layer away from the conductive layer. This arrangement helps to further improve the welding quality between the conductive portion and the first electrical component. In some embodiments, the distance between the surface of the conductive portion away from the conductive layer and the surface of the first insulating layer away from the conductive layer can be 5 μm to 10 μm.

[0115] Subsequently, a first through-hole is formed through the first insulating layer, and a second insulating layer is provided on the side of the first insulating layer away from the carrier plate to cover the conductive part. The second insulating layer has a third through-hole that exposes the second through-hole.

[0116] In one embodiment, the step may include the following process: first, forming a first through-hole penetrating the first insulating layer; then, providing a second insulating layer covering the first insulating layer, the conductive portion, and the first through-hole; and finally, forming a third through-hole exposing the second through-hole in the second insulating layer. After forming the first through-hole penetrating the first insulating layer, the following can be obtained: Figure 6 The fifth intermediate structure is shown. (As shown in the image.) Figure 6 As shown, the first insulating layer 31 has a plurality of first through holes 312. The first through holes 312 can be formed using a laser etching process. After forming the third through hole in the second insulating layer, the following can be obtained: Figure 7 The sixth intermediate structure is shown. (As shown in the image.) Figure 7 As shown, the second insulating layer 33 has a plurality of third through holes 331, each corresponding to a first through hole 312, with each third through hole 331 exposing a corresponding first through hole 312. In some embodiments, the second insulating layer 33 may be a pre-fabricated resin film, which is laminated onto the first insulating layer 31 by means of lamination; the third through holes 331 may be formed by laser etching. In another embodiment, the first through holes 312 and the third through holes 331 may be formed simultaneously in a single laser etching process.

[0117] Subsequently, a first sub-conductive post is formed within the first through hole and the third through hole.

[0118] This step yields the following result: Figure 8 The seventh intermediate structure is shown. (As shown in the image.) Figure 8 As shown, the first sub-conductive post 34 is located within the first through hole 312 and the corresponding third through hole 331. In some embodiments, the first sub-conductive post may be formed using an electroplating process.

[0119] Subsequently, a third insulating layer with a fourth through hole is provided on the side of the second insulating layer away from the first insulating layer, and a second sub-conductive post is formed in the fourth through hole. The second sub-conductive post is connected to the first sub-conductive post, thus obtaining a conductive post including the first sub-conductive post and the second conductive post.

[0120] In one embodiment, this step can be performed multiple times: setting an insulating film layer, forming a through-hole on the insulating film layer opposite to the first sub-conductive post, and forming a conductive structure within the through-hole. After the first formation of the insulating film layer and the conductive structure, the following can be obtained: Figure 9 The eighth intermediate structure is shown. (As shown in the image.) Figure 9 As shown, the conductive structure 36 is located within the through-hole of the insulating film layer 35, and each first sub-conductive post 34 is in contact with one conductive structure 36. After performing the above steps multiple times, the following can be obtained: Figure 10 The ninth intermediate structure shown. (As shown) Figure 10As shown, two adjacent conductive structures 36 are connected, and multiple stacked conductive structures 36 constitute a second sub-conductive pillar 37; the first conductive pillar 38 includes a first sub-conductive pillar 34 and a second sub-conductive pillar 37; all stacked insulating film layers 35 together form a third insulating layer, and the through holes of all insulating film layers 35 are connected to form a fourth through hole.

[0121] In some embodiments, an electroplating process may be used to form the conductive structure 36.

[0122] In some embodiments, the height of the first conductive post 38 may be greater than 300 μm, and the maximum diameter may be in the range of 60 μm to 300 μm.

[0123] Subsequently, the second insulating layer and the third insulating layer are removed.

[0124] This step yields the following result: Figure 11 The tenth intermediate structure is shown. The first insulating layer prevents the first conductive post from tipping over or breaking during this step.

[0125] In step 140, the first electrical component is attached to the side of the first insulating layer away from the carrier plate, and the electrodes of the first electrical component are electrically connected to the conductive part.

[0126] This step yields the following result: Figure 12 The eleventh intermediate structure is shown. (See example...) Figure 12 As shown, the first electrical component 40 has a plurality of solder balls 41 on the side facing the first insulating layer 31. The solder balls 41 are electrically connected to the electrodes of the first electrical component 40, leading out the electrodes of the first electrical component 40. Each solder ball 41 is soldered to a conductive part 32, thereby realizing the electrical connection between the electrodes of the first electrical component 40 and the conductive part 32. The surface of the first conductive post 38 away from the first insulating layer 31 extends beyond the surface of the first electrical component 40 away from the first insulating layer 31.

[0127] In one embodiment, the first electrical component includes at least one of a chip and a passive component, wherein the passive component includes at least one of an inductor, a resistor, and a capacitor. In the illustrated embodiment, the first electrical component is a chip, which includes multiple solder pads, which are the electrodes of the electrical component.

[0128] In step 150, a first molding compound is formed; the first molding compound at least encapsulates the side of the first electrical component and the first conductive post, and the surface of the first conductive post away from the conductive layer is exposed in the first molding compound.

[0129] This step yields the following result: Figure 13 The twelfth intermediate structure shown. (Example) Figure 13As shown, the first molding compound 50 encapsulates the side surface of the first electrical component 40 and the surface away from the first insulating layer 31, and also encapsulates the portion of the first conductive post 38 that extends beyond the first insulating layer 31. During the formation of the first molding compound, the first insulating layer can effectively prevent the first conductive post from tilting or breaking due to the impact of the molding compound on it.

[0130] In one embodiment, before forming the first molding layer 50, some pretreatment steps, such as chemical cleaning or plasma cleaning, can be performed to remove impurities from the surfaces of the first electrical component 40, the first insulating layer 31, and the first conductive post 38, so that the first molding layer 50 can be more closely connected to the first electrical component 40, the first insulating layer 31, and the first conductive post 38, and that delamination or cracking will not occur.

[0131] In one embodiment, the material of the first molding compound 50 can be a polymer resin, a resin composite material, or a polymer composite material. For example, the first molding compound 50 can be a resin with fillers, wherein the fillers can be inorganic particles. The first molding compound 50 can be formed by injection molding, compression molding, or transfer molding.

[0132] In one embodiment, after step 150 of forming a first molding compound on the side of the first insulating layer away from the carrier substrate, the method of manufacturing the semiconductor structure further includes the following steps:

[0133] First, a first trace layer is formed on the side of the first molding layer away from the carrier plate; the first trace layer is electrically connected to the first conductive pillar.

[0134] This step yields the following result: Figure 14 The thirteenth intermediate structure is shown. (See example...) Figure 14 As shown, the first trace layer 71 is located on the side of the first molding layer 50 away from the first insulating layer 31, and includes a plurality of traces 711. In some embodiments, each trace 711 may be electrically connected to a first conductive post 38.

[0135] Subsequently, a second electrical component is mounted on the side of the first trace layer away from the first encapsulation layer, and the electrodes of the second electrical component are electrically connected to the first trace layer.

[0136] This step yields the following result: Figure 15 The fourteenth intermediate structure shown. (See example...) Figure 15 As shown, two or more second electrical components 60 are mounted on the side of the first trace layer 71 away from the first molding compound 50. The electrodes of the second electrical components 60 are electrically connected to the trace 711 through the solder layer 72. Therefore, the second electrical components 60 are electrically connected to the first electrical component 40 through the first trace layer 71, the first conductive post 38, and the conductive layer 22.

[0137] In one embodiment, the second electrical component includes at least one of a chip and a passive component, wherein the passive component includes at least one of an inductor, a resistor, and a capacitor. In the illustrated embodiment, the second electrical component is a passive component.

[0138] Subsequently, a second molding layer is formed to encapsulate the first trace layer and the second electrical component.

[0139] This step yields the following result: Figure 16 The fifteenth intermediate structure shown. (Example) Figure 16 As shown, the second molding layer 73 encapsulates the side surface of the second electrical component 60 and the surface away from the first molding layer 50, and also encapsulates the first trace layer 71.

[0140] In some embodiments, before forming the second molding layer 73, some pretreatment steps, such as chemical cleaning or plasma cleaning, may be performed so that the second molding layer 73 can be more closely connected with the second electrical component 60, the first molding layer 50 and the first trace layer 71, and delamination or cracking will not occur.

[0141] In one embodiment, the material of the second molding layer 73 can be a polymer resin, a resin composite material, or a polymer composite material. For example, the second molding layer 73 can be a resin with fillers, wherein the fillers can be inorganic particles. The second molding layer 73 can be formed by injection molding, compression molding, or transfer molding.

[0142] In one embodiment, after step 150 of forming a first molding compound on the side of the first insulating layer away from the carrier, the method of manufacturing the semiconductor structure further includes the following process:

[0143] First, the carrier plate is removed to expose the conductive layer.

[0144] In one embodiment, this step can be performed after the step of forming the second molding layer. After removing the carrier substrate, the method for manufacturing the semiconductor structure further includes the step of mounting the structure obtained after removing the carrier substrate onto the carrier substrate, with the substrate located on the side of the first molding layer away from the carrier substrate. In some embodiments, this step can achieve the following through the above steps: Figure 17 The sixteenth intermediate structure shown. (Example) Figure 17 As shown, the second molding layer 73 is attached to the carrier plate 13 through the adhesive layer 14, and the substrate 20 is exposed.

[0145] In one embodiment, after removing the carrier plate 13, the method for manufacturing the semiconductor structure further includes: removing the support plate 21 using a polishing process, thereby exposing the conductive layer 22. This step yields a structure as shown in the figure. Figure 18The seventeenth intermediate structure shown. (As shown) Figure 18 As shown, conductive layer 22 is exposed.

[0146] Subsequently, the conductive layer is patterned to obtain a second trace layer, which includes multiple traces. The conductive portion and the first conductive post are electrically connected to the traces respectively.

[0147] This step yields the following result: Figure 19 The eighteenth intermediate structure shown. (Example) Figure 19 As shown, the conductive layer 22 forms a second trace layer 52, which includes a plurality of traces 522. The first conductive post 38 and the conductive part 32 are electrically connected to the traces 522 respectively.

[0148] In this embodiment, a conductive layer is used to fabricate the second trace layer, which simplifies the fabrication process of the second trace layer.

[0149] Subsequently, a second conductive post is formed on the side of the second trace layer away from the first insulating layer, and the second conductive post is electrically connected to the trace.

[0150] This step yields the following result: Figure 20 The nineteenth intermediate structure shown. (As shown) Figure 20 As shown, the second conductive post 80 is located on the side of the second trace layer 52 away from the first molding layer 50 and is connected to the second trace layer 52; the second conductive post 80 includes a plurality of stacked conductive structures 81.

[0151] In one embodiment, the preparation process of the second conductive post 80 can be the same as the preparation process of the second sub-conductive post 37, and will not be described again.

[0152] Subsequently, a third electrical component is mounted on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer.

[0153] This step yields the following result: Figure 21 The twentieth intermediate structure is shown. (Example) Figure 21As shown, the third electrical component 91 has a plurality of solder balls 74 on the side facing the first insulating layer 31. The solder balls 74 are electrically connected to the electrodes of the third electrical component 91, leading out the electrodes of the third electrical component 91. Each solder ball 74 is soldered to a trace 522, and at least one solder ball 74 is electrically connected to the second conductive post 80 through the trace 522. Since the first conductive post 38 is electrically connected to the second electrical component 60 through the first trace layer 71, the second conductive post 80 is electrically connected to the third electrical component 91 and the first conductive post 38 through the second trace layer 52, and the first electrical component 40 is electrically connected to the third electrical component 91 through the conductive part 32, the first electrical component 40, the second electrical component 60, and the third electrical component 91 are electrically connected to each other.

[0154] In one embodiment, the third electrical component 91 includes at least one of a chip and a passive component, wherein the passive component includes at least one of an inductor, a resistor, and a capacitor. In the illustrated embodiment, the third electrical component 91 is a chip including multiple solder pads, which are the electrodes of the electrical component.

[0155] Subsequently, a third molding layer is formed, which encapsulates the third electrical component, the second trace layer, and the second conductive post.

[0156] This step yields the following result: Figure 22 The twenty-first intermediate structure is shown. (Example) Figure 22 As shown, the third molding layer 75 encapsulates the third electrical component 91, the second trace layer 52, and the second conductive post 80, with the second conductive post 80 exposed away from the surface of the first molding layer 50. In some embodiments, such as Figure 21 As shown, the surface of the third electrical component 91 is exposed away from the first molding layer 50.

[0157] In one embodiment, the initially formed third molding layer 75 is relatively thick, capable of encapsulating the surface of the third electrical component 91 away from the first molding layer 50 and the surface of the second conductive post 80 away from the first molding layer 50. The third molding layer 75 can be thinned to expose the surfaces of the third electrical component 91 and the second conductive post 80 away from the first molding layer 50.

[0158] In some embodiments, before forming the third molding layer 75, some pretreatment steps, such as chemical cleaning or plasma cleaning, can be performed so that the third molding layer 75 can be more closely connected with the third electrical component 91, the first insulating layer 31, the second trace layer 52 and the second conductive post 80, and delamination or cracking will not occur.

[0159] In some embodiments, the material of the third molding layer 75 can be a polymer resin, a resin composite material, a polymer composite material, etc. For example, the third molding layer 750 can be a resin with fillers, wherein the fillers can be inorganic particles. The third molding layer 75 can be formed by injection molding, compression molding, or transfer molding.

[0160] In another embodiment, after step 150 of forming a first molding compound on the side of the first insulating layer away from the carrier plate, the method of manufacturing the semiconductor structure further includes the following steps:

[0161] First, remove the carrier plate and the conductive layer.

[0162] This step can be performed after the step of forming the second molding compound. After removing the carrier plate and before removing the conductive layer, the method for manufacturing the semiconductor structure further includes the step of mounting the structure obtained after removing the carrier plate onto the carrier plate, with the substrate located on the side of the first molding compound away from the carrier plate. In this embodiment, removing the carrier plate and the conductive layer yields the following... Figure 23 The twenty-second intermediate structure is shown. (Example) Figure 23 As shown, the surface of the first conductive post 38 is exposed away from the first molding layer 50.

[0163] In one embodiment, a grinding process can be used to remove the support plate 21 and the conductive layer 22.

[0164] Subsequently, a fourth insulating layer is formed on the side of the first insulating layer away from the first electrical component.

[0165] Subsequently, a plurality of cutout areas are formed penetrating the fourth insulating layer; each of the first conductive pillars is exposed by one of the cutout areas; each of the conductive portions is exposed by one of the cutout areas.

[0166] Subsequently, a second trace layer and a second conductive post are formed. The second trace layer includes a plurality of traces, each of which is located within a cutout area. The second conductive post is located on the side of the second trace layer away from the first insulating layer and is connected to the surface of the trace away from the first insulating layer. The conductive part and the first conductive post are electrically connected to the second trace layer.

[0167] This step yields the following result: Figure 24 The twenty-third intermediate structure is shown. (Example) Figure 24 As shown, the second trace layer 52 includes a plurality of traces 522, each trace 522 being located within the cutout area of ​​the fourth insulating layer 76 and connected to the conductive portion 32 to achieve electrical connection between the two.

[0168] In one embodiment, the process of forming the second trace layer and the second conductive pillar may include: forming a seed layer, which is a continuous film layer partially located within the cutout area of ​​the fourth insulating layer 76; forming a photoresist layer to cover the portion of the seed layer located on the side of the fourth insulating layer 76 away from the first molding compound 50; forming a conductive material located within the cutout area using an electroplating process; forming a photoresist layer covering the conductive material; forming a second conductive pillar 80 using an electroplating process, wherein the process for forming the second conductive pillar 80 may be the same as that for the second sub-conductive pillar 37; removing the photoresist layer and removing the portion of the seed layer located on the side of the fourth insulating layer 76 away from the first molding compound 50, to obtain a second trace layer 52 including the seed layer and the conductive material.

[0169] In this embodiment, since the trace 522 of the second trace layer 52 is covered by the fourth insulating layer 76, and the second conductive post 80 is connected to the trace 522, the fourth insulating layer 76 can fix the second conductive post 80. Therefore, after the second conductive post 80 is prepared, even if the second conductive post 80 is subjected to external force during the removal of the dry film and the subsequent formation of the third molding layer, it is not easy for the second conductive post 80 to tilt or break, which helps to improve the yield of the semiconductor structure.

[0170] Subsequently, a third electrical component is mounted on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer.

[0171] The intermediate structure obtained through this step and Figure 21 The only difference in the twentieth intermediate structure shown is the inclusion of a fourth insulating layer 76; the relevant details will not be elaborated further.

[0172] Subsequently, a third molding layer is formed, which encapsulates the third electrical component, the second trace layer, and the second conductive post.

[0173] The intermediate structure obtained through this step and Figure 22 The only difference in the twenty-first intermediate structure shown is the inclusion of a fourth insulating layer 76; the relevant details will not be elaborated further.

[0174] In one embodiment, after the step of forming the third molding layer, the method for manufacturing the semiconductor structure further includes the step of forming a pin on the side of the third molding layer away from the first molding layer, the pin being electrically connected to a second conductive post. After forming the pin and removing the carrier plate 14, the following can be obtained: Figure 25 Or such as Figure 26 The semiconductor structure shown. (As shown in the image) Figure 25 and Figure 26 As shown, each pin 92 is electrically connected to a second conductive post 80.

[0175] In one embodiment, such as Figure 25 and Figure 26 As shown, after the step of forming the third molding compound, the method for manufacturing the semiconductor structure further includes the following step: forming a plurality of heat dissipation portions 93 on the side of the third molding compound away from the first molding compound, each heat dissipation portion 93 being in direct contact with the surface of a third electrical component 91 away from the first molding compound 50, to improve the heat dissipation performance of the semiconductor structure. The heat dissipation portion 93 and the lead 92 can be formed simultaneously in the same process step, and both can be made of metal, such as copper.

[0176] In one embodiment, the method for manufacturing the semiconductor structure further includes: cutting the semiconductor structure to obtain a plurality of semiconductor substructures, each substructure including at least one first electrical component, a second electrical component electrically connected to the first electrical component, and a third electrical component.

[0177] This application also provides a semiconductor structure. For example... Figure 25 and Figure 26 As shown, the semiconductor structure includes a first insulating layer 31, a first conductive pillar 38, a conductive portion 32, a first electrical component 40, and a first molding compound 50. The first insulating layer 31 has a first through-hole and a second through-hole. A portion of the first conductive pillar 38 is located within the first through-hole, and a portion of the first conductive pillar 38 extends beyond the first insulating layer 31. The conductive portion 32 is at least partially located within the second through-hole. The first electrical component 40 is mounted on one side of the first insulating layer 31, and is located on the same side of the first insulating layer 31 as the portion of the first conductive pillar 38 extending beyond the first insulating layer 31. The electrodes of the first electrical component 40 are electrically connected to the conductive portion 32. The first molding compound 50 at least encapsulates the side surface of the first electrical component 40 and the portion of the first conductive pillar 38 extending beyond the first insulating layer 31, and the surface of the first conductive pillar 38 away from the first insulating layer 31 is exposed within the first molding compound 50.

[0178] In one embodiment, the conductive part 32 is made of solder; the material of the conductive part 32 is different from the material of the first conductive post 38, and the melting point of the first conductive post 38 is higher than that of the conductive part 32.

[0179] In one embodiment, such as Figure 25 and Figure 26As shown, the semiconductor structure further includes a first trace layer 71, a second electrical component 60, and a second molding compound 73. The first trace layer 71 is located on the side of the first molding compound 50 away from the first insulating layer 31; the first trace layer 71 is electrically connected to the first conductive post 38. The second electrical component 60 is located on the side of the first trace layer 71 away from the first molding compound 50, and the electrodes of the second electrical component 60 are electrically connected to the first trace layer 71; the second molding compound 73 encapsulates the first trace layer 71 and the second electrical component 60.

[0180] In one embodiment, such as Figure 26 As shown, the semiconductor structure further includes a fourth insulating layer 76, a second trace layer 52, a second conductive pillar 80, a third electrical component 91, and a third molding compound 75. The fourth insulating layer 76 is located on the side of the first insulating layer 31 away from the first electrical component 40, and the fourth insulating layer 76 has multiple cutout areas; each of the first conductive pillars 38 is exposed by one of the cutout areas; each of the conductive portions 32 is exposed by one of the cutout areas. The second trace layer 52 includes multiple traces 522, each trace 522 located within one of the cutout areas; the first conductive pillars 38 and the conductive portions 32 are electrically connected to the traces 522 respectively. The second conductive pillar 80 is located on the side of the second trace layer 52 away from the first insulating layer 31 and is connected to the traces 522. The third electrical component 91 is located on the side of the second trace layer 52 away from the first insulating layer 31, and the electrodes of the third electrical component 91 are electrically connected to the second trace layer 52. The third molding layer 75 encapsulates the third electrical component 91 and the second conductive post 80.

[0181] In one embodiment, such as Figure 25 and Figure 26 As shown, the semiconductor structure also includes pins 92 located on the side of the third molding layer 75 away from the first insulating layer 31, and each pin 92 is electrically connected to a second conductive post 80.

[0182] In one embodiment, such as Figure 25 and Figure 26 As shown, the surface of the third electrical component 91 away from the first insulating layer 31 is exposed. The semiconductor structure also includes a heat dissipation portion 93 located on the side of the third molding compound 75 away from the first insulating layer 31. Each heat dissipation portion 93 is in contact with the surface of the third electrical component 91 exposed on the third molding compound 75.

[0183] The embodiments of the semiconductor structure manufacturing method provided in this application and the embodiments of the semiconductor structure belong to the same inventive concept. The descriptions of relevant details and beneficial effects can be referred to each other, and will not be repeated here.

[0184] It should be noted that the dimensions of layers and regions may be exaggerated in the accompanying drawings for clarity. Furthermore, it is understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or there may be intermediate layers. Additionally, it is understood that when an element or layer is referred to as being "below" another element or layer, it can be directly below the other element, or there may be more than one intermediate layer or element. Furthermore, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or there may be more than one intermediate layer or element. Similar reference numerals throughout indicate similar elements.

[0185] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that, The manufacturing method includes: A conductive layer is provided on one side of the carrier plate; A first insulating layer is formed on the side of the conductive layer away from the carrier plate; A first through-hole and a second through-hole are formed through the first insulating layer, and a first conductive post is partially located in the first through-hole and a conductive portion is at least partially located in the second through-hole; the distance from the surface of the first conductive post away from the carrier plate to the carrier plate is greater than the thickness of the first insulating layer; The first electrical component is mounted on the side of the first insulating layer away from the carrier plate, and the electrodes of the first electrical component are electrically connected to the conductive part. A first molding compound is formed; the first molding compound at least encapsulates the side of the first electrical component and the first conductive post, and the surface of the first conductive post away from the conductive layer is exposed outside the first molding compound.

2. The method for manufacturing a semiconductor structure according to claim 1, characterized in that, The conductive part is made of solder.

3. The method for manufacturing a semiconductor structure according to claim 2, characterized in that, The material of the conductive part is different from the material of the first conductive pillar; the melting point of the first conductive pillar is higher than the melting point of the conductive part.

4. The method for manufacturing a semiconductor structure according to claim 3, characterized in that, The method of forming a first through-hole and a second through-hole penetrating the first insulating layer, and forming a first conductive post partially located in the first through-hole and a conductive portion at least partially located in the second through-hole, includes: A second through-hole is formed that penetrates the first insulating layer, and a conductive portion is formed that is at least partially located within the second through-hole; A first through-hole is formed through the first insulating layer, and a second insulating layer is provided on the side of the first insulating layer away from the carrier plate to cover the conductive part. The second insulating layer is provided with a third through-hole that exposes the second through-hole. A first sub-conductive post is formed within the first through hole and the third through hole; A third insulating layer with a fourth through hole is provided on the side of the second insulating layer away from the first insulating layer, and a second sub-conductive post is formed in the fourth through hole. The second sub-conductive post is connected to the first sub-conductive post, thus obtaining a conductive post including the first sub-conductive post and the second conductive post. Remove the second insulating layer and the third insulating layer.

5. The method for manufacturing a semiconductor structure according to claim 2, characterized in that, The first insulating layer has a plurality of second through holes, and each second through hole contains a conductive post; the step of forming the conductive portion includes: The conductive part is formed by electroplating.

6. The method for manufacturing a semiconductor structure according to claim 1, characterized in that, After forming the first molding compound on the side of the first insulating layer away from the carrier plate, the method of manufacturing the semiconductor structure further includes: A first trace layer is formed on the side of the first molding layer away from the carrier plate; the first trace layer is electrically connected to the first conductive post; A second electrical component is mounted on the side of the first trace layer away from the first molding layer, and the electrodes of the second electrical component are electrically connected to the first trace layer. A second molding layer is formed to encapsulate the first trace layer and the second electrical component.

7. The method for manufacturing a semiconductor structure according to claim 1, characterized in that, After forming the first molding compound on the side of the first insulating layer away from the carrier plate, the method of manufacturing the semiconductor structure further includes: Remove the carrier plate and the conductive layer; A fourth insulating layer is formed on the side of the first insulating layer away from the first electrical component; Multiple hollow areas are formed that penetrate the fourth insulating layer; each of the first conductive pillars is exposed by one of the hollow areas, and each of the conductive portions is exposed by one of the hollow areas; A second trace layer and a second conductive post are formed. The second trace layer includes a plurality of traces, each of which is located within a cutout area. The second conductive post is located on the side of the second trace layer away from the first insulating layer and is connected to the trace. The conductive part and the first conductive post are respectively electrically connected to the trace. A third electrical component is mounted on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer. A third molding layer is formed, which encapsulates the third electrical component and the second conductive post.

8. The method for manufacturing a semiconductor structure according to claim 1, characterized in that, The first absolute The conductive layer is patterned to obtain a second trace layer, which includes multiple traces. The conductive part and the first conductive post are electrically connected to the traces respectively. A second conductive post is formed on the side of the second trace layer away from the first insulating layer, and the second conductive post is electrically connected to the trace. A third electrical component is mounted on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer. A third molding layer is formed, which encapsulates the third electrical component, the second trace layer, and the second conductive post.

9. A semiconductor structure, characterized in that, The semiconductor structure includes: The first insulating layer is provided with a first through hole and a second through hole; The first conductive post is partially located within the first through hole, and the first conductive post extends beyond the first insulating layer. The conductive portion is at least partially inside the second through hole; A first electrical component is attached to one side of the first insulating layer and is located on the same side of the first insulating layer as the portion of the first conductive post that extends beyond the first insulating layer. The electrodes of the first electrical component are electrically connected to the conductive portion. The first molding compound encapsulates at least the side of the first electrical component and the portion of the first conductive post that extends beyond the first insulating layer, with the surface of the first conductive post away from the first insulating layer exposed by the first molding compound.

10. The semiconductor structure according to claim 9, characterized in that, The conductive part is made of solder; the material of the conductive part is different from the material of the first conductive post, and the melting point of the first conductive post is higher than that of the conductive part.

11. The semiconductor structure according to claim 9, characterized in that, The semiconductor structure also includes: The first trace layer is located on the side of the first molding layer away from the first insulating layer; the first trace layer is electrically connected to the first conductive pillar; The second electrical component is located on the side of the first trace layer away from the first molding layer, and the electrodes of the second electrical component are electrically connected to the first trace layer. The second molding layer encapsulates the first trace layer and the second electrical component; And / or, The semiconductor structure also includes: A fourth insulating layer is located on the side of the first insulating layer away from the first electrical component. The fourth insulating layer has a plurality of cutout areas. Each of the first conductive posts is exposed by one of the cutout areas. Each of the conductive portions is exposed by one of the cutout areas. The second trace layer includes multiple traces, each of which is located within a cutout area; the first conductive post and the conductive part are respectively electrically connected to the trace. The second conductive post is located on the side of the second trace layer away from the first insulating layer and is connected to the trace; A third electrical component is located on the side of the second trace layer away from the first insulating layer, and the electrodes of the third electrical component are electrically connected to the second trace layer. The third molding layer encapsulates the third electrical component and the second conductive post.

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