Multilayer substrate, method for manufacturing multilayer substrate, and electronic device

Abstract

A multilayer substrate (101) includes a plurality of base material layers stacked with a conductor pattern, has a first portion (10) in which the thickness between the front and back surfaces is fixed or substantially fixed, and a second portion (20) continuous with the first portion (10). The surface of the first portion (10) is at least one convex curved surface, the back surface of the first portion (10) is a concave curved surface opposite the convex curved surface, the front and back surfaces of the second portion (20) are flat surfaces, each base material layer is continuous from the first portion (10) to the second portion (20), and at least a portion of the conductor pattern is continuous from the first portion (10) to the second portion (20) inside the multilayer substrate (101).

Description

Technical Field

[0001] The present invention relates to a multilayer substrate formed by stacking multiple substrate layers, a method for manufacturing the multilayer substrate, and an electronic device having the multilayer substrate. Background Technology

[0002] Patent Document 1 illustrates a stepped support for an electronic device that effectively utilizes the properties of thermoplastic liquid crystal polymers. For example, it illustrates an electronic device in which a support made of a thin film or a laminated structure is formed into a stepped, sloping structure by deep drawing.

[0003] Prior art literature

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2004-82564 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] The electronic device described in Patent Document 1 has a support body made of a three-dimensional thermoplastic liquid crystal polymer, but this support body is a structure in which a conductor pattern is formed only on its surface. Therefore, the degree of freedom of the wiring provided on the support body is low.

[0008] Therefore, the object of the present invention is to provide a multilayer substrate with high freedom in conductor pattern formation, a method for manufacturing the multilayer substrate, and an electronic device having the multilayer substrate.

[0009] Technical solutions for solving the problem

[0010] (1) As an example of this disclosure, a multilayer substrate comprises a plurality of substrate layers and a conductor pattern, wherein the substrate layers are stacked together, characterized in that,

[0011] The multilayer substrate includes a first portion and a second portion continuous with the first portion. The thickness between the front and back surfaces of the first portion and the second portion, which are respectively opposed to each other, is fixed or substantially fixed.

[0012] The surface of the first portion is a convex curved surface, and the back surface of the first portion is a concave curved surface facing the convex curved surface and giving the multilayer substrate the thickness.

[0013] The back surface of the table in Part 2 is flat.

[0014] Each of the substrate layers is continuous from the first portion to the second portion.

[0015] At least a portion of the conductor pattern is continuous from the first portion to the second portion within the multilayer substrate.

[0016] (2) A method for manufacturing a multilayer substrate as an example of this disclosure,

[0017] The multilayer substrate has a connecting conductor in the first portion that is conductive to the conductor pattern formed inside the multilayer substrate and forms a conductive path in the stacking direction, characterized in that,

[0018] The substrate layers are heated and pressed while being stacked, thereby forming the first portion and the second portion of the multilayer substrate.

[0019] The conductive paste is introduced into the opening in the direction of the stacking and then heated and pressed to form the conductive path.

[0020] (3) An electronic device, as an example of this disclosure, includes the multilayer substrate and electronic components, characterized in that,

[0021] The electronic components are disposed inside the first part or the second part.

[0022] Invention Effects

[0023] According to the present invention, a multilayer substrate with high freedom in conductor pattern formation, a method for manufacturing the multilayer substrate, and an electronic device having the multilayer substrate can be obtained. Attached Figure Description

[0024] Figure 1 This is a perspective view of the multilayer substrate 101 according to the first embodiment.

[0025] Figure 2 The upper part is a top view of the multilayer substrate 101. Figure 2 The lower part is Figure 2 The cross-sectional view of the multilayer substrate 101 shown at the top, with a single dashed line.

[0026] Figure 3 This is a cross-sectional view of the multilayer substrate 102 according to the second embodiment.

[0027] Figure 4 This is a cross-sectional view of the electronic device 201 according to the third embodiment.

[0028] Figure 5 This is a cross-sectional view of the electronic device 202 according to the fourth embodiment.

[0029] Figure 6 This is a cross-sectional view of another electronic device 203 involved in the fourth embodiment.

[0030] Figure 7The upper part is a top view of the electronic device 204 according to the fifth embodiment. Figure 7 The lower part is a cross-sectional view of the electronic device 204 at the single-dotted line shown in the upper part.

[0031] Figure 8 The upper part is a top view of the multilayer substrate 107 according to the sixth embodiment. Figure 8 The lower part is equipped with Figure 8 A cross-sectional view of an electronic device 205 on a multilayer substrate 107 shown at the top.

[0032] Figure 9 This is a top view of another multilayer substrate 108 according to the sixth embodiment.

[0033] Figure 10 This is a cross-sectional view of the electronic device 206 according to the seventh embodiment, which is constructed by mounting a multilayer substrate 109 on a circuit board 60 with electronic components 65 mounted on it.

[0034] Figure 11 This is a cross-sectional view of the electronic device 207 according to the seventh embodiment, which is constructed by mounting a multilayer substrate 110 on a circuit board 60 with electronic components 66 mounted thereon.

[0035] Figure 12 This is a cross-sectional view of the electronic device 208 according to the seventh embodiment, which is constructed by mounting a multilayer substrate 111 on a circuit board 60 with electronic components 65 and 66 mounted thereon.

[0036] Figure 13 The upper part is a top view of the electronic device 209 according to the eighth embodiment. Figure 13 The lower part is electronic device 209. Figure 13 A cross-sectional view of the upper part at the single-dotted line.

[0037] Figure 14 The upper part is a top view of another multilayer substrate 113 according to the eighth embodiment. Figure 14 The lower part is a multilayer substrate 113. Figure 14 A cross-sectional view of the upper part at the single-dotted line.

[0038] Figure 15 The upper part is a top view of the electronic device 210 according to the 9th embodiment. Figure 15 The lower part is Figure 15 A cross-sectional view of the upper part at the single-dotted line.

[0039] Figure 16 The upper part is a top view of another electronic device 211 involved in the 9th embodiment. Figure 16 The lower part is Figure 16 A cross-sectional view of the upper part at the single-dotted line.

[0040] Figure 17 The upper part is a top view of the multilayer substrate 115 according to the 10th embodiment. Figure 17 The lower part is Figure 17 A cross-sectional view of the upper part at the single-dotted line.

[0041] Figure 18 This is a perspective view of the multilayer substrate 116 according to the 11th embodiment.

[0042] Figure 19 The upper part is a top view of an electronic device 212 equipped with a multilayer substrate 116. Figure 19 The lower part is Figure 19 The sectional view shown at the single-dotted line at the top.

[0043] Figure 20 This is a perspective view of the multilayer substrate 117A according to the 12th embodiment.

[0044] Figure 21 The upper part is Figure 20 A cross-sectional view of the dashed line in the image.

[0045] Figure 22 This is a cross-sectional view of another multilayer substrate 117B according to the 12th embodiment.

[0046] Figure 23 yes Figure 22 A cross-sectional view of the dashed line in the image.

[0047] Figure 24 This is a perspective view of an electronic device 213 consisting of a multilayer substrate 118 according to the 13th embodiment and electronic components 62 mounted on the multilayer substrate 118.

[0048] Figure 25 The upper part is a perspective view of an electronic device 214 consisting of a multilayer substrate 119 according to the 14th embodiment and electronic components 62 mounted on the multilayer substrate 119. Figure 25 The lower part is Figure 25 A cross-sectional view of the upper part at the dashed line.

[0049] Figure 26 This is a diagram showing another multilayer substrate 120 according to the 14th embodiment.

[0050] Figure 27 The upper part is a perspective view of the multilayer substrate 121 according to the 15th embodiment. Figure 27 The lower part is made of Figure 27 The single-dotted line at the top indicates the location of the longitudinal section view.

[0051] Figure 28These are cross-sectional views of the multilayer substrate according to the 16th embodiment.

[0052] Figure 29 These are cross-sectional views of the multilayer substrate according to the 16th embodiment.

[0053] Figure 30 This is a cross-sectional view of a multilayer substrate according to the 16th embodiment, which is an example of a multilayer substrate having conductor patterns 81, 82 as signal lines and conductor patterns 49A, 49B as ground conductor layers sandwiching two layers of the conductor patterns 81, 82 in the stacking direction.

[0054] Figure 31 This is a cross-sectional view of the multilayer substrate according to the 16th embodiment, and is a diagram showing several examples of the formation positions of the conductor pattern as a ground conductor layer.

[0055] Figure 32 This is a cross-sectional view of the main part of the electronic device 215 shown in the 17th embodiment.

[0056] Figure 33 The upper part is a perspective view of the electronic device 216 according to the 18th embodiment. Figure 33 The middle part is Figure 33 A longitudinal sectional view of the multilayer substrate 122 at the upper XX portion. Figure 33 The lower part is Figure 33 A longitudinal sectional view of the multilayer substrate 122 at the upper YY portion.

[0057] Figure 34 This is a top view of several other multilayer substrates involved in the 18th embodiment.

[0058] Figure 35 The upper and lower parts are cross-sectional views of other multilayer substrates involved in the 18th embodiment.

[0059] Figure 36 These are cross-sectional views of several other multilayer substrates involved in the 18th embodiment.

[0060] Figure 37 The upper part is a top view of an electronic device 217 comprising a multilayer substrate 123 and electronic components 62 and 65. Figure 37 The lower part is a longitudinal section view of the single-dotted line in the upper part.

[0061] Figure 38 The upper part is a partial cross-sectional view of electronic device 217. Figure 38 The lower part is Figure 38 A cross-sectional view of the upper part at the single-dotted line.

[0062] Figure 39This is a top view of other electronic devices involved in the 19th embodiment.

[0063] Figure 40 The upper part is a top view of an electronic device 218 comprising a multilayer substrate 124 and electronic components 62. Figure 40 The lower part is a longitudinal section view of the single-dotted line in the upper part.

[0064] Figure 41 The upper part is a partial cross-sectional view of electronic device 218. Figure 41 The middle part is Figure 41 The cross-sectional view at the upper dashed line in the upper part of the figure. Figure 41 The lower part is Figure 41 The cross-sectional view at the bottom of the upper part of the figure, where the single-dotted line is located.

[0065] Figure 42 This is a perspective view of the electronic devices 219 and 220 according to the 21st embodiment.

[0066] Figure 43 The upper part is Figure 42 A partial cross-sectional view of the first part 10 of the electronic device 219 shown at the top. Figure 43 The lower part is Figure 42 A partial cross-sectional view of the first part 10 of the electronic device 220 shown at the bottom.

[0067] Figure 44 This is an example of a top view of the multilayer substrate, viewed from the direction of protrusion caused by the convex and concave surfaces of the multilayer substrate. Detailed Implementation

[0068] The following figures illustrate several specific examples of various ways of implementing the invention. In each figure, the same reference numerals are used to label the same parts. For ease of explanation and understanding, multiple embodiments are shown for the purpose of facilitating the description of the implementation methods; however, partial substitutions or combinations of the structures shown in the different embodiments are possible. From the second embodiment onwards, descriptions of matters common to the first embodiment are omitted, and only the differences are described. In particular, the same effects resulting from the same structure are not mentioned sequentially in each embodiment.

[0069] Implementation Method 1

[0070] In the first embodiment, an example of a multilayer substrate is shown. Figure 1 This is a perspective view of the multilayer substrate 101 according to the first embodiment. Figure 2 The upper part is a top view of the multilayer substrate 101. Figure 2 The lower part is Figure 2The cross-sectional view of the multilayer substrate 101 shown at the top, with a single dashed line.

[0071] The multilayer substrate 101 is a multilayer substrate formed by stacking multiple substrate layers 9. Figure 2 In the lower sectional view shown, the substrate layers are integrated, therefore the lines between adjacent substrate layers are not shown. Therefore, substrate layer 9 in the figure does not refer to a single substrate layer, but rather multiple substrate layers are represented by a single reference numeral. This also applies to other figures shown later.

[0072] The multilayer substrate 101 has a first portion 10 with a fixed or substantially fixed thickness between its respective front and back surfaces, and a second portion 20 continuous with the first portion 10.

[0073] The surface of Part 10 is at least one convex surface PS, and the back surface of Part 10 is a concave surface DS opposite to the convex surface PS. The surface SS and the back surface BS of Part 20 are planar.

[0074] A convex surface PS is not a surface that bends about an axis orthogonal to the direction of convexity. Figure 1 , Figure 2 In the example shown, the Z-axis direction is the protruding direction. A surface bent about, for example, the Y-axis, orthogonal to this protruding direction is a cylindrical surface. Figure 1 , Figure 2 In the example shown, the convex surface PS is a sphere rather than a cylindrical surface.

[0075] If we want to represent the shape of the convex surface PS in another way, we can say that the curve is depicted by a cross-section on a plane formed by two of the three orthogonal axes, with the convex direction of the convex surface PS as one axis, and the curve is also depicted by a cross-section on a plane formed by the other two axes. Figure 1 , Figure 2 If the orientation of the three axes X, Y, and Z is set as the aforementioned orthogonal three axes, then the cross-section of the convex surface PS on the XY plane is a circle, the cross-section of the convex surface PS on the YZ plane is an arc, and the cross-section of the convex surface PS on the XZ plane is an arc. That is to say, on any two-axis plane, the cross-section does not depict a straight line.

[0076] The concave curved surface DS is opposite the convex curved surface PS while maintaining the thickness of the multilayer substrate.

[0077] Each substrate layer 9 is continuous from part 10 to part 20. Furthermore, the conductor pattern 31 inside part 10 and the conductor pattern 32 inside part 20 are continuous.

[0078] exist Figure 2In the cross-section passing through the boundary BD of section 10 and section 20, the angle between section 10 and section 20 varies depending on the position of the cross-section. However, for multiple cross-sections passing through the boundary BD of section 10 and section 20, the minimum angle θ between section 10 and section 20 at the boundary BD is an obtuse angle. According to this construction, even if the boundary BD of section 10 and section 20 is bent, damage to the conductor patterns 31 and 32, especially at the boundary BD, can be suppressed.

[0079] Furthermore, the bends in conductor patterns 31 and 32 (the boundary BD of part 10 and part 20) can also be chamfered or curved. This disperses the stress applied to the bends in conductor patterns 31 and 32, thus more effectively suppressing breakage of the bends in conductor patterns 31 and 32.

[0080] exist Figure 1 In the example shown, a conductor pattern 41 is formed on the surface of the first portion of the multilayer substrate 101. This conductor pattern 41 is, for example, a radiating element for an antenna, and is conductive to the conductor pattern 31 formed inside the multilayer substrate 101. Although in Figure 2 Although not shown in the figure, conductor pattern 41 and conductor pattern 31 are connected by a connecting conductor that forms a conductive path in the stacking direction of substrate layer 9.

[0081] exist Figure 2 The example shown is that the multilayer substrate 101 has conductor patterns 31 and 32 inside. However, ground conductor layers can also be formed on the front and back surfaces of the multilayer substrate 101 in the parts of the conductor patterns 31 and 32 that are used as transmission lines, thereby forming a stripline.

[0082] Alternatively, conductor pattern 41 and conductor pattern 31 can be coupled in electromagnetic field or electric field.

[0083] The shape of part 10 when viewed from the convex direction of the convex surface is circular. Furthermore, the shape of part 20 when viewed from the convex direction of the convex surface of part 10 is rectangular.

[0084] In addition, Figure 1 , Figure 2 In the example shown, the planar shape of the second part 20, viewed from the protrusion direction (Z direction) of the convex surface, is a shape that protrudes from a portion of the position surrounding the first part 10. The second part 20 could also be a shape that protrudes entirely from the position surrounding the first part 10.

[0085] The raw material of the substrate layer 9 is, for example, a polyolefin resin such as styrene, polyethylene, or polypropylene, a thermoplastic resin such as thermoplastic polyimide, or a fluorinated resin. This makes it easy for the shape at the boundary BD between part 10 and part 20 to change.

[0086] The multilayer substrate 101 shown above is formed by simultaneously heating and pressing multiple substrate layers 9, including substrate layers 9 on which conductor patterns 31 and 32 are formed, using a mold with a convex surface and a mold with a concave surface, thereby forming a multilayer substrate having a first part 10 and a second part 20.

[0087] Implementation Method 2

[0088] In the second embodiment, an example is shown where the shape of the conductor pattern in the first part and the construction of the second part differ from that in the first embodiment.

[0089] Figure 3 This is a cross-sectional view of the multilayer substrate 102 according to the second embodiment. The top view of this multilayer substrate 102 is... Figure 1 , Figure 2 The multilayer substrate 101 shown is similar.

[0090] The multilayer substrate 102 has a first portion 10 with a fixed or substantially fixed thickness between its respective front and back surfaces, and a second portion 20 continuous with the first portion 10.

[0091] The shape of the second part 20 is an extension of the first part 10 outwards. The first part 10 includes a circuit section comprising a substrate layer 9 and a conductor pattern. Furthermore, in Figure 3 In the example shown, a second part 21 extends outward from the first part 10. Multiple second parts can also be present. Furthermore, the direction in which the second part extends from the first part 10 can be different.

[0092] In the first portion 10 of the multilayer substrate 102, there is a connecting conductor 51 that is in communication with a conductor pattern 31 formed inside the multilayer substrate 102 and forms a conductive path in the stacking direction. A conductor pattern 41 is formed on the surface of the first portion 10. The connecting conductor 51 enables the conductor pattern 31 and the conductor pattern 41 to be in communication.

[0093] Part 20 includes a transmission line comprising a substrate layer 9 and a conductor pattern 32. Near the end of the conductor pattern 32, there is a connecting conductor 52 that is in communication with the conductor pattern 32 and forms a conductive path in the stacking direction.

[0094] A connector 61 is mounted on the back of part 20, to which a connecting conductor 52 is connected.

[0095] The conductor pattern 31 inside Part 10 and the conductor pattern 32 inside Part 20 are continuous.

[0096] Part 20 partially has a thin region 22 that is thinner than part 10. With this construction, bending at the thin region 22 becomes easier, and stress applied to the conductor pattern 32 inside the thin region can be suppressed, thus preventing breakage of the conductor pattern 32.

[0097] An example of the manufacturing method of the multilayer substrate 102 shown above is described below.

[0098] First, the first part 10 and the second part 20 of the multilayer substrate 102 are formed by heating and pressing while the substrate layer 9 is stacked.

[0099] The conductive paste is introduced into the opening in the stacking direction of the substrate layer 9, and the entire laminate is subjected to the above-described heating and pressing. Thus, a connecting conductor is formed from the conductive paste.

[0100] Third Implementation Method

[0101] An electronic device is illustrated in the third embodiment.

[0102] Figure 4 This is a cross-sectional view of the electronic device 201 according to the third embodiment. The electronic device 201 includes a circuit board 60, electronic components 62 mounted on the circuit board 60, a multilayer substrate 103, and a connector 61 mounted on the multilayer substrate 103. Figure 4 In order to improve clarity and visibility, the illustrations showing cross-sectional sections have been omitted. A conductor pattern is formed within the multilayer substrate 103, but... Figure 4 There is no conductor pattern at the cross-sectional location.

[0103] The first portion 10 of the multilayer substrate 103, viewed from the protruding direction of the convex surface, has a circular shape (planar shape). The second portion 20, viewed from the protruding direction of the convex surface, has a rectangular shape before bending (or folding) that protrudes from a portion surrounding the first portion 10. Bending (folding) this rectangular portion facilitates bending (folding) the second portion 20. Alternatively, this bent (folded) portion can also be equivalent to... Figure 3 The thinner region 22 is the part that is easier to bend (bend).

[0104] Electronic component 62 is mounted on a portion of circuit board 60 surrounded by the concave surface of the first portion 10 of multilayer substrate 103. A given conductor pattern is formed inside the multilayer substrate 103 and, as needed, on its outer surface.

[0105] The second portion 20 of the multilayer substrate 103 is bent (or flexed) at two locations to surround the end of the circuit board 60. The circuitry of the circuit board 60 and the conductor pattern of the multilayer substrate 103 are electrically connected via connector 61.

[0106] The circuit board 60 or the electronic component 62 mounted on the circuit board 60 is connected to the conductor pattern formed in the second part 20 of the multilayer substrate 103. Alternatively, it is connected to the conductor patterns formed in the first part 10 and the second part 20 of the multilayer substrate 103.

[0107] According to this embodiment, by configuring the first portion 10 of the multilayer substrate 103 to cover the flat circuit board 60, a given space can be formed between the first portion 10 of the multilayer substrate 103 and the circuit board 60. Furthermore, by bending (or flexing) the second portion 20 of the multilayer substrate 103, the second portion 20 can reach the back side of the circuit board 60. In this way, since the substrate layer 9 is a thermoplastic resin, the manufacturing process freedom of the electronic device is increased.

[0108] Implementation Method 4

[0109] In the fourth embodiment, an electronic device is provided having a multilayer substrate with holes formed in the first part.

[0110] Figure 5 This is a cross-sectional view of the electronic device 202 according to the fourth embodiment. The electronic device 202 includes a circuit board 60, electronic components 62 mounted on the circuit board 60, a multilayer substrate 104, and a connector 61 mounted on the multilayer substrate 104. Figure 5 In the preferred view, for clarity and visibility, the shading lines representing cross-sectional portions are omitted. A conductor pattern is formed within the multilayer substrate 104, but... Figure 5 There is no conductor pattern at the cross-sectional location.

[0111] and Figure 4 Similarly, in the example shown, the first part 10 of the multilayer substrate 104 has a circular shape when viewed from the protruding direction of the convex surface, and the planar shape of the second part 20 before bending (or folding) is a rectangular shape protruding from a portion of the position surrounding the first part 10.

[0112] A given circuit is configured in the circuit board 60. The electronic component 62 is, for example, a MEMS microphone. The circuit board 60 includes circuitry relating to the sound signals generated by the MEMS microphone.

[0113] A given conductor pattern is formed inside the multilayer substrate 104 and, as needed, on its outer surface.

[0114] A through-hole H is formed in a portion of the multilayer substrate 104. Figure 5 In the example shown, a through-hole H is formed near the sound receiving part of the electronic component 62, which serves as a MEMS microphone. Because this through-hole H has a sound-collecting effect, it is possible to construct a microphone with a given directionality.

[0115] According to this embodiment, an electronic component 62 is arranged in a given space between the first portion 10 of the multilayer substrate 104 and the circuit board 60, and a through hole H is provided in the multilayer substrate 104, thereby enabling effective arrangement of the multilayer substrate 104 and the electronic component 62, and making it easier to miniaturize the electronic device 202.

[0116] Figure 6 This is a cross-sectional view of another electronic device 203 according to the fourth embodiment. The electronic device 203 includes a circuit board 60, a multilayer substrate 105, electronic components 62 mounted on the multilayer substrate 105, and a connector 61 assembled on the multilayer substrate 105. Figure 6 In order to improve clarity and visibility, the illustrations showing cross-sectional sections have been omitted. A conductor pattern is formed within the multilayer substrate 105, but... Figure 6 There is no conductor pattern at the cross-sectional location.

[0117] and Figure 4 Similarly, in the example shown, the outer and inner shapes of the first portion 10 of the multilayer substrate 105, viewed from the protruding direction of the convex surface, are both circular, and the second portion 24 is continuous with the inner side of the inner shape. Furthermore, the planar shape of the second portion 20 before bending (or folding) is a rectangular shape protruding from a portion surrounding the position of the first portion 10.

[0118] An electronic component 62 is mounted on the back of section 24. The electronic component 62 is, for example, a MEMS microphone. A through-hole H is formed in section 24, through which the electronic component 62 receives external sound.

[0119] In addition, Figure 5 , Figure 6 The example shown illustrates an electronic device that processes sound signals, but electronic devices that process optical signals and image signals can also be constructed in the same way.

[0120] Fifth Implementation Method

[0121] In the fifth embodiment, an electronic device is provided having a multilayer substrate in the first part having a notch-shaped portion that constitutes a non-contact portion or a non-pressing portion relative to an electronic component.

[0122] Figure 7 The upper part is a top view of electronic device 204. Figure 7 The lower part is a cross-sectional view of the electronic device 204 shown at the single-dotted line in the upper part. The electronic device 204 includes a circuit board 60, a coaxial cable (electronic component) 70 connected to the circuit board 60 via a connector 63, a multilayer substrate 106, and a connector 61 mounted on the multilayer substrate 106. Figure 7 In order to prioritize clarity and visibility, the illustrations of the shading lines representing the cross-sectional sections are omitted.

[0123] A conductor pattern 64 is formed within the circuit board 60. Conductor patterns 31 and 32, serving as radiating elements, are formed within the multilayer substrate 106. One end of the conductor pattern 64 is connected to the coaxial cable 70 via a connector 63, and the other end is connected to the conductor pattern 32 within the second part 20 of the multilayer substrate 106 via a connector 61.

[0124] In the first part 10 of the multilayer substrate 106, a notch-shaped portion 10N is formed that constitutes a non-abutting portion relative to the coaxial cable 70, which is an electronic component.

[0125] According to this embodiment, a multilayer substrate can be easily disposed together with an electronic component without contacting the electronic component (non-contact or non-pressing).

[0126] Implementation Method 6

[0127] In the sixth embodiment, an example is a multilayer substrate having a notch-shaped portion or an opening-shaped portion of a member fixed to a given shape formed in the second part, and an electronic device having the multilayer substrate.

[0128] Figure 8 The upper part is a top view of the multilayer substrate 107. Figure 8 The lower part is equipped with Figure 8 The upper part shows a cross-sectional view of the electronic device 205 on the multilayer substrate 107. This cross-sectional location is determined by... Figure 8 The single-dotted line at the top of the image indicates the location of the cross-section view.

[0129] The multilayer substrate 107 is composed of a first portion 10 and a second portion 20. The first portion 10 has a shape corresponding to a portion of a sphere or a substantially spherical surface, and the second portion is a circular annular plate. The second portion is continuous with the periphery of the first portion. An opening 13 is formed in the second portion 20 of the multilayer substrate 107.

[0130] like Figure 8 As shown in the lower part, the electronic device 205 includes a circuit board 60, pins 68 disposed on the circuit board 60, a multilayer board 107, and a housing 71 that houses them.

[0131] The multilayer substrate 107 is secured by inserting its opening 13 into the pin 68 on the circuit board 60.

[0132] Figure 9 This is a top view of another multilayer substrate 108 according to the sixth embodiment. (And...) Figure 8 Similarly, in the example shown, the multilayer substrate 108 is composed of a first portion 10, which is shaped like a portion of a sphere or a substantially spherical surface, and a second portion 20, which is a circular annular plate. The multilayer substrate 108 and... Figure 8 Unlike the multilayer substrate 107 shown, a notch 12 is formed in the second part 20.

[0133] The multilayer substrate 108 can be fixed by means of a component of a given shape, such as fixing the notch to a part of the circuit board.

[0134] In addition, Figure 8 , Figure 9 The example shown illustrates a circular ring shape for part 20, but the ring shape is not limited to a circle. For example, the shape of part 20 can also be a quadrilateral or other polygonal shape with rounded corners.

[0135] Implementation Method 7

[0136] In the seventh embodiment, an electronic device including a multilayer substrate and electronic components mounted on the multilayer substrate is illustrated.

[0137] Figure 10 , Figure 11 as well as Figure 12 These are cross-sectional views of the various electronic devices involved in the seventh embodiment.

[0138] Figure 10This is a cross-sectional view of an electronic device 206 constructed by mounting a multilayer substrate 109 on a circuit board 60, on which electronic components 65 are mounted. The multilayer substrate 109 has a first portion 10 and second portions 20 and 24. Regarding the first portion 10, its planar shape when viewed from the protruding direction of its convex surface is circular. Furthermore, the shape of the second portion 24 when viewed from the protruding direction of the aforementioned convex surface is circular. Furthermore, the external shape of the second portion 20 when viewed from the protruding direction of the aforementioned convex surface is cuboid.

[0139] Furthermore, the shape of the second part 24, viewed from the protruding direction of the aforementioned convex surface, is not limited to a circle. For example, it can also be a quadrilateral or other polygon, or a polygon with rounded corners. Additionally, the first part 10, viewed from the protruding direction of the aforementioned convex surface, is not limited to a circular ring. For example, it can also be a ring of a quadrilateral or other polygon, or a ring of a polygon with rounded corners.

[0140] exist Figure 10 In the example shown, regarding the boundary BD between part 20 and part 10, the surface of the multilayer substrate 109 is a concave surface, and its back surface is a convex surface opposite to the concave surface.

[0141] A conductor pattern 30 is formed in the inner layer of the multilayer substrate 109. Terminal electrodes 42 are formed at the ends of the multilayer substrate 109. Furthermore, terminal electrodes 43 for mounting electronic components 65 are formed at given locations on the surface of the multilayer substrate 109. The conductor pattern 30 functions as a wiring pattern between the terminal electrodes 42 and 43.

[0142] Electronic components 67A, 67B, and 67C are mounted on the surface of the circuit board 60. By connecting the terminal electrode 42 of the multilayer substrate 109 to the terminal electrode of the circuit board 60, the multilayer substrate 109, on which the electronic components 65 are already mounted, can be mounted on the circuit board 60. Thus, with the multilayer substrate 109 mounted on the circuit board 60, the electronic components 67A, 67B, and 67C exist in the space between the first portion 10 and the second portion 24 of the multilayer substrate 109 and the circuit board 60. Therefore, the electronic components 67A, 67B, and 67C can be protected by the multilayer substrate 109 from impacts from external objects. Furthermore, the electronic components 67A, 67B, and 67C can be disposed in the recesses of the multilayer substrate 109, thus effectively utilizing the space in the recesses of the multilayer substrate 109 and achieving overall miniaturization.

[0143] Figure 11This is a cross-sectional view of an electronic device 207 constructed by mounting a multilayer substrate 110, on which electronic components 66 are mounted, onto a circuit board 60. The multilayer substrate 110 has a first portion 10, a second portion 20, 24, and a boundary BD. The planar shape of the multilayer substrate 110 is the same as that of the multilayer substrate 109.

[0144] Conductor patterns 30 and 47 are formed in the inner layer of the multilayer substrate 110. Terminal electrodes 42 and 48 are formed at the ends of the multilayer substrate 110. Furthermore, terminal electrodes 44 for mounting electronic components 66 are formed at a given location on the back side of the multilayer substrate 110. The conductor pattern 30 functions as a wiring pattern between the terminal electrodes 42 and 44. A conductor pattern 47 is formed as a conductor layer extending in the planar direction of the multilayer substrate 110. This conductor pattern 47 is connected to the ground of the circuit board 60 via the terminal electrode 48. Therefore, the lower portion of the multilayer substrate 110 containing the electronic components 66 is electromagnetically shielded. Alternatively, depending on the purpose of electromagnetic shielding for the electronic components 66 or the lower portion of the multilayer substrate 110, the conductor pattern 47 may not be connected to the ground. Furthermore, the conductor pattern 47 may also be formed on the upper surface of the multilayer substrate 110.

[0145] like Figure 11 As shown, by connecting the terminal electrode 42 of the multilayer substrate 110 to the terminal electrode of the circuit board 60, the multilayer substrate 110, on which the electronic component 66 is already mounted, can be mounted on the circuit board 60. Thus, with the multilayer substrate 110 mounted on the circuit board 60, the electronic component 66 exists within the space between the first portion 10 and the second portion 24 of the multilayer substrate 110 and the circuit board 60. Therefore, the electronic component 66 can be protected from impacts from external objects, etc., by the multilayer substrate 110.

[0146] Figure 12 This is a cross-sectional view of an electronic device 208 constructed by mounting a multilayer substrate 111, on which electronic components 65 and 66 are mounted, onto a circuit board 60. The multilayer substrate 111 includes a first portion 10, second portions 21, 23, and 24, and a boundary BD. Regarding the first portion 10, its planar shape when viewed from the protruding direction of its convex surface is circular. Furthermore, the shape of the second portion 24 when viewed from the protruding direction of the aforementioned convex surface is circular. Furthermore, the planar shape of the second portion 21 when viewed from the protruding direction of the aforementioned convex surface is circular. Moreover, the planar shape of the boundary BD between the second portions 21 and 23 is also circular.

[0147] Conductor patterns 30A and 30B are formed in the inner layer of the multilayer substrate 111. Terminal electrodes 42A and 42B are formed at the ends of the multilayer substrate 111. Furthermore, terminal electrodes 43 for mounting electronic components 65 are formed at given locations on the surface of the multilayer substrate 111, and terminal electrodes 44 for mounting electronic components 66 are formed at given locations on the back side of the multilayer substrate 111. Conductor pattern 30A functions as a wiring pattern between terminal electrodes 42A and 43. Furthermore, conductor pattern 30B functions as a wiring pattern between terminal electrodes 42B and 44.

[0148] like Figure 12 As shown in the example, electronic components can also be mounted on both the front and back sides of a multilayer substrate.

[0149] Implementation Method 8

[0150] In the eighth embodiment, in a cross-section along the stacking direction, an example is shown of a multilayer substrate having a plurality of spaces formed by curved surfaces including the first portion, and an electronic device having the multilayer substrate.

[0151] Figure 13 The upper part is a top view of the electronic device 209 according to the eighth embodiment. Figure 13 The lower part is electronic device 209. Figure 13 The cross-sectional view at the single-dotted line in the upper part. The electronic device 209 is composed of a multilayer substrate 112 and electronic components 69 mounted on the multilayer substrate 112.

[0152] The multilayer substrate 112 includes a first portion 10 and second portions 21 and 24. A boundary BD is formed between the first portion 10 and the second portion 24. An electronic component 69 is mounted on the second portion 24 of the multilayer substrate 112.

[0153] The multilayer substrate 112 has a horizontally cut annular space SP formed by a curved surface including the first portion 10. In cross-section, as shown... Figure 13 As indicated, there are two spaces, SP1 and SP2. Electronic components and equipment parts can be configured in these spaces, for example.

[0154] Figure 14 The upper part is a top view of another multilayer substrate 113 according to the eighth embodiment. Figure 14 The lower part is a multilayer substrate 113. Figure 14 A cross-sectional view of the upper part at the single-dotted line.

[0155] The multilayer substrate 113 includes first portions 10 and 11 and a second portion 21. A boundary is formed between the first portions 10 and 11. Furthermore, a boundary is formed between the first portions 11 and the second portion 21.

[0156] The multilayer substrate 113 includes a horizontally cut annular space SP1 formed by a curved surface including the first portion 11. Furthermore, the multilayer substrate 113 includes a horizontally cut spherical space SP2 formed by a curved surface including the first portion 10. In cross-section, as shown... Figure 14 As shown in the sectional view, there are two spaces, SP1 and SP2. Electronic components and equipment parts can be arranged in these spaces, for example.

[0157] Generally, stress is applied to various parts of a multilayer substrate by applying an external force from the outer surface of the multilayer substrate mounted at a certain location or from the mounting surface of the multilayer substrate. According to this embodiment, multiple spaces (SP1, SP2) exist in the cross-sections of the multilayer substrates 112 and 113, thus suppressing the amount of deformation relative to the stress applied to the multilayer substrates 112 and 113. That is, the rigidity of the multilayer substrates 112 and 113 can be improved.

[0158] Implementation Method 9

[0159] In the ninth embodiment, an electronic device is illustrated by forming a conductor pattern on a multilayer substrate that is different from the examples shown so far.

[0160] Figure 15 The upper part is a top view of the electronic device 210 according to the 9th embodiment. Figure 15 The lower part is Figure 15 A cross-sectional view of the upper part at the single-dotted line.

[0161] The electronic device 210 includes a multilayer substrate 114 and a conductor pattern 45 formed on its surface.

[0162] The multilayer substrate 114 is composed of a first part 10 and a second part 20. The planar shape of the first part 10 is circular. The planar shape of the second part 20 is circular and annular. A conductor pattern 30 is formed in the inner layer of the multilayer substrate 114. Terminal electrodes 42 are formed at the ends of the multilayer substrate 114.

[0163] A conductor pattern 45 for a patch antenna is formed at a given location on the surface of the multilayer substrate 114. One end of the conductor pattern 30 is connected to a terminal electrode 42 via a connecting conductor present in the stacking direction of the substrate layer 9. Furthermore, the other end of the conductor pattern 30 is connected to a given location of the conductor pattern 45 via a connecting conductor present in the stacking direction of the substrate layer 9.

[0164] In this way, a patch antenna can also be formed in the first part 10 of the multilayer substrate 114.

[0165] Figure 16The upper part is a top view of another electronic device 211 involved in the 9th embodiment. Figure 16 The lower part is Figure 16 A cross-sectional view of the upper part at the single-dotted line.

[0166] The electronic device 210 includes a multilayer substrate 114 and a conductor pattern 46 formed on its surface. The multilayer substrate 114 and... Figure 15 The same applies to the multilayer substrate 114 shown.

[0167] Conductor patterns 30A and 30B are formed in the inner layer of the multilayer substrate 114. Terminal electrodes 42A and 42B are formed at the ends of the multilayer substrate 114.

[0168] A conductor pattern 46 for a double-helix antenna is formed at a given location on the surface of the first portion 10 of the multilayer substrate 114. One end of the conductor patterns 30A and 30B is connected to terminal electrodes 42A and 42B respectively via connecting conductors present in the stacking direction of the substrate layer 9. Furthermore, the other end of the conductor patterns 30A and 30B is connected to the inner peripheral end of the conductor pattern 46 via connecting conductors present in the stacking direction of the substrate layer 9.

[0169] In this way, a double helical antenna can also be formed in the first part 10 of the multilayer substrate 114.

[0170] Implementation Method 10

[0171] In the 10th embodiment, a multilayer substrate is exemplified by a shape in which the second part protrudes due to the first part (that is, the protruding surface (protrusion) includes a plane).

[0172] Figure 17 The upper part is a top view of the multilayer substrate 115 according to the 10th embodiment. Figure 17 The lower part is made of Figure 17 The single-dotted line in the upper part indicates the location of the cross-sectional view.

[0173] The multilayer substrate 115 includes a first portion 10 and a second portion 20. The planar shape of the first portion 10 is a rectangular ring with rounded corners. The planar shape of the second portion 20 is a rectangular shape with rounded corners. In the example shown so far, the shape of the first portion 10 when viewed from the convex direction of the convex surface is circular, but it can also be polygonal as in this embodiment. Alternatively, it can be a polygon with rounded corners.

[0174] exist Figure 17 In the example shown, it is not that the entire surface of the first part 10 is a surface that is curved about the axis of the protrusion direction (Z direction), but rather that the convex surface of the first part 10 exists at four locations about the axis of the protrusion direction (Z direction).

[0175] Implementation Method 11

[0176] In the 11th embodiment, an example is a multilayer substrate whose first and second parts have shapes different from those of the multilayer substrates shown so far, and an electronic device having the multilayer substrate.

[0177] Figure 18 This is a perspective view of the multilayer substrate 116 according to the 11th embodiment. Figure 19 The upper part is a top view of an electronic device 212 equipped with a multilayer substrate 116. Figure 19 The lower part is Figure 19 The sectional view shown at the single-dotted line at the top.

[0178] The multilayer substrate 116 includes a first portion 10 and second portions 20A and 20B. For example... Figure 18 , Figure 19 As indicated, the planar shape of Part 20A is a rectangle with rounded corners, and the planar shape of Part 20B is a rectangular ring with rounded corners on its inner perimeter.

[0179] The surface of Part 10 is a convex curved surface, and the back surface of Part 10 is a concave curved surface that faces the convex curved surface and gives the multilayer substrate 116 a thickness. The thickness between the opposing surface and back surfaces of Parts 20A and 20B is fixed or substantially fixed.

[0180] A conductor pattern 45 serving as a radiating element (patch antenna) is formed in the inner layer of the substrate layer 9 in Part 20A. Furthermore, conductor patterns 30A and 30B serving as wiring conductor patterns are formed in the inner layers of the substrate layers 9 in Parts 20A and 20B and Part 10. One end of these conductor patterns 30A and 30B is connected to the conductor pattern 45 via an interlayer connecting conductor.

[0181] Terminal electrodes 42A, 42B, and 42C are formed in part 20B, and these terminal electrodes 42A, 42B, and 42C are exposed on the lower surface of part 20B. The other ends of conductor patterns 30A and 30B are continuous with terminal electrodes 42A and 42B. These terminal electrodes 42A, 42B, and 42C function as mounting electrodes for the circuit board 60. Conductor patterns 64A and 64B, serving as signal lines, and conductor pattern 64G, serving as a ground conductor layer, are formed on the circuit board 60.

[0182] In this embodiment, by setting two portions of the conductor pattern 45, which serves as a radiating element, as power supply points, the conductor pattern 45 can be used as a radiating element with two polarization surfaces.

[0183] As shown in this embodiment, the multilayer substrate 116 may also have two second portions 20A and 20B, and the second portion 20B mounted on the circuit board 60 may have terminal electrodes 42A, 42B and 42C.

[0184] Furthermore, the shape of the multilayer substrate 116 can be formed in the same way, not only in the shape of a quadrilateral but also in the shape of a circle. Regarding the conductor pattern 45, which serves as a radiating element, it can also be circular or polygonal in addition to a quadrilateral. Furthermore, the second portion 20B protruding from the first portion 10 is not limited to the entire circumference of the first portion 10, but can also be a portion protruding from a part of the first portion 10. In addition, the power supply point and the conductor pattern for power supply can be a single unit. Furthermore, the substrate layer 9 forming the conductor patterns 30A and 30B for power supply can be thinner than the substrate layer 9 forming the conductor pattern 45, which serves as a radiating element. Furthermore, since the second portion 20A protrudes in the Z direction, a void is formed at the lower part of the second portion 20A, but this void can also be filled with resin.

[0185] According to this embodiment, the following effects are achieved.

[0186] (a) By providing a void between the conductor pattern 64G, which serves as the ground conductor layer, and the conductor pattern 45, which serves as the radiating element, the electrostatic capacitance between the radiating element and the ground conductor can be reduced, thereby increasing the size of the radiating element and thus improving the antenna gain.

[0187] (b) A void is provided between the power supply conductor patterns 30A and 30B and the ground conductor pattern 64G. Since the void (air) has a lower dielectric constant than the substrate layer 9, the electromagnetic coupling coefficient between the conductor patterns 30A and 30B can be reduced. This improves the isolation between two signals with different polarization planes. Furthermore, the effect is further enhanced by thinning the substrate layer 9 on which the power supply conductor patterns 30A and 30B are formed.

[0188] (c) Since the second part 20A is surrounded by the first part 10, the mechanical strength of the second part 20A can be improved. Furthermore, due to the increased rigidity, the conductor pattern 45, which serves as a radiating element, can be determined to a given antenna characteristic.

[0189] (d) By filling the voids with a resin with a low dielectric constant, the rigidity of the multilayer substrate 116 can be further improved.

[0190] (e) If the void is filled with a resin with a high dielectric constant, the conductor pattern 45, which is used as a radiating element to obtain a given resonant frequency, can be miniaturized, thus obtaining a small multilayer substrate 116 and a small electronic device 212.

[0191] Implementation Method 12

[0192] In the 12th embodiment, an electronic device having a multilayer substrate having a conductor pattern for electromagnetic field shielding is exemplified.

[0193] Figure 20 This is a perspective view of the multilayer substrate 117A according to the 12th embodiment. Figure 21 yes Figure 20 A cross-sectional view of the dashed line in the image.

[0194] like Figure 20 As shown, the multilayer substrate 117A includes a first portion 10 and second portions 20A and 20B. Similar to the example shown in the 11th embodiment, the planar shape of the second portion 20A is a rectangle with rounded corners, and the planar shape of the second portion 20B is a rectangular ring with rounded corners on its inner periphery.

[0195] Furthermore, similar to the example shown in embodiment 11, the surface of the first portion 10 is a convex surface, and the back surface of the first portion 10 is a concave surface facing the convex surface and giving the multilayer substrate 117A a thickness.

[0196] A conductor pattern 45 serving as a radiating element (patch antenna) is formed on the outer surface of the substrate layer 9 in Part 20A. Furthermore, conductor patterns 33 and 34 serving as wiring conductor patterns are formed in the inner layers of the substrate layers 9 in Parts 20A and 20B and Part 10. One end of conductor pattern 33 is connected to conductor pattern 45 via an interlayer connecting conductor.

[0197] like Figure 21 As shown, a conductor pattern 49 is formed on the inner surface of the substrate layer 9. This conductor pattern 49 is formed as a ground conductor layer. Figure 21 In the diagram, the dashed line indicates the presence of a conductor pattern 49 between conductor pattern 34 and conductor pattern 45. According to this configuration, conductor pattern 49 suppresses interference from radiating elements and signal lines. Furthermore, a microstrip line is formed by conductor pattern 49 and conductor pattern 33, and the substrate layer 9 present therebetween. Similarly, a microstrip line is formed by conductor pattern 49 and conductor pattern 34, and the substrate layer 9 present therebetween.

[0198] Figure 22 This is a perspective view of the multilayer substrate 117B according to the 12th embodiment. Figure 23 The upper part is Figure 22 A sectional view of the section marked with a single-dotted line AA. Figure 23 The lower part is Figure 22 A sectional view of the section with the single-dash line BB in the image.

[0199] exist Figure 22 In the example shown, a slot 45S is formed in the conductor pattern 45. That is, the slot antenna is formed by the conductor pattern 45 and the substrate layer 9. A conductor pattern 84 is formed in the inner layer of the substrate layer 9, and the stripline is formed by the conductor pattern 84, the conductor patterns 45 and 49 which serve as ground conductor layers, and the substrate layer 9. This stripline functions as a power supply line for the slot antenna.

[0200] According to this embodiment, a portion of the laminated substrate can be used as a microstrip line or stripline, thus eliminating the need for additional signal transmission lines and enabling the acquisition of an integrated electronic device.

[0201] Implementation Method 13

[0202] In the 13th embodiment, an example is a multilayer substrate having a first portion with a shape different from the multilayer substrates shown so far, and an electronic device having the multilayer substrate.

[0203] Figure 24 This is a perspective view of an electronic device 213 consisting of a multilayer substrate 118 according to the 13th embodiment and electronic components 62 mounted on the multilayer substrate 118.

[0204] The multilayer substrate 118 is composed of a first part 10 and a second part 20. Both the first part 10 and the second part 20 are plates of fixed thickness. The front and back surfaces of the first part 10 are not curved around an axis in the projection direction like a cylindrical surface, but are part of the side surface of a cone. The second part 20 is a circular or elliptical plate with a flat surface.

[0205] As shown in this embodiment, the surface or back surface of the first portion 10 of the multilayer substrate 118 is not limited to a part of a sphere or an ellipsoid, but can be any curved surface.

[0206] Implementation Method 14

[0207] In the 14th embodiment, an example different from the examples shown so far is presented regarding the conductor patterns formed on the first and second portions of the multilayer substrate. The multilayer substrate involved in the 14th embodiment is a multilayer substrate with conductor patterns for electromagnetic field shielding formed thereon.

[0208] Figure 25 The upper part is a perspective view of an electronic device 214 consisting of a multilayer substrate 119 according to the 14th embodiment and electronic components 62 mounted on the multilayer substrate 119.

[0209] The multilayer substrate 119 is composed of a first portion 10 and a second portion 20. Both the first portion 10 and the second portion 20 are plates of fixed thickness. The shapes of the first portion 10 and the second portion 20 are... Figure 24The example shown is the same.

[0210] Figure 25 The lower part is Figure 25 A cross-sectional view of the upper part at the dashed line.

[0211] Electronic device 214 is mounted on a circuit board (not shown). A conductor pattern 34 is formed in the inner layer of part 10. Furthermore, conductor patterns 33 are formed in the inner layers of parts 10 to 20. The conductor pattern 34 is a signal line for transmitting signals. The conductor pattern 33 is a signal line whose one end is connected to the terminal electrode of the electronic component 62 and whose other end is connected to the terminal electrode of the circuit board.

[0212] Conductor patterns 49, serving as grounding conductors, are formed on or near the inner surfaces of Part 10 and Part 20. Conductor patterns 49 exist between conductor patterns 33 and 34. According to this configuration, conductor patterns 49 provide electromagnetic shielding for conductor patterns 33 and 34, i.e., suppressing interference between conductor patterns 33 and 34. Furthermore, a microstrip line is formed by conductor patterns 49, conductor patterns 33, and substrate layer 9. Similarly, a microstrip line is formed by conductor patterns 49, conductor patterns 34, and substrate layer 9. Alternatively, when a portion of the conductor pattern 34 functions as a radiating element, there may be no conductor pattern 49 (grounding conductor pattern opening) in the region opposite the radiating element.

[0213] The surface of Part 10 is a convex curved surface PS, and the back surface of Part 10 is a concave curved surface DS opposite to the convex curved surface PS, giving the multilayer substrate 119 a thickness. The inner space of the concave curved surface DS functions as an electromagnetic field shielding conductor for example, for the circuit board and the electronic components mounted on the circuit board. That is, the conductor pattern 49 is not only a ground conductor layer for the microstrip line, but also provides electromagnetic field shielding for the circuit board and the electronic components mounted on the circuit board that exist inside the concave portion formed by the concave curved surface DS.

[0214] Figure 26 This is a diagram showing another multilayer substrate 120 according to the 14th embodiment.

[0215] Figure 26 The upper part is a perspective view showing the internal structure of part 10. Figure 26 The lower part is Figure 26 A cross-sectional view of the upper part at the dashed line.

[0216] A conductor pattern 34 is formed in the inner layer of part 10. Furthermore, conductor patterns 33 are formed in the inner layers of parts 10 to 20. The conductor pattern 34 is a signal line for transmitting signals or a radiating element.

[0217] Thus, the present invention can be applied even if the first part is cylindrical.

[0218] Implementation Method 15

[0219] In the 15th embodiment, an example different from the examples shown so far is presented regarding the conductor patterns formed on the first and second portions of the multilayer substrate.

[0220] Figure 27 The upper part is a perspective view of the multilayer substrate 121 according to the 15th embodiment. Figure 27 The lower part is made of Figure 27 The single-dotted line at the top indicates the location of the longitudinal section view.

[0221] like Figure 27 As shown, the multilayer substrate 121 includes a first portion 10 and second portions 20A and 20B. Similar to the example shown in the 12th embodiment, the planar shape of the second portion 20A is a rectangle with rounded corners, and the planar shape of the second portion 20B is a rectangular ring with rounded corners on its inner periphery.

[0222] Furthermore, similar to the example shown in Embodiment 12, the surface of the first portion 10 is a convex surface, and the back surface of the first portion 10 is a concave surface facing the convex surface and giving the multilayer substrate 121 a thickness.

[0223] Inside the substrate layer 9 of part 20A, conductor patterns 81 and 82, serving as wiring patterns, are formed. Furthermore, a conductor pattern 49, serving as a grounding conductor, is formed on or near the inner surface of part 10 and parts 20A and 20B. The conductor pattern 49, conductor patterns 81 and 82, and substrate layer 9 together constitute a microstrip line.

[0224] The inner space of the concave curved surface DS functions as an electromagnetic field shielding conductor for the circuit board and the electronic components mounted on it. That is, the conductor pattern 49 is not only a grounding conductor layer for the microstrip line, but also provides electromagnetic field shielding for the circuit board and the electronic components mounted on it within the concave area.

[0225] Implementation Method 16

[0226] In the 16th embodiment, various configuration examples of conductor patterns as signal lines and conductor patterns as ground conductor layers formed in the first and second portions of a multilayer substrate are illustrated.

[0227] Figures 28 to 31 The figure shown is a cross-sectional view of each multilayer substrate according to the 16th embodiment.

[0228] Figure 28The three cross-sectional views shown are cross-sectional views at locations passing through part 10 and part 20A of the multilayer substrate.

[0229] exist Figure 28 In the upper part, the double-dotted line represents the boundary surface between part 10 and part 20A. In this example, a conductor pattern 82 serving as a signal line is formed in part 20A, and a conductor pattern 81 serving as a signal line is formed in part 10. The conductor pattern 49 suppresses interference between conductor patterns 81 and 82. Similarly, a conductor pattern 82 serving as a signal line can also be formed in part 20A, which becomes the top surface.

[0230] exist Figure 28 In the example shown in the middle, a conductor pattern 83 serving as a ground conductor is formed in the same layer as conductor patterns 81 and 82, between conductor patterns 81 and 82, which serve as signal lines. According to this configuration, even if there are local defects in conductor pattern 49, which serves as the ground conductor layer, conductor pattern 83 still functions as the ground conductor layer. Furthermore, since conductor pattern 83 enhances the strength of the bend in the structure, defects in conductor pattern 49 can be suppressed. In addition, conductor pattern 49 formed in the inner layer of substrate layer 9 suppresses interference between conductor patterns 81 and 82.

[0231] exist Figure 28 In the example shown at the bottom, a conductor pattern 83 serving as a ground conductor is formed between conductor patterns 81 and 82, which serve as signal lines, and an interlayer connection conductor 53 is formed to make the conductor pattern 83 serving as a ground conductor and the conductor pattern 49 serving as a ground conductor conduct through each other. In this way, the conductor pattern serving as a ground conductor inside the substrate layer 9 and the ground conductor layer extending on or near the surface of the substrate layer 9 can also conduct through each other.

[0232] exist Figure 29 In the diagram shown above and in the middle, part 10 is a cylindrical section, and part 20 is a planar section. Figure 29 In the example shown at the top, in part 10, conductor patterns 81A and 81B, serving as signal lines, are formed in a position sandwiching conductor pattern 49, which serves as a ground conductor layer. Similarly, in the cross-sectional view, conductor patterns 81A and 81B, serving as signal lines, may also be formed at positions corresponding to the other side. Conductor pattern 49 suppresses interference between conductor patterns 81A and 81B.

[0233] exist Figure 29In the diagram shown in the middle, the dashed lines indicate the interlayer boundaries of multiple substrate layers 9. Conductor patterns 81 and 82, which serve as signal lines, are formed in the substrate layers 9, but they are formed in different layers. In this way, conductor patterns 81 and 82 can also be formed in mutually different layers of the substrate layers 9.

[0234] exist Figure 29 In the lower part of the diagram, the double-dotted lines indicate the boundary surfaces of the first part 10 and the second parts 20A and 20C. Specifically, a conductor pattern 83 as a signal line is formed in the first part 10, and a conductor pattern 81 as a signal line is formed in the second part 20C.

[0235] Figure 30 This is an example of a multilayer substrate having conductor patterns 81 and 82 as signal lines, and conductor patterns 49A and 49B as ground conductor layers sandwiched between the conductor patterns 81 and 82 in the stacking direction. The multilayer substrate has conductor patterns 81 as signal lines formed inside the substrate layer 9 of the first portion 10, and conductor patterns 82 as signal lines formed inside the substrate layer 9 of the second portion 20. Specifically, conductor pattern 49A as a ground conductor layer is formed on the inner surface of the substrate layer 9, and conductor pattern 49B as a ground conductor layer is formed on the outer surface. Conductor patterns 81 and 82 are disposed between conductor patterns 49A and 49B.

[0236] In this way, by setting the conductor pattern 49B as a ground conductor layer, the conductor patterns 81 and 82, which serve as signal lines, are shielded by electromagnetic fields and are not affected by external noise. Furthermore, the radiation of noise from conductor patterns 81 and 82 to the outside can be suppressed. Additionally, conductor pattern 49A suppresses interference from conductor patterns 81 and 82.

[0237] The strip is formed by the conductor patterns 49A, 49B, conductor patterns 81, 82 and substrate layer 9.

[0238] Figure 31 This is a diagram showing several examples of the formation locations of conductor patterns as grounding conductor layers.

[0239] exist Figure 31 In the example shown in the upper part of the figure, the conductor pattern 49A, which is the inner ground conductor layer, is not formed on the inner surface of the substrate layer 9, but is formed in the interior of the substrate layer 9 near the inner surface.

[0240] exist Figure 31 In the example shown in the middle figure, the conductor pattern 49B, which is the outer ground conductor layer, is not formed on the outer surface of the substrate layer 9, but is formed in the interior of the substrate layer 9 near the outer surface.

[0241] exist Figure 31In the example shown in the lower part of the figure, the conductor pattern 49A, which is the inner ground conductor layer, is formed inside the substrate layer 9 near the inner surface of the substrate layer 9. Furthermore, the conductor pattern 49B, which is the outer ground conductor layer, is formed inside the substrate layer 9 near the outer surface of the substrate layer 9.

[0242] In addition, Figure 31 The example shown illustrates a conductor pattern 49A, conductor pattern 49B, or both, disposed inside the substrate layer 9 (inner layer). However, conductor patterns 49A, 49B, or both can also be non-exposed by covering the exposed surfaces of conductor patterns 49A and 49B with a protective film.

[0243] Implementation Method 17

[0244] In the 17th embodiment, an electronic device in which electronic components are installed in the second part is exemplified.

[0245] Figure 32 This is a cross-sectional view of the main part of the electronic device 215 shown in the 17th embodiment. Conductor patterns 30A and 30B, serving as signal lines, are formed inside the substrate layer 9, and a conductor pattern 49, serving as a ground conductor layer, is formed on the inner surface of the substrate layer 9. An electronic component 65 is mounted on the upper surface of the second part 20B.

[0246] According to this embodiment, conductor patterns 30A and 30B, as well as electronic component 65, suppress interference through conductor pattern 49. Furthermore, conductor pattern 49 provides electromagnetic shielding for the circuit board located inside the recess formed by the concave surface DS, and for the electronic component mounted on that circuit board.

[0247] Implementation Method 18

[0248] In the 18th embodiment, a multilayer substrate with ribs and an electronic device having the multilayer substrate are illustrated.

[0249] Figure 33 The upper part is a perspective view of the electronic device 216 according to the 18th embodiment. Figure 33 The middle part is Figure 33 A longitudinal sectional view of the multilayer substrate 122 at the upper XX portion. Figure 33 The lower part is Figure 33 A longitudinal sectional view of the multilayer substrate 122 at the upper YY portion.

[0250] like Figure 33 As shown at the top, the electronic device 216 includes a multilayer substrate 122 and electronic components 69A and 69B mounted on the multilayer substrate 122. The multilayer substrate 122 includes a substrate layer 9 and conductor patterns.

[0251] like Figure 33 As shown in the upper and middle portions, regarding the multilayer substrate 122, a portion (most of it in this example) of the second portion 20 forms a planar portion that extends in a planar manner, and the first portion 10 forms a rib 8 that protrudes from the planar portion.

[0252] Rib 8 is formed as part of multilayer substrate 122 by deep drawing of substrate layer 9 made of thermoplastic resin.

[0253] Viewed in the stacking direction (Z direction) of the substrate layer 9 in Part 20, the rib 8 forms a closed loop around the planar portion. In this example, two rectangular closed loops are adjacent to each other.

[0254] like Figure 33 As shown in the middle and lower parts, the multilayer substrate 122 includes a conductor pattern 81 serving as a signal line and conductor patterns 49A and 49B serving as ground conductor layers sandwiched between the conductor pattern 81 in the stacking direction. The conductor pattern 81 serving as a signal line is patterned in a direction orthogonal to the extending direction of the rib 8. Furthermore, a conductor pattern 83 serving as a ground conductor layer is formed on the same layer as the conductor pattern 81 serving as a signal line. Moreover, the conductor patterns 49A and 49B are connected to the conductor pattern 83 via interlayer connecting conductors 53.

[0255] A three-plate strip is formed by a conductor pattern 81 as a signal line, two conductor patterns 49A and 49B sandwiching the conductor pattern 81 as ground conductor layers in the stacking direction, and a substrate layer 9 between the conductor patterns 49A and 49B and the conductor pattern 81.

[0256] According to this embodiment, the rigidity of the multilayer substrate 122 is improved by the protrusion of the closed-loop rib 8, resulting in high planar shape stability of the multilayer substrate 122 and the electronic device 216. Furthermore, the rib 8 also includes a conductor pattern 81 as a signal line, conductor patterns 49A and 49B as a ground conductor layer, a conductor pattern 83, and an interlayer connection conductor 53, thus the aforementioned rigidity improvement effect caused by the rib 8 is significant.

[0257] Figure 34 This is a top view of several other multilayer substrates involved in the 18th embodiment. As shown... Figure 34 As shown in (1), the closed loop of rib 8 can also be a single one. In addition, as shown in (2), there can also be more than three. In addition, as shown in (3), rib 8 can not only form a closed loop, but also have a portion extending inward toward the closed loop. In addition, as shown in (4) and (5), rib 8 can also be composed of a rib that forms a closed loop and another rib that is independent of it.

[0258] The extension direction of rib 8 is not limited to mutually orthogonal directions, as shown in (6), (7), and (8), but can also include ribs extending in non-orthogonal directions.

[0259] Figure 35 The upper and lower portions are cross-sectional views of other multilayer substrates involved in the 18th embodiment. The cross-sectional positions of these sections correspond to... Figure 33 The cross-sectional positions of the middle and lower sections shown in the sectional view. Figure 35 In the example shown, a conductor pattern 81 serves as a signal line, and a conductor pattern 49 serves as a ground conductor layer. The microstrip line is formed by the conductor pattern 81 as the signal line, the conductor pattern 49 as the ground conductor layer, and the substrate layer 9 between the conductor pattern 49 and the conductor pattern 81.

[0260] In this way, a transmission line orthogonal to the extension direction of rib 8 can also be a microstrip line.

[0261] Figure 36 These are cross-sectional views of several other multilayer substrates involved in the 18th embodiment. The cross-sectional positions of these views correspond to... Figure 33 The cross-sectional position of the sectional view shown in the middle.

[0262] like Figure 36 As shown in (1), a conductor pattern serving as a signal line may not necessarily be formed in the rib. Furthermore, as shown in (2), a conductor pattern may be formed only on the outer surface of the rib. Similarly, as shown in (3), a conductor pattern may be formed only on the inner side of the rib. Furthermore, as shown in (4), the conductor patterns 81A and 81B serving as signal lines may extend in the extension direction of the rib. Furthermore, as shown in (5) and (6), conductor patterns 49A and 49B serving as a ground conductor layer may be formed on the lower surface of the substrate layer 9, and a conductor pattern 81 serving as a signal line extending in the extension direction of the rib may also be formed. This structure can also be used as a coplanar waveguide. Furthermore, as shown in (7), conductor patterns 49A and 49B serving as a ground conductor layer may be formed on the inner surface of the rib, and conductor patterns 49A and 49B serving as external electrodes may be formed on the lower surface of the second part. Furthermore, as shown in (8), conductor patterns 81A, 81B, and 81C, serving as signal lines, can be formed in the inner layer of the rib, and conductor pattern 49, serving as a ground conductor layer, can be formed on the lower surface of the substrate layer 9. With this structure, three microstrip lines extending in the extension direction of the rib can also be formed.

[0263] According to this embodiment, if the grounding conductor layers are connected by interlayer connecting conductors, losses caused by unnecessary resonance and unnecessary electromagnetic radiation can be suppressed. Furthermore, since the two ends of the signal line are led out to the outer layer through the interlayer connecting conductors, they can be easily connected to connectors, surface mount components, ICs, etc. Additionally, connections to other transmission lines using solder are also easy.

[0264] Implementation Method 19

[0265] In the 19th embodiment, an example is a multilayer substrate having a transmission path provided in the first part or from the first part to the second part, and an electronic device having the multilayer substrate.

[0266] Figure 37 The upper part is a top view of an electronic device 217 comprising a multilayer substrate 123 and electronic components 62 and 65. Figure 37 The lower part is a longitudinal section view of the single-dotted line in the upper part.

[0267] Figure 38 The upper part is a partial cross-sectional view of the electronic device 217. Here, the shadow lines of the substrate layer 9 are omitted for clarity. Figure 38 The lower part is Figure 38 The cross-sectional view at the single-dotted line in the upper part of the figure. In this figure, the shadow lines of the substrate layer 9 have also been omitted for clarity.

[0268] In the substrate layer 9, a microstrip line (MSL) is formed at two locations by a conductor pattern 49 serving as a ground conductor layer, a conductor pattern 81 serving as a signal line, and the substrate layer 9 mainly therebetween. Furthermore, a conductor pattern 80 is formed opposite to a portion of the conductor pattern 81 that extends in the layer direction. Between the conductor patterns 80 and 81, at a position maintained with a given width in the layer direction, a plurality of interlayer connecting conductors 53 are formed, enabling the conductor patterns 80 and 81 to conduct to each other in the stacking direction of the substrate layer 9. A waveguide is formed by the conductor patterns 80 and 81, the plurality of interlayer connecting conductors 53, and the substrate layer 9 between the conductor patterns 80 and 81 and the plurality of interlayer connecting conductors 53. Since the spacing between the conductor patterns 81 and 82 is thin enough than half a wavelength, the TE10 mode is used as the propagation mode. If the spacing between the interlayer connecting conductors 53 is narrow enough compared to a wavelength (less than 1 / 10 of a wavelength), the electromagnetic wave of the TE mode can propagate without radiating outwards. This waveguide can be called SIW (substrate integrated waveguide).

[0269] Because the microstrip line (MSL) and the waveguide (SIW) are coupled, the propagating signal is transmitted as a TEM mode electromagnetic wave in the MSL and as a TE mode electromagnetic wave in the SIW.

[0270] Figure 38 The electronic component 65 shown at the top is a chip antenna. Furthermore, the electronic component 62 is a communication IC (antenna semiconductor element) that uses the antenna to transmit and / or receive communication signals.

[0271] like Figure 38 As shown in the lower cross-sectional view, at the connection between the microstrip line MSL and the waveguide SIW, the characteristic impedance matching between the microstrip line MSL and the waveguide SIW is improved by setting the conductor pattern 81 within the range of the microstrip line MSL to a tapered shape.

[0272] According to this embodiment, the waveguide SIW that connects the antenna and the IC can be made into a zigzag shape in the three-dimensional curved shape portion of the multilayer substrate 123. As a result, the degree of freedom in the configuration / wiring design of each part can be increased.

[0273] Figure 39 This is a top view of other electronic devices involved in the 19th embodiment. Figure 39 In the example shown above, eight electronic components 65, serving as chip antennas, are mounted on the protrusions of the multilayer substrate. Furthermore, in... Figure 39 In the example shown at the bottom, six electronic components 65, serving as patch antennas, are mounted on the protrusions of the multilayer substrate. Similarly, multiple patch antennas, each with a different orientation, can also be configured.

[0274] exist Figure 39 In the example shown at the bottom, IC62 is shown mounted on the second part of the multilayer substrate. The microstrip line MSL and waveguide SIW, as already shown, are preferably configured such that the electronic components 65 and IC62 (antenna semiconductor elements), which function as chip antennas, propagate signals along a path with almost the shortest possible distance, as is possible in this embodiment.

[0275] In addition to mounting the electronic component 65 as a patch antenna on a multilayer substrate, a conductor pattern as a patch antenna can also be formed on the multilayer substrate.

[0276] Implementation Method 20

[0277] In the 20th embodiment, an electronic device having a slot antenna is illustrated.

[0278] Figure 40 The upper part is a top view of an electronic device 218 comprising a multilayer substrate 124 and electronic components 62. Figure 40 The lower part is a longitudinal section view of the single-dotted line in the upper part.

[0279] Figure 41The upper part is a partial cross-sectional view of the electronic device 218. Here, the shadow lines of the substrate layer 9 are omitted for clarity. Figure 41 The middle part is Figure 41 The cross-sectional view at the upper dashed line in the upper part of the figure. Figure 41 The lower part is Figure 41 The cross-sectional view at the lower dotted line in the upper part of the figure. In these figures, the shadow lines of the substrate layer 9 have also been omitted for clarity.

[0280] In the substrate layer 9, a microstrip line (MSL) is formed by a conductor pattern 49 serving as a ground conductor layer, a conductor pattern 81 serving as a signal line, and the substrate layer 9 mainly therebetween. Furthermore, a conductor pattern 80 is formed opposite to a portion of the conductor pattern 81 that extends in the layer direction. Between the conductor patterns 80 and 81, at a position maintained with a given width in the layer direction, a plurality of interlayer connecting conductors 53 are formed, enabling the conductor patterns 80 and 81 to conduct to each other in the stacking direction of the substrate layer 9. The conductor patterns 80 and 81, the plurality of interlayer connecting conductors 53, and the substrate layer 9 between the conductor patterns 80 and 81 and the plurality of interlayer connecting conductors 53 constitute a waveguide SIW. An opening AP is formed in the conductor pattern 80 at the upper part of the waveguide SIW. A conductor pattern 84 is formed in the upper part of the conductor pattern 80, and the conductor patterns 80 and 84 are connected via interlayer connecting conductors.

[0281] The electronic device 218 has a housing 72 made of metal. An opening 72S is formed in the housing 72. The opening 72S functions as a radiator of a slot antenna.

[0282] Furthermore, in the example described above, the housing 72 is provided with an opening 72S for functioning as a slot antenna. However, this is not limited to the housing; it can also be applied in the case of a cover member. That is, when a metal cover is disposed on the upper surface of the multilayer substrate 124, it is sufficient to form a slot in the metal cover.

[0283] Implementation Method 21

[0284] In the 21st embodiment, an electronic device equipped with various antennas is illustrated.

[0285] Figure 42 This is a perspective view of the electronic devices 219 and 220 according to the 21st embodiment. Figure 42 The electronic device 219 shown at the top is composed of a multilayer substrate and multiple electronic components 65.

[0286] In the electronic device 219, a multilayer substrate includes a first portion 10 and a second portion 20 continuous with the first portion 10. The first portion 10 is spherical. Electronic components 65 are antenna elements disposed around the spherical shape. These multiple antenna elements constitute an array antenna.

[0287] Figure 42 The lower part of the electronic device 220 shown comprises a multilayer substrate and a plurality of electronic components 65. In the electronic device 220, the multilayer substrate includes a first portion 10 and a second portion 20 continuous with the first portion 10. The first portion 10 and the second portion 20 form a frustum-shaped cone. The electronic components 65 are antenna elements, arranged around the frustum-shaped cone. These plurality of antenna elements constitute an array antenna.

[0288] In electronic devices 219 and 220, array antennas with isotropic directivity can be easily constructed. Furthermore, since the curvature of the portion where each antenna element is disposed is fixed, the stress applied to the interlayer connecting conductor formed in the first part 10 is uniformized, thus resulting in high reliability.

[0289] Figure 43 The upper part is Figure 42 A partial cross-sectional view of the first part 10 of the electronic device 219 shown at the top. Figure 43 The lower part is Figure 42 The lower part shows a partial cross-sectional view of the first portion 10 of the electronic device 220. For example, after the first portion 10 is formed, if an interlayer connection conductor is formed in the first portion 10, as shown... Figure 43 As shown by the straight arrow, the result is that a through-hole is formed in the first part 10 facing the inclined direction, and an interlayer connection conductor is provided by filling the through-hole with a conductor. In contrast, in this embodiment, as shown by the dashed line, the stress applied to the interlayer connection conductor is in the normal direction relative to the inner and outer surfaces of the first part 10, so the allowable stress of the interlayer connection conductor is large. That is, the interlayer connection conductor has high reliability against stress.

[0290] Finally, the present invention is not limited to the embodiments described above. Those skilled in the art can make appropriate modifications and alterations. The scope of the present invention is not shown by the embodiments described above, but by the claims. Furthermore, within the scope of the present invention, modifications and alterations from the embodiments equivalent to those in the claims are included.

[0291] For example, in the embodiments shown above, except Figure 3 In addition, the thickness of the first and second portions of the multilayer substrate is set to be fixed, but the thickness of either the first or the second portion can be made different depending on its region. Furthermore, the thickness can also be made different in the first and second portions.

[0292] In addition, for example in Figure 1 , Figure 7 , Figure 15 , Figure 16 The example shown is an example in which circuit elements such as antenna elements and coil elements are formed in the first part of a multilayer substrate, but circuit elements formed by conductor patterns can also be formed in the second part of the multilayer substrate.

[0293] Furthermore, among the several electronic devices shown above, an example is shown where the conductor pattern formed in part 10 is connected to a circuit board or electronic component via a conductor pattern formed in part 20, but it is also possible for the conductor pattern formed in part 10 to be directly connected to the circuit board or electronic component.

[0294] Furthermore, in the embodiments described above, the planar shape of the multilayer substrate, viewed from the protruding direction of the multilayer substrate caused by the convex surface PS and the concave surface DS of the multilayer substrate, is approximately circular or approximately quadrilateral, but it may also be, for example, as shown below. Figure 44 As shown, shapes include hexagons, triangles, polygons with recesses in some areas, and shapes with rounded corners in some parts. This also increases the freedom of mounting onto the circuit board and assembling into the housing.

[0295] Furthermore, examples of using microstrip lines as part of a power transmission path are shown, for example in embodiments 19 and 20, but three-plate striplines can also be used as a power transmission path.

[0296] Explanation of reference numerals in the attached figures

[0297] BD: Boundary;

[0298] BS: Back side;

[0299] DS: Concave surface;

[0300] H: Through hole;

[0301] PS: Convex surface;

[0302] SP, SP1, SP2: Space;

[0303] SS: Surface;

[0304] 8: Ribs;

[0305] 9: Substrate layer;

[0306] 10, 11: Part 1;

[0307] 10N: Notch-shaped part;

[0308] 12: Notch;

[0309] 13: Opening;

[0310] 20, 20A, 20B, 20C, 21, 23, 24: Part 2;

[0311] 22: Thin area;

[0312] 30, 30A, 30B, 31, 32, 33, 34: Conductor patterns;

[0313] 41: Conductor pattern;

[0314] 42, 42A, 42B, 42C, 43, 44, 48: Terminal electrodes;

[0315] 45, 46, 47, 49, 49A, 49B: Conductor patterns;

[0316] 45S: Gap;

[0317] 51, 52: Connecting conductors;

[0318] 53: Interlayer connection conductor;

[0319] 60: Circuit board;

[0320] 61: Connector;

[0321] 62: Electronic components;

[0322] 63: Connector;

[0323] 64, 64A, 64B, 64G: Conductor patterns;

[0324] 65, 66, 67A, 67B, 67C: Electronic components;

[0325] 68: Pin;

[0326] 69: Electronic components;

[0327] 70: Coaxial cable;

[0328] 71, 72: Shell;

[0329] 80, 81, 81A, 81B, 82, 83, 84: Conductor patterns;

[0330] 101~117, 117A, 117B, 118~124: Multilayer substrates;

[0331] 201~220: Electronic equipment.

Claims

1. A multilayer substrate comprising multiple substrate layers and conductor patterns, wherein the substrate layers are stacked together, wherein... The multilayer substrate includes a first portion and a second portion continuous with the first portion. The thickness between the front and back surfaces of the first portion and the second portion, which are respectively opposed to each other, is fixed or substantially fixed. The surface of the first portion is a convex curved surface, and the back surface of the first portion is a concave curved surface facing the convex curved surface and giving the multilayer substrate the thickness. The back surface of the table in Part 2 is flat. Each of the substrate layers is continuous from the first portion to the second portion. At least a portion of the conductor pattern is continuous from the first portion to the second portion within the multilayer substrate.

2. The multilayer substrate according to claim 1, wherein, The shape of the second part, viewed in the stacking direction of the substrate layer of the second part, includes a shape that protrudes entirely or partially from the position surrounding the first part.

3. The multilayer substrate according to claim 2, wherein, In the second part of the multilayer substrate, a notch or opening is formed for a member fixed to a given shape.

4. The multilayer substrate according to any one of claims 1 to 3, wherein, The first part includes a circuit section comprising the substrate layer and the conductor pattern. The second part includes a transmission line formed by the substrate layer and the conductor pattern and connected to the circuit section.

5. The multilayer substrate according to claim 1 or 2, wherein, Viewed in the stacking direction of the substrate layer of the second part, at least a portion of the second part is surrounded by the first part.

6. The multilayer substrate according to claim 1, wherein, The second part is circular in shape when viewed in the stacking direction of the substrate layer of the second part.

7. The multilayer substrate according to claim 1, wherein, The second part, either entirely or in part, forms a planar portion that extends in a planar shape, and the first part forms a rib protruding from the planar portion. Viewed in the stacking direction of the substrate layer in the second part, the ribs form a closed loop around the planar portion.

8. The multilayer substrate according to claim 7, wherein, The conductor pattern is configured in the first part.

9. The multilayer substrate according to claim 7 or 8, wherein, The conductor pattern configured in the first part constitutes a conductor pattern as a signal line, a conductor pattern as a ground conductor layer, and an interlayer connection conductor that is connected to the conductor pattern as the signal line or the conductor pattern as the ground conductor layer.

10. The multilayer substrate according to any one of claims 1 to 9, wherein, The first part includes a first transmission line comprising the conductor pattern serving as a signal line and the substrate layer. The second part includes a second transmission line comprising the conductor pattern serving as a signal line and the substrate layer. A conductor pattern serving as a grounding conductor layer is formed on or near the back surface of the first part and the second part. The conductor pattern formed on or near the back of the first part and the second part, which serves as the grounding conductor layer, shields the conductor pattern of the first transmission line serving as the signal line from the conductor pattern of the second transmission line serving as the signal line.

11. The multilayer substrate according to claim 10, wherein, The conductor pattern serving as the ground conductor layer includes the conductor pattern serving as the ground conductor layer that is opposite to the conductor pattern serving as the signal line in the thickness direction of the substrate layer, and the conductor pattern serving as the ground conductor layer formed along the same substrate layer among the plurality of substrate layers.

12. The multilayer substrate according to claim 1, wherein, The second part consists of a portion protruding from the portion or part of the first part when viewed in the stacking direction of the substrate layer of the second part, and a portion surrounded by the first part.

13. The multilayer substrate according to any one of claims 1 to 12, wherein, The raw material for the substrate layer is thermoplastic resin.

14. The multilayer substrate according to any one of claims 1 to 13, wherein, The conductor pattern formed inside the first portion of the multilayer substrate includes connecting conductors that form conductive paths in the direction of the stacking.

15. The multilayer substrate according to any one of claims 1 to 14, wherein, For multiple cross-sections passing through the boundary of the first part and the second part, the minimum angle formed by the first part and the second part at the boundary is an obtuse angle.

16. The multilayer substrate according to any one of claims 1 to 15, wherein, The second part has a region that is thinner than the first part.

17. The multilayer substrate according to any one of claims 1 to 16, wherein, There are multiple convex surfaces and concave surfaces opposite to the convex surfaces.

18. The multilayer substrate according to any one of claims 1 to 17, wherein, The first part is formed with circuit elements or wiring patterns formed by the conductor pattern.

19. The multilayer substrate according to claim 18, wherein, The wiring pattern includes a radiating conductor formed in the second part.

20. The multilayer substrate according to claim 18, wherein, The conductor pattern is a conductor pattern used for radiating elements or a conductor pattern used for forming slot antennas.

21. The multilayer substrate according to claim 20, wherein, Antenna semiconductor elements that are connected to the conductor pattern for the radiating element or to the slot antenna formed by the conductor pattern for forming the slot antenna are disposed on the surface of the substrate layer in the direction opposite to the convex direction of the convex surface.

22. The multilayer substrate according to any one of claims 1 to 21, wherein, The conductor pattern in Part 1 comprises: two planar conductors extending in the layer direction of the plurality of substrate layers; and a plurality of interlayer connecting conductors, wherein the planar conductors are connected to each other in the stacking direction of the substrate layers at positions where they are arranged with a given width in the layer direction. The waveguide is formed by the planar conductor, the plurality of interlayer connecting conductors, and the substrate layer between the planar conductor and the plurality of interlayer connecting conductors.

23. The multilayer substrate according to claim 22, wherein, The conductor pattern in Part 1 includes a conductor pattern extending in the layer direction of the plurality of substrate layers as a ground conductor layer, and a conductor pattern configured opposite to the conductor pattern as a signal line. The stripline is formed by a conductor pattern serving as the ground conductor layer, a conductor pattern serving as the signal line, and a substrate layer between the conductor patterns of the ground conductor layer and the signal line. The conductor pattern in the first part is connected to the conductor pattern that serves as the signal line and one of the two planar conductors.

24. A method for manufacturing a multilayer substrate, which is the method for manufacturing the multilayer substrate as described in claim 14, wherein, The substrate layers are heated and pressed while being stacked, thereby forming the first portion and the second portion of the multilayer substrate. The conductive paste is introduced into the opening in the direction of the stacking and then heated and pressed to form the conductive path.

25. An electronic device comprising: The multilayer substrate as described in any one of claims 1 to 24; and Circuit board or electronic component in, The circuit board or the electronic component is located inside the recess formed by the concave surface.

26. The electronic device according to claim 25, wherein, The circuit board or the electronic component is connected to the conductor pattern formed in the second portion of the multilayer substrate, or to the conductor pattern formed in the first portion of the multilayer substrate.

27. The electronic device according to claim 26, wherein, A through hole is formed in the first portion of the multilayer substrate.

28. The electronic device according to any one of claims 25 to 27, wherein, The electronic device includes a circuit board on which at least a portion of the first portion of the multilayer substrate is disposed. In the first portion of the multilayer substrate, a notch-shaped portion constituting a non-abutting portion relative to the electronic component is formed.

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