Preparation method of high-temperature-resistant and high-conductivity VB-C-based interconnection film
By fabricating VB-C based interconnect films on silicon substrates, the problems of thermal stability and interface reaction of traditional interconnect materials have been solved, achieving synergistic optimization of low resistivity and high thermal stability. This breakthrough overcomes the bottleneck of existing technologies and is suitable for the manufacturing of ultra-large-scale integrated circuits.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- YUNNAN UNIV
- Filing Date
- 2026-03-06
- Publication Date
- 2026-06-09
AI Technical Summary
Traditional aluminum and copper interconnect materials are prone to electromigration and thermal failure under high current density and high temperature processing conditions. Furthermore, the interdiffusion reaction between group 5 high-melting-point metals and silicon substrates severely degrades interconnect performance. Existing VB-based thin films experience rapid performance failure at high temperatures, making it difficult to meet the thermal budget requirements of integrated circuit manufacturing.
VB-C based interconnect films were prepared on silicon substrates using magnetron sputtering technology. By precisely controlling the sputtering power and gas pressure of the metal and carbon target, stable Nb2C, Ta2C, and V2C phases were formed, which suppressed interfacial reactions and oxidation and improved thermal stability.
It significantly increases the critical failure temperature of the interconnect system to over 550°C, achieving synergistic optimization of low resistivity and high thermal stability, and providing a reliable interconnect material solution for very large-scale integrated circuits.
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Figure CN122169029A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor materials and thin film technology, specifically relating to a method for preparing high-temperature resistant and high-conductivity VB-C-based interconnect thin films on silicon substrates. Background Technology
[0002] In VLSI manufacturing processes, the performance and reliability of back-end interconnects have become key factors restricting device miniaturization and performance improvement. Interconnect materials need to possess excellent conductivity, good thermal stability, and interface compatibility with silicon substrates. While traditional aluminum and copper interconnect materials have good conductivity, they are prone to electromigration and thermal failure under high current density and high temperature processing conditions, leading to circuit performance degradation and making it difficult to meet the stringent reliability requirements of advanced processes. Therefore, high-melting-point metals from Group V, due to their high thermal stability (e.g., V melting point approximately 1910℃, Nb melting point 2468℃, Ta melting point 3017℃) and relatively low resistivity (V approximately 3–5 μΩ·cm, Nb approximately 5–8 μΩ·cm, Ta approximately 12.4–15.5 μΩ·cm), have been widely studied as potential alternative interconnect materials. However, pure Group V high-melting-point metal thin films face significant bottlenecks in practical applications: during subsequent high-temperature processes, significant interdiffusion reactions occur between the Group V high-melting-point metals and the silicon substrate, forming high-resistivity silicide phases such as VBSi2, which severely degrades interconnect performance; simultaneously, their insufficient stability in oxidizing environments also limits their application range. To overcome these shortcomings, existing technologies attempt to introduce carbon elements to form Group V carbide phases (such as V2C, Nb2C, and Ta2C), utilizing their higher chemical inertness to suppress interfacial reactions and oxidation. However, currently published literature reports that VB-based thin film systems begin to exhibit rapid performance failure at temperatures of 300-400°C, making it difficult to withstand the higher thermal budgets in integrated circuit manufacturing, and easily generating interfacial defects, becoming a potential threat to device reliability. Therefore, developing a novel interconnect material system, coupled with a fabrication process that allows for precise control of composition, yields uniform high-performance crystalline phases, and possesses excellent thermal stability, has become a key technical problem urgently needing to be solved in this field. The purpose of this invention is to provide a method for preparing high-temperature resistant and high-conductivity VB-C-based interconnect films on silicon substrates, thereby overcoming the bottlenecks of existing technologies. Summary of the Invention
[0003] The present invention aims to develop a method for preparing high-temperature resistant and high-conductivity VB-C-based interconnect thin films to solve the problems of thermal stability and interface reaction faced by traditional interconnect materials (such as Cu and Al) in advanced integrated circuit manufacturing processes, and to meet the urgent need for high-performance interconnect materials in the post-Moore era.
[0004] To achieve the above objectives, the present invention adopts the following technical solution:
[0005] This invention relates to a method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film; comprising the following steps:
[0006] Step 1: Using elemental a (A) from the VB group as the target material, an A thin film is prepared on a clean and dry silicon substrate by magnetron sputtering. The electrical properties and surface scanning electron microscope (SEM) images of the prepared A thin film are tested. Based on the principles of lowest resistivity and dense surface morphology, the A thin film with the lowest resistivity is determined to be the optimal film, and the deposition parameters of the optimal A thin film are selected. The A is selected from one of V, Nb, and Ta.
[0007] Step 2: Using A as the metal target and graphite as the carbon target, sputtering is performed on a clean and dry silicon substrate using the optimal deposition parameters obtained in Step 1 for the metal target and different powers for the carbon target. A carbide film of A is obtained on the silicon substrate. Then, based on the principle of the lowest resistivity, the optimal carbide film of A is selected as the VB-C based interconnect film.
[0008] The silicon substrate is a clean and dry silicon substrate, which can be treated by sequentially performing chemical cleaning with acetone, anhydrous ethanol, and a 10-25% hydrofluoric acid solution, rinsing with deionized water and drying with nitrogen between each step to obtain a clean, oxide-free silicon surface. In practice, the cleaning time with acetone is 10 minutes, the cleaning time with anhydrous ethanol is 10 minutes, and the chemical cleaning time with the 10-25% hydrofluoric acid solution is 10 minutes.
[0009] In this invention, the magnetron co-sputtering temperature is 25°C.
[0010] This invention discloses a method for preparing high-temperature resistant and high-conductivity VB-C-based interconnect thin films. When A is Nb, exploratory trials can be conducted first, such as depositing niobium thin films on a substrate using magnetron sputtering with different deposition parameters, and then measuring parameters such as resistivity (ρ) and carrier mobility (μ) of the Nb thin film. Based on the principle of minimum resistivity, the corresponding deposition parameters are then selected. The specific operation is as follows:
[0011] When depositing niobium thin films by magnetron sputtering, the selectable sputtering power is 20-50 W, the working pressure is 0.3-1.0 Pa, and the deposition time is 5-15 min. Exploration revealed that Nb films prepared under a working pressure of 0.5 Pa and a sputtering power of 30 W exhibit the best electrical properties; their resistivity ρ can reach 7.37 μΩ·cm. Therefore, when preparing niobium-carbon deposited thin films, the optimized process parameters for the Nb target are: a working pressure of 0.5 Pa and a sputtering power of 30 W.
[0012] This invention utilizes a co-sputtering process to prepare niobium-carbon deposited thin films. The process involves introducing a high-purity graphite target based on optimized Nb deposition parameters (0.5 Pa, 30 W) and preparing Nb-C thin films via magnetron co-sputtering. By precisely controlling the sputtering power of the C target (e.g., 50-130 W), high-quality films dominated by the Nb₂C phase are successfully obtained.
[0013] The study found that Nb2C films prepared under optimal process parameters (Nb target: 30 W, C target: 75 W, working pressure: 0.5 Pa) exhibit excellent comprehensive performance, with resistivity effectively controlled at 9.09 μΩ·cm and interface quality significantly improved, with roughness Ra=0.861 nm.
[0014] The magnetron co-sputtering time for depositing Nb2C thin films was 16 min.
[0015] After optimization, the niobium-carbon deposited thin film obtained by this invention has an electrical conductivity of 1.1 × 10⁻⁶. 5 S / cm, migration rate 665.76cm 2 / V·s, carrier concentration is 6.19×10 15 / cm 2 The bulk carrier concentration is 1.03 × 10⁻⁶. 21 / cm 3 .
[0016] After obtaining the niobium-carbon deposited film, this invention annealed it at 400-700 degrees Celsius for 30 min under an Ar atmosphere. The resistivity of the annealed niobium-carbon deposited film obtained at an annealing temperature of 400 degrees Celsius was 6.24 μΩ·cm, and the surface roughness was 1.96 nm. In practical applications, a heating rate of 5 degrees Celsius / min and a holding time of 30 min can be selected. This invention also yielded a niobium-carbon deposited film with a resistivity of 14.16 μΩ·cm at 500 degrees Celsius.
[0017] In the technology developed in this invention, the resulting Nb / Si system begins to form high-resistivity silicides (such as Nb) at approximately 500°C. 16.8 O 42 The performance of the Nb2C / Si system failed due to the lack of carbon (NbSi2), while the Nb2C / Si system only showed slight performance degradation at 550℃, and the degradation rate was much lower than that of the existing technology. The introduction of an appropriate amount of carbon can effectively suppress the interdiffusion of Nb and Si, and improve the annealing stability of the system by at least 50℃.
[0018] When A is Ta, the selectable sputtering power for magnetron sputtering deposition of Ta thin films is 30-60 W, the working pressure is 0.3-1.0 Pa, and the deposition time is 5-15 min. Exploration revealed that the Ta thin film prepared under a working pressure of 0.5 Pa and a sputtering power of 50 W exhibits the best electrical properties; its resistivity ρ is 13.59 μΩ·cm. Therefore, when preparing niobium-carbon deposited thin films, the optimized process parameters for the Ta target are: a working pressure of 0.5 Pa and a sputtering power of 50 W.
[0019] When A is Ta, the Ta-C composite film can be prepared by co-sputtering deposition based on the optimized Ta film deposition conditions (working pressure 0.5 Pa, Ta target power 50 W), using a high-purity graphite target and magnetron co-sputtering technology. By precisely controlling the sputtering power of the graphite target (range 50-130 W), the chemical composition of the film can be precisely controlled, successfully obtaining a high-quality film dominated by the Ta2C phase. Exploration revealed that the Ta-C composite film prepared under optimal process parameters (Ta target: 50 W, C target: 85 W, working pressure: 0.5 Pa) exhibits excellent comprehensive performance; its resistivity is effectively controlled at 13.68 μΩ·cm, and the interface quality is significantly improved, with a roughness Ra = 0.593 nm.
[0020] The magnetron co-sputtering time for depositing Ta-C composite thin films was 9 minutes.
[0021] After optimization, the Ta-C composite film obtained by this invention has an electrical conductivity of 7.31 × 10⁻⁶. 4 S / cm, migration rate 534.39cm 2 / V·s, carrier concentration is 5.13×10 15 / cm 2 The bulk carrier concentration is 8.55 × 10⁻⁶. 20 / cm 3 .
[0022] After obtaining the Ta-C composite film, this invention annealed it at 400-700°C for 30 min under an Ar atmosphere. The resistivity of the annealed Ta-C composite film obtained at 400°C was 14.84 μΩ·cm, and the surface roughness was 1.11 nm. In practical applications, a heating rate of 5°C / min and a holding time of 30 min can be selected. This invention also yielded a Ta-C composite film with a resistivity of 17.31 μΩ·cm at 550°C.
[0023] When A is V, the selectable sputtering power for magnetron sputtering deposition of V thin films is 15-40 W, the working pressure is 0.3-1.0 Pa, and the deposition time is 5-15 min. Exploration revealed that V thin films prepared under a working pressure of 0.5 Pa and a sputtering power of 20 W exhibit the best electrical properties; their resistivity ρ is 3.42 μΩ·cm. Therefore, when preparing niobium-carbon deposited thin films, the optimized process parameters for the V target are: a working pressure of 0.5 Pa and a sputtering power of 20 W.
[0024] When A is V, the VC composite film can be prepared by co-sputtering deposition based on the optimized V film deposition conditions (working pressure 0.5 Pa, Ta target power 20 W), using a high-purity graphite target and magnetron co-sputtering technology. By precisely controlling the sputtering power of the graphite target (range 50-130 W), the chemical composition of the film can be precisely controlled, successfully obtaining a high-quality film dominated by the V2C phase. Exploration revealed that the V2C film prepared under the optimal process parameters (V target: 20 W, C target: 120 W, working pressure: 0.5 Pa) exhibits excellent comprehensive performance, with its resistivity effectively controlled (provide numerical range or specific value) to 3.55 μΩ·cm, and the interface quality significantly improved, with a roughness Ra = 0.527 nm.
[0025] After obtaining the VC composite film, this invention annealed it at 400-700 degrees Celsius for 30 minutes under an Ar atmosphere. The resistivity of the annealed VC composite film obtained at 400 degrees Celsius was 4.1 μΩ·cm, and the surface roughness was 3 nm. In practical applications, a heating rate of 5 degrees Celsius / min and a holding time of 30 minutes can be selected. The VC composite film obtained by this invention also exhibits a resistivity of 9.25 μΩ·cm at 500 degrees Celsius.
[0026] Principles and advantages
[0027] 1. This invention opens up a new path for the application of Group 5 subgroup carbon compounds in interconnects. For the first time, this invention systematically studies Group 5 subgroup metal carbide thin films as core interconnect materials, comprehensively evaluating their electrical performance and thermal stability at advanced nodes in very large-scale integrated circuits, filling a gap in the research on the application of this material system in the field of nano-interconnects.
[0028] 2. This invention overcomes a key bottleneck in interfacial thermal stability. Compared to pure Nb films failing due to reaction with the silicon substrate at 500℃, this invention, by introducing carbon to form a stable Nb₂C phase, raises the critical failure temperature of the interconnect system to at least 550℃. Similarly, compared to pure Ta films failing due to reaction with the silicon substrate at 400℃, this invention, by introducing carbon to form a stable Ta₂C phase, raises the critical failure temperature of the interconnect system to at least 550℃. Furthermore, compared to pure vanadium films failing due to interfacial reaction with the silicon substrate at 400℃, this invention, by introducing carbon to form a stable V₂C phase, raises the critical failure temperature of the interconnect system to at least 500℃. This significant improvement provides a reliable material solution for addressing the high thermal budget problem in high-performance computing chips.
[0029] 3. This invention achieves precise controllability and innovative compatibility in the process. This invention develops a room-temperature magnetron co-sputtering fabrication technique, which, by independently adjusting the power of the A and carbon targets, achieves precise control over the stoichiometry of the thin film (especially the Nb₂C, Ta₂C, and V₂C phases), and reveals the intrinsic mechanism by which carbonization enhances the thermal stability of the metal / semiconductor interface by suppressing interfacial reactions.
[0030] 4. This invention breaks through the performance bottlenecks of traditional interconnect materials. Compared with traditional Cu interconnects (which have prominent problems with thermal stability and resistivity increase) and transition metal nitrides (which have high resistivity), this invention achieves synergistic optimization of low resistivity (e.g., ~Nb2C 9.09 μΩ·cm, Ta2C 13.68 μΩ·cm, V2C 3.55 μΩ·cm) and high thermal stability by controlling the grain boundary chemical state of Group 5 sub-metal carbides (e.g., carbon vacancy passivation) and interlayer stacking mode (e.g., orientation growth), providing a solution for interconnect materials below 7nm node.
[0031] 5. This invention achieves innovations in process compatibility and scalability. The room temperature (25°C) magnetron co-sputtering method innovatively uses a special gradient power co-sputtering method to obtain stoichiometric group 5 metal carbide thin films. Furthermore, the electrically excellent group 5 metal carbide thin films can be precisely controlled by adjusting the C / metal target power ratio, revealing the mechanism by which carbonization treatment enhances the thermal stability of the metal / semiconductor interface.
[0032] This invention not only verifies the enormous potential of group 5 subgroup metal carbide thin films as next-generation interconnect materials (low resistance, high stability), but its controllable fabrication process also provides a solid material foundation and feasible process route for breaking through the limitations of Moore's Law and developing interconnect technologies at sub-7nm and below technology nodes. Attached Figure Description
[0033] Figure 1A comparison of the resistivity of Nb and Nb2C thin films at different annealing temperatures.
[0034] Figure 2 A comparison of the electrical conductivity of Nb and Nb2C thin films at different annealing temperatures.
[0035] Figure 3 A comparison of the migration rates of Nb and Nb2C films at different annealing temperatures.
[0036] Figure 4 A comparison of surface carrier mobility of Nb and Nb2C films at different annealing temperatures.
[0037] Figure 5 This is a comparison of the bulk carrier mobility of Nb and Nb2C thin films at different annealing temperatures.
[0038] Figure 6 SEM images of Nb thin film samples at different annealing temperatures: (a) 25℃; (b) 400℃; (c) 450℃; (d) 500℃; (e) 550℃; (f) 600℃;
[0039] Figure 7 AFM morphology analysis of Nb thin film samples at different annealing temperatures: (a) 25℃, Ra=0.989 nm; (b) 400℃, Ra=1.84 nm; (c) 450℃, Ra=2.25 nm; (d) 500℃, Ra=2.34 nm; (e) 550℃, Ra=2.52 nm; (f) 600℃, Ra=2.58 nm.
[0040] Figure 8 SEM morphology analysis of Nb2C films at different annealing temperatures: (a) 25℃; (b) 400℃; (c) 500℃; (d) 550℃; (e) 600℃; (f) 650℃;
[0041] Figure 9 AFM morphology analysis of Nb2C thin film samples at different annealing temperatures: (a) 25℃, Ra=0.861 nm; (b) 400℃, Ra=1.96 nm; (c) 500℃, Ra=2.33 nm; (d) 550℃, Ra=2.53 nm; (e) 600℃, Ra=2.56 nm; (f) 650℃, Ra=3.27 nm.
[0042] Figure 10 A comparison of the resistivity of Ta and Ta2C thin films at different annealing temperatures.
[0043] Figure 11A comparison of the electrical conductivity of Ta and Ta2C thin films at different annealing temperatures.
[0044] Figure 12 The graph shows a comparison of the migration rates of Ta and Ta2C films at different annealing temperatures.
[0045] Figure 13 A comparison of surface carrier mobility of Ta and Ta2C thin films at different annealing temperatures.
[0046] Figure 14 A comparison of bulk carrier mobility of Ta and Ta2C thin films at different annealing temperatures.
[0047] Figure 15 SEM images of Ta film samples at different annealing temperatures: (a) 25℃; (b) 400℃; (c) 500℃; (d) 600℃; (e) 650℃; (f) 700℃;
[0048] Figure 16 AFM morphology analysis of Ta thin film samples at different annealing temperatures: (a) 25°C, Ra=0.61 nm; (b) 400°C, Ra=0.65 nm; (c) 500°C, Ra=1.15 nm; (d) 600°C, Ra=1.32 nm; (e) 650°C, Ra=1.58 nm; (f) 700°C, Ra=1.61 nm.
[0049] Figure 17 SEM morphology analysis of Ta2C films at different annealing temperatures: (a) 25°C; (b) 400°C; (c) 550°C; (d) 600°C; (e) 650°C; (f) 700°C;
[0050] Figure 18 AFM morphology analysis of Ta2C thin film samples at different annealing temperatures: (a) 25°C, Ra=0.593 nm; (b) 400°C, Ra=1.11 nm; (c) 550°C, Ra=1.26 nm; (d) 600°C, Ra=1.49 nm; (e) 650°C, Ra=2.6 nm; (f) 700°C, Ra=4.46 nm.
[0051] Figure 19 A comparison of the resistivity of V and V2C thin films at different annealing temperatures.
[0052] Figure 20 A comparison of the conductivity of V and V2C films at different annealing temperatures.
[0053] Figure 21A comparison of the migration rates of V and V2C films at different annealing temperatures.
[0054] Figure 22 A comparison of surface carrier mobility of V and V2C films at different annealing temperatures.
[0055] Figure 23 A comparison of bulk carrier mobility of V and V2C films at different annealing temperatures.
[0056] Figure 24 SEM images of V film samples at different annealing temperatures: (a) 25℃; (b) 400℃; (c) 450℃; (d) 500℃; (e) 550℃; (f) 600℃;
[0057] Figure 25 AFM morphology analysis of V thin film samples at different annealing temperatures: (a) 25°C, Ra=0.996 nm; (b) 400°C, Ra=1.05 nm; (c) 450°C, Ra=2.08 nm; (d) 500°C, Ra=1.15 nm; (e) 550°C, Ra=1.16 nm; (f) 600°C, Ra=6.73 nm.
[0058] Figure 26 SEM morphology analysis of V2C films at different annealing temperatures: (a) 25°C; (b) 400°C; (c) 500°C; (d) 600°C; (e) 650°C; (f) 700°C;
[0059] Figure 27 AFM morphology analysis of V2C thin film samples at different annealing temperatures: (a) 25°C, Ra=0.527 nm; (b) 400°C, Ra=3 nm; (c) 500°C, Ra=4.68 nm; (d) 600°C, Ra=5.15 nm; (e) 650°C, Ra=5.63 nm; (f) 700°C, Ra=6.13 nm. Detailed Implementation
[0060] To enable those skilled in the art to better understand the technical solution of the invention, the invention will be further described in detail below with reference to specific embodiments.
[0061] Exploratory Example 1
[0062] First, ultrasonically clean the silicon wafer in acetone for 10 minutes, then ultrasonically clean it in anhydrous ethanol for 10 minutes, and then dry it. Next, clean it with 20% hydrofluoric acid for 10 minutes, then rinse it with deionized water, and finally clean it with anhydrous ethanol for 10 minutes and dry it.
[0063] Nb metal thin film preparation: Nb metal thin films were prepared by magnetron sputtering, and the variation of film uniformity under different power, working pressure, and sputtering time conditions was investigated. First, multiple power levels (e.g., 20W, 30W, 40W, 50W) and pressure ranges (e.g., 0.3 Pa, 0.5 Pa, 0.7 Pa, 1.0 Pa) were set to determine the optimal conditions. Then, the effect of sputtering time (e.g., 5 minutes, 10 minutes, 15 minutes) on film thickness uniformity was evaluated by adjusting the sputtering time. Finally, the structure and surface morphology of the prepared films were analyzed using X-ray diffraction (XRD), scanning electron microscopy (SEM), and atomic force microscopy (AFM) to identify the most uniform Nb film fabrication conditions achievable by optimizing the sputtering time under specific power and pressure. The optimized Nb deposition parameters were: pressure 0.5 Pa, power 30W.
[0064] Example Series 1
[0065] Nb2C Thin Film Preparation: Based on optimized Nb deposition parameters (0.5 Pa, 30 W), a high-purity graphite target was introduced, and Nb-C thin films were prepared using magnetron co-sputtering. High-quality films dominated by the Nb2C phase were obtained by precisely controlling the sputtering power of the C target (e.g., 50-130 W). Before systematically preparing niobium carbide thin films, their deposition rate needed to be calibrated. In this experiment, under optimized substrate process parameters, Nb target (30 W) and C target (70 W) were co-sputtered for 10 minutes, Nb target (30 W) and C target (80 W) were co-sputtered for 10 minutes, and Nb target (30 W) and C target (90 W) were co-sputtered for 10 minutes. Film thickness measurements showed that the sputtering rate of the Nb2C thin film at this specific power ratio was approximately 3.2 nm / min. Subsequently, a systematic comparative study was conducted on the differences in electrical properties, microstructure, crystallinity, and thermal stability (annealing temperature range 400-700℃) between Nb thin films prepared by magnetron sputtering and Nb2C thin films prepared by magnetron co-sputtering. The performance of the obtained products is shown in Table 1, and the thermal stability of the obtained products is shown in Table 2. Figure 1-9 , Figure 1-9 The preparation process parameters for the Nb2C thin film are: 0.5 Pa, Nb target 30 W, C target 75 W.
[0066]
[0067] Exploration Example 2
[0068] Silicon substrate pretreatment: The silicon wafer is cleaned as follows: First, it is ultrasonically cleaned in acetone for 10 minutes, then transferred to anhydrous ethanol for ultrasonic cleaning for 10 minutes, dried with nitrogen, treated with 20% hydrofluoric acid solution for 10 minutes to remove the surface oxide layer, then rinsed thoroughly with deionized water, and finally ultrasonically cleaned again with anhydrous ethanol for 10 minutes and dried for later use.
[0069] Preparation and Optimization of Ta Thin Films: Ta thin films were prepared using magnetron sputtering. To investigate the influence of process parameters on film uniformity, different sputtering powers (30, 40, 50, 60 W), working pressures (0.3, 0.5, 0.7, 1.0 Pa), and sputtering times (5, 10, 15 min) were set. The crystal structure and surface morphology of the obtained films were characterized using X-ray diffraction (XRD), scanning electron microscopy (SEM), and atomic force microscopy (AFM) to determine the optimal process conditions for achieving the best uniformity at specific power and pressure by optimizing the sputtering time. The optimized Ta deposition parameters were: pressure 0.5 Pa, power 50 W.
[0070] Example Series 2
[0071] Ta₂C thin film preparation: Based on optimized Ta deposition parameters (0.5 Pa, 50 W), a high-purity graphite target was introduced, and Ta-C thin films were prepared by magnetron co-sputtering. High-quality films dominated by the Ta₂C phase were obtained by precisely controlling the sputtering power of the C target (e.g., 50-130 W). Before systematically preparing niobium carbide thin films, their deposition rate needed to be calibrated. In this experiment, under optimized substrate process parameters, Ta target (50 W) and C target (70 W) were co-sputtered for 10 minutes, Ta target (50 W) and C target (80 W) were co-sputtered for 10 minutes, and Ta target (50 W) and C target (90 W) were co-sputtered for 10 minutes. The average sputtering rate of the Nb₂C thin film was calculated to be approximately 7.48 nm / min based on film thickness measurements. Subsequently, a systematic comparative study was conducted on the differences in electrical properties, microstructure, crystallinity, and thermal stability (annealing temperature range 400-700℃) between Ta thin films prepared by magnetron sputtering and Ta2C thin films prepared by magnetron co-sputtering. The performance of the obtained products is shown in Table 2, and the thermal stability of the obtained products is shown in Table 3. Figure 10-18 , Figure 10-18 The preparation process parameters for the Ta2C thin film are: gas pressure 0.5 Pa, Ta target 50 W, C target 85 W, and sputtering time 9 minutes.
[0072]
[0073] Exploration Example 3
[0074] First, the silicon wafer substrate undergoes a rigorous cleaning process. It is ultrasonically cleaned with acetone for 10 minutes, ultrasonically cleaned with anhydrous ethanol for 10 minutes, dried with nitrogen, and then immersed in 20 wt% hydrofluoric acid solution for 10 minutes to remove the surface oxide layer. After being thoroughly rinsed with deionized water, it is ultrasonically cleaned again with anhydrous ethanol for 10 minutes, and finally dried with nitrogen for use.
[0075] Vanadium thin films were prepared using magnetron sputtering. To systematically investigate the influence of process parameters on film uniformity, the following variables were set: sputtering power of 15 W, 20 W, 25 W, and 40 W; working pressure of 0.3 Pa, 0.5 Pa, 0.7 Pa, and 1.0 Pa; and sputtering time of 5 min, 10 min, and 15 min. The influence of each condition on film uniformity was systematically evaluated using these parameter combinations. X-ray diffraction (XRD) was used to analyze the film crystal structure, and scanning electron microscopy (SEM) and atomic force microscopy (AFM) were used to characterize the film surface morphology and roughness, respectively. The optimal combination of process parameters was determined to achieve the preparation of vanadium thin films with uniform thickness and dense structure. The optimized V deposition parameters were: working pressure 0.5 Pa and power 20 W.
[0076] Example Series 3
[0077] V2C Thin Film Preparation: Based on optimized V deposition parameters (0.5 Pa, 20 W), a high-purity graphite target was introduced, and VC thin films were prepared using magnetron co-sputtering. High-quality films dominated by the Ta2C phase were obtained by precisely controlling the C target sputtering power (e.g., 50-130 W). Before systematically preparing niobium carbide thin films, their deposition rate needed to be calibrated. In this experiment, under optimized substrate process parameters, V target (20 W) and C target (70 W) were co-sputtered for 10 minutes, V target (20 W) and C target (80 W) were co-sputtered for 10 minutes, and V target (20 W) and C target (90 W) were co-sputtered for 10 minutes. The average sputtering rate of the V2C thin film was calculated to be approximately 2.33 nm / min based on film thickness measurements. Subsequently, a systematic comparative study was conducted on the differences in electrical properties, microstructure, crystallinity, and thermal stability (annealing temperature range 400-700℃) between Nb thin films prepared by magnetron sputtering and Ta2C thin films prepared by magnetron co-sputtering. The performance of the obtained products is shown in Table 3, and the thermal stability of the obtained products is shown in Table 4. Figure 19-27 , Figure 19-27 The process parameters for preparing the V2C thin film are: gas pressure 0.5 Pa, V target 20 W, C target 120 W, and sputtering time 26 minutes.
[0078]
Claims
1. A method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film, characterized in that, Includes the following steps: Step 1: Using elemental a (A) from the VB group as the target material, an A thin film is prepared on a clean and dry silicon substrate by magnetron sputtering. The electrical properties and surface scanning electron microscope (SEM) images of the prepared A thin film are tested. Based on the principles of lowest resistivity and dense surface morphology, the A thin film with the lowest resistivity is determined to be the optimal film, and the deposition parameters of the optimal A thin film are selected. The A is selected from one of V, Nb, and Ta. Step 2: Using A as the metal target and graphite as the carbon target, sputtering is performed on a clean and dry silicon substrate using the optimal deposition parameters obtained in Step 1 for the metal target and different powers for the carbon target. A carbide film of A is obtained on the silicon substrate. Then, based on the principle of the lowest resistivity, the optimal carbide film of A is selected as the VB-C based interconnect film.
2. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 1, characterized in that, The temperature for magnetron co-sputtering is 25℃.
3. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 1, characterized in that, When A is Nb, exploratory trials are first conducted. Niobium thin films are deposited on the substrate using magnetron sputtering with different deposition parameters. Then, the resistivity ρ and carrier mobility μ of the Nb thin film are measured. Finally, based on the principle of minimum resistivity, the corresponding deposition parameters are selected. The specific operation is as follows: When depositing niobium thin films by magnetron sputtering, the selectable sputtering power is 20-50 W, the working pressure is 0.3-1.0 Pa, and the deposition time is 5-15 min. The Nb thin film prepared under the conditions of 0.5 Pa working pressure and 30 W sputtering power has the best electrical properties; its resistivity ρ can be 7.37 μΩ·cm. Therefore, when preparing niobium-carbon deposited thin films, the optimized process parameters for Nb target selection are: 0.5 Pa working pressure and 30 W sputtering power.
4. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 3, characterized in that: Based on the optimized Nb deposition parameters, a high-purity graphite target was introduced, and Nb-C thin films were prepared by magnetron co-sputtering technology; By precisely controlling the sputtering power of the C target to 50-130 W, a thin film dominated by the Nb2C phase was obtained. The resistivity of the Nb2C thin film prepared under the optimal process parameters was 9.09 μΩ·cm, and the interface quality was significantly improved, with a roughness Ra=0.861 nm. The optimal process parameters included: sputtering power of 30 W for the Nb target, sputtering power of 75 W for the C target, and working gas pressure of 0.5 Pa.
5. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 4, characterized in that: The magnetron co-sputtering time for depositing Nb2C thin films was 16 min; The resulting niobium-carbon deposited film has an electrical conductivity of 1.1 × 10⁻⁶. 5 S / cm, migration rate 665.76cm 2 / V·s, carrier concentration is 6.19×10 15 / cm 2 The bulk carrier concentration is 1.03 × 10⁻⁶. 21 / cm 3 .
6. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 1, characterized in that: When A is Ta, the selectable sputtering power for magnetron sputtering deposition of Ta thin films is 30-60 W, the working pressure is 0.3-1.0 Pa, and the deposition time is 5-15 min. The resistivity ρ of the Ta thin film prepared under the conditions of 0.5 Pa working pressure and 50 W sputtering power is 13.59 μΩ·cm. Therefore, when preparing niobium-carbon deposited thin films, the optimized process parameters for Ta target selection are: 0.5 Pa working pressure and 50 W sputtering power.
7. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 6, characterized in that: When A is Ta, when preparing Ta-C composite films by co-sputtering deposition, a high-purity graphite target can be introduced based on optimized Ta film deposition conditions, and Ta-C composite films can be prepared using magnetron co-sputtering technology. By precisely controlling the sputtering power of the graphite target from 50 to 130 W, the chemical composition of the thin film can be precisely controlled, resulting in a thin film dominated by the Ta2C phase. The Ta-C composite thin film prepared under the optimal process parameters has a resistivity of 13.68 μΩ·cm and significantly improved interface quality with a roughness Ra=0.593 nm. The optimal process parameters include: Ta target sputtering power of 50 W, C target sputtering power of 85 W, and working gas pressure of 0.5 Pa. When the magnetron co-sputtering time for depositing the Ta-C composite film was 9 min, the resulting Ta-C composite film had an electrical conductivity of 7.31 × 10⁻⁶. 4 S / cm, migration rate 534.39cm 2 / V·s, carrier concentration is 5.13×10 15 / cm 2 The bulk carrier concentration is 8.55 × 10⁻⁶. 20 / cm 3 .
8. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 1, characterized in that: When A is V, the selectable sputtering power for magnetron sputtering deposition of V thin films is 15-40 W, the working pressure is 0.3-1.0 Pa, and the deposition time is 5-15 min. After optimization, the V thin film prepared under the conditions of 0.5 Pa working pressure and 20 W sputtering power has the best electrical properties; its resistivity ρ is 3.42 μΩ·cm. Therefore, when preparing niobium-carbon deposited thin films, the optimized process parameters for V target are: 0.5 Pa working pressure and 20 W sputtering power.
9. The method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to claim 8, characterized in that: When A is V, in the preparation of VC composite films by co-sputtering deposition, a graphite target is introduced based on optimized V film deposition conditions, and VC composite films are prepared using magnetron co-sputtering technology. By precisely controlling the sputtering power range of the graphite target from 50 to 130 W, the chemical composition of the film is precisely controlled, and a film dominated by the V2C phase is obtained. The resistivity of the V2C film prepared under the optimal process parameters is 3.55 μΩ·cm, and the interface quality is significantly improved, with a roughness Ra = 0.527 nm. The optimized V film deposition conditions include: working gas pressure of 0.5 Pa, sputtering power of Ta target of 20 W, and when preparing the V2C film under the optimal process parameters, the sputtering power of V target is 20 W, the sputtering power of C target is 120 W, and the working gas pressure is 0.5 Pa.
10. A method for preparing a high-temperature resistant, high-conductivity VB-C-based interconnect thin film according to any one of claims 5, 7, and 9, characterized in that: After obtaining the niobium-carbon deposited film, it was annealed at 400-700 degrees Celsius for 30 min under Ar atmosphere. The resistivity of the annealed niobium-carbon deposited film at 400℃ was 6.24 μΩ·cm and the surface roughness was 1.96 nm. After annealing at 500℃, the resistivity of the niobium-carbon deposited film was 14.16 μΩ·cm. After obtaining the Ta-C composite film, it was annealed at 400-700 degrees Celsius for 30 min under Ar atmosphere. The resistivity of the annealed Ta-C composite film obtained at an annealing temperature of 400℃ was 14.84 μΩ·cm and the surface roughness was 1.11 nm. After annealing at 550℃, the resistivity of the tantalum-carbon deposited film was 17.31 μΩ·cm. After obtaining the VC composite film, it was annealed at 400-700 degrees Celsius for 30 min under Ar atmosphere. The resistivity of the annealed VC composite film obtained at 400℃ was 4.1 μΩ·cm and the surface roughness was 3 nm. After annealing at 500℃, the resistivity of the VC deposited film was 9.25 μΩ·cm.