Servo drive bus communication system for multi-motor synchronization
By selecting reference slave stations, clock calibration, and phase conversion, the dynamic synchronization error problem in multi-motor synchronous control was solved, improving the operating accuracy and stability of industrial automation equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NINGBO NACHUAN AUTOMATION TECH CO LTD
- Filing Date
- 2026-03-11
- Publication Date
- 2026-06-09
AI Technical Summary
Dynamic synchronization errors caused by command transmission delays and differences in motor response exist in multi-motor synchronous control, affecting equipment stability and accuracy.
The optimal reference slave station is selected by the reference module, the clock module performs clock calibration, the phase conversion module converts the pulse signal into the actual phase, and the adjustment module performs graded deviation control and phased correction to achieve synchronization of clock and phase of each slave station.
It significantly improves the accuracy and stability of multi-motor coordinated operation, reduces equipment vibration and component wear, extends equipment service life, and ensures safe and reliable system operation.
Smart Images
Figure CN122178758A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of bus communication technology, and more specifically to a servo driver bus communication system for multi-motor synchronization. Background Technology
[0002] In the field of industrial automation, multi-motor synchronous drive systems have become a core support for improving the accuracy and efficiency of equipment operation due to their ability to achieve coordinated control of complex loads. The core objective of multi-motor synchronous control is to ensure that key parameters such as speed, angle, torque, or displacement of each motor remain highly consistent during operation, thereby ensuring the overall stability and reliability of the system.
[0003] However, in practical engineering applications, the generation and accumulation of synchronization errors in multi-motor systems are difficult to avoid. In severe cases, this can lead to increased equipment vibration, accelerated component wear, and even affect product processing accuracy and system safety. Dynamic error is one of the main bottlenecks restricting the improvement of synchronization performance, and its formation is closely related to command transmission delays and differences in motor response. In multi-motor control systems, transmission delays are unavoidable when control commands are transmitted via the bus. Simultaneously, the inherent differences in the processing speed of the controllers and the mechanical characteristics of the actuators corresponding to each motor result in asynchronous command reception and execution speeds for different motors. This makes it impossible to match the operating states of each motor in real time, ultimately leading to dynamic synchronization errors. This problem has become a key technical challenge that urgently needs to be solved in the research and application of multi-motor synchronization control technology. Summary of the Invention
[0004] The purpose of this invention is to provide a servo driver bus communication system for multi-motor synchronization, thereby solving the above-mentioned technical problems.
[0005] The objective of this invention can be achieved through the following technical solutions: A servo drive bus communication system for multi-motor synchronization includes: Reference module: The upper controller is designated as the bus master, and the remaining servo drivers are designated as slaves. The bus master sends a preset test clock signal 'a' to each slave. The test clock signal 'a' includes a timestamp 't'. send After receiving the test clock signal 'a' from the slave station, the local clock counter is initialized. After the slave station completes its initialization, it sends a preset end signal b to the bus master, instructing the bus master to record the timestamp t of the received end signal b. rec The total calculation time is T=t rec -t send Select the termination signal b with the minimum total time T and record the corresponding slave station as the reference slave station; Clock module: Obtains the clock difference Δt between the local clock of the reference slave station and the clock reference carried by the test clock signal a, and sends the clock calibration compensation amount t to the i-th slave station. com_i =Δt-Δt i , Δt i This represents the clock difference between the local clock of the i-th slave station and the clock reference carried by the test clock signal a, based on the compensation amount t. com_i Adjust the local clock of the i-th slave station; Phase conversion module: The slave station acquires the real-time pulse count C(t) of the motor rotor, where C(t) represents the cumulative pulse count output by the encoder within time t, calculated using the formula... The current real-time pulse count C(t0) of the slave station is converted into the actual phase θ(t0), where R represents the encoder resolution and t0 represents the reference clock of the reference slave station. Each slave station uploads the obtained actual phase to the bus master station. Adjustment module: Using the phase of the slave motor controlled by the reference station as the reference phase θ0(t0), calculate the deviation Δθ = θ0(t0) - θ(t0) between the slave motor phase and the reference phase, and preset the error threshold θ. max If |Δθ|≤θ max If so, the adjustment will not be triggered; If |Δθ|>θ max If the phase deviation exceeds the limit, it is determined to be a target slave station, and the phase correction amount θ for this adjustment is calculated based on Δθ. adjust ; The bus master station generates adjustment commands and sends them to the target slave station. The adjustment commands include the target slave station ID and the phase correction amount θ. adjust And the direction of phase deviation.
[0006] As a further aspect of the present invention: In the reference module, a timeout period is preset. When the bus master station sends the test clock signal a, the timing begins. If the timing duration is longer than the timeout period, the corresponding slave station is recorded as a communication failure slave station. The communication failure slave station does not participate in the selection of the reference slave station.
[0007] As a further aspect of the present invention: a pre-set retransmission threshold 'a' is set, and for a slave station marked as having a communication fault for the first time, f test signals 'a' are retransmitted. If successful, the slave station participates normally in subsequent steps; if unsuccessful, the corresponding communication line is determined to be faulty and an alarm message is sent, where 'f' represents the preset number of retransmissions.
[0008] As a further aspect of the present invention: in the clock module, based on the compensation amount t com_i Methods for adjusting the local clock of the i-th slave station include: Calculate the coarse adjustment step size t corresponding to the i-th slave station. step_i =t com_i×k, where k represents the preset coarse adjustment ratio coefficient, 0 < k < 1; If the compensation amount t com_i >0 indicates that the local clock of the i-th slave station is lagging behind the reference clock. The counting frequency of the local clock counter is increased, and the counting progress is updated once every bus cycle until the coarse adjustment step size t is completed. step_i The corresponding adjustment amount; If the compensation amount t com_i <0 indicates that the local clock of the i-th slave station is ahead of the reference clock. The counting frequency of the local clock counter is reduced, and the counting progress is updated once every bus cycle until the coarse adjustment step t is completed. step_i The corresponding adjustment amount; If the compensation amount t com_i If the value is 0, no adjustment is made.
[0009] As a further aspect of the present invention: in the adjustment module, the phase correction amount θ for this adjustment is calculated based on Δθ. adjust The methods include: If Δθ≤θ m Phase correction θ adjust =Δθ; If Δθ>θ m Repeatedly calculate the product of η and Δθ and update the value of Δθ, when Δθ ≤ θ m When, let the phase correction amount θ adjust =Δθ; Where θ m η represents the preset maximum adjustment amount per cycle, where η is the preset reduction ratio, and 0 < η < 1.
[0010] As a further aspect of the present invention: the method for obtaining the clock difference Δt between the local clock of the reference slave station and the clock reference carried by the test clock signal a in the clock module includes: After the reference slave initializes its local clock counter, it immediately reports its local clock value t_local to the bus master and calculates the clock difference Δt = t_local - t. send .
[0011] As a further aspect of the present invention: in the reference module, if there are slave stations with the same total time T, the slave station with the closest physical distance to the bus master station is preferentially selected as the reference slave station.
[0012] As a further aspect of the present invention: In the adjustment module, after the target slave station completes the calibration, the current phase is acquired and uploaded to the master station, and the current deviation |Δθ| is calculated again. If the deviation |Δθ|≤θ max If the adjustment is successful, it is considered complete; otherwise, a second correction is triggered.
[0013] The beneficial effects of this invention are as follows: This system solves the problem of dynamic synchronization error caused by command transmission delay and motor response differences in multi-motor synchronous control. Through the coordinated linkage of various functions, it significantly improves the accuracy and stability of multi-motor collaborative operation in industrial automation equipment, possessing outstanding technical advantages and significant engineering application value. Firstly, the system uses a reference module to select the optimal reference slave station through clock signal testing. Combined with fault detection and signal retransmission mechanisms, it avoids the impact of uneven communication delays while ensuring the reliability of bus communication, providing a foundation for subsequent synchronous control. Then, the clock module dynamically issues compensation based on clock differences, using a coarse adjustment strategy to accurately calibrate the local clocks of each slave station, solving the problem of asynchronous command reception and response speeds at the source and effectively suppressing dynamic errors. Furthermore, the phase conversion module converts pulse signals into actual phases. Combined with the adjustment module's graded deviation control and phased correction strategy, it can suppress excessive phase deviations, avoid increased equipment vibration and accelerated component wear, and effectively ensure product processing accuracy, significantly improving the system's anti-interference capability and operational stability. Overall, this system effectively overcomes the limitations of traditional control strategies through the integrated design of clock synchronization and phase control, extends equipment lifespan, reduces failure risks, and provides reliable technical support for high-precision industrial automation scenarios. Attached Figure Description
[0014] The invention will now be further described with reference to the accompanying drawings.
[0015] Figure 1 This is a schematic diagram of the servo driver bus communication system for multi-motor synchronization according to the present invention; Figure 2 This is a schematic diagram of the timeout retransmission process of the servo driver bus communication system for multi-motor synchronization according to the present invention. Detailed Implementation
[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0017] Please see Figure 1 As shown, the present invention is a servo driver bus communication system for multi-motor synchronization, comprising: Reference module: The upper controller is designated as the bus master, and the remaining servo drivers are designated as slaves. The bus master sends a preset test clock signal 'a' to each slave. The test clock signal 'a' includes a timestamp 't'. send After receiving the test clock signal 'a' from the slave station, the local clock counter is initialized. After the slave station completes its initialization, it sends a preset end signal b to the bus master, instructing the bus master to record the timestamp t of the received end signal b. rec The total calculation time is T=t rec -t send Select the termination signal b with the minimum total time T and record the corresponding slave station as the reference slave station; Clock module: Obtains the clock difference Δt between the local clock of the reference slave station and the clock reference carried by the test clock signal a, and sends the clock calibration compensation amount t to the i-th slave station. com_i =Δt-Δt i , Δt i This represents the clock difference between the local clock of the i-th slave station and the clock reference carried by the test clock signal a, based on the compensation amount t. com_i Adjust the local clock of the i-th slave station; Phase conversion module: The slave station acquires the real-time pulse count C(t) of the motor rotor, where C(t) represents the cumulative pulse count output by the encoder within time t, calculated using the formula... The current real-time pulse count C(t0) of the slave station is converted into the actual phase θ(t0), where R represents the encoder resolution and t0 represents the reference clock of the reference slave station. Each slave station uploads the obtained actual phase to the bus master station. Adjustment module: Using the phase of the slave motor controlled by the reference station as the reference phase θ0(t0), calculate the deviation Δθ = θ0(t0) - θ(t0) between the slave motor phase and the reference phase, and preset the error threshold θ. max If |Δθ|≤θ max If so, the adjustment will not be triggered; If |Δθ|>θ max If the phase deviation exceeds the limit, it is determined to be a target slave station, and the phase correction amount θ for this adjustment is calculated based on Δθ. adjust ; The bus master station generates adjustment commands and sends them to the target slave station. The adjustment commands include the target slave station ID and the phase correction amount θ. adjust And the direction of phase deviation.
[0018] It should be noted that, firstly, the host controller is set as the bus master, responsible for issuing commands, receiving signals, and processing data. All other servo drives act as slaves, receiving commands from the master and reporting their operating status. Subsequently, the bus master sends a preset test clock signal 'a' to all slaves. Test clock signal 'a' carries a timestamp, representing the precise moment the bus master sent it. Upon receiving test clock signal 'a', each slave immediately initiates its local clock counter initialization process to ensure that its local clock is in a unified initial operating state, avoiding initial clock deviations from affecting subsequent coordinated control.
[0019] After the slave station completes its local clock counter initialization, it automatically replies with a preset end signal b to the bus master. The bus master records the corresponding reception timestamp when receiving each end signal b from a slave station, indicating the precise moment the master successfully received that end signal b, thus quantifying the response latency of a single slave station. Calculating the total latency T yields the complete time cycle from receiving the test clock signal a to receiving the end signal b from a single slave station. This latency includes both the signal transmission time on the bus and the slave station's local initialization processing time. The slave station with the shortest latency is chosen as the benchmark because it has the lowest signal transmission and local processing latency, is least affected by external interference and its own hardware differences, ensuring the accuracy of subsequent clock and phase benchmarks. Choosing a slave station with a large latency as the benchmark would propagate errors to other slave stations, leading to a decrease in overall accuracy.
[0020] The core objective of the clock module is to synchronize the local clocks of all slave stations with a unified reference, eliminating the impact of clock deviations on phase detection. Clock synchronization is a prerequisite for phase coordination. If the clocks of different slave stations are not at the same speed, even if phase data is collected simultaneously, the different time references will lead to phase calculation deviations, thus affecting the accuracy of motor linkage. During operation, the clock difference Δt between the local clock of the reference slave station established by the reference module and the clock reference carried by the test clock signal a is first obtained. Δt is essentially the offset of the local clock of the reference slave station relative to the unified system clock reference. Since the reference slave station has the lowest transmission and processing delay, its clock deviation can serve as the core reference for system clock calibration. For the remaining i-th slave station, the clock difference Δti between its local clock and the clock reference carried by the test clock signal a needs to be calculated. The meaning of Δti is the same as Δt, and it is only for a single non-reference slave station, used to characterize the offset of the local clock of the i-th slave station relative to the unified system reference. By comparing Δti and Δt, the direction and magnitude of adjustment required for each slave station can be clearly identified.
[0021] To achieve clock synchronization among all slave stations, the system sends a clock calibration compensation amount to the i-th slave station. The core logic of the compensation amount is to uniformly calibrate the clock deviations of all slave stations to the deviation level of the reference slave station. That is, the required clock adjustment amount for the i-th slave station is obtained by subtracting the clock deviation Δti of the i-th slave station from the clock deviation Δt of the reference slave station. This design avoids overcalibration caused by aiming for absolute zero deviation. After receiving the compensation amount tcom_i, the i-th slave station adjusts its local clock based on this value. If tcom_i is positive, the local clock is calibrated forward by the corresponding duration; if it is negative, it is calibrated backward.
[0022] The phase conversion module is responsible for converting the motor rotor pulse signals acquired from the slave stations into quantifiable actual phases. The motor rotor pulse signals are raw analog signals and cannot be directly used for deviation calculation; they need to be converted into phase values with uniform units. Each slave station acquires the motor rotor pulse signals in real time, obtaining the real-time pulse count C(t), where C(t) represents the cumulative number of pulses output by the motor encoder within a time period t. The encoder, as the core component for motor rotor position detection, continuously outputs pulse signals as the rotor rotates. The pulse count is linearly related to the rotor rotation angle; the larger the rotation angle, the more pulses are output. This is the core principle of phase conversion. To achieve the conversion from pulse count to phase, a specific reference time t0 needs to be selected. t0 represents the time corresponding to the reference clock of the reference slave station, ensuring that all slave station phase conversions are based on a unified time reference and avoiding phase calculation deviations caused by time asynchrony. At this point, the real-time pulse count at time t0 of the current slave station is denoted as C(t0). It is then converted into the actual phase θ(t0) using a specific conversion formula θ(t0) = 2π × [C(t0) / R]. The core of this formula is to convert the pulse count into radian phase based on the encoder resolution. Here, the parameter R represents the encoder resolution, i.e., the total number of pulses output per revolution of the encoder. Higher resolution results in more pulses per unit angle, leading to higher phase detection accuracy. 2π corresponds to the radian value of one revolution of the rotor (360°). [C(t0) / R] is used to calculate the number of rotor revolutions, and multiplying by 2π yields the corresponding phase. The core logic of phase conversion is based on the correspondence between the pulse count and the rotation angle. The ratio of C(t0) to R is used to calculate the number of rotor revolutions and the remaining angle, which is then converted into the actual phase θ(t0) expressed in radians or angles. After each slave station completes the phase conversion, it uploads the obtained actual phase θ(t0) to the bus master station, providing raw data for subsequent phase deviation calculations and ensuring that the master station can obtain phase information in a unified format.
[0023] The adjustment module first uses the actual phase of the motor controlled by the reference slave station at time t0 as the reference phase θ0(t0). Then, for each non-reference slave station, the deviation Δθ of its motor is calculated; to avoid unnecessary adjustments caused by small phase deviations and to ensure the stability of system operation, an error threshold θmax needs to be preset.
[0024] If the absolute value of the phase deviation |Δθ| ≤ θmax, it indicates that the phase deviation of the slave motor is within the allowable range. The system does not trigger an adjustment command, and the slave maintains its current operating state, reducing ineffective adjustments. If |Δθ| > θmax, the phase deviation of the slave is determined to be excessive, and it is marked as the target slave. For the target slave, the calculated deviation Δθ is used to calculate the phase correction amount for this adjustment. It should be noted that if the correction amount is too large at once, the motor rotor will suddenly accelerate or decelerate, which may damage the transmission components. The bus master generates an adjustment command based on the target slave ID, the phase correction amount θadjust, and the phase deviation direction. The target slave ID is used to accurately locate the slave that needs adjustment, avoiding the command being mistakenly sent to other slaves. The phase deviation direction is used to clarify the correction direction (if it is ahead, the correction is delayed; if it is delayed, the correction is ahead), ensuring that the adjustment command is effective and avoiding reverse adjustment that exacerbates the deviation. After receiving the adjustment command, the target slave station adjusts the motor operating phase according to the phase correction amount θadjust to complete one phase closed-loop adjustment. Subsequently, the system will continue to repeat the clock calibration, phase acquisition and deviation judgment process to ensure the long-term stable operation of each slave station motor and maintain phase consistency.
[0025] In another preferred embodiment of the present invention, a timeout period is preset. When the bus master station sends the test clock signal a, the timing begins. If the timing duration is longer than the timeout period, the corresponding slave station is recorded as a communication failure slave station. The communication failure slave station does not participate in the selection of the reference slave station.
[0026] It is worth noting that the addition of a timeout mechanism can quickly identify communication faulty slave stations and exclude them from participating in the benchmark selection, thereby avoiding interference from faulty equipment with the accuracy of benchmark slave station selection and ensuring that the benchmark slave stations have low latency and high reliability characteristics.
[0027] In a preferred embodiment, a pre-set retransmission threshold 'a' is set. For a slave station marked as having a communication failure for the first time, f test signals 'a' are retransmitted. If successful, the slave station participates in subsequent steps normally. If it fails, the corresponding communication line is determined to be faulty and an alarm message is sent. Here, 'f' represents the preset number of retransmissions.
[0028] Understandably, adding a retransmission threshold and retransmission mechanism, and performing f signal retransmissions for the first communication failure at the slave station, can eliminate false judgments caused by temporary communication interference and prevent valid slave stations from being mistakenly removed. If the retransmission fails, a line fault is determined and an alarm is triggered, enabling fault location, reducing manual troubleshooting costs, and improving system communication reliability.
[0029] In another preferred embodiment of the invention, based on the compensation amount t com_i Methods for adjusting the local clock of the i-th slave station include: Calculate the coarse adjustment step size t corresponding to the i-th slave station. step_i =t com_i×k, where k represents the preset coarse adjustment ratio coefficient, 0 < k < 1; If the compensation amount t com_i >0 indicates that the local clock of the i-th slave station is lagging behind the reference clock. The counting frequency of the local clock counter is increased, and the counting progress is updated once every bus cycle until the coarse adjustment step size t is completed. step_i The corresponding adjustment amount; If the compensation amount t com_i <0 indicates that the local clock of the i-th slave station is ahead of the reference clock. The counting frequency of the local clock counter is reduced, and the counting progress is updated once every bus cycle until the coarse adjustment step t is completed. step_i The corresponding adjustment amount; If the compensation amount t com_i If the value is 0, no adjustment is made.
[0030] It is important to note that a coarse adjustment scaling factor k is introduced to determine the coarse adjustment step size, based on t. com_i Positive and negative values respectively increase or decrease the counter frequency, adjusted step by step in units of bus cycles, t com_i When the value is 0, no adjustment is made, achieving smooth clock calibration and avoiding system oscillations caused by a single large adjustment.
[0031] In another preferred embodiment of the present invention, the phase correction amount θ for this adjustment is calculated based on Δθ. adjust The methods include: If Δθ≤θ m Phase correction θ adjust =Δθ; If Δθ>θ m Repeatedly calculate the product of η and Δθ and update the value of Δθ, when Δθ ≤ θ m When, let the phase correction amount θ adjust =Δθ; Where θ m η represents the preset maximum adjustment amount per cycle, where η is the preset reduction ratio, and 0 < η < 1.
[0032] It should be noted that this phase correction calculation method sets a maximum adjustment threshold for a single operation. When the deviation does not exceed the threshold, the deviation value is directly taken as the correction value. When the deviation exceeds the threshold, the deviation value is repeatedly calculated by a preset ratio until the deviation value drops to within the threshold. This value is then used as the correction value to avoid oscillations caused by a single large adjustment and to ensure smooth phase correction of the motor.
[0033] In another preferred embodiment of the present invention, the method for obtaining the clock difference Δt between the local clock of the reference slave station and the clock reference carried by the test clock signal a includes: After the reference slave initializes its local clock counter, it immediately reports its local clock value t_local to the bus master and calculates the clock difference Δt = t_local - t. send .
[0034] Understandably, by reporting the local clock value immediately after initialization of the reference slave station, and calculating the clock difference by combining it with the timestamp of the test clock signal transmission, a precise reference benchmark is provided for subsequent clock calibration of each slave station. This method is simple and efficient, avoids errors introduced by complex calculations, ensures the accuracy of clock synchronization, and solidifies the time foundation for multi-servo motor phase coordinated control.
[0035] In another preferred embodiment of the present invention, if there are slave stations with the same total time T, the slave station that is closest to the bus master station is selected as the reference slave station.
[0036] It is worth noting that for candidate slave stations with the same total latency, a physical distance-priority screening rule is added. This eliminates implicit delay interference caused by differences in transmission paths, ensuring that the selected reference slave station has a more stable communication foundation. This further improves the reliability of the reference slave station, provides a better reference for subsequent clock synchronization and phase coordination, and enhances the stability of multi-servo system control.
[0037] In another preferred embodiment of the present invention, after the target slave station completes the calibration, the current phase is acquired and uploaded to the master station, and the current deviation |Δθ| is calculated again. If the deviation |Δθ|≤θ max If the adjustment is successful, it is considered complete; otherwise, a second correction is triggered.
[0038] It is worth noting that a closed-loop adjustment logic is formed through secondary deviation verification after phase correction, ensuring that the target slave phase accurately returns to the allowable error range. This avoids continuous phase deviation caused by a single unsatisfactory adjustment, enhances the reliability of phase coordination among multiple servo motors, and improves the overall control accuracy and operational stability of the system.
[0039] The foregoing has provided a detailed description of one embodiment of the present invention, but this description is merely a preferred embodiment and should not be construed as limiting the scope of the invention. All equivalent variations and modifications made within the scope of the present invention should still fall within the scope of the present invention.
Claims
1. A servo driver bus communication system for multi-motor synchronization, characterized in that, include: Reference module: The host controller is designated as the bus master, and the remaining servo drivers are designated as slaves. The bus master sends a preset test clock signal 'a' to each slave. The test clock signal 'a' includes a timestamp 't'. send After receiving the test clock signal 'a' from the slave station, the local clock counter is initialized. After the slave station completes its initialization, it sends a preset end signal b to the bus master, instructing the bus master to record the timestamp t of the received end signal b. rec The total calculation time is T=t rec -t send Select the termination signal b with the minimum total time T and record the corresponding slave station as the reference slave station; Clock module: Obtains the clock difference Δt between the local clock of the reference slave station and the clock reference carried by the test clock signal a, and sends the clock calibration compensation amount t to the i-th slave station. com_i =Δt-Δt i , Δt i This represents the clock difference between the local clock of the i-th slave station and the clock reference carried by the test clock signal a, based on the compensation amount t. com_i Adjust the local clock of the i-th slave station; Phase conversion module: The slave station acquires the real-time pulse count C(t) of the motor rotor, where C(t) represents the cumulative pulse count output by the encoder within time t, calculated using the formula... The current real-time pulse count C(t0) of the slave station is converted into the actual phase θ(t0), where R represents the encoder resolution and t0 represents the reference clock of the reference slave station. Each slave station uploads the obtained actual phase to the bus master station. Adjustment module: Using the phase of the slave motor controlled by the reference station as the reference phase θ0(t0), calculate the deviation Δθ = θ0(t0) - θ(t0) between the slave motor phase and the reference phase, and preset the error threshold θ. max If |Δθ|≤θ max If so, the adjustment will not be triggered; If |Δθ|>θ max If the phase deviation exceeds the limit, it is determined to be a target slave station, and the phase correction amount θ for this adjustment is calculated based on Δθ. adjust ; The bus master station generates adjustment commands and sends them to the target slave station. The adjustment commands include the target slave station ID and the phase correction amount θ. adjust And the direction of phase deviation.
2. The servo driver bus communication system for multi-motor synchronization according to claim 1, characterized in that, In the aforementioned benchmark module, a timeout period is preset. When the bus master station sends the test clock signal a, the timing begins. If the timing duration exceeds the timeout period, the corresponding slave station is recorded as a communication failure slave station, and the communication failure slave station does not participate in the selection of the benchmark slave station.
3. The servo driver bus communication system for multi-motor synchronization according to claim 2, characterized in that, A pre-set retransmission threshold 'a' is set. For a slave station marked as having a communication failure for the first time, f test signals 'a' are retransmitted. If successful, it can participate in subsequent steps normally. If it fails, the corresponding communication line is determined to be faulty and an alarm message is sent. Here, 'f' represents the preset number of retransmissions.
4. The servo driver bus communication system for multi-motor synchronization according to claim 1, characterized in that, In the aforementioned clock module, based on the compensation amount t com_i Methods for adjusting the local clock of the i-th slave station include: Calculate the coarse adjustment step size t corresponding to the i-th slave station. step_i =t com_i ×k, where k represents the preset coarse adjustment ratio coefficient, 0 < k < 1; If the compensation amount t com_i >0 indicates that the local clock of the i-th slave station is lagging behind the reference clock. The counting frequency of the local clock counter is increased, and the counting progress is updated once every bus cycle until the coarse adjustment step size t is completed. step_i The corresponding adjustment amount; If the compensation amount t com_i <0 indicates that the local clock of the i-th slave station is ahead of the reference clock. The counting frequency of the local clock counter is reduced, and the counting progress is updated once every bus cycle until the coarse adjustment step t is completed. step_i The corresponding adjustment amount; If the compensation amount t com_i If the value is 0, no adjustment is made.
5. The servo driver bus communication system for multi-motor synchronization according to claim 1, characterized in that, In the adjustment module, the phase correction amount θ for this adjustment is calculated based on Δθ. adjust The methods include: If Δθ≤θ m Phase correction θ adjust =Δθ; If Δθ>θ m Repeatedly calculate the product of η and Δθ and update the value of Δθ, when Δθ ≤ θ m When, let the phase correction amount θ adjust =Δθ; Where θ m η represents the preset maximum adjustment amount per cycle, where η is the preset reduction ratio, and 0 < η < 1.
6. The servo driver bus communication system for multi-motor synchronization according to claim 1, characterized in that, The method for obtaining the clock difference Δt between the local clock of the reference slave station and the clock reference carried by the test clock signal a in the clock module includes: After the reference slave initializes its local clock counter, it immediately reports its local clock value t_local to the bus master and calculates the clock difference Δt = t_local - t. send .
7. The servo driver bus communication system for multi-motor synchronization according to claim 1, characterized in that, In the aforementioned benchmark module, if there are slave stations with the same total time T, the slave station with the closest physical distance to the bus master station is selected as the benchmark slave station.
8. The servo driver bus communication system for multi-motor synchronization according to claim 1, characterized in that, In the adjustment module, after the target slave station completes the calibration, the current phase is acquired and uploaded to the master station. The current deviation |Δθ| is calculated again. If the deviation |Δθ|≤θ max If the adjustment is successful, it is considered complete; otherwise, a second correction is triggered.