A frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator

Abstract

This invention discloses a frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator, belonging to the field of integrated circuits. By storing time errors, it performs negative feedback control on the trigger times of the rising and falling edges of the output clock signal, automatically calibrating the output signal frequency. Furthermore, it achieves DC deviation elimination in the self-calibrating operational amplifier, significantly reducing offset voltage. This invention solves the problem of unstable signal output frequency in voltage-mode RC relaxation oscillator circuits due to changes in ambient temperature. It can be applied to Delta-Sigma ADC circuits, filter circuits, phase-locked loop circuits, etc., improving resistance to ambient temperature changes and compensating for comparator switching delays. t d This improves the linearity of the clock oscillator, enhances circuit reliability, and meets the accuracy requirements of highly integrated signal chain acquisition systems.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator. Background Technology

[0002] As a crucial component of the clock generation module in a signal chain system, the oscillator's performance directly impacts the accuracy and stability of the analog-to-digital converter (ADC) within the signal chain. In an RC relaxation oscillator, the oscillation principle involves the charging and discharging of a capacitor to the comparator's threshold voltage V. ref The comparator's output is flipped to produce a signal with a fixed output frequency. However, the frequency of the output signal is directly related to the capacitance value C and the resistance value R, and the comparator's comparison process has a fixed clock delay. t d When the ambient temperature changes, the resistance value R, the capacitance value C, and the comparator delay... t d All of these factors will be affected, leading to a shift in the oscillator's output frequency. This reflects the circuit's stability; the better the stability, the smaller the output signal shift, and the more accurate the signal frequency.

[0003] The oscillator's output signal will be directly used as the sampling clock for the analog-to-digital converter (ADC). An unstable output signal frequency will directly reduce the accuracy of the ADC. Summary of the Invention

[0004] The purpose of this invention is to provide a frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator to reduce the inherent delay of the comparator. t d The impact on the frequency offset of the oscillator output signal is controlled within a very small range, which can accurately compensate for temperature drift, stabilize the frequency of the oscillator output signal, and ensure that the clock signal generated by the oscillator is not affected by the comparator delay.

[0005] To address the aforementioned technical problems, this invention provides a frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator, comprising: a voltage-mode RC relaxation oscillator, a clock logic generation module, and a comparator delay. t d The self-calibration module; The inherent time error of the comparator in a voltage-mode RC relaxation oscillator t d The charge is stored in the comparator, and this time is subtracted in the next comparison cycle; the delay is fixed by dynamically canceling the comparator. t d Technology will reduce the inherent delay of comparators t dThe frequency impact on the voltage-mode RC relaxation oscillator is reduced, and the self-calibration combined with DC offset cancellation technology reduces offset voltage drift.

[0006] In one embodiment, the voltage-mode RC relaxation oscillator includes a mirror current source I1, two comparators, a capacitor adjustment module, a resistor R1, an RS flip-flop in the clock logic generation module; to obtain a square wave signal with a 50% duty cycle, the charging and discharging currents of the two capacitors C in the capacitor adjustment module need to be kept consistent. When CLK1=1 and CLK2=0, the power supply I1 / 2 charges one capacitor while the other does not charge. The voltage on the capacitor in the charging branch increases linearly and charges to the comparator's threshold voltage V. ref When the comparator's output level begins to flip, the state of the RS flip-flop changes accordingly. Then, when CLK1=0 and CLK2=1, another capacitor charges and discharges, and the circuit completes one oscillation cycle. This process repeats, and the circuit generates a fixed-frequency output clock.

[0007] In one implementation, the current bias module is composed of a mirror current source used to provide bias current to the four comparators and operational amplifiers in the frequency self-calibration circuit.

[0008] In one embodiment, the current adjustment module is used to increase the current of the branch to increase the output signal frequency of the oscillator. The main body is a multi-output current mirror circuit. The output current is increased by an external control word, so that the branch in the voltage-mode RC oscillator charges the capacitor quickly, thereby increasing the frequency of the oscillator output clock signal.

[0009] In one embodiment, the resistance adjustment module consists of a transmission gate switch and a single resistor connected in parallel to form a unit, and multiple identical units are connected in series. The unit is enabled by an external control word to have different resistance ratios. The capacitor adjustment module consists of a transmission gate switch and a single capacitor connected in parallel to form a unit, and multiple identical units are connected in parallel to form a unit. The capacitor is enabled by an external control word to have different capacitance values.

[0010] In one embodiment, the clock logic generation module consists of D flip-flops, NOT gates, NOR gates, and NAND gates; the outputs of the four comparators in the frequency self-calibration circuit are processed by this module to obtain a series of non-overlapping clock signals, which are then fed back to the analog module in the oscillator system to enable the analog module to work normally.

[0011] In one implementation, the comparator delay t d The self-calibration module consists of an integrator and a comparator; when the self-calibration circuit is activated, the operational amplifier and capacitor C... res Constructing an integrator, capacitor Cres The inherent time error of the comparator in a storage voltage-mode RC relaxation oscillator t d Then, in the next comparison cycle, this time is subtracted, causing the frequency of the voltage-mode RC relaxation oscillator to change from 1 / (R+C+) ... t d The value is corrected to 1 / (R+C).

[0012] In one embodiment, chopper modules are added before and after the operational amplifier to effectively reduce DC offset voltage.

[0013] The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator provided by this invention has the following beneficial effects: (1) It achieves high linearity and stability; (2) Compensate for the inherent delay of the comparator with a simple integrator circuit structure. t d It achieves self-calibration of the output signal frequency, with good calibration effect; (3) This voltage-mode RC relaxation oscillator simultaneously adjusts the current, capacitance and resistance, which can ensure the stability of the output clock signal; (4) The self-calibration circuit has a low offset voltage and low requirements for the design of the operational amplifier. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the overall circuit structure.

[0015] Figure 2 This is a schematic diagram of a voltage-mode RC relaxation oscillator.

[0016] Figure 3 This is a schematic diagram of the current bias module.

[0017] Figure 4 This is a schematic diagram of the current adjustment module.

[0018] Figure 5 This is a schematic diagram of the capacitor adjustment module and the resistor adjustment module.

[0019] Figure 6 This is a schematic diagram of the clock logic generation module.

[0020] Figure 7 Comparator delay t d A schematic diagram of the self-calibration module. Detailed Implementation

[0021] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.

[0022] This invention provides a frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator, the overall structure of which is as follows: Figure 1 As shown, it consists of six circuit modules: a voltage-mode RC relaxation oscillator, a clock logic generation module, and a comparator delay module. t d The self-calibration module.

[0023] The structure of a voltage-mode RC relaxation oscillator is as follows: Figure 2 As shown, the circuit consists of a mirror current source I1, comparator 1, comparator 2, a capacitor adjustment module, resistor R1 and resistor adjustment module R, and an RS flip-flop in the clock logic generation module. To obtain a square wave signal with a 50% duty cycle, the charging and discharging currents of the two capacitors C in the capacitor adjustment module must be kept consistent. When CLK1=1 and CLK2=0, power supply I1 / 2 charges the capacitors, while the other branch does not charge. The voltage across the capacitor in the charging branch increases linearly and continues to charge until it reaches the comparator's threshold voltage V. ref At this time, the comparator's output level begins to flip, and the state of the RS flip-flop changes accordingly. Then, when CLK1=0 and CLK2=1, the capacitor in the other branch charges and discharges, thus completing one oscillation cycle. This process repeats, and the circuit generates a fixed-frequency output clock.

[0024] Figure 3 The current bias module is composed of a mirror current source and is used to supply current to... Figure 1 The four comparators and operational amplifiers in the circuit provide bias current. The basic principle is that since the gate voltages of the two transistors are the same, the two transistors will have the same drain current, thus achieving current mirroring.

[0025] Figure 4 It is a current adjustment module used to increase the current of this branch to improve the output signal frequency of the oscillator. The main body is a multi-output current mirror circuit. It increases the output current through external control words, thereby enabling the branch in the voltage-mode RC oscillator to quickly charge the capacitor and increase the frequency of the oscillator's output clock signal.

[0026] Figure 5It consists of a series of transmission gate switches, capacitors, and resistors, forming a resistance adjustment module and a capacitor adjustment module. The resistance adjustment module consists of a transmission gate switch and a single resistor connected in parallel, with multiple identical units connected in series. An external control word enables these units to have different resistance ratios. Similarly, the capacitor adjustment module consists of a transmission gate switch and a single capacitor connected in parallel, with multiple identical units connected in parallel. An external control word enables these units to have different capacitance values.

[0027] Figure 6 This is a clock logic generation module composed of D flip-flops, NOT gates, NOR gates, and NAND gates. The outputs of the four comparators in the frequency self-calibration circuit of this invention are processed by this module to obtain a series of non-overlapping clock signals, which are fed back to the analog module (such as switching signals) in the oscillator system to enable the analog module to work normally.

[0028] Figure 7 The comparator delay is composed of an integrator and a comparator. t d The self-calibration module. When the self-calibration module is activated, the operational amplifier and capacitor C... res This forms an integrator, and capacitor C res The inherent time error of the comparator in the sampled RC relaxation oscillator is stored. t d Then, in the next comparison cycle, this time is subtracted, causing the frequency of the RC relaxation oscillator to change from 1 / (R+C+) ... t d The value is corrected to 1 / (R+C). Furthermore, chopper modules are added before and after the op-amp to effectively reduce the DC offset voltage.

[0029] This invention employs a self-calibration technique for voltage-mode RC relaxation oscillators to address the inherent comparator delay caused by changes in ambient temperature. t d The resulting output frequency drift issue can be accurately compensated for by temperature drift, achieving a high-precision voltage-mode relaxation oscillator. The basic principle is to sample the inherent time error of the comparator in the RC relaxation oscillator. t d The time is stored in the charge and then subtracted in the next comparison cycle. Self-calibration is a dynamic technique to compensate for the comparator's fixed delay. t d This technology can reduce the inherent delay of comparators. t d The impact on the frequency of the RC relaxation oscillator is reduced, and the self-calibration technique incorporates DC offset cancellation technology to reduce offset voltage drift.

[0030] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator, characterized in that, include: Voltage-mode RC relaxation oscillator, clock logic generation module, and comparator delay t d The self-calibration module; The inherent time error of the comparator in a voltage-mode RC relaxation oscillator t d The charge is stored in the comparator, and this time is subtracted in the next comparison cycle; the delay is fixed by dynamically canceling the comparator. t d Technology will reduce the inherent delay of comparators t d The frequency impact on the voltage-mode RC relaxation oscillator is reduced, and the self-calibration combined with DC offset cancellation technology reduces offset voltage drift.

2. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 1, characterized in that, The voltage-mode RC relaxation oscillator includes a mirror current source I1, two comparators, a capacitor adjustment module, a resistor R1, an RS flip-flop in the clock logic generation module. To obtain a square wave signal with a 50% duty cycle, the charging and discharging currents of the two capacitors C in the capacitor adjustment module need to be consistent. When CLK1=1 and CLK2=0, power supply I1 / 2 charges one capacitor while the other does not charge. The voltage across the capacitor in the charging branch increases linearly and continues charging until it reaches the comparator's threshold voltage V. ref When the comparator's output level begins to flip, the state of the RS flip-flop changes accordingly. Then, when CLK1=0 and CLK2=1, another capacitor charges and discharges, and the circuit completes one oscillation cycle. This process repeats, and the circuit generates a fixed-frequency output clock.

3. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 1, characterized in that, The current bias module is composed of a mirror current source and is used to provide bias current to the four comparators and operational amplifiers in the frequency self-calibration circuit.

4. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 1, characterized in that, The current adjustment module is used to increase the current of the branch to improve the output signal frequency of the oscillator. The main body is a multi-output current mirror circuit. By increasing the output current through external control words, the branch in the voltage-mode RC oscillator can quickly charge the capacitor, thereby increasing the frequency of the oscillator's output clock signal.

5. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 2, characterized in that, The resistance adjustment module consists of a transmission gate switch and a single resistor connected in parallel, forming a unit. Multiple identical units are connected in series, and are enabled by an external control word to have different resistance ratios. The capacitor adjustment module consists of a transmission gate switch and a single capacitor connected in parallel, forming a unit. Multiple identical units are connected in parallel, and are enabled by an external control word to have different capacitance values.

6. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 1, characterized in that, The clock logic generation module consists of D flip-flops, NOT gates, NOR gates, and NAND gates. The outputs of the four comparators in the frequency self-calibration circuit are processed by this module to obtain a series of non-overlapping clock signals, which are then fed back to the analog module in the oscillator system to enable the analog module to work normally.

7. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 1, characterized in that, The comparator delay t d The self-calibration module consists of an integrator and a comparator; when the self-calibration circuit is activated, the operational amplifier and capacitor C... res Constructing an integrator, capacitor C res The inherent time error of the comparator in a storage voltage-mode RC relaxation oscillator t d Then, in the next comparison cycle, this time is subtracted, causing the frequency of the voltage-mode RC relaxation oscillator to change from 1 / (R+C+) ... t d The value is corrected to 1 / (R+C).

8. The frequency self-calibration circuit based on a voltage-mode RC relaxation oscillator as described in claim 7, characterized in that, The operational amplifier is equipped with chopper modules before and after it, which effectively reduces DC offset voltage.

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