Debugging device, debugging system, debugging method and chip of intelligent terminal

Abstract

The application relates to a debugging device, a debugging system, a debugging method and a chip of an intelligent terminal, the debugging device comprising a first debugger and a first debugging circuit; the first debugging circuit comprising a first high-level pin, a first ground pin and a switch; the first high-level pin and the first ground pin being connected with a USB ground interface of the intelligent terminal through the switch; the USB ground interface being connected with a ground interface of an external USB device; the debugger being connected with the first debugging circuit; the first debugger being used for controlling the switch to connect a line between the first ground pin and the USB ground interface when detecting that the first high-level pin is pulled low; the first debugger being further used for setting a debugging mode of the intelligent terminal as a slave mode when detecting a voltage signal on a first USB power supply interface of the intelligent terminal, and setting the debugging mode of the intelligent terminal as a master mode when detecting that no voltage signal is detected on the first USB power supply interface.

Description

Technical Field

[0001] This application relates to the field of smart terminal technology, and in particular to a debugging device, debugging system, debugging method and chip for a smart terminal. Background Technology

[0002] With the development of smart terminal technology (especially large home appliance terminals), terminal product technologies with complex functions, such as smart TVs, set-top boxes, and industrial control hosts, have emerged. These technologies are characterized by high integration, tightly packaged hardware modules, and exposure of only commonly used user interfaces, meeting diverse needs for daily use and industrial control. To achieve in-depth diagnosis and problem localization of the overall status of smart terminals, debugging and easily obtaining debugging logs are essential.

[0003] However, the intelligent terminal described in the relevant technologies has the problem of inflexible debugging in its overall state. Summary of the Invention

[0004] Therefore, it is necessary to provide a debugging device, debugging system, debugging method, and chip for intelligent terminals that can improve debugging flexibility in response to the above-mentioned technical problems.

[0005] In a first aspect, this application provides a debugging device for a smart terminal, the debugging device including a first debugger and a first debugging circuit; the first debugging circuit includes a first high-level pin, a first ground pin and a switch; the first high-level pin and the first ground pin are connected to the USB ground interface of the smart terminal through the switch; the USB ground interface is connected to the ground interface of an external USB device; the debugger is connected to the first debugging circuit.

[0006] The first debugger is used to control the switch to connect the line between the first ground pin and the USB ground interface when it is detected that the first high-level pin is pulled low.

[0007] The first debugger is also used to set the debugging mode of the smart terminal to slave mode when a voltage signal is detected on the first USB power interface of the smart terminal, and to set the debugging mode of the smart terminal to master mode when no voltage signal is detected on the first USB power interface.

[0008] In one embodiment, the debugging device further includes a debugging chip, and a first debugging circuit is disposed on the debugging chip.

[0009] In one embodiment, the first debugging circuit further includes a switching pin; the first high-level pin, the first ground pin, and the switching pin are disposed on the motherboard of the smart terminal; the input terminal of the switching pin is connected to the first debugger, and the output terminal of the switching pin is connected to a switching switch.

[0010] In one embodiment, the debugging device further includes a second debugging circuit; the second debugging circuit includes a digital-to-analog converter component and a data negative pin; both the digital-to-analog converter component and the data negative pin are connected to the USB data negative interface of the smart terminal; the USB data negative interface is connected to the data negative interface of an external auxiliary device; the second debugging circuit is connected to the first debugger.

[0011] The first debugger is also used to detect the voltage on the line between the data negative pin and the USB data negative interface through the digital-to-analog converter component, and to set the debugging mode of the smart terminal according to the voltage.

[0012] In one embodiment, the second USB power interface of the smart terminal is connected to the power interface of the auxiliary device, the positive USB data interface of the smart terminal is connected to the positive data interface of the auxiliary device, the negative USB data interface of the smart terminal is connected to the negative data interface of the auxiliary device, and the USB ground interface of the smart terminal is connected to the ground interface of the auxiliary device; a first resistor is provided on the line between the power interface and the negative data interface of the auxiliary device, and a second resistor is provided on the line between the negative data interface and the ground interface of the auxiliary device.

[0013] Secondly, this application also provides a debugging device for a smart terminal, which includes a second debugger and a third debugging circuit. The third debugging circuit includes a digital-to-analog converter component and a data negative pin. Both the digital-to-analog converter component and the data negative pin are connected to the data negative interface of the smart terminal. The data negative interface is connected to the data negative interface of an external auxiliary device. The third debugging circuit is connected to the second debugger.

[0014] The second debugger is used to detect the voltage on the line between the negative data pin and the negative data interface of the smart terminal through the digital-to-analog converter component, and to set the debugging mode of the smart terminal according to the voltage.

[0015] Thirdly, this application also provides a debugging system for a smart terminal, the debugging system including a smart terminal and an auxiliary device; the smart terminal includes a debugging device for a smart terminal according to any one of the first and second aspects above; the auxiliary device includes a first resistor and a second resistor, the first resistor being disposed on a line between the power interface and the data negative interface of the auxiliary device, and the second resistor being disposed on a line between the data negative interface and the ground interface of the auxiliary device; the power interface of the auxiliary device is connected to the second USB power interface of the smart terminal, the data positive interface of the auxiliary device is connected to the USB data positive interface of the smart terminal, and the data negative interface of the auxiliary device is connected to the USB data negative interface of the smart terminal.

[0016] Thirdly, this application also provides a debugging method for a smart terminal, applied to a first debugger in a debugging apparatus for a smart terminal according to any one of the first and second aspects described above, the method comprising:

[0017] When the first high-level pin is detected to be pulled low, the control switch connects the line between the first ground pin and the USB ground interface;

[0018] When a voltage signal is detected on the first USB power interface of the smart terminal, the debugging mode of the smart terminal is set to slave mode; when no voltage signal is detected on the first USB power interface, the debugging mode of the smart terminal is set to master mode.

[0019] Fourthly, this application also provides a debugging method for a smart terminal, applied to a second debugger in a debugging apparatus for a smart terminal according to any one of the first and second aspects described above, the method comprising:

[0020] The voltage on the line between the negative data pin and the negative data interface of the smart terminal is detected by the digital-to-analog converter component, and the debugging mode of the smart terminal is set according to the voltage.

[0021] Fifthly, this application also provides a chip that includes a debugging device for a smart terminal comprising any one of the first and second aspects described above, wherein the debugging device is configured to cause the chip to perform the steps of the method provided in the third or fourth aspect described above.

[0022] Sixthly, this application also provides a chip module, including a communication module, a power module, a storage module, and a chip, wherein:

[0023] The power module is used to provide power to the chip module;

[0024] Storage modules are used to store data and instructions;

[0025] The communication module is used for internal communication within the chip module, or for communication between the chip module and external devices;

[0026] The chip is used to perform the steps of the methods provided in the third or fourth aspect above.

[0027] In a seventh aspect, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method provided in the third or fourth aspect above.

[0028] Eighthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the method provided in the third or fourth aspect above.

[0029] The aforementioned debugging device, system, method, and chip for a smart terminal include a first debugger and a first debugging circuit. The first debugging circuit includes a first high-level pin, a first ground pin, and a switch. The first high-level pin and the first ground pin are connected to the smart terminal's USB ground interface via the switch. The USB ground interface is connected to the ground interface of an external USB device. The debugger is connected to the first debugging circuit. The first debugger, when detecting that the first high-level pin is pulled low, controls the switch to connect the line between the first ground pin and the USB ground interface. The first debugger is also used to set the smart terminal's debugging mode to slave mode when a voltage signal is detected on the smart terminal's first USB power interface, and to set the smart terminal's debugging mode to master mode when no voltage signal is detected on the first USB power interface. This debugging device, by reusing an existing USB interface and detecting the low-level event of the first high-level pin to trigger the process, provides users with a non-intrusive debugging entry point that requires no disassembly, fundamentally solving the problem of inaccessible debugging interfaces in the overall device state and improving the flexibility of overall device debugging. Furthermore, after confirming device connection, the first debugger can accurately determine the device type by detecting the presence of a voltage signal on the first USB power interface and set the debugging mode accordingly. This automatic identification and switching mechanism effectively prevents user misoperation and ensures safety and user experience in daily use. Finally, the entire debugging process employs a hardware-level detection strategy combining connection triggering and power verification. Standard electrical connections are restored before key signal sampling, significantly improving the accuracy of mode switching judgment and the reliability of system operation. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of the structure of a smart TV in the existing technology;

[0032] Figure 2 This is one of the structural schematic diagrams of a debugging device for a smart terminal in one embodiment;

[0033] Figure 3 This is a second schematic diagram of the structure of the debugging device for a smart terminal in one embodiment;

[0034] Figure 4 This is a schematic diagram of the structure of the first debugging circuit in one embodiment;

[0035] Figure 5 This is the third schematic diagram of the structure of the debugging device for a smart terminal in one embodiment;

[0036] Figure 6 This is the fourth schematic diagram of the structure of the debugging device for a smart terminal in one embodiment;

[0037] Figure 7 This is the fifth schematic diagram of the structure of the debugging device for a smart terminal in one embodiment;

[0038] Figure 8 This is a schematic diagram of the structure of a debugging system for a smart terminal in one embodiment;

[0039] Figure 9 This is a hardware connection diagram based on the VBUS signal and with the SOC having MUX functionality in one embodiment.

[0040] Figure 10 This is a hardware connection diagram based on the VBUS signal in one embodiment where the SOC does not have MUX functionality;

[0041] Figure 11 This is a schematic diagram of the hardware connection between the auxiliary interface and the auxiliary device in one embodiment;

[0042] Figure 12 This is a flowchart illustrating a debugging method for a smart terminal in one embodiment;

[0043] Figure 13 This is a schematic diagram of the chip module structure in one embodiment;

[0044] Figure 14 This is an internal structural diagram of a computer device in one embodiment.

[0045] Explanation of reference numerals in the attached figures:

[0046] First debugger 10; First debug circuit 20; First high-level pin 201; First ground pin 202; Switch 203; USB ground interface 301 of the smart terminal; Ground interface 401 of the USB device; First USB power interface 302; Debug chip 200; Switch pin 204; Second debug circuit 50; Digital-to-analog converter component 501; Data negative pin 502; Auxiliary device 60; Data negative interface 605 of the auxiliary device; Second USB power interface 303; Power interface 603 of the auxiliary device; USB data positive interface 304 of the smart terminal; Data positive interface 604 of the auxiliary device; USB data negative interface 305 of the smart terminal; Data negative interface 605 of the auxiliary device; Ground interface 601 of the auxiliary device; First resistor 606; Second resistor 607; Second debugger 70; Third debug circuit 80; Digital-to-analog converter component 801; Data negative pin 802. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0048] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0049] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0050] With the development of smart terminal technology (especially large home appliance terminals), terminal product technologies with complex functions, such as smart TVs, set-top boxes, and industrial control hosts, have emerged. These technologies are characterized by high integration, tightly packaged hardware modules, and exposure of only commonly used user interfaces, meeting diverse needs for daily use and industrial control. To achieve in-depth diagnosis and problem localization of the overall status of smart terminals, debugging and easily obtaining debugging logs are essential.

[0051] However, in the overall state of the smart terminal described in related technologies, the external USB interface is configured as a USB host by default, meaning that the exposed USB interface is only configured as a USB host and does not have USB slave functionality—the USB debug interface. At the same time, its other commonly used debug interface (serial port) is also hidden under the casing. Therefore, if real-time debugging is required, either the casing must be removed to expose the debug interface, or the USB interface must be converted from a USB host to a USB slave interface. Figure 1As shown, taking smart TVs as an example, there are currently two common methods for debugging smart TVs. The first method is to remove the casing to expose the debug interface. However, this method usually has the following drawbacks: modern smart TVs are typically large, making disassembly and assembly cumbersome and time-consuming; some abnormal problems only occur when the casing is on, and removing the casing makes the problem unreproducible. The second method is to use the button combinations on the smart TV or remote control to convert the USB port from a USB host to a USB slave. However, this method also has drawbacks: after the smart TV is sold to the user, there is a possibility that the user may accidentally trigger the USB port, causing it to malfunction and leading to user complaints.

[0052] Therefore, when the smart terminal is in its entirety, the above-mentioned debugging method for the smart terminal has the problem of inflexibility.

[0053] In view of this, embodiments of this application propose a debugging device, debugging system, debugging method and chip for a smart terminal. By reusing the existing USB interface and detecting the low pull-down event of the first high-level pin to trigger the process, it provides users with a non-intrusive debugging entry point that does not require disassembly, fundamentally solving the problem of the debugging interface being inaccessible in the state of the whole machine.

[0054] It should be noted that the beneficial effects or technical problems solved by the embodiments of this application are not limited to this one, but may also be other implicit or related problems. For details, please refer to the description of the embodiments below.

[0055] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0056] In some embodiments, such as Figure 2 As shown, a debugging device for a smart terminal is provided. The debugging device includes a first debugger 10 and a first debugging circuit 20. The first debugging circuit 20 includes a first high-level pin 201, a first ground pin 202, and a switch 203. The first high-level pin 201 and the first ground pin 202 are connected to the USB ground interface 301 of the smart terminal through the switch 203. The USB ground interface 301 is connected to the ground interface 401 of an external USB device. The debugger is connected to the first debugging circuit 20.

[0057] The first debugger 10 is used to control the switch 203 to connect the line between the first ground pin 202 and the USB ground interface 301 when the first high-level pin 201 is pulled low; the first debugger 10 is also used to set the debugging mode of the smart terminal to slave mode when a voltage signal is detected on the first USB power interface 302 of the smart terminal, and to set the debugging mode of the smart terminal to master mode when no voltage signal is detected on the first USB power interface 302.

[0058] The aforementioned smart terminals include, but are not limited to, smart TVs, set-top boxes, and industrial control hosts. The debugging device can be a functional module or circuit unit within the smart terminal.

[0059] The aforementioned first high-level pin 201, serving as an access detection probe, is typically configured as a general-purpose input / output (GPIO) pin pulled up to a logic high level, such as GPIO1. When no external USB device is connected, this pin is held high by an internal pull-up resistor. Its core function is to detect whether the USB ground line is connected and pulled low by an external device, thus serving as a hardware trigger signal for "device access".

[0060] The aforementioned first ground pin 202 serves as the system reference ground and is the common ground terminal on the smart terminal's motherboard. When the debugging device decides to establish a formal USB connection, the switch 203 will connect the USB ground interface 301 to this location, providing a complete and stable grounding loop for USB data communication.

[0061] The aforementioned switch 203, acting as a ground path selector, is a switch controlled by the first debugger 10. It can be a tri-state gate or an analog switch controlled by a GPIO, or a multiplexer (MUX) in a System-on-Chip (SOC). Initially, the switch 203 connects the USB ground interface 301 to the first high-level pin 201 for access detection. Upon receiving a command from the first debugger 10, it switches the connection of the USB ground interface 301 from the first high-level pin 201 to the first ground pin 202, thereby establishing a true USB electrical connection.

[0062] The USB devices mentioned above can be USB host devices or USB slave devices. USB host devices are debugging trigger devices used to debug smart terminals; USB slave devices are ordinary functional devices, such as USB flash drives, keyboards, mice, etc.

[0063] The aforementioned USB grounding interface 301, as an external physical connection point, is the grounding (GND) contact in the USB interface exposed to the user on the smart terminal casing. It is used to physically connect with the grounding interface 401 of the external USB device to form a current loop.

[0064] The aforementioned first debugger 10, acting as the control and decision-making center, is a hardware module (such as a processing unit in a SOC) or associated firmware / software. Its functions include three core decision logics. The first core decision logic is the monitoring and triggering logic: continuously monitoring the level state of the first high-level pin 201; when it is detected that the pin is continuously pulled low for a period of time (for debouncing), it is determined that a valid device has been connected.

[0065] The second core decision logic mentioned above is the path control logic: after determining that the device is connected, a control signal is sent to the switch 203, which commands it to connect the USB grounding interface 301 to the system ground.

[0066] The third core decision logic mentioned above is mode determination: after switching the grounding path, the logic immediately detects the voltage on the first USB power interface 302 (VoltageBus, or VBUS for short), and determines the final mode based on whether there is voltage on VBUS. If there is voltage, it is set to host mode (for connecting USB flash drives, etc.), and if there is no voltage, it is set to slave mode (for debugging).

[0067] To ensure the normal operation of external USB devices and smart terminals, Figure 2 It also includes the USB power interface of the smart terminal, the USB positive data interface 304 of the smart terminal, the USB negative data interface 305 of the smart terminal, the power interface of the external USB device, the data positive interface of the external USB device, and the data negative interface of the external USB device. The wiring between the USB power interface and the power interface of the external USB device can be found in [reference needed]. Figure 2 As shown in VBUS, the wiring between the USB data positive interface 304 and the data positive interface of the external USB device can be found in [reference needed]. Figure 2 As shown in the diagram (DP), the wiring between the USB data negative interface and the data negative interface of the external USB device can be found in [reference needed]. Figure 2 As shown in DM, the wiring between the USB ground interface 301 and the ground interface 401 of the external USB device can be found in [reference needed]. Figure 2 As shown in GND.

[0068] The working principle of the debugging device for the smart terminal in this embodiment is as follows: After the debugging device is powered on, the first debugger 10 controls the switch 203 to connect the USB ground interface 301 of the smart terminal to the first high-level pin 201 (internal pull-up to high level). At this time, the electrical circuit of the USB interface is in the "detection ready" state. When an external USB device is connected, its ground interface pulls the USB ground interface 301 of the smart terminal to a low level through a cable. Since the interface is currently connected to the first high-level pin 201, the level of the pin changes from high to low. The first debugger 10 continuously monitors the level of the first high-level pin 201. When it is confirmed that it is stably pulled low (e.g., for more than 20ms to prevent accidental touch), it is determined to be a valid debugging device connection event. In response to the above determination, the first debugger 10 immediately controls the switch 203 to switch states, disconnecting the USB ground interface 301 from the first high-level pin 201 and connecting it to the first ground pin 202 (i.e., system ground). This operation aims to restore the USB interface to a standard electrical connection state, ensuring the reliability of subsequent communication. Next, the first debugger 10 enables the hardware circuitry of the USB interface and begins detecting the VBUS voltage signal on its first USB power interface 302. If a valid VBUS voltage is detected within a preset time window (e.g., twice the VBUS filtering time), it indicates that the connected device does not require power from the smart terminal (consistent with the debugging host being connected via a special cable). At this time, the first debugger 10 sets the smart terminal's debugging mode for this interface to USB slave mode and automatically starts the ADB service, thus entering a state where remote debugging is possible. If a valid VBUS voltage (e.g., +5V) is not detected within the preset time window, it indicates that a regular USB peripheral that requires power from the smart terminal is connected. In this case, the first debugger 10 sets the debug mode of the smart terminal's interface to USB host mode to perform normal device management and data communication.

[0069] The debugging device for a smart terminal provided in this application reuses an existing USB interface and triggers the process by detecting the low-level event of the first high-level pin. This provides users with a non-intrusive debugging entry point that requires no disassembly, fundamentally solving the problem of inaccessible debugging interfaces in the overall device state and improving the flexibility of overall device debugging. Moreover, after confirming device connection, the first debugger can accurately determine the device type by detecting the presence of a voltage signal on the first USB power interface and set the debugging mode according to the device type. This automatic identification and switching mechanism effectively prevents user misoperation and ensures the safety and experience of daily use. Finally, the entire debugging process adopts a hardware-level detection strategy that combines connection triggering and power verification. Standard electrical connections are restored first, and then key signal sampling is performed, significantly improving the accuracy of mode switching judgment and the reliability of system operation.

[0070] In some embodiments, Figure 2 On the basis of, such as Figure 3 As shown, the above-mentioned debugging device also includes a debugging chip 200, and a first debugging circuit 20 is disposed on the debugging chip 200.

[0071] The aforementioned first debugging circuit 20 integrates a transistor-level circuit equivalent to the internal node connected to the first high-level pin 201 and the first ground pin 202, as well as a switching switch 203. It is no longer a circuit built on a PCB with discrete components, but exists as an internal module of the debugging chip 200 or a specific set of I / O pins and its control logic.

[0072] The aforementioned debug chip 200 can be a programmable logic chip (such as a CPLD / FPGA) or a system-on-a-chip (SOC). The first debug circuit 20 disposed on the debug chip 200 is used to receive the ground connection status from the external USB interface of the chip, and under the control of internal logic, switch the actual connection path of the USB ground pin (initially connected to the internal pull-up, and then connected to the system ground).

[0073] The working principle of the modulation device in the embodiments of this application is the same as Figure 2 The working principle of the modulation device is the same as that of the previous one. For details, please refer to the above description, which will not be repeated here.

[0074] The modulation device described in this application integrates the key circuit (first debugging circuit) for implementing intelligent debugging trigger logic and related control logic (part or all of the functions of the first debugger) into a hardware-integrated, independent, reusable, and highly reliable functional unit, thereby enhancing the modularity and portability of the solution and making it easier to apply the debugging solution to different intelligent terminal platforms.

[0075] In some embodiments, Figure 2 On the basis of, such as Figure 4 As shown, the first debugging circuit 20 also includes a switching pin 204; the first high-level pin 201, the first ground pin 202 and the switching pin 204 are disposed on the main board of the smart terminal; the input terminal of the switching pin 204 is connected to the first debugger 10, and the output terminal of the switching pin 204 is connected to the switching switch 203.

[0076] The switching pin 204 is a general purpose output (GPIO) pin controlled by the first debugger 10, such as GPIO2. It serves as the physical channel for the first debugger 10 to send control commands to the switching switch 203 in the first debug circuit 20. The high and low level signals output by the switching pin 204 can directly drive or select the switching switch 203, thereby changing the connection target of the USB ground interface 301 (whether it is the first high-level pin 201 or the first ground pin 202). The motherboard 60 refers to the printed circuit board inside the smart terminal that carries the main integrated circuits and circuit traces.

[0077] In this embodiment, after the smart terminal is powered on and initialized, the first debugger 10 configures the first high-level pin 201 as a pull-up input mode to monitor device access, and simultaneously configures the switching pin 204 as an output mode, outputting an initial level (e.g., low level). This initial level is transmitted to the control terminal of the switch 203 through the motherboard trace, causing the switch 203 to connect the USB ground interface 301 to the first high-level pin 201 in the initial state. When an external USB device is connected and its ground interface is connected to the USB ground interface 301 of the smart terminal, it will pull the line low. The first debugger 10 detects this low-level signal through the first high-level pin 201, and after debouncing confirmation (e.g., low level lasting 20ms), determines that a valid device has been inserted. Immediately afterwards, the first debugger 10 sends a switching command to the switch 203 by changing the output level on the switching pin 204 (e.g., from low level to high level). In response to this level change, switch 203 performs a change in physical connection state, switching the USB ground interface 301 from connection to the first high-level pin 201 to connection to the first ground pin 202, thereby establishing a correct grounding loop for subsequent USB communication. After this, the first debugger 10 begins detecting the voltage on the first USB power interface 302 and, according to the aforementioned logic (voltage for master mode, no voltage for slave mode), completes the final setting of the debug mode. The entire process, through the explicit control signal line of switch pin 204, achieves precise and reliable control of the hardware (state of switch 203) by the software (logic of the first debugger 10).

[0078] The modulation device described in this application, by introducing a switching pin, clearly separates and reliably connects the control logic of the first debugger from the execution mechanism of the first debug circuit. This design makes the signal flow of the debugger (device access detection → control command output → hardware switching action) more modular and easier to implement. The switching pin, as a critical control interface, ensures that the first debugger can accurately and promptly control the switching of the grounding loop based on real-time judgment, making it a crucial link in the entire scheme from detection to execution. This design enhances the reliability and debuggability of the scheme, facilitating intuitive judgment of whether the control logic is correctly executed by measuring the level change of the switching pin during production testing or fault analysis.

[0079] In some embodiments, Figure 2 On the basis of, such as Figure 5 As shown, the above-mentioned debugging device also includes a second debugging circuit 50, which includes a digital-to-analog converter component 501 and a data negative pin 502.

[0080] The digital-to-analog converter 501 and the negative data pin 502 are both connected to the USB negative data interface 305 of the smart terminal. The USB negative data interface 305 is connected to the negative data interface 605 of the external auxiliary device. The second debugging circuit 50 is connected to the first debugger 10.

[0081] The first debugger 10 is further configured to detect the voltage on the line between the data negative pin 502 and the USB data negative interface via the digital-to-analog converter 501, and set the debugging mode of the smart terminal according to the voltage. Specifically, if the voltage on the line between the data negative pin 502 and the USB data negative interface is within a preset voltage range, the debugging mode of the smart terminal is set to slave mode; if the voltage is not within the preset voltage range, the debugging mode of the smart terminal is set to master mode. The preset voltage range is determined according to the design of the auxiliary equipment.

[0082] The second debugging circuit 50 described above is a hardware circuit that implements debugging functionality triggered by the auxiliary interface. The digital-to-analog converter component 501 is an analog-to-digital converter used to acquire the analog voltage value at its input terminal (i.e., on the USB data negative interface line) and convert it into a digital quantity for the first debugger 10 to read.

[0083] The aforementioned USB data negative interface refers to the interface of the negative signal line used for data communication in the USB interface, i.e., the DM line interface. In this solution, in addition to connecting to the internal data negative pin 502, the USB data negative interface also has a branch line connected to the input terminal of the digital-to-analog converter component 501.

[0084] The aforementioned auxiliary device is a specially designed external hardware. Its core function is to generate a preset voltage value on the line between the data negative interface and the data negative pin 502 through internal circuitry when the device is connected to a specific USB interface (such as USBA) of a smart terminal. This voltage value is different from the voltage generated on the line when a normal USB slave device (such as a mouse or keyboard) is connected.

[0085] In this embodiment, the USB data negative interface and Figure 2 In this embodiment, the USB data negative interface can be a single interface or two independently configured interfaces. Similarly, the USB power interface, USB data positive interface 304, and USB data negative interface can be a single interface or two independently configured interfaces. Figure 5 The following example illustrates the concept of separate interfaces.

[0086] The working principle of the debugging device for the smart terminal in this embodiment is as follows: After the smart terminal is powered on, the first debugger 10 starts the digital-to-analog converter 501 associated with the second debugging circuit 50, and makes it continuously or periodically sample the voltage on the USB data negative interface line. The USB data negative interface is part of the auxiliary interface (such as the D-pin of another USB interface) exposed to the outside world by the smart terminal. When an external device is connected to the auxiliary interface, it will change the electrical state on the data negative interface line. The first debugger 10 obtains the real-time voltage on the current line by reading the digital value converted by the digital-to-analog converter 501, and determines whether the real-time voltage on the current line is within the preset voltage range. If it is within the preset voltage range, it means that the auxiliary device is connected. Then the first debugger 10 can set the debugging mode of the smart terminal to slave mode and start the ADB debugging service at the same time. If it is not within the preset voltage range, it means that a regular USB device is connected. Then the debugging mode of the smart terminal can be set to master mode, that is, the target USB interface is controlled to execute the standard USB host enumeration process, maintaining or setting it to USB host mode.

[0087] The modulation apparatus described in this application, by introducing a second debugging circuit, provides a debugging triggering scheme based on dedicated auxiliary equipment and analog voltage identification. The core security and flexibility of this scheme lie in the fact that the "key" for triggering debugging is a specific analog voltage value generated by external hardware (auxiliary equipment). This voltage value can be defined and changed by the implementer, making it difficult to guess or copy. Figure 2 Compared to solutions relying on VBUS, this solution offers enhanced safety through a second debugging circuit, preventing accidental triggering due to simple VBUS short circuits or specific wiring sequences. Furthermore, it eliminates the need for disassembly or the use of easily mis-tapped software buttons, enabling safe and reliable debugging of smart terminals through intelligent identification auxiliary equipment.

[0088] In some embodiments, such as Figure 6 As shown, the second USB power interface 303 of the smart terminal is connected to the power interface 603 of the auxiliary device, the USB data positive interface 304 of the smart terminal is connected to the data positive interface 604 of the auxiliary device, the USB data negative interface 305 of the smart terminal is connected to the data negative interface 605 of the auxiliary device, and the USB ground interface 301 of the smart terminal is connected to the ground interface 601 of the auxiliary device. A first resistor 606 is provided on the line between the power interface 603 and the data negative interface 605 of the auxiliary device, and a second resistor 607 is provided on the line between the data negative interface 605 and the ground interface 601 of the auxiliary device.

[0089] The first resistor 606 and the second resistor 607 form a series voltage divider network. This voltage divider network is connected between the auxiliary device's power interface 603 (which receives the VBUS voltage from the smart terminal) and the ground interface, while the auxiliary device's data negative interface 605 is connected to the middle node of this voltage divider network. Therefore, when the auxiliary device is connected to the smart terminal and powered on, the VBUS voltage provided by the smart terminal will generate a voltage divider across the first resistor 606 and the second resistor 607, resulting in a preset voltage (V=VBUS×R2 / (R1+R2)) on the data negative interface, determined by the resistance ratio of the first resistor 606 and the second resistor 607. This preset voltage range can be close to V. This preset voltage range is used to trigger the "key" signal for debugging identification. The second USB power interface 303 serves as the VBUS pin interface of the auxiliary USB interface. The second USB power interface 303 can be integrated with the first USB power interface 302 or set independently.

[0090] In this embodiment, when the auxiliary device is fully connected to the auxiliary interface (USBA) of the smart terminal via a cable, the smart terminal provides a standard VBUS voltage (e.g., 5V) to the auxiliary device through the second USB power interface 303. This voltage is applied across the voltage divider circuit consisting of a first resistor 606 (R1) and a second resistor 607 (R2). According to Ohm's law, a specific voltage division value is generated on the data negative interface 605 of the auxiliary device, and this voltage is fed back to the USB data negative interface 305 of the smart terminal through the connection line. The second debugging circuit 50 inside the smart terminal operates in real time: its digital-to-analog converter component 501 continuously samples the voltage on the data negative pin 502 (i.e., the electrical connection point of the USB data negative interface). The first debugger 10 reads the digital value converted by the digital-to-analog converter component 501 and compares it with a preset voltage range, which is calculated or experimentally calibrated based on the precise resistance values ​​of the first resistor 606 and the second resistor 607 in the auxiliary device. If the read voltage value falls within the preset voltage range, the first debugger 10 is certain that the currently connected device is a legitimate and dedicated auxiliary device. Subsequently, the first debugger 10 triggers a debugging action, controlling the target USB interface (USBD) used for debugging to switch its operating mode from USB host to USB slave and start the ADB service. The entire identification process is based on precise matching of analog voltages. Ordinary USB devices (whose data negative interface voltage state after connection is defined by the USB protocol specification, which is usually different from this voltage divider value) cannot generate the same voltage characteristics, and therefore cannot falsely trigger the debugging mode.

[0091] The modulation device described in this application, by defining in detail the circuit structure of the auxiliary device using a voltage divider network composed of a first resistor and a second resistor, clarifies the specific hardware implementation method for generating the identification voltage. This design has significant advantages: First, it offers high security. The "key" for triggering debugging is a specific voltage determined by the resistor value. The designer can freely define the combination of resistor values, thereby generating a unique identification voltage, greatly increasing the difficulty of unintentional or malicious forgery. Second, it boasts high reliability. The voltage divider circuit is simple and reliable, generating a stable voltage that is not easily affected by environmental interference, ensuring the accuracy of identification. Finally, it is low-cost and easy to implement. Only two ordinary resistors are needed to constitute the core identification device, making it easy to manufacture the auxiliary device as a simple, low-cost external debugging key. This solution provides high security while maintaining the core advantage of convenient debugging without disassembly.

[0092] In some embodiments, such as Figure 7 As shown, a debugging device for a smart terminal is also provided. The debugging device includes a second debugger 70 and a third debugging circuit 80. The third debugging circuit 80 includes a digital-to-analog converter 501 and a data negative pin 502.

[0093] The digital-to-analog converter 501 and the negative data pin 502 are both connected to the negative data interface of the smart terminal. The negative data interface is connected to the negative data interface 605 of an external auxiliary device. The third debugging circuit 80 is connected to the second debugger 70. The second debugger 70 is used to detect the voltage on the line between the negative data pin 502 and the negative data interface of the smart terminal through the digital-to-analog converter 501, and to set the debugging mode of the smart terminal according to the voltage.

[0094] The aforementioned second debugger 70 is a control logic unit, which can be another hardware module or coprocessor independent of the first debugger 10, or a different software thread or task running on the same processor. It is dedicated to handling debug trigger logic based on the auxiliary interface.

[0095] The third debugging circuit 80 described above is a hardware circuit that implements debugging functionality triggered by the auxiliary interface. The digital-to-analog converter 501 is an analog-to-digital converter used to acquire the analog voltage value at its input terminal (i.e., on the USB data negative interface line) and convert it into a digital quantity for the first debugger 10 to read.

[0096] The debugging device and the embodiment of this application Figure 5 The debugging device is similar to that of the previous one, and its components and working principle have been described in the foregoing embodiments. For details, please refer to the foregoing description, which will not be repeated here.

[0097] The debugging device described in this application constructs a dedicated secure debugging trigger channel for processing analog voltage-based identification by setting up an independent second debugger 70 and a third debugging circuit 80. The advantages of this scheme are as follows: First, it achieves functional modularity and high security by separating the voltage sampling and decision logic, decoupling it from the VBUS-based detection scheme, reducing system complexity. Simultaneously, the voltage "key" mechanism provides stronger resistance to false triggering and anti-counterfeiting capabilities. Second, it enhances the system's flexibility and scalability. The second debugger 70 can independently run its detection algorithm, facilitating future updates to the identification strategy or compatibility with different versions of auxiliary equipment. Finally, this design ensures the reliability and real-time performance of the debugging trigger mechanism. Dedicated circuitry and processor resources ensure a fast and accurate response to auxiliary equipment access signals, providing developers with a safe and convenient overall debugging entry point.

[0098] In some embodiments, such as Figure 8 As shown, a debugging system for a smart terminal is also provided. This debugging system includes a smart terminal and auxiliary equipment; the smart terminal includes the debugging device for the smart terminal in any of the above embodiments (referred to as... in the figure). Figure 6(Taking the second debugging circuit in the debugging device as an example for explanation); the auxiliary equipment includes a first resistor R1 and a second resistor R2. The first resistor is set on the line between the power interface and the negative data interface of the auxiliary equipment, and the second resistor is set on the line between the negative data interface and the ground interface of the auxiliary equipment. The power interface of the auxiliary equipment is connected to the second USB power interface of the smart terminal, the positive data interface of the auxiliary equipment is connected to the positive USB data interface of the smart terminal, and the negative data interface of the auxiliary equipment is connected to the negative USB data interface of the smart terminal.

[0099] The debugging device and the embodiment of this application Figure 6 The debugging device is similar to that of the previous one, and its components and working principle have been described in the foregoing embodiments. For details, please refer to the foregoing description, which will not be repeated here.

[0100] For example, the debugging system for the smart terminal (such as a smart TV) in this embodiment includes three schemes, as follows:

[0101] (1) Option 1: such as Figure 9 The diagram illustrates a solution based on the VBUS signal and with the SOC possessing a multiplexer (MUX) function. The figure shows the hardware connection of a smart TV based on the VBUS signal and with the SOC possessing MUX functionality. Using a USB 2.0 interface as an example (the same applies to USB 3.0), when an external USB device is plugged in, the smart TV's VBUS is connected to the external USB device's VBUS, the smart TV's DP is connected to the external USB device's DP, and the smart TV's DM is connected to the external USB device's DM. However, the USB device's GND may be connected to either the smart TV's GPIO or the smart TV's GND, depending on the software configuration on the smart TV system. Specifically, the GND portion of this special USB interface (P1, which will be referred to as P1 in the following description) possesses MUX functionality.

[0102] The software flow based on the VBUS signal and with the SOC having MUX functionality is as follows: ① Switch P1 to the GPIO pin via register settings, then configure GPIO as a pull-up input, set a low-level trigger interrupt, and enable the interrupt. ② Wait for external USB connection—the external USB device could be a USB host or a USB device. ③ Detect the interrupt trigger. If an interrupt is triggered and lasts for 20ms (the time can be set according to specific circumstances, it is not required, the purpose is to debouncing and prevent false alarms). ④ Cancel the GPIO interrupt function, disable GPIO, switch P1 to the GND pin via register settings, and enable the USB hardware circuit. ⑤ If a VBUS signal is detected within twice the VBUS filtering time (the time can be set according to specific circumstances, it is not required), configure it to USB slave mode and enable ADB; otherwise, configure it to USB host mode. ⑥ When the external USB device is unplugged, execute step ①.

[0103] (2) Option 2: such as Figure 10 As shown, the SOC does not have a multiplexer (MUX) function; this solution is based on a hardware connection using VBUS signals. The diagram illustrates the hardware connection of a smart TV based on VBUS signals. Taking a USB 2.0 interface connection as an example (the same applies to USB 3.0), the GND of the external USB device may be connected to either GPIO1 or GND of the smart TV, depending on the output state of GPIO2 on the smart TV system. For example, P1 may be connected to GPIO1 when GPIO2 outputs a low level, and connected to GND when GPIO2 outputs a high level; alternatively, P1 may be connected to GPIO1 when GPIO2 outputs a high level, and connected to GND when GPIO2 outputs a low level. This depends on the specific circuit design, and this embodiment does not impose strict specifications.

[0104] The software flow based on the VBUS signal is as follows: ① Configure GPIO1 as a pull-up input, set a low-level trigger interrupt, and enable the interrupt. ② Set the GPIO2 pin to output a low level through the register, connecting GPIO1 to P1. ③ Wait for external USB access—the external USB device could be a USB host or a USB device. ④ Detect the GPIO1 interrupt trigger. If an interrupt is triggered and lasts for 20ms (the time can be set according to specific circumstances, it is not required, the purpose is to debouncing and prevent false judgments). ⑤ Configure GPIO2 to output a high level, connecting GND to P1, canceling the GPIO1 interrupt function, and disabling GPIO1. ⑥ If a VBUS signal is detected within twice the VBUS filtering time (the time can be set according to specific circumstances, it is not required), configure it to USB slave mode and enable ADB; otherwise, configure it to USB host mode. ⑦ When the external USB device is unplugged, execute steps ① and ②.

[0105] (3) Option 3: such as Figure 11 As shown, this is an implementation of the auxiliary interface-based solution. In this solution, enabling the smart TV's USB interface-based debug function relies on an auxiliary device and a matching auxiliary device. This embodiment uses the USB interface as the auxiliary interface and a matching auxiliary device as an example, but it is not limited to using only the USB interface as the auxiliary interface. Other interfaces exposed by the smart TV to the user, such as HDMI and network, can also be used. To avoid confusion between the two USB interfaces in the example and to avoid excessive description, the USB interface used as the auxiliary interface will be referred to as USBA, and the USB interface used for the debug function will be referred to as USBD. Figure 11 As shown, the DM cable of the smart TV's USBA connector connects to both the internal USB module's DM signal line and the ADC module. The ADC module is responsible for utilizing the voltage on the DM signal line. The auxiliary equipment mainly consists of two equivalent resistors (R1, R2) used to divide the VBUS voltage. The voltage value on the DM signal line after voltage division is not specifically defined in this paper; the implementer can define it according to their own requirements. Therefore, this solution has strong security.

[0106] The software flow based on the auxiliary interface is as follows: ① After power-on, start the ADC module to monitor the voltage value of the DM signal line of USBA in real time. ② When the connected device is an auxiliary device, if the voltage collected by the ADC meets the set range, proceed to step ③. ③ When the connected device is a USB slave device, execute the USB enumeration process—Note: The DM voltage value generated by the auxiliary device must be different from the voltage value generated by the DM after the USB low-speed device (such as a mouse or keyboard) is connected. ④ Switch the USB corresponding to USBD from USB host to USB slave, and simultaneously start ADB to enable the debug function. Debugging can then be performed using USBD.

[0107] The debugging system for smart terminals described in this application allows entry into debug mode without removing the smart TV casing to expose the dedicated debug interface, thus enabling real-time debugging and exporting debug logs. Solution 1 uses the VBUS signal to configure the USB as a USB slave and enable ADB, thereby entering debug mode. Solution 2 offers higher security by using an auxiliary interface to switch the USB host to a USB slave and enable ADB, thus entering debug mode and improving debugging efficiency.

[0108] In one instance, such as Figure 12 As shown, a debugging method for a smart terminal is also provided, applicable to the above-mentioned... Figures 2-6 The first debugger in the debugging apparatus of any one of the smart terminals, the method comprising:

[0109] S901, when it detects that the first high-level pin is pulled low, controls the switch to connect the line between the first ground pin and the USB ground interface.

[0110] S902: When a voltage signal is detected on the first USB power interface of the smart terminal, the debugging mode of the smart terminal is set to slave mode; when no voltage signal is detected on the first USB power interface, the debugging mode of the smart terminal is set to master mode.

[0111] The methods described in each of the above steps have been described in the foregoing embodiments. For details, please refer to the foregoing descriptions. They will not be repeated here.

[0112] In one example, a debugging method for a smart terminal is also provided, applied to the above. Figure 7 The second debugger in the debugging device of the smart terminal, the method includes: detecting the voltage on the line between the data negative pin and the data negative interface of the smart terminal through a digital-to-analog converter component, and setting the debugging mode of the smart terminal according to the voltage.

[0113] The methods described in each of the above steps have been described in the foregoing embodiments. For details, please refer to the foregoing descriptions. They will not be repeated here.

[0114] Based on the same inventive concept, this application also provides a debugging apparatus for a smart terminal to implement the debugging method for the smart terminal described above. This apparatus can be applied to or integrated into a chip or chip module, for example. The solution provided by this apparatus is similar to the implementation scheme described in the above method; therefore, the specific limitations of one or more smart terminal debugging apparatus embodiments provided below can be found in the limitations of the smart terminal debugging method described above, and will not be repeated here.

[0115] In one exemplary embodiment, a debugging apparatus for a smart terminal is provided, comprising:

[0116] The switching module is used to control the switching switch to connect the line between the first ground pin and the USB ground interface when the first high-level pin is detected to be pulled low.

[0117] The setting module is used to set the debugging mode of the smart terminal to slave mode when a voltage signal is detected on the first USB power interface of the smart terminal, and to set the debugging mode of the smart terminal to master mode when no voltage signal is detected on the first USB power interface.

[0118] In one exemplary embodiment, a debugging device for a smart terminal is also provided, which is used to detect the voltage on the line between the data negative pin and the data negative interface of the smart terminal through a digital-to-analog converter component, and set the debugging mode of the smart terminal according to the voltage.

[0119] Regarding the modules / units included in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or a combination of both. For example, for various devices and products applied to or integrated into a chip, all of their modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits; for various devices and products applied to or integrated into a chip module, all of their modules / units can be implemented using hardware methods such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The components can be implemented using software programs that run on the processor integrated within the chip module. The remaining (if any) modules / units can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its components / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or in different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits.

[0120] Based on the same inventive concept, this application also provides a chip that includes the debugging device for a smart terminal as described in any of the above-described embodiments of the debugging device for a smart terminal, wherein the debugging device is configured to cause the chip to execute the steps of the method provided in any of the above-described embodiments of the debugging method for a smart terminal.

[0121] It is understood that the chip involved in the embodiments of this application may be a field-programmable gate array (FPGA), may be an application-specific integrated circuit (ASIC), may be a system on chip (SOC), may be a central processor unit (CPU), may be a network processor (NP), may be a digital signal processor (DSP), may be a microcontroller unit (MCU), may be a programmable logic device (PLD), or other integrated chips, etc.

[0122] Based on the same inventive concept, this application also provides a chip module, such as... Figure 13 As shown, the chip module includes a communication module, a power module, a storage module, and a chip. Among them:

[0123] The power module is used to provide power to the chip module; the storage module is used to store data and instructions; the communication module is used for internal communication within the chip module, or for communication between the chip module and external devices; this chip corresponds to the chip in the above chip embodiment.

[0124] The implementation method of this chip module can be found in the relevant content of the above chip embodiment, and will not be repeated here.

[0125] In some embodiments, a computer device is provided, which may be a terminal or a server, and its internal structure diagram may be as follows. Figure 14As shown, the computer device includes a processor, memory, input / output interface, communication interface, display unit, and input device. The processor, memory, and input / output interface are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interface. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interface is used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a debugging method for a smart terminal. The display unit is used to form a visually visible image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0126] Those skilled in the art will understand that Figure 14 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0127] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the method provided in any embodiment of the debugging method for the smart terminal described above.

[0128] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of the method provided in any embodiment of the debugging method for the above-described smart terminal.

[0129] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0130] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0131] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A debugging device for a smart terminal, characterized in that, The debugging device includes a first debugger and a first debugging circuit; the first debugging circuit includes a first high-level pin, a first ground pin, and a switch; the first high-level pin and the first ground pin are connected to the USB ground interface of the smart terminal through the switch; the USB ground interface is connected to the ground interface of an external USB device; the debugger is connected to the first debugging circuit. The first debugger is configured to control the switch to connect the line between the first ground pin and the USB ground interface when it detects that the first high-level pin is pulled low. The first debugger is further configured to set the debug mode of the smart terminal to slave mode when a voltage signal is detected on the first USB power interface of the smart terminal, and to set the debug mode of the smart terminal to master mode when no voltage signal is detected on the first USB power interface.

2. The debugging device according to claim 1, characterized in that, The debugging device further includes a debugging chip, and the first debugging circuit is disposed on the debugging chip.

3. The debugging device according to claim 1, characterized in that, The first debugging circuit further includes a switching pin; the first high-level pin, the first ground pin, and the switching pin are disposed on the motherboard of the smart terminal; the input terminal of the switching pin is connected to the first debugger, and the output terminal of the switching pin is connected to the switching switch.

4. The debugging device according to claim 1, characterized in that, The debugging device further includes a second debugging circuit, which includes a digital-to-analog converter component and a data negative pin; the digital-to-analog converter component and the data negative pin are both connected to the USB data negative interface of the smart terminal, the USB data negative interface is connected to the data negative interface of an external auxiliary device, and the second debugging circuit is connected to the first debugger. The first debugger is also used to detect the voltage on the line between the data negative pin and the USB data negative interface through the digital-to-analog converter component, and set the debugging mode of the smart terminal according to the voltage.

5. The debugging device according to claim 4, characterized in that, The second USB power interface of the smart terminal is connected to the power interface of the auxiliary device; the positive USB data interface of the smart terminal is connected to the positive data interface of the auxiliary device; the negative USB data interface of the smart terminal is connected to the negative data interface of the auxiliary device; and the USB ground interface of the smart terminal is connected to the ground interface of the auxiliary device. A first resistor is provided on the line between the power interface and the negative data interface of the auxiliary device, and a second resistor is provided on the line between the negative data interface and the ground interface of the auxiliary device.

6. A debugging device for a smart terminal, characterized in that, The debugging device includes a second debugger and a third debugging circuit. The third debugging circuit includes a digital-to-analog converter component and a data negative pin. The digital-to-analog converter component and the data negative pin are both connected to the data negative interface of the smart terminal. The data negative interface is connected to the data negative interface of an external auxiliary device. The third debugging circuit is connected to the second debugger. The second debugger is used to detect the voltage on the line between the data negative pin and the data negative interface of the smart terminal through the digital-to-analog converter component, and to set the debug mode of the smart terminal according to the voltage.

7. A debugging system for a smart terminal, characterized in that, The debugging system includes a smart terminal and auxiliary equipment; the smart terminal includes a debugging device for the smart terminal as described in any one of claims 1-6; the auxiliary equipment includes a first resistor and a second resistor, the first resistor being disposed on a line between the power interface and the data negative interface of the auxiliary equipment, and the second resistor being disposed on a line between the data negative interface and the ground interface of the auxiliary equipment; the power interface of the auxiliary equipment is connected to the second USB power interface of the smart terminal, the data positive interface of the auxiliary equipment is connected to the USB data positive interface of the smart terminal, and the data negative interface of the auxiliary equipment is connected to the USB data negative interface of the smart terminal.

8. A debugging method for a smart terminal, characterized in that, A first debugger applied in a debugging apparatus for a smart terminal as described in any one of claims 1-6, the method comprising: When the first high-level pin is detected to be pulled low, the control switch connects the line between the first ground pin and the USB ground interface; When a voltage signal is detected on the first USB power interface of the smart terminal, the debugging mode of the smart terminal is set to slave mode; when no voltage signal is detected on the first USB power interface, the debugging mode of the smart terminal is set to master mode.

9. A debugging method for a smart terminal, characterized in that, The second debugger, applied in the debugging apparatus for a smart terminal as described in any one of claims 1-6, comprises the following method: The voltage on the line between the negative data pin and the negative data interface of the smart terminal is detected by the digital-to-analog converter component, and the debugging mode of the smart terminal is set according to the voltage.

10. A chip, characterized in that, The device includes a debugging apparatus for a smart terminal as described in any one of claims 1-6, the debugging apparatus being configured to cause the chip to perform the steps of the method as described in claim 8 or 9.

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