An integrated circuit simulation design method and system

Abstract

This invention discloses an integrated circuit simulation design method and system, relating to the field of circuit simulation design technology. The method includes the following steps: model construction, load assessment, dynamic parameter adjustment, obtaining several circuit modules based on the integrated circuit's functions, setting a module weight matrix, adjusting calculation parameters according to the weight differences of the corresponding circuit modules, simulation deviation correction, correcting simulation data based on deviation information and resource load coefficients, and optimization iteration. It possesses the ability to quantify resource load status, formulate dynamic resource allocation strategies, adjust grid density and time step when resources exceed a threshold, concentrate limited resources on key functional modules, dynamically reduce the simulation accuracy of ordinary modules, shorten simulation time, and ensure core performance. By correcting the deviation between simulation parameters and actual test data, it reduces manual intervention, achieves a dynamic balance between accuracy and efficiency, and improves the overall quality and efficiency of circuit design.

Description

Technical Field

[0001] This invention relates to the field of circuit simulation design technology, specifically to an integrated circuit simulation design method and system. Background Technology

[0002] Integrated circuit simulation design refers to the design process targeting integrated circuits and very large-scale integrated circuits. Integrated circuit design involves establishing models of electronic devices such as transistors, resistors, and capacitors, as well as the interconnections between these devices. All devices and interconnections must be placed on a semiconductor substrate. These components are fabricated on a single silicon substrate using semiconductor device manufacturing processes to form a circuit. With the rapid development of information technology, integrated circuits, as the core of electronic systems, are experiencing increasingly higher design complexity and integration levels, placing stringent demands on design accuracy and verification efficiency.

[0003] Currently, traditional integrated circuit simulation parameters are mostly fixed settings, which cannot be dynamically adjusted according to the real-time computing resources of the system. This results in poor hardware utilization, affecting the efficiency of circuit simulation design. Furthermore, the lack of differentiation in parameter adjustments makes it impossible to guarantee the accuracy of key circuit data. At the same time, circuit simulations are often based on ideal material properties, ignoring process deviations and parasitic parameters, leading to a large gap between simulation results and actual test data. Manual comparison and analysis of simulation and test data are required, and manual adjustments are necessary, further reducing the efficiency and accuracy of integrated circuit simulation design. Summary of the Invention

[0004] The purpose of this invention is to provide an integrated circuit simulation design method and system, which solves the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: an integrated circuit simulation design method, comprising the following steps:

[0006] Model building: The model building module constructs multiphysics coupled simulation models, including electrical field models, thermal field models, and mechanical stress models.

[0007] Load assessment involves initiating multiphysics coupling simulation, collecting and analyzing the load information of the design system through the resource load assessment module, obtaining the resource load coefficient, which reflects the degree of strain on the design system's computing resources;

[0008] Parameters are dynamically adjusted. When the resource load coefficient exceeds the set threshold, the parameter adjustment module is activated to perform parameter adjustment operations. First, several circuit modules are obtained according to the integrated circuit functions, and a module weight matrix is ​​set. Then, the operating parameters are adjusted and calculated according to the weight differences of the corresponding circuit modules.

[0009] Simulation deviation correction involves extracting simulation data from multiphysics coupling simulation using a simulation deviation correction module, then collecting actual test data at corresponding measurement points through a hardware testing platform. The simulation data and actual test data are combined and analyzed to obtain deviation information. When the deviation information exceeds a set deviation threshold, the simulation data is corrected based on the deviation information and resource load coefficient.

[0010] After optimization and iteration, the simulation data is corrected and then substituted into the multiphysics coupling simulation model through the iteration control module. Steps S2 to S4 are repeated to obtain new deviation information. The iteration stops when the new deviation information is less than the deviation threshold or the number of iterations reaches the set number.

[0011] Optionally, in the load assessment step, after starting the multiphysics coupling simulation model, the total number of transistors in the current integrated circuit is obtained and compared with the maximum transistor size supported by the multiphysics coupling simulation model to obtain the circuit size load item, which reflects the circuit design complexity.

[0012] Then, obtain the available memory capacity information and compare it with the total memory capacity to obtain the memory resource load item;

[0013] Next, obtain the number of available CPU cores and compare it with the total number of CPU cores to obtain the CPU resource load item. Finally, according to the circuit simulation design requirements, the circuit scale load item, memory resource load item and CPU resource load item are weighted and added together to obtain the resource load coefficient R. When the resource load coefficient R is 1, it means that the calculated resource load has reached the maximum value.

[0014] Optionally, in the parameter dynamic adjustment step, an upper limit threshold Y is set for the resource load coefficient R. high and lower limit threshold Y low When the resource load factor R > the upper limit threshold Y high or < lower threshold Y low The time-averaged trigger parameter adjustment includes mesh density differentiation adjustment and time step differentiation adjustment. First, several circuit modules are obtained based on the functional partitioning of the integrated circuit, and the weight matrix of the circuit module is set as W = {w1, w2, ..., w m}; where m is the total number of circuit modules, w i Let be the weight coefficient of the i-th module. The circuit module includes critical function modules and ordinary modules. The weight of the critical function module ranges from 0.8 to 1, and the weight of the ordinary module ranges from 0.3 to 0.7. The mesh density differentiation adjustment process is as follows:

[0015]

[0016] G i Let be the mesh density of the i-th module;

[0017] G0 is the initial grid density;

[0018] G i,cur Let G be the current mesh density of the i-th module, and let G be the initial state. i,cur =G0;

[0019] w i Let be the weight coefficient of the i-th module;

[0020] G min The minimum allowable grid density;

[0021] G max Maximum allowable mesh density;

[0022] When the resource load factor R > the upper limit threshold Y high At the same time, for critical functional modules, the mesh density is slightly reduced; for ordinary modules, the mesh density is significantly reduced.

[0023] When the resource load factor R < the lower limit threshold Y low At this time, for critical functional modules, the mesh density will be significantly increased; for ordinary modules, the mesh density will be slightly increased.

[0024] Optionally, the time step differentiation adjustment process is as follows:

[0025]

[0026] Δt i is the time step of the i-th module. The larger the value, the faster the simulation speed and the lower the simulation accuracy. Conversely, the smaller the value, the slower the simulation speed and the higher the simulation accuracy.

[0027] Δt0 is the initial time step;

[0028] Δt min The minimum allowed time step;

[0029] Δt max The maximum allowed time step;

[0030] Δt i,cur Let Δt be the current time step of the i-th module, and Δt be the initial state. i,cur =Δt0;

[0031] When the resource load factor R > the upper limit threshold Y high For critical functional modules, the time step is slightly increased to avoid signal distortion; for ordinary modules, the time step is significantly increased.

[0032] When the resource load factor R < the lower limit threshold Y lowFor critical functional modules, the time step is significantly reduced; for ordinary modules, the time step is slightly reduced.

[0033] Optionally, in the simulation deviation correction step, the test data of each corresponding simulation measurement point and actual measurement point are first obtained to obtain the simulation result and actual test data. The difference between each simulation result and its corresponding actual test data is calculated and summed to obtain the sum of measurement point deviations. Then, the average value of the sum of measurement point deviations is calculated to eliminate the influence of the sample size on the deviation value, and finally the deviation score E is obtained.

[0034] Compare the deviation score E with the deviation threshold E th When comparing, if the deviation score E > the deviation threshold E th When the value is too low, it indicates that the current simulation result is too inaccurate and the simulation parameters need to be corrected. The correction process is as follows:

[0035] First, a resource load coefficient R is introduced as a resource constraint. When resources are sufficient, the adjustment of simulation parameters increases, and vice versa. Then, the deviation score E and the deviation threshold E are calculated. th The difference is converted into a force coefficient that can be directly used for parameter adjustment, thus obtaining the deviation correction coefficient;

[0036] Finally, the simulation parameters are corrected by combining resource constraints and deviation correction coefficients to obtain the corrected simulation parameter value P. adj .

[0037] Optionally, the corrected simulation parameter value P is obtained. adj Then, it is substituted into the multiphysics coupling simulation model, and the load evaluation step is repeated to the simulation deviation correction step to obtain the new deviation score E. new When the new deviation score E new Two consecutive times less than the deviation threshold E th Alternatively, iteration can stop when the set number of iterations reaches 20. Once the set number of iterations is reached, the new deviation score E is calculated. new ≥ Deviation threshold E th Notify the management personnel to conduct an inspection.

[0038] Optionally, in the simulation deviation correction step, the simulation results and actual test data are aligned according to spatial location and time sequence. Spatial location alignment ensures that the simulation measurement points correspond to the test probe positions, and time sequence alignment is used to synchronize the simulation time step and sampling frequency to ensure that the simulation results and actual test data correspond in the time dimension.

[0039] The present invention also provides an integrated circuit simulation design system, including a model building module, a resource load assessment module, a parameter adjustment module, a simulation deviation correction module, and an iterative control module;

[0040] The model building module provides a basic model framework for integrated circuit simulation, enabling collaborative simulation analysis of multiple physics fields;

[0041] The resource load assessment module is used to monitor the status of computing resources in real time and quantify the system load level.

[0042] The parameter adjustment module configures weights according to the differences in circuit functions, and balances computational efficiency and resource consumption based on the computing resource status and circuit function weights.

[0043] The simulation deviation correction module automatically corrects the simulation parameters by comparing and analyzing the simulation data with the actual test data.

[0044] The iterative control module continuously optimizes the simulation data through cyclic iteration, ensuring that the integrated circuit simulation results meet the design requirements.

[0045] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0046] I. This invention obtains a resource load coefficient by quantitatively calculating the resource load status. When the coefficient exceeds a set threshold, it is adjusted through grid density differentiation and time step differentiation. Furthermore, the region weight matrix can customize resource allocation strategies for different types of key functional modules according to different design scenarios. When resources are scarce, the simulation accuracy of ordinary circuit modules can be dynamically reduced, concentrating limited resources on key circuit functional modules. This significantly shortens circuit simulation time without affecting core performance and avoids core performance distortion. When resources are sufficient, the simulation accuracy of key circuit functional modules is increased first, improving hardware utilization efficiency, ensuring circuit design quality, and realizing on-demand resource allocation.

[0047] Second, this invention quantifies the deviation between circuit simulation results and actual test data, and converts it into deviation correction coefficients for parameter adjustment. Simulation parameters are automatically corrected based on the deviation correction coefficients, reducing manual intervention. Furthermore, by introducing a resource load factor, when resources are sufficient, a larger parameter adjustment is allowed for further accuracy; when resources are scarce, computational efficiency is prioritized, the adjustment range is reduced, and excessive resource consumption is avoided, achieving a dynamic balance between accuracy and efficiency, ultimately improving the accuracy of simulation parameters and the efficiency of circuit design.

[0048] Third, this invention combines circuit size, memory load and CPU load when quantifying the resource load status, reducing misjudgments caused by independent dimensions, and sets the data influence coefficient of each dimension according to actual needs to adapt to diverse circuit simulation design requirements, and can more accurately reflect the overall hardware load status. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of the method flow of the present invention;

[0050] Figure 2 This is a block diagram of the system modules of the present invention. Detailed Implementation

[0051] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0052] Example: Please refer to Figure 1 and Figure 2 This embodiment provides an integrated circuit simulation design method, including the following steps:

[0053] Step S1: Model building. A multiphysics coupling simulation model is built using the model building module, including an electrical field model, a thermal field model, and a mechanical stress model, which is used to simulate the interaction of physical fields such as electrical, thermal, and mechanical stress simultaneously.

[0054] Specifically, the electrical field model uses the finite element method or the finite difference time-domain method to simulate characteristics such as signal transmission and electromagnetic interference; the thermal field model analyzes the internal temperature distribution and heat flow path of the chip; the mechanical stress model simulates the stress distribution of the chip under temperature changes; and the data interaction between the various physical field models is realized through the communication interface.

[0055] Step S2: Load assessment. Start multiphysics coupling simulation, collect and analyze the load information of the design system through the resource load assessment module, and obtain the resource load coefficient, which reflects the stress of the design system's computing resources.

[0056] Furthermore, in the load assessment step, the resource load assessment module first collects system operating load data and performs quantitative analysis to obtain a resource load coefficient. When the resource load coefficient exceeds a set threshold, parameter adjustments are performed, and resources are allocated reasonably based on the regional weights assigned according to the integrated circuit functions. The process is as follows:

[0057]

[0058] In the above formula, R is the resource load coefficient, which reflects the current level of computing resource strain. The closer the value is to 1, the more strained the resources are; the closer it is to 0, the more abundant the resources are.

[0059] N represents the total number of transistors in the current integrated circuit, reflecting the complexity of the circuit design. The more transistors there are, the greater the amount of simulation calculation.

[0060] N maxThe maximum number of transistors refers to the maximum transistor size supported by the current simulation model, used to normalize circuit complexity;

[0061] M ava Available memory capacity refers to the memory resources that can be allocated to simulation tasks in the current simulation environment;

[0062] M tot Total memory capacity refers to the total physical memory capacity of the simulation environment;

[0063] This is a memory resource load item, reflecting the data loading pressure. The larger the value, the more strained the memory resources are. During circuit simulation, it is necessary to store data such as device models, mesh data, and intermediate calculation results. Insufficient memory can lead to problems such as data overflow and simulation lag, and in severe cases, process crash.

[0064] C ava The number of available CPU cores refers to the number of CPU cores that can be allocated to simulation tasks in the current simulation environment.

[0065] C tot Total number of CPU cores, referring to the total number of CPU cores in the simulation environment;

[0066] This is a CPU resource load item used to quantify computing power requirements. In the process of simulation circuit design, transient analysis and multiphysics coupling calculation are CPU-intensive tasks that require a large number of parallel computing cores. The larger the value, the more strained the computing power.

[0067] β1 is the circuit size influence coefficient with an initial value of 0.3, β2 is the memory resource influence coefficient with an initial value of 0.35, and β3 is the CPU resource influence coefficient with an initial value of 0.35. This is suitable for medium-sized circuits, such as those with millions to tens of millions of transistors, and general-purpose circuit designs with sufficient resources. At this time, the influence of circuit size, memory, and CPU on simulation efficiency is relatively balanced, so the weights are close, achieving a balance between resources and complexity.

[0068] When dealing with large-scale circuits with hundreds of millions or more transistors, the circuit size is the core factor determining the simulation complexity. In this case, the circuit size influence coefficient β1 is set to 0.5, while the memory resource influence coefficient β2 and CPU resource influence coefficient β3 are both set to 0.25. This ensures that the resource load calculation prioritizes reflecting the circuit scale. In practical applications, the values ​​of each influence coefficient can be set according to specific circumstances to adapt to diverse circuit simulation design needs. However, to ensure that the resource load coefficient R remains stable within the range of 0 to 1, the sum of each influence coefficient must satisfy: Circuit size influence coefficient β1 + Memory resource influence coefficient β2 + CPU resource influence coefficient β3 = 1.

[0069] By normalizing the circuit size, memory load, and CPU load separately, the comparability of the data in the three dimensions is ensured, avoiding weight imbalance caused by differences in units or magnitudes. When the circuit size is large but the memory or CPU is sufficient, the simulation model can still run efficiently; conversely, when the circuit size is small but the memory or CPU is full of other processes, the simulation model will also lag. Therefore, by weighting and summing the load items of different dimensions, the misjudgment of results caused by independent dimensions can be reduced, and the overall load status can be reflected more accurately.

[0070] Step S3: Parameter dynamic adjustment. When the resource load coefficient R exceeds the set threshold, the parameter adjustment module is started to perform parameter adjustment operation. Several circuit modules are obtained according to the integrated circuit function division. The module weight matrix is ​​set, and the operating parameters are adjusted and calculated according to the weight difference of the circuit module.

[0071] Specifically, the adjustment threshold for the resource load factor R includes the upper limit threshold Y. high and lower limit threshold Y low Upper limit threshold Y high The value is 0.7, and the lower limit threshold Y low The value is 0.3, when the resource load factor R > the upper limit threshold Y. high When the resource load factor R is less than the lower limit threshold Y, it indicates that the resource load is too high; when the resource load factor R is less than the lower limit threshold Y, it indicates that the resource load is too high. low When resources are sufficient, adjustments are triggered in both of the above two scenarios. In other scenarios, adjustments are not triggered, and simulation deviation correction is performed directly. The adjustment process is as follows:

[0072] First, based on the functional division of the integrated circuit, several circuit modules are obtained, and the module weight matrix W = {w1, w2, ..., w...} is defined. m}; m is the total number of circuit modules, w i The weight coefficient for the i-th module is defined as follows: for critical functional modules, such as power management units, RF front-ends, and high-speed interfaces, the weight range is 0.8 to 1; for other ordinary modules, the weight range is 0.3 to 0.7. Then, the mesh density is adjusted differentially.

[0073]

[0074] G i Let be the mesh density of the i-th module;

[0075] G0 is the initial mesh density, which is the basic mesh density value preset before the simulation model starts, based on the process node and design accuracy requirements. For example, in the 14nm process, the initial mesh density is usually set to 7nm to ensure that the initial simulation accuracy meets the minimum error requirements of the manufacturing process.

[0076] G i,curG represents the current mesh density of the i-th module, which is the real-time mesh density value currently used by the i-th module during the simulation. Initially, G... i,cur =G0, if parameter adjustment has been triggered before, it is the mesh density value after the last adjustment. The larger the value, the denser the mesh, the higher the simulation accuracy, and the greater the computational cost.

[0077] w i Let be the weight coefficient of the i-th module;

[0078] G min To ensure the minimum allowable grid density, the module accuracy is not lower than the lower limit;

[0079] G max To achieve the maximum allowed grid density and avoid excessive resource consumption;

[0080] When resources are scarce, i.e., the resource load factor R > the upper limit threshold Y. high For key functional modules, due to the weight coefficient w of the i-th module i Large, therefore R×(1-w) i The result is relatively small, 1-R×(1-w i The result is large, and multiplying it by the initial mesh density G0 will slightly reduce the mesh density;

[0081] For ordinary modules, due to the weight coefficient w of the i-th module... i Small, therefore R×(1-w) i The result is relatively large, 1-R×(1-w i The result is small, and multiplying it by the initial mesh density G0 will significantly reduce the mesh density;

[0082] When resources are more abundant, i.e., the resource load factor R < the lower limit threshold Y low Since the resource load factor R is relatively small, for critical functional modules, 1 + (1 - R) × w i The value is relatively large, so multiplying it by the initial mesh density G0 will significantly increase the mesh density; for ordinary modules, 1 + (1 - R) × w i The value is relatively small, and multiplying it by the initial mesh density G0 will slightly increase the mesh density;

[0083] By adjusting the mesh density differently as described above, when resources are scarce, the mesh density of critical functional modules can be slightly reduced to ensure the simulation accuracy of critical functional modules such as power management and RF front-end; while the mesh density of ordinary modules can be significantly reduced to reduce the consumption of computing resources in non-core areas. When resources are sufficient, the accuracy of critical functional modules can be improved first, while ordinary modules can be slightly optimized to avoid resource waste.

[0084] After adjusting the mesh density, adjust the time step size accordingly, as follows:

[0085]

[0086] Δt i is the time step of the i-th module. The larger the value, the faster the simulation speed and the lower the simulation accuracy. Conversely, the smaller the value, the slower the simulation speed and the higher the simulation accuracy.

[0087] Δt0 is the initial time step;

[0088] Δt min To determine the minimum allowable time step, and to avoid excessively small time steps in ordinary modules, which would waste resources;

[0089] Δt max To determine the maximum permissible time step and prevent excessively large time steps in critical functional modules from causing high-frequency signal distortion, Δt is set. min and Δt max Ensure that the adjustment results meet the design thresholds of the circuit simulation;

[0090] Δt i,cur Let Δt be the current time step of the i-th module, which is the real-time time step value currently being used by the i-th module during the simulation. In the initial state, Δt... i,cur =Δt0, if an adjustment was triggered previously, then it is the time step after the last update;

[0091] When resources are scarce, i.e., the resource load factor R > the upper limit threshold Y. high For key functional modules, due to the weight coefficient w of the i-th module i Large, therefore (1-w) i The result is small, R×(1-w) i The result is relatively small, 1 + R × (1 - w i The result is small, and then multiplying it by the initial time step Δt0 will slightly increase the time step, thus avoiding signal distortion of key functional modules;

[0092] For ordinary modules, due to the weight coefficient w of the i-th module... i Small, therefore R×(1-w) i The result is relatively large, 1-R×(1-w i The result is small, and multiplying it by the initial time step Δt0 will significantly reduce the time step, thus reducing simulation accuracy and improving computation speed. However, by setting the maximum allowed time step Δt... max To avoid excessively low accuracy;

[0093] When resources are sufficient, i.e., the resource load factor R < the lower limit threshold Y. low The larger (1-R) ​​is, the more important it is for key functional modules; (1-R)×w iLarger, 1-(1-R)×w i The value is relatively small, so multiplying it by the initial mesh density G0 will significantly reduce the time step, thereby greatly increasing the accuracy of circuit simulation; for ordinary modules, 1-(1-R)×w i The initial time step is relatively large, and after multiplying it by the initial time step Δt0, the time step will change slightly, thus avoiding excessive resource consumption by ordinary modules and achieving reasonable resource allocation.

[0094] By adjusting the mesh density and time step, the simulation accuracy of ordinary modules can be dynamically reduced when resources are scarce, concentrating limited resources on key functional modules. This significantly shortens simulation time without affecting core performance, avoiding distortion of core performance and ensuring that key design indicators meet requirements. When resources are abundant, the simulation accuracy of key functional modules is prioritized to improve circuit design quality and achieve on-demand resource allocation. The region weight matrix W = {w1, w2, ..., w m It can be flexibly adjusted according to different design scenarios, such as high-power circuits, high-frequency communication chips and low-power MCUs, and resource allocation strategies can be customized for different types of key functional modules to adapt to diverse integrated circuit design needs.

[0095] Step S4: Simulation Deviation Correction. The simulation deviation correction module extracts simulation data from the multiphysics coupling simulation. Then, the hardware test platform collects actual test data at the corresponding measurement points. The simulation data and actual test data are analyzed together to obtain deviation information. When the deviation information exceeds the set deviation threshold, the simulation data is corrected based on the deviation information and the resource load coefficient. The process is as follows:

[0096]

[0097] In the above formula, E is the deviation score, which reflects the overall degree of deviation between the simulation results and the actual test data. The smaller the value, the higher the accuracy of the circuit simulation, and vice versa.

[0098] To ensure the accuracy of the deviation score E, it is necessary to ensure that the physical location of each simulated measurement point is completely consistent with that of the actual test measurement point, the start time and number of sampling points of the time domain data are completely matched, and the frequency points of the frequency domain data need to correspond to avoid misalignment of the acquisition time;

[0099] n represents the number of test samples; it refers to the number of measurement points involved in the comparison, such as voltage test points, temperature test points, etc. The more test samples n, the higher the reliability of the results.

[0100] S i The simulation result for the i-th measurement point refers to the simulated test values ​​of physical quantities such as voltage, current, temperature, and stress.

[0101] T i The actual test data for the i-th measurement point is obtained through sensor equipment.

[0102] By squaring the difference between the simulation results and the actual test data, we ensure that the deviation is non-negative, while amplifying the weight of the larger deviation to highlight the error of key measurement points.

[0103] After obtaining the sum of deviations at all measuring points, the average value is calculated to eliminate the influence of sample size on the deviation value, making the deviation score E comparable. Designs with different sample sizes allow for direct comparison of the deviation score E, and also facilitate comparison with the preset deviation threshold E. th Comparison is performed to determine whether the simulation results meet the design requirements, thus enabling the simulation of integrated circuits with different design needs. When the deviation score E > deviation threshold E... th When the value is 0, it indicates that the accuracy of the current simulation results is too low and the simulation parameters need to be adjusted.

[0104] When the deviation score E > the deviation threshold E th At that time, based on the deviation score E and the deviation threshold E th The difference was identified, and a resource load factor was introduced to correct the simulation parameters. The process is as follows:

[0105]

[0106] In the above formula, P adj The simulation parameter values ​​are corrected and include transistor threshold voltage, resistor value, capacitor value, and power supply voltage, etc.

[0107] P0 is the initial value of the simulation parameters, that is, the parameter values ​​before adjustment;

[0108] The deviation correction coefficient is a correction coefficient that can be directly used for parameter adjustment by converting the deviation score E. It reflects the influence of the degree of deviation on the degree of parameter adjustment and avoids over-correction or under-correction.

[0109] E represents the deviation score, reflecting the overall deviation between the simulation results and the actual test data;

[0110] E th The deviation threshold is the maximum allowable deviation in the design. When the deviation score E < the deviation threshold E th When the simulation accuracy meets the requirements, the deviation correction coefficient is... Approaching 0, the deviation score E and the deviation threshold E th The larger the value, the greater the deviation correction factor. The further away from 0, the greater the adjustment of simulation parameters;

[0111] k is the deviation sensitivity coefficient, which is used to control the rate at which the deviation correction coefficient changes with the deviation score E. The smaller the value, the more sensitive the deviation correction coefficient is to changes in the deviation score E.

[0112] R is the resource load factor, and (1-R) ​​is the resource constraint term. This avoids drastic parameter adjustments when computational resources are scarce, thus preventing system overload. When resources are sufficient, it allows for greater parameter adjustments, thereby improving the accuracy of circuit simulation.

[0113] By quantifying the deviation between circuit simulation results and actual test data, the simulation parameter correction range is automatically calculated, reducing manual intervention and improving the accuracy of simulation parameter correction. Furthermore, by introducing a resource load factor R, when resources are sufficient, a larger parameter correction range is allowed to further improve accuracy; when resources are scarce, computational efficiency is prioritized, the adjustment range is reduced, and excessive resource consumption is avoided, thus achieving a dynamic balance between accuracy and efficiency.

[0114] Step S5: Optimize and iterate to obtain the corrected simulation parameter value P. adj Then, the iterative control module is activated and substituted into the multiphysics coupled simulation model to calculate the new deviation score E. new When the new deviation score E new < Deviation threshold E th If the deviation fails to meet the requirements, stop adjusting; otherwise, continue adjusting until the deviation meets the requirements or the set number of iterations is reached. This ensures the consistency between the simulation results and the actual test data, reduces design risks, and if the deviation still does not meet the circuit design requirements after the set number of iterations is reached, notify the management personnel for inspection to avoid wasting computing resources on a large number of iterations.

[0115] The dynamic parameter adjustment step adjusts the computational parameters of the simulation process, not physical properties, affecting only the efficiency and accuracy of the simulation calculation. It continuously monitors resource load during simulation and dynamically adjusts parameters without waiting for the simulation to finish. In contrast, the deviation correction step adjusts the physical property parameters of the multiphysics coupled simulation model. It requires completing one round of simulation, obtaining results, and comparing them with test data before determining whether to initiate parameter adjustment. The dynamic parameter adjustment step prioritizes ensuring the simulation accuracy of key functional modules, making their simulation data closer to the true values, thereby improving the accuracy of the deviation score E in the deviation correction step.

[0116] This application also provides an integrated circuit simulation design system for performing the above-described integrated circuit simulation design method, including a model building module, a resource load assessment module, a parameter adjustment module, a simulation deviation correction module, and an iteration control module.

[0117] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. An integrated circuit simulation design method, characterized in that, Includes the following steps: Step S1: Model building. Construct a multiphysics coupled simulation model using the model building module, including an electrical field model, a thermal field model, and a mechanical stress model. Step S2: Load assessment. Start multiphysics coupling simulation, collect and analyze the load information of the design system through the resource load assessment module, and obtain the resource load coefficient, which reflects the degree of stress on the computing resources of the design system. Step S3: Parameter dynamic adjustment. When the resource load coefficient exceeds the set threshold, the parameter adjustment module is started to perform parameter adjustment operation. First, several circuit modules are obtained according to the integrated circuit function division, the module weight matrix is ​​set, and then the running parameters are adjusted and calculated according to the weight difference of the circuit module. Step S4: Simulation deviation correction. Simulation data is extracted from multiphysics coupling simulation through the simulation deviation correction module. Then, actual test data of corresponding test points are collected through the hardware test platform. The simulation data and actual test data are analyzed to obtain deviation information. When the deviation information is greater than the set deviation threshold, the simulation data is corrected based on the deviation information and resource load coefficient. Step S5: Optimize the iteration. After the simulation data is corrected, it is substituted into the multiphysics coupling simulation model through the iteration control module. Steps S2 to S4 are repeated to obtain new deviation information. The iteration stops when the new deviation information is less than the deviation threshold or the number of iterations reaches the set number.

2. The integrated circuit simulation design method according to claim 1, characterized in that: In step S2, after starting the multiphysics coupling simulation model, the total number of transistors in the current integrated circuit is obtained and compared with the maximum transistor size supported by the multiphysics coupling simulation model to obtain the circuit size load term, which reflects the circuit design complexity. Then, obtain the available memory capacity information and compare it with the total memory capacity to obtain the memory resource load item; Next, obtain the number of available CPU cores and compare it with the total number of CPU cores to obtain the CPU resource load item. Finally, according to the circuit simulation design requirements, the circuit scale load item, memory resource load item and CPU resource load item are weighted and added together to obtain the resource load coefficient R. When the resource load coefficient R is 1, it means that the calculated resource load has reached the maximum value.

3. The integrated circuit simulation design method according to claim 2, characterized in that: In step S3, an upper limit threshold Y is set for the resource load factor R. high and lower limit threshold Y low When the resource load factor R > the upper limit threshold Y high or < lower threshold Y low The time-averaged trigger parameter adjustment includes mesh density differentiation adjustment and time step differentiation adjustment. First, several circuit modules are obtained based on the functional partitioning of the integrated circuit, and the weight matrix of the circuit module is set as W = {w1, w2, ..., w m }; where m is the total number of circuit modules, w i Let be the weight coefficient of the i-th module. The circuit module includes critical function modules and ordinary modules. The weight of the critical function module ranges from 0.8 to 1, and the weight of the ordinary module ranges from 0.3 to 0.

7. The mesh density differentiation adjustment process is as follows: 4.G i Let be the mesh density of the i-th module; G0 is the initial grid density; G i,cur Let G be the current mesh density of the i-th module, and let G be the initial state. i,cur =G0; w i Let be the weight coefficient of the i-th module; G min The minimum allowable grid density; G max Maximum allowable mesh density; When the resource load factor R > the upper limit threshold Y high At the same time, for critical functional modules, the mesh density is slightly reduced; for ordinary modules, the mesh density is significantly reduced. When the resource load factor R < the lower limit threshold Y low At this time, for critical functional modules, the mesh density will be significantly increased; for ordinary modules, the mesh density will be slightly increased.

5. The integrated circuit simulation design method according to claim 3, characterized in that: The time step differentiation adjustment process is as follows: 6.Δt i is the time step of the i-th module. The larger the value, the faster the simulation speed and the lower the simulation accuracy. Conversely, the smaller the value, the slower the simulation speed and the higher the simulation accuracy. Δt0 is the initial time step; Δt min The minimum allowed time step; Δt max The maximum allowed time step; Δt i,cur Let Δt be the current time step of the i-th module, and Δt be the initial state. i,cur =Δt0; When the resource load factor R > the upper limit threshold Y high For critical functional modules, the time step is slightly increased to avoid signal distortion; for ordinary modules, the time step is significantly increased. When the resource load factor R < the lower limit threshold Y low For critical functional modules, the time step is significantly reduced; for ordinary modules, the time step is slightly reduced.

7. The integrated circuit simulation design method according to claim 4, characterized in that: In step S4, the test data of each corresponding simulation measurement point and actual measurement point are first obtained to obtain the simulation result and actual test data. The difference between each simulation result and its corresponding actual test data is calculated and summed to obtain the sum of measurement point deviations. Then, the average value of the sum of measurement point deviations is calculated to eliminate the influence of the sample size on the deviation value, and finally the deviation score E is obtained. Compare the deviation score E with the deviation threshold E th When comparing, if the deviation score E > the deviation threshold E th When this happens, it indicates that the accuracy of the current simulation results is too low, and the simulation parameters need to be corrected. The correction process is as follows: First, a resource load coefficient R is introduced as a resource constraint. When resources are sufficient, the adjustment of simulation parameters increases, and vice versa. Then, the deviation score E and the deviation threshold E are calculated. th The difference is converted into a force coefficient that can be directly used for parameter adjustment, thus obtaining the deviation correction coefficient; Finally, the simulation parameters are corrected by combining resource constraints and deviation correction coefficients to obtain the corrected simulation parameter value P. adj .

8. The integrated circuit simulation design method according to claim 5, characterized in that: The corrected simulation parameter value P is obtained. adj Then, substitute it into the multiphysics coupling simulation model and repeat steps S2 to S4 to obtain the new deviation score E. new When the new deviation score E new Two consecutive times less than the deviation threshold E th Alternatively, iteration can stop when the set number of iterations reaches 20, or when the new deviation score E is reached. new ≥ Deviation threshold E th If necessary, notify the management personnel to conduct an inspection.

9. The integrated circuit simulation design method according to claim 1, characterized in that: In step S4, the simulation results and actual test data are aligned according to spatial location and time sequence. Spatial location alignment ensures that the simulation measurement points correspond to the test probe positions, and time sequence alignment is used to synchronize the simulation time step and sampling frequency to ensure that the simulation results and actual test data correspond in the time dimension.

10. An integrated circuit simulation design system, characterized in that: The integrated circuit simulation design system includes a model building module, a resource load assessment module, a parameter adjustment module, a simulation deviation correction module, and an iteration control module. The integrated circuit simulation design system executes the integrated circuit simulation design method according to any one of claims 1-7.

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