A circuit parallel simulation method directly compatible with a sparse matrix solution library

Abstract

The present application relates to the field of integrated circuit design, and specifically to a circuit parallel simulation method directly compatible with sparse matrix solver library. Traditional methods need to deeply code adapt multiple sparse matrix solver libraries such as KLU, pardiso, UMFPACK and SuperLU, resulting in high development and maintenance costs, poor compatibility and the need to modify simultaneously with third-party library updates. The present application divides the circuit into multiple sub-circuits and coupling systems through node segmentation; constructs a linear system for each sub-circuit and solves the internal excitation response; calculates the sub-circuit coupling node port voltage and Thevenin equivalent impedance; constructs and solves the coupling system; finally calculates the overall solution of each sub-circuit. The key is to directly call the existing sparse matrix solver library to process sub-circuit internal calculation without modifying the internal code of the solver library. This method is compatible with multiple solvers, significantly reduces development and maintenance costs, improves simulation efficiency, and does not need to be modified simultaneously with third-party solver library updates, with significant technical advantages and application value.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design and provides a circuit parallel simulation method that is directly compatible with sparse matrix solver libraries. Background Technology

[0002] With the continuous expansion of integrated circuit design scale and increasing complexity, circuit simulation technology plays an increasingly crucial role in chip design verification. SPICE (Simulation Program with Integrated Circuit Emphasis), as an industry-standard circuit simulation tool, directly determines the length of the chip design cycle through its computational efficiency. Currently, major global EDA vendors such as Cadence (Spectre), Synopsys (hspice), and leading domestic companies such as Huada Jiutian (ALPS) and BTDsim have all incorporated parallel computing technology into the core functions of their commercial SPICE simulation software [1,2].

[0003] In existing technologies, CPU-based parallel simulation methods mainly employ circuit partitioning strategies, decomposing large-scale circuits into multiple independently processable sub-circuits, thereby forming linear systems with bordered block-diagonal (BBD) structures [3,4]. With a well-defined circuit partitioning strategy, these methods can significantly improve the simulation efficiency of large-scale circuits by combining direct and iterative solution methods. However, in practical applications, the BBD method faces significant challenges in compatibility with sparse matrix solvers.

[0004] Specifically, modern SPICE simulators need to repeatedly solve sparse linear systems of the form Ax=b during the Newton-Raphson iteration process. For different types of circuits, the industry has developed a variety of efficient sparse matrix solver libraries. For example, for pre-simulation circuits, the KLU solver performs well due to its optimization for the characteristics of circuit matrices[5]; for power networks or post-simulation circuits, the pardiso solver usually has better performance and scalability[6]; in addition, solver libraries such as UMFPACK[7] and SuperLU[8] also have unique advantages in specific scenarios.

[0005] However, traditional parallel BBD methods require special row and column transformations on the sparse matrix and differentiated processing procedures for internal and boundary nodes of the submatrix during the solution process (e.g., separating internal and coupled nodes in Crout LU decomposition). This means that existing BBD implementations cannot directly call the interfaces of standard sparse matrix solver libraries, but must undergo deep modification and adaptation of the solver's internal implementation. This technical obstacle presents three challenges:

[0006] First, for each sparse matrix solver library (such as KLU, pardiso, UMFPACK, SuperLU, etc.), a specific set of adaptation code needs to be developed and maintained, which greatly increases the workload and complexity of SPICE simulator development.

[0007] Secondly, some commercial sparse matrix solving libraries do not have open source code, making it technically difficult to modify and adapt them, and may even involve intellectual property issues.

[0008] Third, when the sparse matrix solver library is updated or bugs are fixed, the SPICE simulator must update the corresponding adaptation code simultaneously. This not only increases maintenance costs but may also lead to system stability risks.

[0009] Therefore, achieving direct compatibility with various existing sparse matrix solver libraries while maintaining the parallel efficiency of the BBD method, without requiring modification or adaptation of the solver libraries themselves, has become a critical technical problem that urgently needs to be solved in the field of parallel circuit simulation. Solving this problem will significantly reduce the development and maintenance costs of SPICE simulators, while enabling them to fully utilize the latest and most efficient sparse matrix solver techniques in the industry, thereby improving the performance and reliability of large-scale circuit simulation.

[0010] References:

[0011] [1] Chen Jingrui, Zhou Zhenya, Wu Dake, Cheng Minghou, Liu Qiang. A parallel solution method based on partitioning of large-scale integrated circuits. Chinese Patent, CN202110558302.0, 2021-05-21, 2021.

[0012] [2] Wan, Bin, and Xingang Wang. "Overview of commercially-availableanalog / RF simulation engines and design environment." 2014 12th IEEEInternational Conference on Solid-State and Integrated Circuit Technology(ICSICT). IEEE, 2014.

[0013] [3]Peng Li. Parallel Circuit Simulation: A Historical Perspective andRecent Developments. 2011.

[0014] [4]Martin Vlach. LU decomposition and forward-backward substitutionof recursive bordered block diagonal matrices. In IEE Proceedings G(Electronic Circuits and Systems), volume 132, pages 24–31. IET, 1985.

[0015] [5]Timothy A Davis and Ekanathan Palamadai Natarajan. Algorithm 907:KLU, a direct sparse solver for circuit simulation problems. ACM Transactionson Mathematical Software (TOMS), 37(3):1–17, 2010.

[0016] [6] Olaf Schenk, Klaus Gärtner, Wolfgang Fichtner, and Andreas Stricker. PARDISO: a high-performance serial and parallel sparse linearsolver in semiconductor device simulation. Future Generation ComputerSystems, 18(1):69–78, 2001.

[0017] [7]Timothy A Davis. Algorithm 832: UMFPACK V4. 3—an unsymmetric-pattern multifrontal method. ACM Transactions on Mathematical Software(TOMS), 30(2):196–199, 2004.

[0018] [8]Xiaoye S Li. An overview of SuperLU: Algorithms, implementation, and user interface. ACM Transactions on Mathematical Software (TOMS), 31(3):302–325, 2005. Summary of the Invention

[0019] The purpose of this invention is to solve the problems caused by the high development and maintenance costs, difficulty in compatibility with multiple solvers, and the need for synchronous modification with the updates of third-party solver libraries in traditional BBD circuit parallel simulation methods, which require deep code adaptation and modification of various sparse matrix solver libraries (such as KLU, pardiso, UMFPACK, and SuperLU).

[0020] To achieve the above objectives, the present invention employs the following technical means:

[0021] This invention provides a circuit parallel simulation method that is directly compatible with sparse matrix solver libraries, comprising the following steps:

[0022] Step 1: Divide the circuit into p sub-circuits by nodes, where coupled nodes are classified separately and form a coupled system;

[0023] Step 2: For each sub-circuit k, construct a linear system based on the MNA stamping method of the SPICE simulator. ;

[0024] Step 3: Solve for the internal excitation response without considering the influence of coupling nodes, i.e., solve for... ,in To be The vector after the excitation terms corresponding to the intermediate coupling nodes are set to zero;

[0025] Step 4: Calculate the port voltage of the coupling node of sub-circuit k. ,in It is a mapping matrix;

[0026] Step 5: Calculate the Thevenin equivalent impedance of sub-circuit k, i.e., solve for... The equivalent impedance of the port is obtained. ;

[0027] Step 6: Construct and solve the coupled system ,in:

[0028]

[0029]

[0030] To map the coupling node of the k-th sub-circuit to the mapping matrix of the overall coupled system;

[0031] Step 7: Calculate the overall solution for each sub-circuit. ;

[0032] in Let K be the internal excitation response vector of sub-circuit k. For sub-circuit The response matrix under unit source excitation, To make the first The mapping matrix from the coupling nodes of each sub-circuit to the overall coupled system. The unknown vector obtained by solving for the coupled system. Indicates transpose;

[0033] In steps 3, 5, and 6, the solution of the linear system is directly called from the sparse matrix solver library, without the need to modify or adapt the internal code of the sparse matrix solver library.

[0034] In the above scheme, step 1 specifically includes the following sub-steps:

[0035] Step 1.1: Divide the circuit into nodes. Each sub-circuit, among which Indicates the number of sub-circuits after circuit division;

[0036] Step 1.2: Identify and classify boundary nodes individually. The boundary nodes, or coupling nodes, are the points cut by circuit segmentation.

[0037] Step 1.3: Treat the coupling node as an independent sub-circuit, so that the original p sub-circuits are independent of each other, and each sub-circuit only interacts with the coupling circuit, thereby facilitating the establishment of a coupled solution system.

[0038] In the above scheme, step 2 specifically includes the following sub-steps:

[0039] Step 2.1: For the k-th sub-circuit, its and The number of sub-circuits after circuit partitioning is represented by the MNA stamping method of the SPICE simulator, which is used to construct a linear system.

[0040]

[0041] Step 2.2: where the unknown vector and the right-hand term vector It has the following form:

[0042]

[0043] in Indicates the first The number of unknowns within each sub-circuit. Indicates the first The number of coupling nodes corresponding to each sub-circuit. Indicates the first The first sub-circuit There are two internal unknowns, which can be either node voltages or branch currents. Indicates the first The first sub-circuit Voltage at each coupling node, Indicates the first The first sub-circuit The incentive terms corresponding to each internal node Indicates the first The first sub-circuit The excitation terms corresponding to each coupled node.

[0044] In the above scheme, step 3 specifically includes the following sub-steps:

[0045] Step 3.1: For each sub-circuit ,in and This represents the number of sub-circuits after circuit partitioning, and is used to solve the internal excitation response without considering the influence of coupling nodes.

[0046] Step 3.2: Solve the system of linear equations Obtain the internal incentive response, wherein:

[0047]

[0048] in Indicates the first The coefficient matrix corresponding to each sub-circuit This indicates that only the response vector of the source within this sub-circuit is considered. To transform the original right-hand term vector The vector obtained by setting the excitation terms corresponding to the coupled nodes to zero. Indicates the first The number of unknowns within each sub-circuit.

[0049] In the above scheme, step 4 specifically includes the following sub-steps:

[0050] Step 4.1: Calculate the sub-circuit Coupled node port voltage ,in and Indicates the number of sub-circuits after circuit division;

[0051] Step 4.2: Using the formula Calculate the port voltage, where:

[0052]

[0053] in Indicates the first The port voltage vector of the coupling node of each sub-circuit For the mapping matrix, For electronic The internal excitation response vector, Indicates the first The number of unknowns within each sub-circuit. Indicates the first The number of coupling nodes corresponding to each sub-circuit. The sign of ± in the matrix is ​​defined as follows: for the same coupling node, the block index Smaller sub-circuits take positive signs, and block indicators are used. Larger sub-circuits take a negative sign.

[0054] In the above scheme, step 5 specifically includes the following sub-steps:

[0055] Step 5.1: Calculate the sub-circuit Thevenin equivalent impedance, where and Indicates the number of sub-circuits after circuit division;

[0056] Step 5.2: Solve the system of linear equations Calculate the response of each port under a unit source excitation;

[0057] Step 5.3: Calculate the equivalent impedance of the port Through the formula:

[0058]

[0059] in , This represents the coefficient matrix corresponding to the k-th sub-circuit. Sub-circuit representation The response matrix under unit source excitation, For the mapping matrix, Indicates the first The number of coupling nodes corresponding to each sub-circuit

[0060] In the above scheme, step 6 specifically includes the following sub-steps:

[0061] Step 6.1: Constructing a Coupled System ;

[0062] Step 6.2: Wherein the coupling matrix and right end item Calculate using the following formulas respectively:

[0063]

[0064]

[0065] Step 6.3: Solve the coupled system to obtain ;

[0066] in Let be the coupling matrix. For an unknown vector in a coupled system, For the right-hand term of the coupled system, This indicates the number of sub-circuits after circuit division. Let be a mapping matrix, used to map the first... The impedance and port voltage of each sub-circuit are mapped onto the overall coupled system. For the first The port equivalent impedance matrix of each sub-circuit For the first The port voltage vector of the coupling node of each sub-circuit This represents the number of all coupled nodes. Indicates the first The number of coupling nodes corresponding to each sub-circuit.

[0067] Because the present invention employs the above-mentioned technical means, it has the following beneficial effects:

[0068] 1. This invention solves the problem of differentiated processing of internal and boundary nodes in the traditional BBD method by dividing the circuit into multiple sub-circuits and processing the coupling nodes separately to form an independent coupled system, thus simplifying the solution process. In the traditional BBD method, the different processing methods for internal and boundary nodes prevent the direct use of existing sparse matrix solver libraries. However, the method of this invention allows direct calling of standard sparse matrix solver library interfaces without modification or adaptation.

[0069] 2. This invention solves the problem of needing to synchronously update corresponding adaptation code when the sparse matrix solver version is updated or a problem is fixed during circuit simulation by calculating the Thevenin equivalent impedance of each sub-circuit and constructing and solving the coupled system. This reduces maintenance costs and system stability risks. The key to this process is the ability to directly solve using existing sparse matrix solver libraries, thereby avoiding redundant development and potential intellectual property disputes.

[0070] 3. This invention combines multiple techniques, including circuit partitioning, independent processing of coupled nodes, and direct use of sparse matrix solver libraries, to achieve a significant synergistic effect. Specifically, it greatly improves compatibility with various sparse matrix solver libraries without sacrificing parallel efficiency. This method not only simplifies the development process and reduces maintenance workload but also enables circuit simulation software to quickly integrate the latest solver techniques, improving the performance and reliability of large-scale circuit simulation. This innovation is of great significance for promoting the development of the integrated circuit design field.

[0071] 4. In practical engineering applications and commercial operations, small and medium-sized enterprises (SMEs) and emerging companies typically lack the resources and capabilities to independently develop mathematical solver libraries. Furthermore, different solver libraries, due to differences in their algorithm implementations, each have unique applicable scenarios and performance characteristics. Therefore, this invention greatly simplifies the integration difficulty between different solver libraries by providing a universal calling method that does not require modification of the underlying mathematical solver library. This method not only lowers the technical threshold for deep adaptation of specific solver libraries but also allows developers to flexibly choose the most suitable solver tool according to specific application scenarios, thereby effectively improving the development efficiency and flexibility of circuit simulation software. This solution is particularly suitable for SMEs that want to quickly integrate the latest solver technologies and improve product competitiveness but are limited by R&D resources. Attached Figure Description

[0072] Figure 1 This gives the idea of ​​partitioning a circuit using nodes. The schematic diagram of each sub-circuit shows that the coupling node is treated as a separate, independent sub-circuit, thus making the original... Each sub-circuit is independent of the others; they only interact with the coupling circuit.

[0073] Figure 2 The diagram shown is a simpler sub-circuit partitioning diagram, where the circuit is divided into two parts with only one coupling node. .

[0074] Figure 3 For the test circuit, the circuit is divided into two sub-circuits along node 2 during the test. Detailed Implementation

[0075] The embodiments of the present invention will be described in detail below. Although the present invention will be described and illustrated in conjunction with some specific embodiments, it should be noted that the present invention is not limited to these embodiments. On the contrary, any modifications or equivalent substitutions made to the present invention should be covered within the scope of the claims of the present invention.

[0076] Furthermore, to better illustrate the present invention, numerous specific details are set forth in the following detailed embodiments. Those skilled in the art will understand that the present invention can be practiced without these specific details.

[0077] I. SPICE Circuit Simulation

[0078] The model equations solved by the SPICE simulator in the time domain are the following nonlinear algebraic differential equations:

[0079]

[0080] in The nonlinear function representing the dynamic element. The nonlinear function representing a static element. For external incentive sources, The unknowns typically include node voltages and branch currents. By selecting a suitable time-discretion scheme, equation (1) can be transformed into a nonlinear algebraic equation. Taking the backward Euler method as an example, we have:

[0081]

[0082] Among them, subscript Represents the number of discrete time points. Represents at discrete time points The nonlinear function value at that point, and Let represent the charge / magnetic flux vectors of the dynamic element (such as capacitor or inductor) at time points n+1 and n, respectively, which are nonlinear functions of the unknown quantity x. Indicates the time step, that is, from time point arrive The time interval; This represents the current vector generated by a static component (such as a diode or other nonlinear device) at time point n+1, and is a nonlinear function of the unknown quantity x. This represents the contribution vector of external excitation source terms (such as voltage sources and current sources) at time point n+1.

[0083] Solving equation (2) using the Newton-Raphson (NR) iterative method, we have:

[0084]

[0085] superscript Indicates the NR iteration index, , .

[0086] The Jacobian matrix represents the value at time point 1. NR iteration count The partial derivative matrix of the system equations with respect to the unknown variables. Represents the vector of unknown variables at time points NR iteration count The value at time; This indicates the time point during the MNA stamping process. NR iteration count The capacitance matrix at that time, This indicates the time point during the MNA stamping process. NR iteration count The admittance matrix at time, Indicates the time step, that is, from time point arrive The time interval, At a certain point in time NR iteration count The current when the nonlinear device is approximated linearly. At a certain point in time NR iteration count The charge when the nonlinear device is approximated linearly;

[0087] Therefore, in the SPICE simulator, it is necessary to repeatedly solve problems of the form... The sparse matrix of (Equation 3), for parallel solution, based on the circuit partitioning results, can be obtained through row and column transformations into the following sparse matrix:

[0088]

[0089] And the right-hand item:

[0090]

[0091] in For the commutative matrix, Indicates the number of circuit segments. , For the first The matrix corresponding to the nodes inside each sub-circuit For the first Each sub-circuit's internal node corresponds to the right-hand term. This represents the matrix corresponding to all coupled nodes after circuit partitioning. This indicates the right-hand side of all coupled nodes after circuit partitioning. and Indicates the first The relationship between sub-circuits and coupling nodes. and Let i be the matrix and right-hand side of the i-th sub-circuit. , ; This represents the number of internal nodes of the i-th partition. This represents the number of all coupled nodes. This represents the number of coupled nodes corresponding to the i-th segment. and Represents the coupling matrix of the i-th segment pair. and right end item Contribution, superscript Represents the transpose of a matrix. Indicates the first The coupling row matrix of the sub-circuit represents the effect of internal node voltage changes on the charge or current of the coupled nodes. , ), Indicates the first The coupling column matrix of the sub-circuit represents the effect of changes in the voltage at the coupling nodes on the charge or current at the internal nodes. , ), Indicates the first The matrix corresponding to the coupling nodes of each sub-circuit This represents the node mapping matrix, which maps the locally coupled nodes of sub-circuit i to the global coupled node space. , and The meanings of each and , and The difference is that the former matrix includes elements that do not belong to that sub-circuit. The rows and columns corresponding to the coupled nodes are all zero.

[0092] II. Traditional BBD Solving

[0093] Taking the Crout LU decomposition algorithm as an example, for a submatrix Its decomposition into

[0094]

[0095] in and matrix The LU decomposition results satisfy ,in It is a lower triangular matrix. It is an upper triangular matrix. and The equivalent LU decomposition matrix of the coupled part is... , This is the corrected coupling matrix after elimination.

[0096] The corresponding implementation steps are as follows

[0097] 1. To The former Decompose the rows / columns to obtain , , ;

[0098] 2. Generating a matrix ;

[0099] 3. For the matrix Decompose to obtain .

[0100] superscript Represents the inverse of a matrix;

[0101] Therefore, the equation The overall solution process is as follows:

[0102] 1. Perform LU decomposition on each block in parallel.

[0103] 1a. For block division The internal nodes correspond to row and column decomposition, resulting in , , ;

[0104] 1b. Generating Matrix ;

[0105] 1c. Generate the coupling matrix

[0106] 1d. For the matrix Decompose to obtain .

[0107] 2. Parallel solution of the form: system

[0108] 2a. Solve for each block ,get ;

[0109] 2b. Calculation ;

[0110] 2c. Generate the right-hand side of the coupling matrix. ;

[0111] 2d. Solve get .

[0112] 3. Parallel solution of the form: system

[0113] 3a. Solve get ;

[0114] 3b. Calculation ;

[0115] 3c. Solve get .

[0116] The block matrix can be obtained from 3a and 3c. The overall solution can be obtained by combining all the partitions to obtain the solution of the original system. Because each partition requires different operations on internal and external nodes, such as LU decomposition processes 1a and 1b-1d, we cannot directly call the sparse matrix solver to solve the problem. Instead, the solver needs to be modified and adapted to fit the BBD method. Given the significant differences between various sparse solver algorithms, this will pose a considerable challenge to development and maintenance.

[0117] III. The Novel BBD Method Proposed in This Invention

[0118] The circuit diagram is divided using node partitioning; the circuit is divided into... Each sub-circuit and its boundary nodes (coupling nodes) are classified separately to facilitate the establishment of a coupled solution system while ensuring that each sub-circuit is independent of the others. Boundary nodes are the points where the circuit is cut.

[0119] Figure 1This gives the idea of ​​partitioning a circuit using nodes. The schematic diagram of each sub-circuit shows that the coupling node is treated as a separate, independent sub-circuit, thus making the original... Each sub-circuit is independent of the others; they only interact with the coupling circuit. Figure 2 The diagram shown is a simpler sub-circuit partitioning diagram, where the circuit is divided into two parts with only one coupling node. .

[0120] The following is the first... Figure 2 The new algorithm is given as an example, and finally generalized to Figure 1 A more general form.

[0121] 3.1 Derivation based on simplified circuit

[0122] 3.1.1. After circuit partitioning, assume that the linear systems corresponding to each sub-circuit are (using MNAstamping of the SPICE simulator).

[0123] ,

[0124] Place the coupling node at the end, i.e.:

[0125]

[0126] in Indicates the first The number of nodes inside each sub-circuit, superscript This indicates coupling. A1 and A2 represent the coefficient matrices corresponding to the first and second sub-circuits after circuit partitioning, respectively. These matrices are automatically constructed using the nodal analysis (MNA) method of the SPICE simulator and contain the electrical characteristics and connection relationships of the components within the sub-circuits. Each matrix is ​​a sparse matrix, and its structure reflects the topological characteristics of the sub-circuit. and These represent the vectors of unknown variables for the first and second sub-circuits, respectively.

[0127] This represents the voltage value of the internal node of the k-th sub-circuit, and there are a total of Internal nodes, No. The voltage values ​​at the coupling nodes (boundary nodes) between each sub-circuit and the external connection, indicated by the superscript. It means "coupling". This represents the right-hand term vector (excitation source term) corresponding to the k-th sub-circuit, with a structure similar to... correspond, This represents the incentive term for the corresponding internal node. This represents the excitation term for the corresponding coupled node;

[0128] 3.1.2. Thevenin's theorem states that any linear one-port network can be equivalently represented as a voltage source connected in series with an impedance. SPICE uses the adjoint model of nonlinear devices during the iteration process, meaning they are all linear systems. Therefore, the internal sources and coupled excitations can be solved separately, and the overall solution can be obtained using the superposition principle.

[0129] For the partitioned system, first solve for the response without considering coupling, i.e.:

[0130]

[0131] superscript This indicates that only the response of the internal sources of this sub-circuit is considered. Therefore, the voltage at the port is:

[0132]

[0133] about The sign of the last element is defined as follows: since circuit partitioning divides a coupled node into two different blocks, we will define the block index... Smaller values ​​are positive, while segmented indicators are positive. Take the negative sign for larger ones. Figure 2 We have:

[0134]

[0135] In subsequent discussions, we will consistently use the term " The specific symbols can be determined when the block matrix structure is established.

[0136] 3.1.3. Calculate the Thevenin impedance of the sub-circuit. At this point, set all internal excitation sources to 0 and set a unit-intensity current source at the port, i.e.:

[0137]

[0138] The equivalent impedance of the port is then:

[0139]

[0140] in This represents the voltage response vector of the k-th sub-circuit under unit current source excitation. This represents the coefficient matrix corresponding to the k-th sub-circuit. Indicates transpose;

[0141] 3.1.4. Construct a coupled system and solve for the Thevenin equivalent circuit current, i.e.:

[0142]

[0143] in The vector represents the unknown variables of the coupled system, and the vector represents the equivalent current flowing through the coupled nodes. The right-hand term vector of the coupled system represents the sum of the open-circuit voltages of all sub-circuits at the coupling node. This represents the right-hand term vector of the k-th sub-circuit, considering only the internal excitation.

[0144] 3.1.5. Solve for the coupled response of each sub-circuit, since the unit source... The incentive response is ,but The response under incentive is Therefore, the overall solution for the block is:

[0145]

[0146] Obviously, the above solution process directly uses the matrices filled by each block of the SPICE simulator. Without requiring special operations on the matrix, existing sparse matrix solvers can be used directly.

[0147] 3.2 General Case of Multiple Blocks and Multiple Connections

[0148] Consider block division Include There are [number] coupled nodes, which, after being divided into blocks, contain [number] nodes. Let there be a coupling node, and... and The forms are as follows:

[0149]

[0150] 3.2.1. Solve for the internal excitation response, i.e.:

[0151]

[0152] The voltage at each port is then:

[0153]

[0154] 3.2.2. Calculate the response of each port under a unit source excitation, i.e., solve:

[0155]

[0156] The equivalent impedance of the port is then:

[0157]

[0158] 3.2.3. Constructing and Solving Coupled Systems

[0159]

[0160] in It is a mapping matrix that will map the first... The impedance and port voltage of each sub-circuit are mapped onto the overall coupled system. .

[0161] Solve for the coupling response of each sub-circuit, since the response of each coupling node to a unit source excitation is... ,but The response under incentive is Therefore, the overall solution for the block partitioning is:

[0162]

[0163] 3.3. Analysis

[0164] In a single solution, all blocks only require one LU decomposition, meaning that the LU decomposition result of solving equation (17) is directly reused when solving equation (19). When calculating the excitation response of a unit intensity current source, i.e., equation (19), only two back substitutions are needed, and the computational complexity of this process is comparable to 1a and 1b in the traditional BBD algorithm. Therefore, the new algorithm is comparable to the traditional BBD in terms of computational complexity. Its advantage lies in the fact that it does not require modification of the adaptable sparse matrix solver, but can directly solve the linear system generated during the SPICE iteration process by calling a mature solver.

[0165] IV. Demonstration Examples

[0166] Figure 3 A simple linear circuit is given, which is divided into two parts along node 2. We use this example to illustrate the correctness of the solution results obtained by the new method without changing the adapting sparse matrix solver.

[0167] Firstly, SPICE will directly solve the partial blocks, establishing the following system.

[0168]

[0169] in , , The voltages at the three nodes are unknowns in the system. After solving, we have...

[0170]

[0171] Using the new algorithm, the two subsystems are:

[0172]

[0173] Ignoring occasional occurrences, solving the two systems separately yields...

[0174]

[0175] Using a unit current source as the excitation, solve the following system:

[0176]

[0177] have:

[0178]

[0179] Then the coupled system Right now .

[0180] From equation (15), the final block solution can be obtained as follows:

[0181]

[0182] The results of the block-based solution (Equation 29) and the results of the direct solution without block division (Equation 24) are consistent. Furthermore, this example demonstrates that the block-based subsystems can be directly built using SPICE and can be solved directly by calling existing sparse matrix solvers without modification or adaptation.

Claims

1. A parallel circuit simulation method directly compatible with sparse matrix solver libraries, characterized in that: The method includes the following steps: Step 1: Divide the circuit into p sub-circuits by nodes, where coupled nodes are classified separately and form a coupled system; Step 2: For each sub-circuit k, construct a linear system based on the MNA stamping method of the SPICE simulator. ; Step 3: Solve for the internal excitation response without considering the influence of coupling nodes, i.e., solve for... ,in To be The vector after the excitation terms corresponding to the intermediate coupling nodes are set to zero; Step 4: Calculate the port voltage of the coupling node of sub-circuit k. ,in It is a mapping matrix; Step 5: Calculate the Thevenin equivalent impedance of sub-circuit k, i.e., solve for... The equivalent impedance of the port is obtained. ; Step 6: Construct and solve the coupled system ,in: To map the coupling node of the k-th sub-circuit to the mapping matrix of the overall coupled system; Step 7: Calculate the overall solution for each sub-circuit. ; in Let K be the internal excitation response vector of sub-circuit k. For sub-circuit The response matrix under unit source excitation, To make the first The mapping matrix from the coupling nodes of each sub-circuit to the overall coupled system. The unknown vector obtained by solving for the coupled system. Indicates transpose; In steps 3, 5, and 6, the solution of the linear system directly calls the sparse matrix solver library, without the need to modify or adapt the internal code of the sparse matrix solver library.

2. The circuit parallel simulation algorithm according to claim 1, characterized in that, Step 1 specifically includes the following steps: Step 1.1: Divide the circuit into nodes. Each sub-circuit, among which Indicates the number of sub-circuits after circuit division; Step 1.2: Identify and classify boundary nodes individually. The boundary nodes, or coupling nodes, are the points cut by circuit segmentation. Step 1.3: Treat the coupling node as an independent sub-circuit, so that the original p sub-circuits are independent of each other, and each sub-circuit only interacts with the coupling circuit, thereby facilitating the establishment of a coupled solution system.

3. The circuit parallel simulation algorithm according to claim 1, characterized in that, Step 2 specifically includes the following steps: Step 2.1: For the k-th sub-circuit, its and The number of sub-circuits after circuit partitioning is represented by the MNA stamping method of the SPICE simulator, which is used to construct a linear system. Step 2.2: where the unknown vector and the right-hand term vector It has the following form: in Indicates the first The number of unknowns within each sub-circuit. Indicates the first The number of coupling nodes corresponding to each sub-circuit. Indicates the first The first sub-circuit An internal unknown quantity Indicates the first The first sub-circuit Voltage at each coupling node, Indicates the first The first sub-circuit The excitation term corresponding to each internal unknown quantity Indicates the first The first sub-circuit The excitation terms corresponding to each coupled node.

4. The circuit parallel simulation algorithm according to claim 1, characterized in that, Step 3 specifically includes the following steps: Step 3.1: For each sub-circuit ,in and This represents the number of sub-circuits after circuit partitioning, and is used to solve the internal excitation response without considering the influence of coupling nodes. Step 3.2: Solve the system of linear equations Obtain the internal incentive response, wherein: in Indicates the first The coefficient matrix corresponding to each sub-circuit This indicates that only the response vector of the source within this sub-circuit is considered. To transform the original right-hand term vector The vector obtained by setting the excitation terms corresponding to the coupled nodes to zero. express The number of unknowns within each sub-circuit.

5. The circuit parallel simulation algorithm according to claim 1, characterized in that, Step (4) specifically includes the following sub-steps: Step 4.1: Calculate the sub-circuit Coupled node port voltage ,in ,and Indicates the number of sub-circuits after circuit division; Step 4.2: Using the formula Calculate the port voltage, where: in Indicates the first The port voltage vector of the coupling node of each sub-circuit For the mapping matrix, For electronic The internal excitation response vector, Indicates the first The number of unknowns within each sub-circuit. Indicates the first The number of coupling nodes corresponding to each sub-circuit. The sign of ± in the matrix is ​​defined as follows: for the same coupling node, the block index Smaller sub-circuits take positive signs, and block indicators are used. Larger sub-circuits take a negative sign.

6. The circuit parallel simulation algorithm according to claim 1, characterized in that, Step 5 specifically includes the following sub-steps: Step 5.1: Calculate the sub-circuit Thevenin equivalent impedance, where and Indicates the number of sub-circuits after circuit division; Step 5.2: Solve the system of linear equations Calculate the response of each port under a unit source excitation; Step 5.3: Calculate the equivalent impedance of the port Through the formula: in , This represents the coefficient matrix corresponding to the k-th sub-circuit. Sub-circuit representation The response matrix under unit source excitation, For the mapping matrix, Indicates the first The number of coupling nodes corresponding to each sub-circuit.

7. The circuit parallel simulation algorithm according to claim 1, characterized in that, Step 6 specifically includes the following sub-steps: Step 6.1: Constructing a Coupled System ; Step 6.2: Wherein the coupling matrix and right end item Calculate using the following formulas respectively: Step 6.3: Solve the coupled system to obtain ; in Let be the coupling matrix. For an unknown vector in a coupled system, For the right-hand term of the coupled system, This indicates the number of sub-circuits after circuit division. Let be a mapping matrix, used to map the first... The impedance and port voltage of each sub-circuit are mapped onto the overall coupled system. For the first The port equivalent impedance matrix of each sub-circuit For the first The port voltage vector of the coupling node of each sub-circuit This represents the number of all coupled nodes. Indicates the first The number of coupling nodes corresponding to each sub-circuit.

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