Storage device for performing a pre-erase operation and electronic system comprising the same

Abstract

An electronic system includes a host configured to output a block status analysis command and a storage device, in response to the block status analysis command, configured to generate block status information related to an extent of data stored in each of a plurality of storage blocks of a non-volatile storage device and provide the block status information to the host. The host is further configured to provide a pre-erase command to the storage device based on the block status information, the pre-erase command instructing a pre-erase operation on an invalid storage block storing invalid data among the plurality of storage blocks.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2024-0182648, filed with the Korean Intellectual Property Office on December 10, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a storage device for performing a pre-erase operation and an electronic system including the storage device. Background Technology

[0004] A storage device may include a non-volatile storage device for storing data and a storage controller for controlling the non-volatile storage device. The storage device may perform programming operations to store write data received from the host into erased blocks of the non-volatile storage device. When the storage device receives a request to store write data but does not have enough erased blocks to store the write data, the storage device may perform an erase operation on invalid blocks storing invalid data, and then perform programming operations to store the write data into both erased blocks and erased invalid blocks. Summary of the Invention

[0005] This disclosure provides a storage device for performing a pre-erase operation, and an electronic system including the storage device.

[0006] According to some embodiments of this disclosure, an electronic system includes: a host that outputs a block status analysis command; and a storage device that, in response to the block status analysis command, generates block status information relating to the extent of data stored in each of a plurality of storage blocks of a non-volatile storage device, and provides the block status information to the host. Based on the block status information, the host provides a pre-erase command to the storage device, the pre-erase command instructing a pre-erase operation on invalid storage blocks among the plurality of storage blocks that store invalid data.

[0007] In some embodiments, a method of operating a storage device includes the following steps: receiving a first UPIU (UFS Protocol Information Unit) from a host, the first UPIU including an identifier for a pre-erase operation attribute and a first attribute value requesting block status analysis; generating block status attributes related to erased blocks among a plurality of storage blocks of a non-volatile storage device based on the first attribute value; receiving a second UPIU requesting the block status attributes from the host; providing the block status attributes to the host in response to the second UPIU; receiving a third UPIU from the host, the third UPIU including an identifier for a pre-erase operation attribute and a second attribute value requesting a pre-erase operation; and performing a pre-erase operation on invalid blocks among the plurality of storage blocks based on the second attribute value.

[0008] In some embodiments, a method of operating a host includes the following steps: providing a first UPIU (UFS Protocol Information Unit) to a storage device, the first UPIU including an identifier for a pre-erase operation attribute and a first attribute value requesting block state analysis; providing a second UPIU to the storage device, the second UPIU requesting block state attributes generated based on the first attribute value; receiving from the storage device the block state attributes as a response to the second UPIU; and providing a third UPIU to the storage device, the third UPIU including an identifier for a pre-erase operation attribute and a second attribute value requesting a pre-erase operation on invalid blocks among a plurality of storage blocks of a non-volatile storage device based on the block state attributes. Attached Figure Description

[0009] Figure 1 This is a diagram illustrating an example of an electronic system that includes storage devices.

[0010] Figure 2 This is a diagram illustrating an example of a storage device that performs erase and programming operations in response to a write command received from the host.

[0011] Figure 3 This is a diagram illustrating an example of a storage device that generates block status information and performs a pre-erase operation.

[0012] Figure 4 This is a diagram illustrating an example of a storage device that provides information to the host about the size of erased storage blocks.

[0013] Figure 5 This is a diagram illustrating an example of a storage device that provides information to the host about the ratio of erased storage blocks.

[0014] Figure 6 This is a diagram illustrating an example of a storage device that provides information to the host about the size of erased pages.

[0015] Figure 7 This is a diagram illustrating an example of a storage device that provides information to the host regarding whether a pre-erase operation is required.

[0016] Figure 8 This is a diagram illustrating an example of blocks in a storage device that undergo a pre-erase operation after a garbage collection operation.

[0017] Figure 9 This is a diagram illustrating an example of a host providing a UFS Protocol Information Unit (UPIU) to a storage device, including pre-erase operation attributes.

[0018] Figure 10 This is a diagram illustrating an example of a host providing a UPIU to a storage device, including pre-erase operation attributes based on block state attributes.

[0019] Figure 11 This is a diagram showing an example of a query request UPIU.

[0020] Figure 12 This is a graph used to illustrate the query function.

[0021] Figure 13 This is a diagram showing an example of a transaction-specific field of a write attribute.

[0022] Figure 14 This is a diagram showing an example of reading a transaction-specific field of an attribute.

[0023] Figure 15 This is a diagram illustrating an example of the properties of a pre-erase operation.

[0024] Figure 16 This is a diagram illustrating an example of block state attributes.

[0025] Figure 17 This is a diagram illustrating an example of block state attributes.

[0026] Figure 18 This is a diagram showing an example of the pre-erase size attribute.

[0027] Figure 19 This is a flowchart illustrating an example of the operation of an electronic system.

[0028] Figure 20 This is a diagram illustrating an example of a non-volatile storage device.

[0029] Figure 21 This is a diagram illustrating an example of a storage system.

[0030] Figure 22 This is a diagram illustrating an example of a UFS (Universal Flash Memory) system. Detailed Implementation

[0031] For clarity, parts unrelated to the description may be omitted from the drawings and / or description, and throughout the specification, the same reference numerals are used for the same or similar components.

[0032] Additionally, throughout the manual, whenever a part is mentioned as "including" a component, it does not mean that it excludes other components, but rather that it may include other components, unless otherwise explicitly stated.

[0033] Figure 1 This is a diagram illustrating an example of an electronic system including a storage device. (Reference) Figure 1 The electronic system 50 may include a storage device 1000 and a host 2000.

[0034] Storage device 1000 may be a device that stores data under the control of host 2000. In some embodiments, storage device 1000 may be manufactured in the form of solid-state drive (SSD) or universal flash memory (UFS).

[0035] In some implementations, storage device 1000 may include non-volatile storage device 1100 and storage controller 1200.

[0036] In some embodiments, the non-volatile storage device 1100 can store data. The non-volatile storage device 1100 can operate in response to control by the storage controller 1200. In some embodiments, the non-volatile storage device 1100 can be NAND flash memory. The non-volatile storage device 1100 can include multiple storage blocks (BLK1 to BLKz). Each of the multiple storage blocks (BLK1 to BLKz) can include multiple storage cells for storing data. In some embodiments, the multiple storage blocks (BLK1 to BLKz) can include free blocks. In some embodiments, free blocks can include erased storage blocks and invalid storage blocks. In some embodiments, erased storage blocks can be storage blocks on which no data is stored. In some embodiments, the storage cells included in an erased storage block can be storage cells in an erased state. In some embodiments, invalid storage blocks can be storage blocks storing invalid data.

[0037] In some implementations, multiple storage blocks (BLK1 to BLKz) may include valid storage blocks. In some implementations, valid storage blocks may be storage blocks that store valid data. In some implementations, multiple storage blocks (BLK1 to BLKz) may include open blocks. In some implementations, open blocks may be storage blocks that store some data. In some implementations, open blocks may include programmed pages and erased pages.

[0038] In some implementations, the non-volatile storage device 1100 may receive commands and addresses from the storage controller 1200 and perform operations instructed by the commands on a region selected by the address. The non-volatile storage device 1100 may perform programming operations (write operations) for storing data in the region selected by the address, read operations for reading data, or erase operations for deleting data.

[0039] The storage controller 1200 can control the overall operation of the storage device 1000.

[0040] In some embodiments, the storage controller 1200 may execute firmware when the storage device 1000 is powered on. The firmware may include a host interface layer controlling communication with the host 2000, a flash translation layer controlling communication between the host 2000 and the non-volatile storage device 1100, and a memory interface layer controlling communication with the non-volatile storage device 1100. In some embodiments, the flash translation layer may translate logical addresses of the host 2000 into physical addresses of the non-volatile storage device 1100.

[0041] In some implementations, the storage controller 1200 can control the non-volatile storage device 1100 to perform write, read, or erase operations based on commands from the host 2000. During a write operation, the storage controller 1200 can provide the non-volatile storage device 1100 with write commands, addresses, and data. During a read operation, the storage controller 1200 can provide the non-volatile storage device 1100 with read commands and addresses. During an erase operation, the storage controller 1200 can provide the non-volatile storage device 1100 with erase commands and addresses.

[0042] In some implementations, the storage controller 1200 may include a processor 1210, a buffer memory 1220, a host interface 1230, an error correction circuit 1240, and a memory interface 1250.

[0043] In some implementations, the processor 1210 can control the overall operation of the storage controller 1200. The processor 1210 can control programming operations based on write commands from the host 2000, and control read operations based on read commands from the host 2000.

[0044] In some embodiments, processor 1210 may include a pre-erase management module 1211. In some embodiments, pre-erase management module 1211 may control non-volatile storage device 1100 to perform a pre-erase operation to pre-erase invalid data stored in invalid storage blocks among a plurality of storage blocks (BLK1 to BLK2) of non-volatile storage device 1100.

[0045] In some embodiments, the pre-erase management module 1211 may receive a block status analysis command from the host 2000 and, in response to the block status analysis command, perform a block status analysis operation to generate block status information 1221 related to the degree of data stored in each of the plurality of storage blocks (BLK1 to BLKz). In some embodiments, the pre-erase management module 1211 may generate block status information 1221 related to erased storage blocks, invalid storage blocks, open blocks, or whether a pre-erase operation is required. For example, the block status information 1221 may be based on the erase status of data units in at least one of the plurality of storage blocks (BLK1 to BLKz). The erase status may be, for example, whether a data unit has been erased. A data unit may be, for example, a block in the plurality of storage blocks (BLK1 to BLKz), or a page in a plurality of pages in a storage block, for example, as discussed below with reference to the erased page size information (PG_ERS_SIZE). Each of the information related to erased storage blocks, invalid storage blocks, open blocks, and whether a pre-erase operation is required in the block status information 1221 is an example of the block status information 1221 based on the erase status of data units in at least one of the multiple storage blocks (BLK1 to BLKz).

[0046] In some implementations, the pre-erase management module 1211 may provide block status information 1221 to the host 2000 in response to a block status analysis command.

[0047] In some implementations, the pre-erase management module 1211 may provide block status information 1221 to the host 2000 and then control the non-volatile storage device 1100 to perform a pre-erase operation on invalid storage blocks among a plurality of storage blocks (BLK1 to BLKz) in response to a pre-erase command received from the host 2000.

[0048] In some implementations, buffer memory 1220 may be used as cache memory or operational memory of storage controller 1200.

[0049] In some embodiments, buffer memory 1220 may temporarily store data provided from host 2000 or temporarily store data read from non-volatile storage device 1100. In some embodiments, buffer memory 1220 may be dynamic random access memory (DRAM) or static random access memory (SRAM). In some embodiments, buffer memory 1220 may be located within memory controller 1200 or may be located outside memory controller 1200.

[0050] In some embodiments, buffer memory 1220 may store block status information 1221. In some embodiments, block status information 1221 may include information about the size or number of erased memory blocks among a plurality of memory blocks (BLK1 to BLKz). In some embodiments, the size of the erased memory blocks may correspond to the size of data that can be stored in the erased memory blocks.

[0051] In some implementations, block status information 1221 may include information about the ratio of erased storage blocks to free blocks. In some implementations, block status information 1221 may include information about the size of erased pages included in open blocks among a plurality of storage blocks (BLK1 to BLKz). In some implementations, block status information 1221 may include information about whether a pre-erase operation is required.

[0052] In some implementations, host interface 1230 can communicate with host 2000. Host interface 1230 can receive commands or data from host 2000, or provide responses to commands or data to host 2000.

[0053] In some implementations, the error correction circuit 1240 can perform an encoding operation to generate parity data for data received from the host 2000. The encoded data can be provided to the non-volatile storage device 1100 via the memory interface 1250. The error correction circuit 1240 can perform error correction operations on data read from the non-volatile storage device 1100. The error correction circuit 1240 can perform error correction operations to correct erroneous bits included in the data read from the non-volatile storage device 1100. The error correction circuit 1240 can provide the error-corrected data to the host 2000 via the host interface 1230.

[0054] In some implementations, memory interface 1250 can communicate with non-volatile memory device 1100. Memory interface 1250 can provide commands or data to non-volatile memory device 1100, or receive data from non-volatile memory device 1100.

[0055] In some implementations, host 2000 may include host controller 2100 and host memory 2200.

[0056] In some embodiments, host controller 2100 can control the overall operation of host 2000. In some embodiments, host controller 2100 can generate write commands for requesting data to be stored in storage device 1000, and read commands for requesting data stored in storage device 1000.

[0057] In some embodiments, host controller 2100 may provide storage device 1000 with a block status analysis command requesting status analysis of a plurality of storage blocks (BLK1 to BLKz) of non-volatile storage device 1100. In some embodiments, host controller 2100 may provide storage device 1000 with a pre-erase command to instruct the pre-erase of invalid data stored in invalid storage blocks among the plurality of storage blocks (BLK1 to BLKz).

[0058] In some embodiments, host memory 2200 may store data. In some embodiments, host memory 2200 may be volatile memory.

[0059] Figure 2 This is a diagram illustrating an example of a storage device that performs erase and programming operations in response to a write command received from the host.

[0060] refer to Figure 2 The host memory 2200 included in the host 2000 can store first data (DATA1), second data (DATA2), third data (DATA3), and fourth data (DATA4). In some embodiments, the non-volatile storage device 1100 may include free blocks (BLK_FREE). Free blocks (BLK_FREE) may contain erased blocks and invalid blocks (INVALID). In some embodiments, the first block (BLK1) and the second block (BLK2) may be erased blocks, and the third block (BLK3) and the fourth block (BLK4) may be invalid blocks.

[0061] In some embodiments, host controller 2100 may provide a write command (CMD_W) and first to fourth data (DATA1 to DATA4) to storage controller 1200. In some embodiments, storage controller 1200 may control non-volatile storage device 1100 to store the first to fourth data (DATA1 to DATA4) in response to the write command (CMD_W). However, if the size of the first to fourth data (DATA1 to DATA4) is greater than the size of an erased block, storage controller 1200 may control non-volatile storage device 1100 to perform an erase operation to erase invalid data stored in an invalid block among multiple storage blocks, and then perform a programming operation to store the data in the erased invalid block.

[0062] In some implementations, if the size of the first to fourth data (DATA1 to DATA4) is greater than the size of the first storage block (BLK1) and the second storage block (BLK2) corresponding to the erased storage block, the storage controller 1200 can control the non-volatile storage device 1100 to perform an erase operation on the third storage block (BLK3) and the fourth storage block (BLK4) corresponding to the invalid storage block (INVALID), and perform a programming operation to store the first to fourth data (DATA1 to DATA4) in the first to fourth storage blocks (BLK1 to BLK4).

[0063] In some implementations, if the size of the data received from the host 2000 is greater than the size of the erased storage block, the storage device 1000 must perform an erase operation on the invalid storage block before performing the programming operation, which may delay the time of performing the programming operation.

[0064] Figure 3 This is a diagram illustrating an example of a storage device that generates block status information and performs a pre-erase operation.

[0065] refer to Figure 3 When storage device 1000 is in an idle state, host controller 2100 may provide block status analysis command (CMD_A) to storage controller 1200. In some embodiments, the idle state may be a state in which storage device 1000 is not performing any operation. In some embodiments, block status analysis command (CMD_A) may be a command requesting information related to the extent to which data is stored in each of the plurality of storage blocks (BLK1 to BLK2) of non-volatile storage device 1100.

[0066] In some implementations, the storage controller 1200 may perform a block state analysis operation in response to a block state analysis command (CMD_A) to generate block state information 1221 relating to the extent of data stored in each of a plurality of storage blocks (BLK1 to BLKz). In some implementations, the storage controller 1200 may provide the block state information 1221 to the host 2000 in response to the block state analysis command (CMD_A).

[0067] In some implementations, the pre-erase management module 1211 may generate erase block size information (BLK_ERS_SIZE) as block status information 1221, which is about the size of the erased storage blocks (ERASED) among a plurality of storage blocks (BLK1 to BLKz).

[0068] In some implementations, the pre-erase management module 1211 may generate erase block level information (BLK_ERS_LEVEL) as block status information 1221, which is the ratio of erased blocks (ERASED) to free blocks including erased blocks (ERASED) and invalid blocks (INVALID).

[0069] In some implementations, the pre-erase management module 1211 may generate erase page size information (PG_ERS_SIZE) as block status information 1221 regarding the size of erased pages of open blocks (BLK1 to BLKz) among a plurality of storage blocks.

[0070] In some implementations, the pre-erase management module 1211 may generate pre-erase necessity information (PREERS_INFO) as block status information 1221 based on the size of the erased storage blocks (ERASED) among multiple storage blocks (BLK1 to BLKz). The pre-erase necessity information (PREERS_INFO) may indicate to the host controller 2100 whether the host controller 2100 should instruct a pre-erase operation.

[0071] In some implementations, host controller 2100 may generate a pre-erase command (CMD_PE) based on block status information 1221 received from storage controller 1200 and provide the pre-erase command (CMD_PE) to storage controller 1200.

[0072] In some embodiments, the storage controller 1200 may, in response to a pre-erase command (CMD_PE), control the non-volatile storage device 1100 to perform a pre-erase operation to erase invalid data stored in an invalid memory block (INVALID) among multiple memory blocks (BLK1 to BLK2). In some embodiments, the storage controller 1200 may, in response to a pre-erase command (CMD_PE), control the non-volatile storage device 1100 to perform a pre-erase operation on a third memory block (BLK3) and a fourth memory block (BLK4) corresponding to the invalid memory block (INVALID). In some embodiments, when invalid data stored in the third memory block (BLK3) and the fourth memory block (BLK4) is erased by a pre-erase operation, the third memory block (BLK3) and the fourth memory block (BLK4) may correspond to an erased memory block (ERASE).

[0073] In some implementations, storage device 1000 may generate block status information 1221 in response to a block status analysis command (CMD_A) received from host 2000 and provide the block status information 1221 to host 2000. In some implementations, storage device 1000 performs a pre-erase operation on invalid storage blocks (INVALID) in response to a pre-erase command (CMD_A) received from host 2000, such that even if a write command is received from host 2000, the storage device can perform programming operations on the pre-erase invalid storage blocks without performing an erase operation on the invalid storage blocks (INVALID).

[0074] Figure 4 This is a diagram illustrating an example of a storage device that provides information to the host about the size of erased storage blocks.

[0075] refer to Figure 4 The host controller 2100 may provide a block status analysis command (CMD_A) to the storage controller 1200. In some embodiments, the pre-erase management module 1211 may generate block status information 1221 in response to the block status analysis command (CMD_A).

[0076] In some implementations, the pre-erase management module 1211 may generate erase block size information (BLK_ERS_SIZE) about the size of erased storage blocks among a plurality of storage blocks (BLK1 to BLKz) as block status information 1221, and provide the erase block size information (BLK_ERS_SIZE) to the host.

[0077] In some implementations, host controller 2100 may provide a pre-erase command (CMD_PE) to storage controller 1200 based on erase block size information (BLK_ERS_SIZE). In some implementations, host controller 2100 may provide a pre-erase command (CMD_PE) to storage controller 1200 based on a comparison between the size of the erased storage block and a threshold size.

[0078] In some implementations, if the size of the erased storage block is less than a threshold size, the host controller 2100 may provide a pre-erase command (CMD_PE) to the storage controller 1200. In some implementations, if the size of the erased storage block is greater than the threshold size, the host controller 2100 may not provide a pre-erase command (CMD_PE) to the storage controller 1200.

[0079] In some implementations, the size of the erased memory block may correspond to the size of the first memory block (BLK1) and the second memory block (BLK2).

[0080] In some embodiments, the threshold size may correspond to (e.g., may be or may be based on) the size of the data to be provided to the storage controller 1200 from the data stored in the host memory 2200. In some embodiments, the data to be provided to the storage controller 1200 from the data stored in the host memory 2200 may be data stored in the host memory 2200 that is not stored in the non-volatile storage device 1100. In some embodiments, the first to third data (DATA1 to DATA3) and the z-th data (DATAz) stored in the host memory 2200 may include the first to third data (DATA1 to DATA3) that are not stored in the non-volatile storage device 1100. In some embodiments, the data to be provided to the storage controller 1200 from the data stored in the host memory 2200 may be data to be stored in the non-volatile storage device 1100 according to a write command from the host 2000. For example, the data to be provided to the storage controller 1200 may be specified to be stored in the non-volatile storage device 1100.

[0081] In some embodiments, data stored in host memory 2200 that is not provided to storage controller 1200 may be data stored in non-volatile storage device 1100. In some embodiments, among the first to third data (DATA1 to DATA3) and the z-th data (DATAz) stored in host memory 1100, the data stored in non-volatile storage device 1100 may be the z-th data (DATAz) stored in the z-th storage block (BLKz). In some embodiments, if the size of the first storage block (BLK1) and the second storage block (BLK2) is smaller than the size of the first to third data (DATA1 to DATA3), then host controller 1200 may provide a pre-erase command (CMD_PE) to storage controller 1200.

[0082] In some embodiments, the pre-erase management module 1211 may control the non-volatile storage device 1100 to perform a pre-erase operation on invalid memory blocks (INVALID) among a plurality of memory blocks (BLK1 to BLK2) in response to a pre-erase command (CMD_PE). In some embodiments, the target of the pre-erase operation may be some or all of the invalid memory blocks (INVALID).

[0083] In some implementations, host controller 2100 may determine the size of the memory block to be pre-erased based on the size of the erased memory block and provide storage controller 1200 with a pre-erasing command (CMD_PE) that includes pre-erasing size information (PE SIZE_INFO) about the size of the memory block to be pre-erased.

[0084] In some embodiments, host controller 2100 may determine the size of the memory block to be erased based on the difference between the size of the erased memory block and the size of the data to be provided to storage controller 1200 from the data stored in host memory 2200. In some embodiments, host controller 2100 may determine the size of the memory block to be erased as a single memory block size based on the difference between the sizes of the first memory block (BLK1) and the second memory block (BLK2) and the sizes of the first to third data (DATA1 to DATA3).

[0085] In some embodiments, the pre-erase management module 1211 can control the non-volatile storage device 1100 to perform a pre-erase operation on an invalid memory block (INVALID) that corresponds to the size of the memory block to be pre-erased, based on the pre-erase size information (PE SIZE_INFO) included in the pre-erase command (CMD_PE). In some embodiments, the pre-erase management module 1211 can control the non-volatile storage device 1100 to perform a pre-erase operation on one of the third memory block (BLK3) and the fourth memory block (BLK4), based on the pre-erase size information (PE SIZE_INFO) corresponding to a size included in the pre-erase command (CMD_PE).

[0086] Figure 5 This is a diagram illustrating an example of a storage device that provides information to the host about the ratio of erased storage blocks. Figure 5 Further information was provided. Figure 3 and Figure 4 Description of the operation. (See reference) Figure 5 The pre-erase management module 1211 can respond to the block status analysis command (CMD_A) received from the host 2000, generate erase block level information (BLK_ERS_LEVEL) as block status information 1221 about the ratio of erased storage blocks (ERASED) in free blocks (FREE BLOCKS), and provide the erase block level information (BLK_ERS_LEVEL) to the host 2000.

[0087] In some implementations, the ratio of erased blocks can be the ratio of the size of erased blocks to the sum of the sizes of erased blocks and invalid blocks.

[0088] In some implementations, the pre-erase management module 1211 may provide the host 2000 with erase block level information (BLK_ERS_LEVEL), which indicates that the ratio (or proportion) of erased storage blocks (ERASED) in free blocks (FLOCKS) is greater than 80% and less than or equal to 100%, and that the ratio of erased storage blocks (ERASED) is at level 1 (LEVEL1).

[0089] In some implementations, the pre-erase management module 1211 may provide the host 2000 with erase block level information (BLK_ERS_LEVEL), which indicates that the ratio of erased storage blocks (ERASED) to free blocks (FLOCKS) is greater than 50% and less than or equal to 80%, and that the ratio of erased storage blocks (ERASED) is at level 2 (LEVEL2).

[0090] In some implementations, the pre-erase management module 1211 may provide the host 2000 with erase block level information (BLK_ERS_LEVEL), which indicates that the ratio of erased blocks to free blocks is greater than 30% and less than or equal to 50%, and that the ratio of erased blocks is at level 3 (LEVEL3).

[0091] In some implementations, the pre-erase management module 1211 may provide the host 2000 with erase block level information (BLK_ERS_LEVEL), which indicates that the ratio of erased blocks to free blocks is greater than 10% and less than or equal to 30%, and that the ratio of erased blocks is at level 4.

[0092] In some implementations, the pre-erase management module 1211 may provide the host 2000 with erase block level information (BLK_ERS_LEVEL), which indicates that if the ratio of erased storage blocks to free blocks is greater than or equal to 0% and less than or equal to 10%, the ratio is at level 5 (LEVEL5).

[0093] In some implementations, the higher the level included in the erase block level information (BLK_ERS_LEVEL), the lower the percentage of erased storage blocks. In some implementations, the higher the level included in the erase block level information (BLK_ERS_LEVEL), the greater the need to perform pre-erase operations.

[0094] In some implementations, host controller 2100 may provide a pre-erase command (CMD_PE) to storage controller 1200 based on a comparison between the level (LEVEL) included in erase block level information (BLK_ERS_LEVEL) received from storage controller 1200 and a first threshold level. In some implementations, host controller 2100 may provide a pre-erase command (CMD_PE) to storage controller 1200 if the level (LEVEL) included in erase block level information (BLK_ERS_LEVEL) is higher than the first threshold level. In some implementations, host controller 2100 may provide a pre-erase command (CMD_PE) to storage controller 1200 if the erase block level information (BLK_ERS_LEVEL) includes a fourth level (LEVEL4) or a fifth level (LEVEL5).

[0095] In some implementations, if the level included in the erase block level information (BLK_ERS_LEVEL) is equal to or lower than a first threshold level, the host controller 2100 will not provide a pre-erase command (CMD_PE) to the storage controller 1200. In some implementations, if the erase block level information (BLK_ERS_LEVEL) includes a first level (LEVEL1), a second level (LEVEL2), or a third level (LEVEL3), the host controller 2100 will not provide a pre-erase command (CMD_PE) to the storage controller 1200.

[0096] In some implementations, host controller 2100 may determine the size of the storage block to be pre-erased based on erase block level information (BLK_ERS_LEVEL) and provide storage controller 1200 with a pre-erasing command (CMD_PE) that includes pre-erasing size information (PE SIZE_INFO) about the size of the storage block to be pre-erased.

[0097] In some implementations, the host controller 2100 may determine the size of the memory block to be erased based on a comparison between the level (LEVEL) included in the erase block level information (BLK_ERS_LEVEL) and a second threshold level. In some implementations, if the erase block level information (BLK_ERS_LEVEL) includes a fourth level (LEVEL4), the host controller 2100 may determine the size of the memory block to be erased as a first size. In some implementations, if the erase block level information (BLK_ERS_LEVEL) includes a fifth level (LEVEL5), the host controller 2100 may determine the size of the memory block to be erased as a second size larger than the first size. For example, when the percentage of erased memory blocks is low, the size of the memory block to be erased may be larger.

[0098] In some embodiments, the pre-erase management module 1211 may control the non-volatile storage device 1100 to perform a pre-erase operation on invalid memory blocks (INVALID) in response to a pre-erase command (CMD_PE). In some embodiments, the pre-erase management module 1211 may control the non-volatile storage device 1100 to perform a pre-erase operation on invalid memory blocks (INVALID) corresponding to the size of the memory block to be pre-erased, based on pre-erase size information (PE SIZE_INFO).

[0099] Figure 6 This is a diagram illustrating an example of a storage device that provides information to the host about the size of erased pages.

[0100] refer to Figure 6 The pre-erase management module 1211 can, in response to a block status analysis command (CMD_A) received from the host 2000, generate erased page size information (PG_ERS_SIZE) as block status information 1221, which specifies the size of erased pages (ERASEDPAGES) among the multiple pages (PAGE1 to PAGEn) included in the open block (OPEN), and provide the erased page size information (PG_ERS_SIZE) to the host 2000. In some embodiments, the open block (OPEN) can be a storage block storing some data. In some embodiments, the open block (OPEN) can be a storage block that will become the target of a programming operation when a write command is received from the host 2000.

[0101] In some implementations, the multiple pages (PAGE1 to PAGEn) included in the OPEN block may include programmed pages and erased pages. In some implementations, programmed pages may be pages on which programming operations are performed. In some implementations, programmed pages may be pages 1 to i (PAGE1 to PAGEi).

[0102] In some implementations, erased pages may be pages that have not yet undergone programming operations. In some implementations, erased pages may include memory cells in an erased state. In some implementations, erased pages may be pages i to n (PAGEi to PAGEn). In some implementations, the size of erased pages may correspond to the size of pages i to n (PAGEi to PAGEn).

[0103] In some implementations, host controller 2100 may receive erased page size information (PG_ERS_SIZE) from storage controller 1200 and provide a pre-erase command (CMD_PE) to storage controller 1200 based on a comparison of the size of the erased pages (ERASEDPAGES) included in the erased page size information (PG_ERS_SIZE) with the data stored in host 2000.

[0104] In some implementations, if the size of the data to be provided to the storage controller 1200 from the data stored in the host memory 2200 is greater than the size of erased pages, the host controller 2100 may provide a pre-erase command (CMD_PE) to the storage controller 1200. In some implementations, the data to be provided to the storage controller 1200 from the data stored in the host memory 2200 may be data stored in the host memory 2200 that is not stored in the non-volatile storage device 1100.

[0105] In some implementations, if the data to be provided to the storage controller 1200 from the (i+1)th to (z)th data (DATAi+1 to DATAz) stored in the host memory 2200 is the (i+1)th to (n+1)th data (DATAi+1 to DATAn+1), and the size of the (i+1)th to (n+1)th data (DATAi+1 to DATAn+1) is greater than the size of the (i+1)th to (n)th pages (PAGEi+1 to PAGEn) corresponding to the size of the erased pages, then the host controller 2100 may provide a pre-erase command (CMD_PE) to the storage controller 1200.

[0106] In some implementations, if the size of the data to be provided to the storage controller 1200 from the data stored in the host memory 2200 is smaller than the size of the erased pages, the host controller 2100 will not provide a pre-erase command (CMD_PE) to the storage controller 1200.

[0107] In some implementations, if the size of the data to be provided to the storage controller 1200 from the (i+1)th to (n+1)th data (DATAi+1 to DATAz) stored in the host memory 2200 is smaller than the size of the (i+1)th to (n)th pages (PAGEi+1 to PAGEn), the host controller 2100 will not provide a pre-erase command (CMD_PE) to the storage controller 1200.

[0108] In some embodiments, host controller 2100 may determine the size of the memory block to be pre-erased based on the difference between the size of the erased pages and the size of the data to be provided to storage controller 1200 from the data stored in host memory 2200. In some embodiments, host controller 2100 may determine the size of the memory block to be pre-erased based on the difference between the size of the (i+1)th to (n+1)th data (DATAi+1 to DATAz) to be provided to storage controller 1200 from the (i+1)th to (n+1)th data (DATAi+1 to DATAz) stored in host memory 2200 and the size of the (i+1)th to (n)th pages (PAGEi+1 to PAGEn).

[0109] In some implementations, host controller 2100 may provide storage controller 1200 with a pre-erase command (CMD_PE) that includes pre-erase size information (PE SIZE_INFO) about the size of the storage block to be pre-erase.

[0110] In some embodiments, the pre-erase management module 1211 may control the non-volatile storage device 1100 to perform a pre-erase operation on invalid memory blocks (INVALID) in response to a pre-erase command (CMD_PE). In some embodiments, the pre-erase management module 1211 may control the non-volatile storage device 1100 to perform a pre-erase operation on invalid memory blocks (INVALID) corresponding to the size of the memory block to be pre-erased, based on pre-erase size information (PE SIZE_INFO).

[0111] Figure 7 This is a diagram illustrating an example of a storage device that provides information to the host regarding whether a pre-erase operation is required.

[0112] refer to Figure 7 The pre-erase management module 1211 can respond to the block status analysis command (CMD_A) received from the host 2000, generate pre-erase necessity information (PREERS_INFO) as block status information 1221 regarding whether a pre-erase operation is needed (or should be performed, or is recommended), and provide the pre-erase necessity information (PREERS_INFO) to the host 2000.

[0113] In some implementations, the pre-erase management module 1211 can generate pre-erase necessity information (PRE ERS_INFO) based on the size (BLK_ERS_SIZE) of the erased storage blocks among multiple storage blocks (BLK1 to BLKz). In some implementations, if the size (BLK_ERS_SIZE) of the erased storage blocks is less than a threshold size, the pre-erase management module 1211 can generate pre-erase necessity information (PRE ERS_INFO) indicating that a pre-erase operation (NECESSITY) is required.

[0114] In some implementations, if the size of the erased storage block (BLK_ERS_SIZE) is greater than a threshold size, the pre-erase management module 1211 may generate pre-erase necessity information (PREERS_INFO) indicating that no pre-erase operation is required.

[0115] In some implementations, host controller 2100 may provide pre-erase command (CMD_PE) to storage controller 1200 based on pre-erase necessity information (PREERS_INFO).

[0116] In some embodiments, when host controller 2100 receives pre-erase necessity information (PREERS_INFO) from storage controller 1200 indicating a need for a pre-erase operation (NECESSITY), host controller 2100 may provide a pre-erase command (CMD_PE) to storage controller 1200. In some embodiments, when host controller 2100 receives pre-erase necessity information (PREERS_INFO) indicating a need for a pre-erase operation (NECESSITY), host controller 2100 may determine the size of the storage block to be pre-erased based on the size of the data to be provided to storage controller 1200 from the data stored in host memory 2200, and provide storage controller 1200 with a pre-erase command (CMD_PE) including pre-erase size information (PE SIZE_INFO).

[0117] In some implementations, when host controller 2100 receives pre-erase necessity information (PREERS_INFO) from storage controller 1200 indicating that a pre-erase operation is not required, host controller 2100 will not provide a pre-erase command (CMD_PE) to storage controller 1200.

[0118] Figure 8 This is a diagram illustrating an example of a storage device that performs a pre-erase operation after a garbage collection operation.

[0119] refer to Figure 8 The storage device 1000 can perform a pre-erase operation on invalid storage blocks among multiple storage blocks in response to a pre-erase command received from the host 2000. In some embodiments, the storage device 1000 can pre-erase invalid data stored in a third storage block (BLK3) corresponding to the invalid storage block during the pre-erase operation. In some embodiments, after performing the pre-erase operation on the third storage block (BLK3), the third storage block (BLK3) can correspond to the pre-erase storage block.

[0120] In some implementations, the sixth storage block (BLK6) and the seventh storage block (BLK7) may each include multiple pages. In some implementations, the data stored in the first page (PAGE1) and the second page (PAGE2) of the sixth storage block (BLK6) may be valid data (VALID). In some implementations, the data stored in the third to the z-th pages (PAGE3 to PAGE2) of the sixth storage block (BLK6) may be invalid data (INVALID).

[0121] In some implementations, the data stored in the first page (PAGE1) and the second page (PAGE2) of the seventh storage block (BLK7) can be valid data (VALID). In some implementations, the data stored in the third page to the z-th page (PAGE3 to PAGE2) of the seventh storage block (BLK7) can be invalid data (INVALID).

[0122] In some implementations, the storage device 1000 may perform a garbage collection operation that copies valid data stored in valid pages of multiple pages included in multiple storage blocks to a pre-erased storage block.

[0123] In some implementations, the storage device 1000 may copy the valid data (VALID) stored in the first page (PAGE1) and the second page (PAGE2) of the sixth storage block (BLK6) and the valid data (VALID) stored in the first page (PAGE1) and the second page (PAGE2) of the seventh storage block (BLK7) to the first to fourth pages (PAGE1 to PAGE4) of the third storage block (BLK3) during a garbage collection operation.

[0124] In some implementations, since the storage device 1000 has pre-erased invalid data stored in the third storage block (BLK3) according to the pre-erasure command of the host 2000, valid data can be copied to the pre-erased third storage block (BLK3) during garbage collection without needing to perform an erase operation on the third storage block (BLK3). For example, the pre-erasure can be performed before the garbage collection operation.

[0125] In some implementations, storage device 1000 may perform a garbage collection operation to copy valid data stored in the sixth storage block (BLK6) and the seventh storage block (BLK7) to the third storage block (BLK3), and then set the sixth storage block (BLK6) and the seventh storage block (BLK7) as invalid storage blocks. In some implementations, storage device 1000 may perform a pre-erase operation on the sixth storage block (BLK6) and the seventh storage block (BLK7) in response to a pre-erase command received from host 2000 during idle time. According to the pre-erase operation, invalid data stored in the sixth storage block (BLK6) and the seventh storage block (BLK7) can be pre-erased.

[0126] In some implementations, storage device 1000 may perform HID (host-initiated defragmentation) operation in response to HID commands from host 2000 according to the UFS standard, in order to copy valid data stored in the sixth storage block (BLK6) and the seventh storage block (BLK7) to the third storage block (BLK3), such that the valid data stored in the sixth storage block (BLK6) and the seventh storage block (BLK7) are aligned with data corresponding to consecutive logical addresses.

[0127] Since storage device 1000 has pre-erased invalid data stored in the third storage block (BLK3) according to the pre-erasure command of host 2000, the storage device can copy valid data to the pre-erased third storage block (BLK3) in the order of consecutive logical addresses during HID operation without performing an erase operation on the third storage block (BLK3). For example, pre-erasure can be performed before the HID operation.

[0128] In some implementations, storage device 1000 may perform HID operations to copy valid data stored in the sixth storage block (BLK6) and the seventh storage block (BLK7) in logical address order to the third storage block (BLK3), and then perform a pre-erase operation on the sixth storage block (BLK6) and the seventh storage block (BLK7) which are set as invalid storage blocks according to the pre-erase command of host 2000.

[0129] Figure 9 This is a diagram illustrating an example of a host providing a UFS Protocol Information Unit (UPIU) to a storage device, including pre-erase operation attributes.

[0130] refer to Figure 9 The host 2000 and storage device 1000 can perform reference operations according to the UFS (Universal Flash Memory) standard. Figures 1 to 8 Any operation described.

[0131] In some implementations, in S901, the host 2000 may provide a query request UPIU (UFS Protocol Information Unit) to the storage device 1000. This query request UPIU is used to request the writing of pre-erase operation attributes for requesting the execution of a block state analysis operation. In some implementations, the pre-erase operation attributes may include an identifier for the pre-erase operation attributes and a first attribute value for requesting the block state analysis operation. In some implementations, the query request UPIU requesting the block state analysis operation may correspond to a reference... Figures 1 to 8 The block state analysis command described (CMD_A).

[0132] In some implementations, in S903, storage device 1000 may, in response to a query request UPIU, store a pre-erase operation attribute including a first attribute value of the requested block state analysis operation, and provide a query response UPIU to host 2000 indicating that the pre-erase operation attribute has been stored. In some implementations, host 2000 may identify that the pre-erase operation attribute is stored in the storage device based on the query response UPIU.

[0133] In some implementations, in S905, the storage device 1000 may, in response to a query request UPIU requesting a block state analysis operation, perform a block state analysis operation to generate block state attributes. In some implementations, the block state attributes may correspond to a reference... Figures 1 to 8 The block state information described is 1221.

[0134] In some implementations, the storage device 1000 may generate erased block size information (BLK_ERS_SIZE) as a block status attribute, relating to the size of erased blocks among multiple storage blocks. In some implementations, the storage device 1000 may generate erased block level information (BLK_ERS_LEVEL) as a block status attribute, relating to the ratio of erased blocks to free blocks. In some implementations, the storage device 1000 may generate erased page size information (PG_ERS_SIZE) as a block status attribute, relating to the size of erased pages in open blocks among multiple storage blocks. In some implementations, the storage device 1000 may generate pre-erase necessity information (PREERS_INFO) as a block status attribute, relating to whether a pre-erase operation is required.

[0135] In some implementations, in S907, the storage device 1000 may generate block state attributes and then modify the attribute values ​​included in the pre-erase operation attributes from a first attribute value to a second attribute value corresponding to the completion of the block state analysis operation.

[0136] In some implementations, in S909, the host 2000 may provide the storage device 1000 with a query request UPIU for requesting to read the pre-erase operation attributes.

[0137] In some implementations, in S911, storage device 1000 may provide host 2000 with a query response UPIU in response to a query request UPIU. This query response UPIU includes a pre-erase operation attribute with a second attribute value corresponding to the completion of a block state analysis operation. In some implementations, host 2000 may identify that a block state analysis operation has been completed based on the second attribute value included in the query response UPIU.

[0138] Figure 10This is a diagram illustrating an example of a host providing a UPIU to a storage device, including pre-erase operation attributes based on block state attributes.

[0139] refer to Figure 10 In step S1001, the host 2000 may provide the storage device 1000 with a query request UPIU for requesting to read block status attributes. In some implementations, step S1001 may... Figure 9 Execute after S911.

[0140] In some implementations, in S1003, storage device 1000 may provide host 2000 with a query response UPIU including block status attributes in response to a query request UPIU. In some implementations, the block status attributes may include an identifier used to identify it as a block status attribute. In some implementations, the block status attributes may include erase block size information (BLK_ERS_SIZE), erase block level information (BLK_ERS_LEVEL), erase page size information (PG_ERS_SIZE), or pre-erase necessity information (PREERS_INFO).

[0141] In some implementations, in S1005, the host 2000 can determine the size of the storage block to be pre-erased based on the block status attributes included in the query response UPIU, and provide a query request UPIU to the storage device 1000 for requesting the writing of a pre-erasing size attribute regarding the size of the storage block to be pre-erased. In some implementations, the pre-erasing size attribute may correspond to a reference... Figures 1 to 8 The description includes the pre-erase size information (PE SIZE_INFO).

[0142] In some implementations, in S1007, storage device 1000 may store the pre-erase size attribute in response to a query request UPIU and provide host 2000 with a query response UPIU indicating that the pre-erase size attribute has been stored. In some implementations, host 2000 may identify that the pre-erase size attribute has been stored in storage device 1000 based on the query response UPIU.

[0143] In some implementations, in S1009, the host 2000 may provide a query request UPIU to the storage device 1000. This query request UPIU is used to request the writing of pre-erase operation attributes for requesting a pre-erase operation. In some implementations, the pre-erase operation attributes may include an identifier for the pre-erase operation attributes and a third attribute value for requesting the pre-erase operation. In some implementations, the query request UPIU for requesting the pre-erase operation may correspond to a reference... Figures 1 to 8 The pre-erase command described (CMD_PE).

[0144] In some implementations, in S1011, the storage device 1000 may, in response to a query request UPIU, modify the attribute value included in the pre-erase operation attribute from a second attribute value to a third attribute value used to request a pre-erase operation, and provide the host 2000 with a query response UPIU indicating that the pre-erase operation attribute has been stored.

[0145] In some embodiments, in S1013, the storage device 1000 may perform a pre-erase operation based on a third attribute value included in the pre-erase operation attributes. In some embodiments, the storage device 1000 may perform a pre-erase operation on invalid storage blocks among a plurality of storage blocks during the pre-erase operation. In some embodiments, the storage device 1000 may perform a pre-erase operation on invalid storage blocks among invalid storage blocks that correspond to the size to be pre-erased, based on a pre-erase size attribute. In some embodiments, after performing a pre-erase operation, the storage device 1000 may modify the attribute value included in the pre-erase operation attributes from a third attribute value to a second attribute value corresponding to the completion of the pre-erase operation.

[0146] In some implementations, in S1015, the host 2000 may provide the storage device 1000 with a query request UPIU for requesting to read the pre-erase operation attributes.

[0147] In some implementations, in S1017, in response to the query request UPIU, the storage device 1000 may provide the host 2000 with a query response UPIU, which includes a pre-erase operation attribute with a second attribute value corresponding to the completion of the pre-erase operation. In some implementations, the host 2000 may identify that the pre-erase operation has been completed based on the second attribute value included in the query response UPIU.

[0148] Figure 11 This is a diagram showing an example of a query request UPIU.

[0149] refer to Figure 11 A query request UPIU may include a basic header segment, transaction-specific fields, and a data segment. In some implementations, each of the basic header segment, transaction-specific fields, and data segment may include multiple fields.

[0150] In some implementations, the basic header field may include fields 0 through 11 (0-11). In some implementations, field 0 (0) may include the transaction type. In some implementations, the transaction type of the query request may correspond to "xx01 0110b".

[0151] In some implementations, the first field (1) may include flags. In some implementations, the flags may include the value "0" or "1", which corresponds to true or false, on or off. In some implementations, the flags may be used to enable or disable certain functions, modes, or states.

[0152] In some implementations, the second field (2) may be a reserved field. In some implementations, the third field (3) may include a TASK TAG. In some implementations, the fourth field (4) may be a reserved field.

[0153] In some implementations, the fifth field (5) may include a query function.

[0154] In some implementations, the sixth field (6) and the seventh field (7) may be reserved fields. In some implementations, the eighth field (8) may be a field indicating the total EHS (Extra Header Segment) length. In some implementations, the ninth field (9) may be a reserved field. In some implementations, the tenth field (10) and the eleventh field (11) may be fields indicating the data segment length. In some implementations, the tenth field (10) may be the most significant bit (MSB) of the data segment length, and the eleventh field (11) may be the least significant bit (LSB) of the data segment length.

[0155] In some implementations, transaction-specific fields may include fields 12 through 31 (12-31). In some implementations, fields 28 through 31 (28-31) may be spare fields. In some implementations, a data segment may include a header E2ECRC (End-to-End Cyclic Redundancy Check), fields k through (k data segment length - 1) (k ~ k + LENGTH - 1), and data E2ECRC. In some implementations, fields k through (k + data segment length - 1) (k ~ k + LENGTH - 1) may include data 0 through (data segment length - 1) (DATA[0] ~ DATA[LENGTH - 1]).

[0156] Figure 12 This is a graph used to illustrate the query function.

[0157] refer to Figure 12The query function may be included in field 5 (5) of the query request UPIU. In some implementations, the query function may be a function that indicates whether the query request UPIU is a write request or a read request.

[0158] In some implementations, if the query function includes "01h", the query request UPIU can be a standard read request. In some implementations, if the query function includes "40-7Fh", the query request UPIU can be a manufacturer-specific read function.

[0159] In some implementations, if the query function includes "81h", the query request UPIU can be a standard write request. In some implementations, if the query function includes "C0h-FFh", the query request UPIU can be a manufacturer-specific write function.

[0160] In some implementations, the values ​​of the query function, "00h", "02h-3Fh", "80h", and "82h-BFh" can be reserved values.

[0161] Figure 13 This is a diagram showing an example of a transaction-specific field of a write attribute.

[0162] refer to Figure 13 Fields 12 through 27 of the query request UPIU can be transaction-specific fields used for writing attributes. In some implementations, the opcode (OPCODE) used for writing attributes can be "04h".

[0163] In some implementations, field 13 (13) may be an ATTRIBUTE IDN. In some implementations, field 14 (14) may be an index that can specifically identify attributes. Field 15 (15) may be a SELECTOR that can more specifically identify attributes.

[0164] In some implementations, fields 16 through 23 (16 through 23) may include attribute values ​​(VALUE[7:0] through VALUE[63:56]). In some implementations, field 16 (16) may be the MSB and field 23 (23) may be the LSB. In some implementations, fields 24 through 27 (24-27) may be reserved fields.

[0165] Figure 14 This is a diagram showing an example of reading a transaction-specific field of an attribute.

[0166] refer to Figure 14The 12th to 27th fields (12-27) of the query request UPIU can be transaction-specific fields used to read attributes. In some implementations, the 12th field (12) can be an opcode. In some implementations, the opcode used to read attributes can be "03h".

[0167] In some implementations, field 13 (13) may be an attribute identifier (ATTRIBUTE IDN). In some implementations, field 14 (14) may be an index that specifically identifies the attribute. Field 15 (15) may be a selector that more specifically identifies the attribute.

[0168] In some implementations, fields 16 through 27 (16-27) may be spare fields.

[0169] Figure 15 This is a diagram illustrating an example of the properties of a pre-erase operation.

[0170] In some implementations, the identifier (IDN) of the pre-erase operation attribute can be "XXh". In some implementations, "XXh" can refer to any value. In some implementations, the identifier (IDN) can be a number used to identify the attribute as a pre-erase operation attribute.

[0171] In some implementations, the name of the pre-erase operation attribute can be "bPreBlockEraseOperation".

[0172] In some implementations, the access property of the pre-erase operation attribute can be read and volatile. In some implementations, the access property of the pre-erase operation attribute can be read and written, and the attribute value can be set to a default value when the electronic system 50 is reset.

[0173] In some implementations, the size of the pre-erase operation attribute can be 1 byte. In some implementations, the type of the pre-erase operation can be device-level (D). In some implementations, the manufacturer default value (MDV) of the pre-erase operation attribute can be "00h".

[0174] In some embodiments, the pre-erase operation attribute, including the attribute value corresponding to "00h," may be an attribute indicating that the storage device 1000 is in an idle state or that the block status analysis operation or pre-erase operation has been completed. In some embodiments, the attribute value corresponding to "00h" may correspond to a reference... Figure 9 and Figure 10The second attribute value described.

[0175] In some implementations, the pre-erase operation attribute, including the attribute value corresponding to "01h," can be an attribute used by the host 2000 to request a block status analysis operation from the storage device 1000. In some implementations, the attribute value corresponding to "01h" can correspond to a reference... Figure 9 The first attribute value described.

[0176] In some implementations, the pre-erase operation attribute, including the attribute value corresponding to "02h," can be an attribute in which the host 2000 requests a pre-erase operation from the storage device 1000. In some implementations, the attribute value corresponding to "02h" can correspond to a reference. Figure 10 The third attribute value described.

[0177] In some implementations, the storage device 1000 may perform a block state analysis operation or a pre-erase operation based on a pre-erase operation attribute that includes an attribute value corresponding to “01h” or “02h”, and then modify the attribute value from “01h” or “02h” to “00h”.

[0178] Figure 16 This is a diagram illustrating an example of block state attributes.

[0179] refer to Figure 16 Block state attributes can correspond to references Figures 1 to 8 The block status information described is 1221. In some implementations, the block status attributes may include erase block size attributes or erase page size attributes.

[0180] In some implementations, the name of the erased block size attribute may be "dErasedFreeBlockSize". In some implementations, the erased block size attribute may include a value related to the size of the erased memory block. In some implementations, the erased block size attribute may correspond to a reference... Figures 1 to 8 The erase block size information is described (BLK_ERS_SIZE).

[0181] In some implementations, the identifier number (IDN) of the erase block size attribute can be "XXh". In some implementations, the access property of the erase block size attribute can be read-only. In some implementations, the access property of the erase block size attribute can allow only reading of the erase block size attribute and can prevent host 2000 from writing to the erase block size attribute.

[0182] In some implementations, the erase block size attribute can be 4 bytes. In some implementations, the erase block size attribute type can be device-level (D). In some implementations, the manufacturer default value (MDV) for the erase block size attribute can be "0000-0000h".

[0183] In some implementations, the name of the erase page size attribute may be "dRemainedWriteSize". In some implementations, the erase page size attribute may include a value related to the size of the erased pages of the open block. In some implementations, the erase page size attribute may correspond to a reference... Figures 1 to 8 The erased page size information (PG_ERS_SIZE) is described.

[0184] In some implementations, the IDN for the erase page size attribute can be "XXh". In some implementations, the access property for the erase page size attribute can be read-only. In some implementations, the access property for the erase page size attribute can allow only reading of the erase page size attribute and can prevent host 2000 from writing to the erase page size attribute.

[0185] In some implementations, the size of the erase page size attribute can be 4 bytes. In some implementations, the type of the erase page size attribute can be device-level (D). In some implementations, the manufacturer default value (MDV) of the erase page size attribute can be "0000-0000h".

[0186] Figure 17 This is a diagram illustrating an example of block state attributes.

[0187] refer to Figure 17 Block state attributes can correspond to references Figures 1 to 8 The block status information described is 1221. Block status attributes may include pre-erase requirement attributes or erase block level attributes.

[0188] In some implementations, the name of the pre-erase requirement attribute may be "bPreBlockEraseRequired". In some implementations, the pre-erase requirement attribute may include a value indicating whether a pre-erase operation is required. In some implementations, the pre-erase requirement attribute may correspond to a reference. Figures 1 to 8 The description includes pre-erasure necessity information (PREERS_INFO).

[0189] In some implementations, the pre-erase requirement attribute may include bits 0 through 31 (Bit[0], Bit[31:1]). In some implementations, bit 0 (Bit[0]) may include a value indicating whether a pre-erase operation is required. In some implementations, a value of "1" for Bit[0] may indicate that a pre-erase operation is required. In some implementations, a value of "0" for Bit[0] may indicate that a pre-erase operation is not required. In some implementations, bits 1 through 31 (Bit[31:1]) may be spare bits.

[0190] In some implementations, the identifier number (IDN) of the attribute to be pre-erased can be "XXh". In some implementations, the access property of the pre-erasing requirement attribute can be read-only. In some implementations, the access property of the pre-erasing requirement attribute can allow only reading of the pre-erasing requirement attribute and can prevent host 2000 from writing to the pre-erasing requirement attribute.

[0191] In some implementations, the size of the pre-erase requirement attribute can be 1 byte. In some implementations, the type of the pre-erase requirement attribute can be device-level (D). In some implementations, the manufacturer default value (MDV) of the pre-erase requirement attribute can be "00h".

[0192] In some implementations, the name of the erase block level attribute may be "dFreeBlockErasedLevel". In some implementations, the erase block level attribute may include a value related to the ratio of erased memory blocks to free blocks. In some implementations, the erase block level attribute may correspond to a reference... Figures 1 to 8 The erase block level information described (BLK_ERS_LEVEL).

[0193] In some implementations, the erase block level attribute, which includes an attribute value corresponding to "00h", can be an attribute indicating that more than 80% and less than or equal to 100% of free blocks are erased storage blocks.

[0194] In some implementations, the erase block level attribute, which includes an attribute value corresponding to "01h", may be an attribute indicating that more than 50% and less than or equal to 80% of free blocks are erased storage blocks.

[0195] In some implementations, the erase block level attribute, which includes the attribute value corresponding to "02h", can be an attribute that indicates that more than 30% and less than or equal to 50% of free blocks are erased storage blocks.

[0196] In some implementations, the erase block level attribute, which includes an attribute value corresponding to “03h”, can be an attribute indicating that more than 10% and less than or equal to 30% of free blocks are erased storage blocks.

[0197] In some implementations, the erase block level attribute, which includes an attribute value corresponding to "04h", can be an attribute indicating that free blocks greater than or equal to 0% and less than or equal to 10% are erased storage blocks.

[0198] In some implementations, the IDN of the erase block level attribute can be "XXh". In some implementations, the access property of the erase block level attribute can be read-only. In some implementations, the access property of the erase block level attribute can allow only reading of the erase block level attribute and can prevent host 2000 from writing to the erase block level attribute.

[0199] In some implementations, the size of the erase block-level attribute can be 1 byte. In some implementations, the type of the erase block-level attribute can be device-level (D). In some implementations, the manufacturer default value (MDV) of the erase block-level attribute can be "00h".

[0200] Figure 18 This is a diagram illustrating an example of the pre-erase size attribute. (Reference) Figure 18 The name of the pre-erase size attribute can be "dPreBlockEraseSize". The pre-erase size attribute can contain a value related to the size of the invalid memory block to which the pre-erase operation is to be performed. In some implementations, the pre-erase size attribute can correspond to a reference... Figures 1 to 8 The description includes the pre-erase size information (PE SIZE_INFO).

[0201] In some implementations, the identifier number (IDN) of the pre-erase size attribute can be "XXh". In some implementations, the access attribute of the pre-erase size attribute can be read and persistent. In some implementations, the access attribute of the pre-erase size attribute can read and write the pre-erase size attribute, and can retain the value set to the pre-erase size even if the electronic system 50 is reset.

[0202] In some implementations, the size of the pre-erase size attribute can be 4 bytes. In some implementations, the type of the pre-erase size attribute can be device-level (D). In some implementations, the manufacturer default value (MDV) of the pre-erase size attribute can be "FFFFFFFFh".

[0203] Figure 19This is a flowchart illustrating an example of the operation of an electronic system.

[0204] refer to Figure 19 In S1901, host 2000 may provide a block status analysis command to storage device 1000. In some embodiments, host 2000 may identify whether storage device 1000 is idle, and if storage device 1000 is idle, provide a block status analysis command to storage device 1000. In some embodiments, the block status analysis command may correspond to a query request UPIU, which includes a pre-erase operation attribute requesting the attribute value of the block status analysis.

[0205] In S1903, storage device 1000 can generate block status information and provide it to host 2000. In some embodiments, the block status information may include: erased block size information regarding the size of erased storage blocks; erased block level information regarding the ratio of erased storage blocks to free blocks; erased page size information regarding the size of erased pages included in open blocks; or pre-erase necessity information regarding whether a pre-erase operation is required.

[0206] In S1905, host 2000 may provide a pre-erase command to storage device 1000 based on block status information. In some embodiments, host 2000 may provide a pre-erase command to storage device 1000 if the size of the erased storage block is smaller than the size of the data to be provided to storage device 1000 from the data stored in host memory. In some embodiments, the pre-erase command may correspond to a query request UPIU, which includes a pre-erase operation attribute requesting an attribute value for the pre-erase operation. In some embodiments, storage device 1000 may perform a pre-erase operation on invalid storage blocks among a plurality of storage blocks in response to a pre-erase command received from host 2000.

[0207] Figure 20 This is a diagram illustrating an example of a non-volatile storage device. (Reference) Figure 20 The non-volatile storage device 1100 may include a memory cell array 110, a voltage generator 120, a row decoder 130, a page buffer group 140, and control logic 150.

[0208] The storage cell array 110 may include multiple storage blocks (BLK1 to BLKz). The multiple storage blocks (BLK1 to BLKz) can be connected to the row decoder 130 via row lines (RL). The multiple storage blocks (BLK1 to BLKz) can be connected to the page buffer set 140 via bit lines (BL). Each of the multiple storage blocks (BLK1 to BLKz) may include multiple storage cells. In some embodiments, the multiple storage cells may be non-volatile storage cells. In some embodiments, the multiple storage blocks (BLK1 to BLKz) may include invalid storage blocks storing invalid data, valid storage blocks storing valid data, off blocks storing some data, and erased storage blocks storing no data.

[0209] Voltage generator 120 can generate an operating voltage (Vop) using an external power supply voltage provided to non-volatile memory device 1100. Voltage generator 120 can operate in response to control logic 150.

[0210] In some implementations, voltage generator 120 can generate operating voltages (Vop) for programming, reading, and erasing operations. For example, voltage generator 120 can generate programming voltage, pass voltage, read voltage, and erase voltage. The operating voltages (Vop) can be provided to the memory cell array 110 via row decoder 130.

[0211] The row decoder 130 can be connected to the memory cell array 110 via row lines (RL). Row lines (RL) may include serial select lines, word lines, and ground select lines.

[0212] The line decoder 130 can operate in response to control of the control logic 150. The line decoder 130 can receive a line signal (X_SIG) from the control logic 150. In some embodiments, the line decoder 130 can select at least one word line among a plurality of word lines based on the line signal (X_SIG) and apply an operating voltage (Vop) provided by the voltage generator 120 to at least one word line.

[0213] In some implementations, the line decoder 130 may apply a programming voltage to selected word lines among a plurality of word lines during a programming operation, and apply a pass voltage with a lower level than the programming voltage to unselected word lines. The line decoder 130 may also apply a verification voltage to selected word lines during a programming verification operation, and apply a verification pass voltage with a higher level than the verification voltage to unselected word lines.

[0214] The line decoder 130 can apply a read voltage to the selected word line during a read operation and apply a read pass voltage that is higher than the read voltage to the unselected word line.

[0215] Page buffer group 140 may include multiple page buffers (PB1 to PBn). The multiple page buffers (PB1 to PBn) can be connected to multiple memory cells included in memory cell array 110 via bit lines (BL). The multiple page buffers (PB1 to PBn) can operate in response to control of control logic 150.

[0216] In some implementations, multiple page buffers (PB1 to PBn) can receive data (DATA) from the memory controller 1200. The multiple page buffers (PB1 to PBn) can select at least one bit line (BL) based on a column signal (Y_SIG) received from the control logic 150.

[0217] In some implementations, during a programming operation, multiple page buffers (PB1 to PBn) can transfer data received from the storage controller 1200 to multiple memory cells of the storage cell array 110 via bit lines (BL). The multiple memory cells can be programmed based on the received data. During a programming verification operation, the multiple page buffers (PB1 to PBn) can sense data stored in the multiple memory cells via bit lines (BL).

[0218] Multiple page buffers (PB1 to PBn) can sense data stored in the memory cell via bit lines (BL) during a read operation and store the sensed data in multiple page buffers (PB1 to PBn).

[0219] Control logic 150 can be connected to voltage generator 120, line decoder 130 and page buffer group 140.

[0220] Control logic 150 can control the overall operation of non-volatile storage device 1100. Control logic 150 can respond to commands received from storage controller 1200 to control voltage generator 120, row decoder 130 and page buffer group 140 to perform operations corresponding to the commands.

[0221] Figure 21 This is a diagram illustrating an example of a storage system. (Reference) Figure 21 The storage system 3000 may include a host 3100 and a storage device 3200.

[0222] In some implementations, storage device 3200 may communicate with host 3100 using interfaces such as Non-Volatile Memory Fast (NVMe), Peripheral Component Interconnect Fast (PCIe), Universal Serial Bus (USB), Double Data Rate (DDR), Low Power DDR (LPDDR), Serial Advanced Technology Attachment (SATA), Small Computer System Interface (SCSI).

[0223] In some implementations, storage device 3200 may include storage controller 3210 and a plurality of non-volatile storage devices 3220-1 to 3220-n.

[0224] In some implementations, the storage controller 3210 can be connected to multiple non-volatile storage devices 3220-1 to 3220-n via multiple channels (CH1 to CHn).

[0225] In some embodiments, the storage controller 3210 can send or receive signals (SGLs) to or from the host 3100 via a signal connector 3230. In some embodiments, the signals (SGLs) may include commands, addresses, and data. The storage controller 3210 can store data in or read data stored in multiple non-volatile storage devices 3220-1 to 3220-n according to commands from the host 3100.

[0226] In some implementations, the storage controller 3210 may include Figure 1 The pre-erase management module 1211 is included. In some embodiments, the pre-erase management module 1211 may generate block status information in response to a block status analysis command received from the host 3100, and provide the block status information to the host 3100. In some embodiments, the pre-erase management module 1211 may, in response to a pre-erase command received from the host 3100, control multiple non-volatile storage devices 3220-1 to 3220-n to perform pre-erase operations on invalid storage blocks among multiple storage blocks.

[0227] In some embodiments, a plurality of non-volatile memory devices 3220-1 to 3220-n may be used as the storage medium of storage device 3200. In some embodiments, each of the plurality of non-volatile memory devices (3220-1, 3220-2, ..., 3220-n) may include a memory cell array formed in a three-dimensional structure on a substrate. The memory cell array may include a plurality of memory cells for storing data.

[0228] Figure 22 This is a diagram illustrating an example of a UFS (Universal Flash Memory) system. (Reference) Figure 22 The UFS system 4000 may include a UFS host 4100, a UFS device 4200, and a UFS interface 4300.

[0229] In some implementations, UFS host 4100 may include UFS host controller 4110, application 4120, UFS driver 4130, host memory 4140, and UFS interconnect (UIC) layer 4150.

[0230] In some implementations, the UFS device 4200 may include a UFS device controller 4210, non-volatile memory 4220, a storage interface 4230, device memory 4240, a UIC layer 4250, and a regulator 4260. The non-volatile memory 4220 may consist of multiple storage cells 4221_0 to 4221_N-1, and these cells may include V-NAND flash memory with a 2D or 3D structure, but may also include other types of non-volatile memory, such as PRAM and / or RRAM. The UFS device controller 4210 and the non-volatile memory 4220 may be interconnected via the storage interface 4230. The storage interface 4230 may be implemented to conform to standard protocols such as Toggle or ONFI.

[0231] In some embodiments, the plurality of memory cells 4221_0 to 4221_N-1 can be implemented as a plurality of non-volatile memory devices. Each of the plurality of memory cells 4221_0 to 4221_N-1 may include a memory cell array and control circuitry for controlling the operation of the memory cell array.

[0232] Application 4120 may be a program that wishes to communicate with UFS device 4200 to utilize the functionality of UFS device 4200. Application 4120 may send input / output requests (IORs) to UFS drive 4130 for inputting to / outputting from UFS device 4200. In some implementations, input / output requests (IORs) may represent requests to read data, requests to write data, and / or requests to discard data.

[0233] In some implementations, the UFS drive 4130 can manage the UFS host controller 4110 via UFS-HCI (Host Controller Interface). The UFS drive 4130 can translate input / output requests generated by the application 4120 into UFS commands defined by the UFS standard and send the translated UFS commands to the UFS host controller 4110. A single I / O request can be translated into multiple UFS commands. UFS commands can be commands primarily defined by the SCSI standard, but can also be commands specific to the UFS standard.

[0234] The UFS host controller 4110 can send the UFS commands translated by the UFS driver 4130 to the UIC layer 4250 of the UFS device 4200 via the UIC layer 4150 and the UFS interface 4300. In this process, the UFS host register 4111 of the UFS host controller 4110 can be used as a command queue (CQ).

[0235] In some embodiments, the UFS host controller 4110 may provide a query request UPIU to the UFS device 4200, the query request UPIU including a pre-erasure operation attribute requesting the attribute value of a block state analysis request. In some embodiments, the UFS host controller 4110 may provide a query request UPIU to the UFS device 4200 requesting block state attributes generated in response to a block state analysis request. In some embodiments, the UFS host controller 4110 may provide a query request UPIU to the UFS device 4200, the query request UPIU including a pre-erasure operation attribute requesting the attribute value of a pre-erasure operation.

[0236] In some implementations, the UIC layer 4150 on the UFS host 4100 side may include MIPI M-PHY 4151 and MIPI UniPro 4152, and the UIC layer 4250 on the UFS device 4200 side may also include MIPI M-PHY 4251 and MIPIUniPro 4252.

[0237] In some implementations, the UFS interface 4300 may include a line for transmitting a reference clock (REF_CLK), a line for transmitting a hardware reset signal (RESET_n) of the UFS device 4200, a pair of lines for transmitting differential input signal pairs (DIN_t and DIN_c), and a pair of lines for transmitting differential output signal pairs (DOUT_t and DOUT_c).

[0238] In some implementations, the UFS interface 4300 can support multiple channels, and each channel can be implemented as a differential pair. For example, the UFS interface 4300 may include one or more receive channels and one or more transmit channels. The receive and transmit channels can transmit data in a serial communication manner, and due to the separate structure of the receive and transmit channels, full-duplex communication can be achieved between the UFS host 4100 and the UFS device 4200.

[0239] In some implementations, the UFS device controller 4210 of the UFS device 4200 can control the overall operation of the UFS device 4200. The UFS device controller 4210 can manage the non-volatile memory 4220 through logical units (LUs) 4211 (which are logical data storage units). The number of LUs (4211) can be four or eight, but is not limited to these. The UFS device controller 4210 may include a flash translation layer (FTL) and can use the address mapping information of the FTL to translate logical addresses transmitted from the UFS host 4100 into physical addresses. In the UFS system 4000, the size of the logical block used to store user data can be within a predetermined range. For example, the minimum size of the logical block can be set to 4KB.

[0240] In some implementations, when a command from the UFS host 4100 is input to the UFS device 4200 through the UIC layer 4250, the UFS device controller 4210 can perform an operation according to the input command, and when the operation is completed, send a completion response to the UFS host 4100.

[0241] In some implementations, when the UFS host 4100 wants to store user data in the UFS device 4200, the UFS host 4100 can send a data storage command to the UFS device 4200. Upon receiving a response from the UFS device 4200 indicating that the user data is ready for transfer, the UFS host 4100 can transfer the user data to the UFS device 4200. The UFS device controller 4210 can temporarily store the received user data in the device memory 4240 and, based on the FTL address mapping information, store the temporarily stored user data in the device memory 4240 in a selected location in the non-volatile memory 4220.

[0242] In some implementations, when the UFS host 4100 wishes to read user data stored in the UFS device 4200, the UFS host 4100 can send a data read command to the UFS device 4200. The UFS device controller 4210, receiving this command, can read the user data from the non-volatile memory 4220 based on the data read command and temporarily store the read user data in the device memory 4240. During this read process, the UFS device controller 4210 can use its built-in ECC (Error Correction Code) engine to detect and correct errors in the read user data. For example, the ECC engine can generate parity bits for the write data to be written to the non-volatile memory 4220 and store the generated parity bits along with the write data in the non-volatile memory 4220. When reading data from the non-volatile memory 4220, the ECC engine can use the parity bits read from the non-volatile memory 4220 along with the read data to correct errors in the read data and output the erroneously corrected read data.

[0243] In some implementations, the UFS device controller 4210 may generate block status attributes in response to a query request UPIU received from the UFS host 4100, the query request UPIU including a pre-erase operation attribute requesting the attribute value for block status analysis. In some implementations, the UFS device controller 4210 may provide block status attributes to the UFS host 4100 in response to a query request UPIU requesting block status attributes received from the UFS host 4100. In some implementations, the UFS device controller 4210 may perform a pre-erase operation on invalid storage blocks in response to a query request UPIU received from the UFS host 4100, the query request UPIU including a pre-erase operation attribute requesting the attribute value for the pre-erase operation.

[0244] In some implementations, the UFS host 4100 can sequentially store commands to be sent to the UFS device 4200 in a UFS host register 4111 that can be used as a command queue, and send these commands to the UFS device 4200 in sequence. At this time, even if previously sent commands are still being processed by the UFS device 4200—that is, even before receiving notification that the UFS device 4200 has completed processing a previously sent command—the UFS host 4100 can send the next command waiting in the command queue to the UFS device 4200. Therefore, the UFS device 4200 can receive the next command from the UFS host 4100 even while processing a previously sent command. Additionally, the command queue can be implemented as a circular queue type, with a head pointer and a tail pointer indicating the start and end of the command sequence stored in the queue, respectively.

[0245] In some implementations, VCC, VCCQ, VCCQ2, etc., can be used as power supply voltage inputs to the UFS device 4200. VCC is the main power supply voltage for the UFS device 4200 and can have a value from 2.4V to 3.6V. VCCQ is a power supply voltage used to provide a low voltage range, primarily used for the UFS device controller 4210. It can have a value from 1.14V to 1.26V. VCCQ2 is a power supply voltage providing a voltage range lower than VCC but higher than VCCQ, primarily used for input / output interfaces such as the MIPI M-PHY 4251, and can have a value from 1.7V to 1.95V. The power supply voltage can be supplied to each component of the UFS device 4200 via a regulator 4260. The regulator 4260 can be implemented as a set of unit regulators, each unit regulator connected to a different power supply voltage among the aforementioned power supply voltages.

[0246] While this disclosure contains numerous specific implementation details, these should not be construed as limiting the scope of any claims that may be made. In a single embodiment, specific features described in the context of a standalone implementation of this disclosure may also be combined and implemented. Conversely, different features described in the context of a single implementation may also be implemented individually in multiple embodiments, or in any suitable sub-combination. Furthermore, although features may be described above as functioning in certain combinations, one or more features from a combination may be removed from the combination in some cases, and combinations may be for sub-combinations or variations thereof.

[0247] Although the examples have been described in detail above, the scope of this disclosure is not limited thereto, and various modifications and improvements made by those skilled in the art also fall within the scope of this disclosure.

Claims

1. An electronic system comprising: The host is configured to output block status analysis commands; as well as A storage device is configured to, in response to the block state analysis command, generate block state information for at least one of a plurality of storage blocks of a non-volatile storage device, and provide the block state information to the host. The host is further configured to provide a pre-erase command to the storage device based on the block status information. The pre-erase command instructs to perform a pre-erase operation on invalid storage blocks among the plurality of storage blocks, and the invalid storage blocks store invalid data.

2. The electronic system according to claim 1, wherein, The block status information includes information about the size of one or more erased storage blocks among the plurality of storage blocks.

3. The electronic system according to claim 2, wherein, The host is also configured to provide the pre-erase command to the storage device based on the fact that the size of the one or more erased storage blocks is less than a threshold size.

4. The electronic system according to claim 3, wherein, The host includes host memory, and The threshold size is based on the size of the data to be provided to the storage device from the data stored in the host memory.

5. The electronic system according to claim 1, wherein, One or more open blocks each include erased pages and programmed pages, and The block status information includes the size of the erased pages of the one or more open blocks.

6. The electronic system according to claim 5, wherein, The host includes host memory; and The host is further configured to provide the pre-erase command to the storage device based on the fact that the size of a first piece of data stored in the host memory is greater than the size of the erased page, wherein the first piece of data is provided to the storage device.

7. The electronic system according to claim 1, wherein, The block status information includes an indication for the host to instruct the pre-erase operation, and The storage device is further configured to generate the indication based on the size of one or more erased storage blocks among the plurality of storage blocks.

8. The electronic system according to claim 1, wherein, The block status information includes information about the proportion of erased storage blocks among a plurality of free blocks in the plurality of storage blocks, wherein the plurality of free blocks includes the invalid storage blocks.

9. The electronic system according to claim 8, wherein, The host is also configured to provide the pre-erase command to the storage device based on the proportion being higher than a threshold level.

10. The electronic system according to claim 1, wherein: The host is also configured to: Based on the block state information, the size of the storage block to be pre-erased in the pre-erasure operation is determined, and Provide the storage device with an indication of the size of the storage block to be pre-erased; and The storage device is further configured to perform the pre-erasure operation on the invalid storage block based on an indication of the size of the storage block to be pre-erased.

11. A method of operating a storage device, the method comprising: Receive a first Universal Flash Memory UFS Protocol Information Unit (UPIU) from the host, the UPIU comprising: The identifier of the pre-erase operation attribute, and The first attribute value requested for block status analysis; Based on the first attribute value, generate block status attributes for one or more erased memory blocks among a plurality of memory blocks based on non-volatile storage devices; Receive a second UPIU from the host requesting the block status attribute; In response to the second UPIU, the block status attribute is provided to the host; Receive a third UPIU from the host, the third UPIU comprising: The identifier number of the pre-erase operation attribute, and Request the second attribute value for the pre-erase operation; and Based on the second attribute value, the pre-erasure operation is performed on invalid storage blocks among the plurality of storage blocks.

12. The operating method according to claim 11, wherein, The block status attributes include information about the size of one or more erased storage blocks among the plurality of storage blocks.

13. The operating method according to claim 11, wherein, The block state attributes include an indication for the host to instruct the pre-erase operation, and wherein generating the block state attributes includes: The size of one or more erased storage blocks among the plurality of storage blocks is compared with a threshold size, and The block state attribute is generated based on the comparison.

14. The operating method according to claim 11, wherein, The block status attribute includes information about the proportion of the one or more erased storage blocks among a plurality of free blocks in a plurality of storage blocks, wherein the plurality of free blocks includes the invalid storage blocks.

15. The operating method according to claim 11, further comprising: Receive a fourth UPIU from the host, the fourth UPIU comprising: The identifier for the pre-erase size attribute, and An indication of the size of the memory block to be pre-erased in the pre-erasure operation. The pre-erasure operation is performed based on an indication of the size of the storage block to be pre-erased.

16. A method of operating a host computer, the method comprising: The storage device is provided with a first Universal Flash Memory UFS Protocol Information Unit (UPIU), the UPIU comprising: The identifier of the pre-erase operation attribute, and The first attribute value requested for block status analysis; The storage device is provided with a second UPIU requesting block status attributes; Receive the block status attribute as a response to the second UPIU from the storage device, wherein the block status attribute is based on one or more erased storage blocks among a plurality of storage blocks of the storage device; and Based on the block state attributes, a third UPIU is provided to the storage device, the third UPIU comprising: The identifier number of the pre-erase operation attribute, and The second attribute value is used to request the storage device to perform a pre-erase operation on invalid storage blocks among the plurality of storage blocks.

17. The operating method according to claim 16, wherein, The block status attribute includes the size of one or more erased storage blocks among the plurality of storage blocks, and The provision of the third UPIU to the storage device is performed based on a comparison of the size of the one or more erased storage blocks with a threshold size.

18. The operating method according to claim 16, wherein, The block status attributes include indications for the host to instruct the pre-erase operation.

19. The operating method according to claim 16, wherein, The block state attribute includes the size of the erased pages of one or more open blocks, wherein each of the one or more open blocks includes erased pages and programmed pages, and The provision of the third UPIU to the storage device is performed based on the fact that the size of the data to be provided to the storage device from the data stored in the host memory of the host is greater than the size of the erased pages of the one or more open blocks.

20. The operating method according to claim 16, comprising: After receiving the block status attribute as a response to the second UPIU, the size of the storage block to be pre-erased in the pre-erasure operation is determined based on the block status attribute. as well as A fourth UPIU is provided to the storage device, the fourth UPIU comprising: The identifier for the pre-erase size attribute, and An indication of the size of the storage block to be pre-erased in the pre-erasure operation.

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