A dual-mode communication module

By introducing a supercapacitor charging and discharging management circuit into the dual-mode communication module, the problems of fixed charging voltage and anti-reverse current issues are solved, achieving adjustable voltage and circuit stability, ensuring normal operation and extended lifespan of the module after power failure.

CN122203530APending Publication Date: 2026-06-12ZHUHAI ZHONGHUI MICROELECTRONICS

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ZHUHAI ZHONGHUI MICROELECTRONICS
Filing Date
2026-03-13
Publication Date
2026-06-12

AI Technical Summary

Technical Problem

In existing dual-mode communication modules, the supercapacitor charging voltage is fixed, which cannot be adapted to different rated voltages. The charging control is inflexible, the anti-backflow performance is poor, and the voltage cannot be detected in real time, resulting in unstable communication module function and shortened lifespan.

Method used

It adopts a supercapacitor charging and discharging management circuit, including a capacitor charging control circuit, a capacitor voltage detection circuit, and a boost circuit, to achieve constant voltage and current limiting charging, detect voltage in real time and decide on the discharge strategy based on the voltage status, and has boost enable control to ensure power outage reporting function.

Benefits of technology

This technology enables controlled supercapacitor charging with adjustable voltage, prevents leakage current, ensures the communication module can function normally after power failure, extends module lifespan, and improves circuit stability.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A dual-mode communication module comprises an MCU and a super capacitor charging and discharging management circuit, the super capacitor charging and discharging management circuit comprises: a super capacitor; a capacitor charging control circuit connected with the MCU and the super capacitor respectively, the capacitor charging control circuit charges the super capacitor in a constant voltage and current limiting mode; a capacitor voltage detection circuit connected with the MCU and the super capacitor respectively, the capacitor voltage detection circuit is used for detecting the voltage of the super capacitor and sending the voltage to the MCU; a boost circuit connected with the super capacitor, the boost circuit is used for providing power supply for the MCU after the main power supply of the dual-mode communication module is powered off; a boost enable control circuit connected with the MCU and the boost circuit respectively, the boost enable control circuit is used for monitoring the main power supply state of the dual-mode communication module and controlling the start and stop of the boost circuit according to the main power supply state of the dual-mode communication module. The application can realize the functions of controlled super capacitor charging mode, adjustable charging voltage, power failure reporting task and the like.
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Description

Technical Field

[0001] This invention belongs to the field of power communication technology, and in particular relates to a dual-mode communication module. Background Technology

[0002] With the continuous promotion and widespread application of low-voltage power line dual-mode communication technology, the traditional "passive response after power outage" mode in power supply management is no longer sufficient to meet the requirements of modern power grids for reliability, efficiency, and service quality. Against this backdrop, the power outage reporting function of the power line dual-mode communication module has emerged. The power outage reporting function enables rapid reporting of power outage events when a smart meter / data acquisition terminal experiences a power outage fault, achieving real-time and accurate perception of the power outage status, accelerating fault location and repair, and shortening outage duration. To enable power outage reporting after a power failure, a backup power supply is typically configured in the communication module. Supercapacitors can store electrical energy, and some dual-mode communication modules use them as backup power. However, due to the lack of effective supercapacitor charging and discharging management circuits, the following defects exist in their use: 1) The charging voltage is fixed and cannot be flexibly adjusted, making it unsuitable for supercapacitors with different rated voltages; 2) Charging cannot be controlled, making it unable to flexibly handle power consumption testing scenarios of the communication module; 3) Poor reverse current protection performance, unable to effectively prevent leakage current flowing into the supercapacitor, nor can it effectively discharge the leakage current flowing into the supercapacitor, which may lead to supercapacitor leakage, bulging, etc., affecting the lifespan of the supercapacitor or the normal function of the communication module; 4) Lack of real-time supercapacitor voltage detection function, unable to detect whether the supercapacitor voltage meets the set value, and unable to decide whether to start the discharge boost function based on the supercapacitor voltage state; 5) The supercapacitor boost lacks control function, which can easily cause output voltage fluctuations when the supercapacitor is discharging at a low voltage, affecting the power stability of subsequent circuits, and even causing the MCU to repeatedly start due to voltage instability. It may also cause large overshoots in the boost circuit output voltage, leading to damage to subsequent circuits. These defects not only affect the normal operation of the communication module but also affect the product's lifespan. Summary of the Invention

[0003] The purpose of this invention is to provide a dual-mode communication module to solve the problems existing in the prior art. This dual-mode communication module has a supercapacitor charging and discharging management circuit, enabling controlled supercapacitor charging, adjustable charging voltage, and the ability to determine the discharging strategy based on voltage conditions. It also enables power outage reporting tasks after a power failure of the dual-mode communication module.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] A dual-mode communication module includes an MCU, a backup power supply, and a supercapacitor charging and discharging management circuit. The supercapacitor charging and discharging management circuit includes: a supercapacitor for storing electrical energy and serving as the backup power supply; a capacitor charging control circuit connected to both the MCU and the supercapacitor, used to charge the supercapacitor using a constant voltage and current limiting method; a capacitor voltage detection circuit connected to both the MCU and the supercapacitor, used to detect the voltage of the supercapacitor and send the detected voltage value to the MCU; a boost circuit connected to the supercapacitor, used to provide power to the MCU after the main power supply of the dual-mode communication module is interrupted; and a boost enable control circuit connected to both the MCU and the boost circuit, used to monitor the main power supply status of the dual-mode communication module and control the activation and deactivation of the boost circuit according to the main power supply status of the dual-mode communication module.

[0006] In some embodiments, the capacitor charging control circuit includes a charging enable circuit and a charging circuit connected in sequence. The charging enable circuit is connected to a power supply terminal, and the charging circuit is connected to the supercapacitor. The charging enable circuit is used to control the charging circuit. When the capacitor voltage detection circuit detects that the supercapacitor has reached a set voltage, the charging enable circuit controls the charging circuit to stop charging the supercapacitor. When the voltage of the supercapacitor is detected to be lower than a set value, the charging enable circuit controls the charging circuit to start charging the supercapacitor.

[0007] In some embodiments, the charging enable circuit includes a first resistor, a second resistor, a third resistor, a first capacitor, a first transistor, and a MOSFET; one end of the first resistor is connected to the charging enable signal pin of the MCU, and the other end is connected to the base of the first transistor; one end of the second resistor is connected to the base of the first transistor, and the other end is grounded; the collector of the first transistor is connected to the third resistor, the emitter is grounded, and the emitter is also connected to the gate of the MOSFET; the source of the MOSFET is connected to the power supply terminal, and the drain is connected to the charging circuit; the other end of the third resistor is connected to the power supply terminal; the first capacitor and the third resistor are connected in parallel.

[0008] In some embodiments, the charging circuit includes a current limiting circuit, a sixth resistor, a second transistor, an adjustable Zener diode, a seventh resistor, an eighth resistor, and a second capacitor; one end of the current limiting circuit is connected to the output terminal of the charging enable circuit, and the other end is connected to the collector of the second transistor; one end of the sixth resistor is connected to the output terminal of the charging enable circuit, and the other end is connected to the cathode of the adjustable Zener diode, the cathode of the adjustable Zener diode is also connected to the base of the second transistor; the emitter of the second transistor is connected to the supercapacitor; the anode of the adjustable Zener diode is grounded, and its feedback input terminal is connected to one end of the seventh resistor and the eighth resistor, respectively; the other end of the seventh resistor is connected to the emitter of the second transistor, and the other end of the eighth resistor is grounded; one end of the second capacitor is grounded, and the other end is connected to the supercapacitor.

[0009] In some embodiments, the current limiting circuit consists of a fourth resistor and a fifth resistor connected in parallel.

[0010] In some embodiments, the capacitor voltage detection circuit includes a tenth resistor and a third capacitor. One end of the tenth resistor is connected to the supercapacitor, and the other end is connected to the sampling signal input pin of the dual-mode communication module MCU. One end of the third capacitor is connected to the sampling signal input pin of the dual-mode communication module MCU, and the other end is grounded.

[0011] In some embodiments, the boost circuit includes an inductor, a first diode, an eleventh resistor, a twelfth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, and a boost chip; one end of the inductor is connected to the supercapacitor, and the other end is connected to the anode of the first diode; the anode of the first diode is also connected to the switching pin of the boost chip, and the cathode of the first diode is connected to the voltage output terminal; one end of the eleventh resistor is connected to the feedback pin of the boost chip, and the other end is connected to the voltage output terminal; one end of the twelfth resistor is connected to the feedback pin of the boost chip, and the other end is grounded; the fourth capacitor and the eleventh resistor are connected in parallel; one end of the eighth capacitor is connected to the input pin of the boost chip, and the other end is grounded; one end of the fifth capacitor is connected to the voltage output terminal, and the other end is grounded; the sixth capacitor and the fifth capacitor are connected in parallel; the seventh capacitor and the fifth capacitor are connected in parallel; one end of the ninth capacitor is connected to the enable pin of the boost chip, and the other end is grounded.

[0012] In some embodiments, the boost enable control circuit includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a tenth capacitor, a second diode, a third diode, a third transistor, and a voltage monitoring chip; one end of the thirteenth resistor is connected to the input pin of the voltage monitoring chip, and the other end is connected to the power supply terminal of the dual-mode communication module; one end of the fourteenth resistor is connected to the input pin of the voltage monitoring chip, and the other end is grounded; the tenth capacitor and the fourteenth resistor are connected in parallel; one end of the fifteenth resistor is connected to the input pin of the voltage monitoring chip, and the other end is connected to the second diode. The cathode of the first diode is connected to the voltage output terminal; the anode of the second diode is connected to the voltage output terminal; one end of the sixteenth resistor is connected to the output pin of the voltage monitoring chip, and the other end is connected to the voltage output terminal; the output pin of the voltage monitoring chip is also connected to the base of the third transistor via the seventeenth resistor; the emitter of the third transistor is connected to the voltage output terminal, the collector is connected to the tenth resistor, and the other end of the eighteenth resistor is grounded; the nineteenth resistor is connected to the collector of the third transistor, and the other end of the nineteenth resistor is connected to the enable pin of the boost chip and also to the anode of the third diode; the cathode of the third diode is connected to the MCU.

[0013] In some embodiments, a discharge resistor is also included in parallel with the supercapacitor, one end of the supercapacitor being connected to the output terminal of the charging circuit and the other end being grounded.

[0014] Furthermore, the operation of the supercapacitor charge / discharge management circuit is as follows:

[0015] The boost enable control circuit monitors the main power supply of the dual-mode communication module in real time. If the main power supply is not interrupted, the boost circuit remains closed. When the main power supply of the dual-mode communication module is interrupted, the boost enable control circuit pulls up the boost enable control signal, and the boost circuit is enabled.

[0016] The capacitor voltage detection circuit detects whether the voltage of the supercapacitor is greater than the boost threshold. If it is, the boost circuit is turned on; otherwise, the boost circuit remains off.

[0017] After detecting a power failure in the main power supply of the dual-mode communication module and the activation of the boost circuit, the capacitor voltage detection circuit continuously monitors the voltage value of the supercapacitor. When the voltage of the supercapacitor is lower than the discharge undervoltage threshold, the MCU pulls down the control signal, the boost enable control signal is pulled down, and the boost circuit is turned off.

[0018] When the boost enable control circuit detects that the main power supply of the dual-mode communication module has been restored, the MCU pulls the control signal low, the boost enable control circuit pulls the boost enable control signal low, and the boost circuit is turned off.

[0019] As can be seen from the above technical solutions, the dual-mode communication module of the present invention uses a supercapacitor as a backup power source and is equipped with a supercapacitor charging and discharging management circuit. The supercapacitor is charged and controlled by the capacitor charging control circuit in the supercapacitor charging and discharging management circuit. The supercapacitor is charged using a constant voltage and current limiting method, the charging method is controlled, and the charging voltage is adjustable. The capacitor voltage detection circuit monitors the voltage of the supercapacitor in real time, so as to decide the discharge strategy based on the voltage status. The boost enable control circuit actively opens the enable pin of the boost circuit after the dual-mode communication module loses power, realizing the power failure reporting task of the communication module. Attached Figure Description

[0020] To more clearly illustrate the embodiments of the present invention, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 is a circuit block diagram of the dual-mode communication module according to an embodiment of the present invention;

[0022] Figure 2 A circuit diagram of the charging enable circuit in an embodiment of the present invention;

[0023] Figure 3 This is a circuit diagram of the charging circuit according to an embodiment of the present invention;

[0024] Figure 4 This is a circuit diagram of a supercapacitor according to an embodiment of the present invention;

[0025] Figure 5 This is a circuit diagram of the capacitor voltage detection circuit according to an embodiment of the present invention;

[0026] Figure 6 This is a circuit diagram of the boost circuit according to an embodiment of the present invention;

[0027] Figure 7 This is a circuit diagram of the boost enable control circuit according to an embodiment of the present invention;

[0028] Figure 8 This is a flowchart illustrating the operation of the supercapacitor charge and discharge management circuit according to an embodiment of the present invention.

[0029] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings. Detailed Implementation

[0030] The present invention will now be described in detail with reference to the accompanying drawings. In describing the embodiments of the present invention, for ease of explanation, the drawings illustrating the device structure will be partially enlarged, not according to general proportions. Furthermore, the schematic diagrams are merely examples and should not be construed as limiting the scope of protection of the present invention. It should be noted that the drawings are simplified and use non-precise proportions, intended only to facilitate and clearly illustrate the embodiments of the present invention. Additionally, in the description of this application, terms such as "first" and "second" are used only to distinguish descriptions and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Terms such as "positive," "negative," "bottom," "upper," "lower," "front," "rear," "left," and "right" indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, not indicating or implying that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0031] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can also refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0032] like Figure 1 As shown, the dual-mode communication module in this embodiment includes at least an MCU and a supercapacitor charge and discharge management circuit. The supercapacitor charge and discharge management circuit includes a supercapacitor, a capacitor charging control circuit, a capacitor voltage detection circuit, a boost circuit, and a boost enable control circuit.

[0033] The supercapacitor stores electrical energy and provides power to the boost circuit after the dual-mode communication module loses power. This allows the boost circuit to output a boosted voltage to the MCU, enabling the MCU (dual-mode communication module) to report power outages. The capacitor charging control circuit is connected to the MCU and receives the Charge signal from the MCU. This circuit charges the supercapacitor using a constant voltage and current-limiting method, ensuring controlled charging and adjustable charging voltage. The capacitor charging control circuit, capacitor voltage detection circuit, and boost circuit are all connected to the supercapacitor. The capacitor voltage detection circuit monitors the supercapacitor's voltage online and is connected to the MCU, sending the detected voltage value to the MCU so it can determine the discharge strategy based on the supercapacitor's voltage state. The boost circuit provides power to the dual-mode communication module (MCU) after the main power supply to the dual-mode communication module is interrupted. The boost enable control circuit is used to detect the status of the dual-mode communication module. The boost enable control circuit is connected to the MCU. When it detects that the dual-mode communication module has lost power, it actively opens the enable pin of the boost circuit to realize power failure reporting.

[0034] The capacitor charging control circuit is connected to the input terminal of the supercapacitor. In this embodiment, the capacitor charging control circuit includes a charging enable circuit and a charging circuit connected in sequence. The charging enable circuit controls the charging circuit; for example, when the capacitor voltage detection circuit detects that the supercapacitor has reached a set voltage, it controls the charging circuit to stop charging the supercapacitor; when it detects that the supercapacitor's voltage is lower than a set value, it controls the charging circuit to start charging the supercapacitor. By setting the charging enable circuit, in applications with high power consumption requirements, intermittent charging can be performed by controlling the enable signal of the charging enable circuit, thereby reducing average power consumption.

[0035] like Figure 2As shown, the charging enable circuit in this embodiment includes a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a first transistor V1, and a MOSFET V2. One end of the first resistor R1 is connected to the charging enable signal pin of the MCU, and the other end is connected to the base of the first transistor V1. The first resistor R1 is a current-limiting resistor, used to limit the current flowing into the base b of the first transistor V1 to prevent excessive current from damaging the first transistor V1. One end of the second resistor R2 is connected to the base b of the first transistor V1, and the other end is grounded. The second resistor R2 provides the initial state for the first transistor V1, ensuring that the first transistor V1 does not malfunction. At the same time, it forms a voltage divider with the first resistor R1, further ensuring the stability of the operation of the first transistor V1. The emitter e of the first transistor V1 is grounded, and the collector c is connected to the third resistor R3. The other end of the third resistor R3 is connected to the VDD terminal (external power supply terminal). The first capacitor C1 and the third resistor R3 are connected in parallel. The emitter of the first transistor V1 is simultaneously connected to the gate g of the MOSFET V2. The source s of the MOSFET V2 is connected to the VDD terminal, and the drain d is connected to the VCC terminal (charging circuit). The third resistor R3 is the control resistor for the gate g of the MOSFET V2. The first capacitor C1 is used to control the soft start of the MOSFET V2, preventing the MOSFET V2 from turning on too quickly and pulling down the front-end VDD voltage. The MOSFET V2 is used to control the connection or disconnection between the VDD and VCC terminals. When the MOSFET V2 is turned on, the VDD voltage is connected to VCC; when the MOSFET V2 is turned off, VDD is disconnected from VCC.

[0036] The charging enable circuit controls the charging circuit to charge or stop charging the supercapacitor based on the charging enable signal Charge. The charging enable signal Charge comes from the MCU of the dual-mode communication module. When the charging enable signal Charge is high, the charging enable circuit is turned on, making the VDD terminal conduct through the MOSFET V2 and VCC terminals, thus starting the charging circuit to charge the supercapacitor. When the charging enable signal Charge is low, the charging enable circuit is turned off, and the charging circuit stops charging the supercapacitor.

[0037] like Figure 3 As shown, the charging circuit in this embodiment includes a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second transistor V3, an adjustable Zener diode V4, a seventh resistor R7, an eighth resistor R8, and a second capacitor C2. The charging circuit is used to set a suitable voltage to charge the supercapacitor. This embodiment uses a constant voltage and current limiting mode to charge the supercapacitor. The charging voltage is settable, and the charging current is adjustable, thus allowing for flexible adaptation to various application scenarios and compatibility with supercapacitors of different brands and rated voltages available on the market.

[0038] In this embodiment, the fourth resistor R4 and the fifth resistor R5 are connected in parallel to form a current-limiting circuit. One end is connected to the output terminal of the charging enable circuit, and the other end is connected to the collector (c) of the second transistor V3. The VCC terminal is the input terminal of the charging circuit, and VCC is the input voltage of the charging circuit. Through the current-limiting circuit composed of the fourth resistor R4 and the fifth resistor R5, the charging current value for the supercapacitor can be set. By selecting an appropriate current value to charge the supercapacitor, excessive current can be avoided, preventing increased power consumption, while insufficient current can increase charging time and prevent timely charging to achieve the power outage reporting function. One end of the sixth resistor R6 is connected to the output terminal (VCC) of the charging enable circuit, and the other end is connected to the cathode (c) of the adjustable Zener diode V4. The cathode (c) of the adjustable Zener diode V4 is also connected to the base (b) of the second transistor V3. The sixth resistor R6 is the current-limiting resistor for the adjustable Zener diode V4; by selecting an appropriate resistance value, the adjustable Zener diode V4 can enter a regulated state. The emitter (e) of the second transistor V3 is connected to the supercapacitor (VCAP terminal). Transistor V3 serves as the step-down device in the charging circuit. The adjustable Zener diode V4 provides a voltage reference for the charging circuit, ensuring output voltage stability. The anode (a) of the adjustable Zener diode V4 is grounded, and its feedback input terminal (ref) is connected to one end of the seventh resistor R7 and the eighth resistor R8, respectively. Resistors R7 and R8 are feedback resistors used to set the voltage value. The other end of resistor R7 is connected to the emitter (e) of the second transistor V3, and the other end of resistor R8 is grounded. The second capacitor C2 is the coupling capacitor for the charging circuit's power output, used to filter out high-frequency noise. One end of capacitor C2 is grounded, and the other end is connected to the supercapacitor.

[0039] Figure 4 This is a circuit diagram of the supercapacitor in this embodiment. The supercapacitor includes a supercapacitor CAP and a bleeder resistor R9. One end of the supercapacitor CAP is connected to the output terminal of the charging circuit, and the other end is grounded. The bleeder resistor R9 is connected in parallel with the supercapacitor CAP. The supercapacitor CAP is used to store electrical energy and also provides power to the boost circuit after the dual-mode communication module loses power. The bleeder resistor R9 is used to bleed the leakage current from the boost circuit, ensuring that the supercapacitor voltage remains stable at the set value and does not exceed the supercapacitor's rated value, thus increasing the supercapacitor's lifespan.

[0040] The capacitor voltage detection circuit samples the voltage of the supercapacitor, allowing the MCU of the dual-mode communication module to determine whether to activate the discharge boost function based on the supercapacitor's voltage state. Additionally, it detects whether the supercapacitor voltage exceeds a set value, issuing an alarm when it does. The capacitor voltage detection circuit sends the detected supercapacitor voltage value to the MCU of the dual-mode communication module. The MCU's built-in comparator compares the detected voltage value with the boost threshold Von_th, and the MCU decides whether to enable the boost function based on the comparison result.

[0041] like Figure 5 As shown, the capacitor voltage detection circuit in this embodiment includes a tenth resistor R10 and a third capacitor C3. The tenth resistor R10 and the third capacitor C3 form an anti-aliasing filter to filter out noise interference that affects sampling accuracy. One end of the tenth resistor R10 is connected to the supercapacitor (VCAP), and the other end is connected to the sampling signal input pin (ADC_CAP) of the dual-mode communication module MCU. One end of the third capacitor C3 is connected to the sampling signal input pin (ADC_CAP) of the MCU, and the other end is grounded.

[0042] The boost circuit is used to provide short-term backup power to the dual-mode communication module (MCU) after a power outage, ensuring that the dual-mode communication module can complete the event reporting function after the power failure. For example... Figure 6 As shown, the boost circuit in this embodiment includes an inductor L1, a first diode D1, an eleventh resistor R11, a twelfth resistor R12, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C9, and a boost chip U1.

[0043] Inductor L1 is the energy storage device in the boost circuit. One end is connected to the supercapacitor (VCAP), and the other end is connected to the anode of the first diode D1. The anode of the first diode D1 is also connected to the switching pin SW of the boost chip U1. The cathode of the first diode D1 is connected to the voltage output terminal, VPP, which is the boosted voltage. The first diode D1 is a reverse protection diode for the boost circuit, used to prevent reverse voltage from flowing through VPP to the supercapacitor, causing the supercapacitor voltage to exceed its rated value. In specific applications, a Schottky diode with low leakage current can be selected for the first diode D1. The eleventh resistor R11 and the twelfth resistor R12 are the feedback resistors of the boost circuit. The output voltage of the boost circuit can be set by selecting different resistance values. One end of the eleventh resistor R11 is connected to the feedback pin FB of the boost chip U1, and the other end is connected to the voltage output terminal (VPP terminal). The voltage output terminal is connected to the MCU to output the voltage to the MCU. One end of the twelfth resistor R12 is connected to the feedback pin FB of the boost chip U1, and the other end is grounded. The fourth capacitor, C4, is the feedforward capacitor for the boost circuit, used to improve the response and stability of the boost circuit. C4 is connected in parallel with the eleventh resistor, R11. The eighth capacitor, C8, is the power supply decoupling capacitor for the boost chip U1, used to filter power supply noise. One end of C8 is connected to the input pin of the boost chip U1, and the other end is grounded. The fifth capacitor, C5, and the sixth capacitor, C6, are the energy storage capacitors at the output of the boost circuit, used for energy storage and filtering low-frequency noise. One end of C5 is connected to the voltage output terminal (VPP), and the other end is grounded. C6 is connected in parallel with C5. The seventh capacitor, C7, is the decoupling capacitor at the output of the boost circuit, used to filter high-frequency noise. C7 is connected in parallel with C5 and C6. The ninth capacitor, C9, is the enable decoupling capacitor for the boost chip U1, used to filter out the influence of noise on the enable pin and avoid malfunctions. One end of C9 is connected to the enable pin (EN) of the boost chip U1, and the other end is grounded.

[0044] The boost enable control circuit is used to control the switching on and off of the boost circuit. For example... Figure 7 As shown, the boost enable control circuit of this embodiment includes a thirteenth resistor, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, a tenth capacitor C10, a second diode D2, a third diode D3, a third transistor V5, and a voltage monitoring chip U2.

[0045] Resistors R13 (13th) and R14 (14th) form a voltage divider circuit. One end of resistor R13 is connected to the input pin VIN of the voltage monitoring chip U2, and the other end is connected to the power supply terminal of the dual-mode communication module. This is used to monitor whether the main power supply 12VP of the dual-mode communication module is powered down. One end of resistor R14 is connected to the input pin VIN of the voltage monitoring chip U2, and the other end is grounded. Capacitor C10 (10th) and resistor R14 (14th) are connected in parallel. Capacitor C10 is a decoupling capacitor for the input pin of the voltage monitoring chip U2, used to filter out noise interference. Resistor R15 is used to form a voltage divider with the voltage divider circuit (R13, R14) to supply power to the voltage monitoring chip U2 after the main power supply (12VP) of the dual-mode communication module is powered down. One end of resistor R15 is connected to the input pin VIN of the voltage monitoring chip U2, and the other end is connected to the cathode of the second diode D2. The second diode D2 is used for voltage reduction, and the anode of the second diode D2 is connected to the voltage output terminal (VPP terminal). The sixteenth resistor, R16, is a pull-up resistor for the output pin VOUT of the voltage monitoring chip U2. One end of the sixteenth resistor, R16, is connected to the output pin VOUT of the voltage monitoring chip U2, and the other end is connected to the voltage output terminal (VPP terminal). In this embodiment, the voltage monitoring chip U2 has an open-drain output, so a pull-up resistor is needed to maintain a high level. The output pin VOUT of the voltage monitoring chip U2 is also connected to the base b of the third transistor V5 via the seventeenth resistor, R17. The seventeenth resistor, R17, is a current-limiting resistor for the base of the third transistor V5. The third transistor V5 acts as a switch, converting the high and low levels output by the voltage monitoring chip U2. Its output directly controls the enable signal of the boost chip U1. The emitter e of the third transistor V5 is connected to the voltage output terminal (VPP terminal), the base b is connected to the seventeenth resistor, R17, and the collector c is connected to the tenth resistor, R18. The other end of the eighteenth resistor, R18, is grounded. The eighteenth resistor, R18, is a pull-down resistor for the collector (c) of the third transistor V5, used to provide a low-level output from V5. The nineteenth resistor, R19, is connected to the collector (c) of the third transistor V5. R19 is a current-limiting resistor, used to limit the current flowing into the dual-mode communication module MCU to prevent excessive current from damaging the chip. The other end of R19 is connected to the enable pin of the boost converter chip U1. The end of R19 connected to the boost converter chip U1 is also connected to the anode of the third diode D3. Diode D3 is a level-shifting diode, and its cathode is connected to the enable control pin (SP_CTRL) of the dual-mode communication module MCU. During the boost output process, when the MCU detects that the voltage of the supercapacitor is lower than the boost threshold Von_th, it outputs the control signal SP_CTRL through the enable control pin to shut down the boost circuit.For example, when the main power supply 12VP of the dual-mode communication module is detected to be de-energized and the supercapacitor voltage is less than the boost threshold Von_th, the MCU pulls the control signal SP_CTRL low, and the boost enable control signal EN_CTRL is also pulled low, thus disabling the boost function.

[0046] The MCU, boost chip, and voltage monitoring chip of this invention can all be commercially available chips without specifying a particular model. For example, the MCU can use the dual-mode communication chip from Zhuhai Zhonghui Company.

[0047] If the supercapacitor charge / discharge management circuit in this embodiment detects a power failure in the main power supply of the dual-mode communication module, its boost process is as follows: Figure 8 As shown, the boost process is as follows:

[0048] The voltage monitoring chip U2 of the boost enable control circuit monitors the main power supply of the dual-mode communication module in real time. If the main power supply 12VP does not fail, the boost circuit remains closed. When the main power supply 12VP of the dual-mode communication module fails, the output pin VOUT of the voltage monitoring chip U2 outputs a low level, the third transistor V5 turns on, the boost enable control signal EN_CTRL is pulled high, the boost circuit is enabled, and it has boost capability.

[0049] The capacitor voltage detection circuit detects whether the voltage of the supercapacitor is greater than the boost threshold Von_th. If it is greater, the boost circuit is turned on; otherwise, the boost circuit remains off. When the main power supply 12VP of the dual-mode communication module is detected to be de-energized and the voltage of the supercapacitor is less than Von_th, the MCU of the dual-mode communication module will continuously pull SP_CTRL low. At this time, the boost enable control signal EN_CTRL will also be pulled low, disabling the boost function. This ensures that problems caused by low voltage discharge of the supercapacitor are avoided, and also avoids flash malfunctions due to insufficient flash protection time caused by short discharge boost time.

[0050] After the boost circuit is turned on, during its operation, the capacitor voltage detection circuit continuously monitors the voltage value of the supercapacitor. When the voltage of the supercapacitor is detected to be lower than the discharge undervoltage threshold Voff_th, the MCU of the dual-mode communication module pulls the control signal SP_CTRL low. At this time, the boost enable control signal EN_CTRL will also be pulled low, disabling the output function of the boost circuit. This avoids the output voltage fluctuations of the boost circuit when the supercapacitor is discharging at a low voltage, which would affect the power stability of the subsequent circuits and easily cause the MCU to repeatedly start due to voltage instability. It also avoids large overshoots in the output voltage of the boost circuit, which could exceed the maximum input voltage of the subsequent circuits and cause damage. It also prevents the boost chip from being damaged by large overshoots at the SW pin when the input voltage is low. If the voltage of the supercapacitor is greater than the discharge undervoltage threshold Voff_th, it continues to discharge.

[0051] When the voltage monitoring chip U2 detects that the main power supply 12VP of the dual-mode communication module has been restored, the output pin VOUT of the voltage monitoring chip U2 outputs a high level, the third transistor V5 is turned off, the boost enable control signal EN_CTRL will be pulled low, and the boost circuit will be turned off.

[0052] The dual-mode communication module of the present invention has the following characteristics:

[0053] (1) Controllable charging of supercapacitor; the charging of supercapacitor is stopped after the supercapacitor is charged to the set voltage. When the supercapacitor voltage is detected to be lower than the set value, the charging function is turned on. In situations where power consumption requirements are high, the average power consumption is reduced by controlling the enable signal of the enable circuit to perform intermittent charging.

[0054] (2) The charging voltage of the supercapacitor can be set. The capacitor charging control circuit adopts constant voltage and current limiting mode to charge the supercapacitor. The charging voltage can be set and the charging current can be adjusted. It can flexibly adapt to various application scenarios and can be compatible with supercapacitors of different brands and rated voltages on the market.

[0055] (3) The supercapacitor voltage can be detected; the capacitor voltage detection circuit can monitor the voltage of the supercapacitor in real time and decide whether to start the discharge boost function based on the voltage status of the supercapacitor; it can also detect whether the supercapacitor voltage exceeds the set value and give an abnormal alarm when it exceeds the set value.

[0056] (4) The supercapacitor boost circuit is controllable; when the main power supply of the device terminal is detected to be lost, the boost circuit is enabled to have boost capability. If the detected supercapacitor voltage is greater than Von_th, the boost circuit is turned on; if it is less than Von_th, the boost function is turned off. This can both ensure that the problem caused by the low voltage discharge of the supercapacitor is avoided, and also avoid the problem of flash function abnormality due to insufficient time to protect the flash due to the short discharge boost time. During the operation of the boost circuit, the capacitor voltage detection circuit continuously detects the supercapacitor voltage value. When the detected supercapacitor voltage is lower than the discharge undervoltage threshold, When Voff_th is active, the boost circuit output function is disabled. This prevents the boost circuit from experiencing output voltage fluctuations when the supercapacitor is discharging at a low voltage, which could affect the power stability of subsequent circuits and easily cause the MCU to repeatedly start due to voltage instability. It also prevents the boost circuit output voltage from experiencing large overshoot, which could exceed the maximum input voltage of subsequent circuits and cause damage. Furthermore, it prevents the boost chip from being damaged by large overshoot at the SW pin when the input voltage is low. When the device terminal main power supply is detected to be restored, the boost circuit is turned off.

[0057] (5) It has the functions of discharging leakage current and preventing reverse flow; the supercapacitor has the ability to discharge leakage current of the boost circuit through the parallel discharge resistor; the first diode D1 in the boost circuit is selected as a diode with small leakage current, which can reduce the leakage current injected into the supercapacitor, prevent the supercapacitor voltage from exceeding the rated voltage, effectively prevent the supercapacitor from bulging and leaking, and extend the life of the supercapacitor.

[0058] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A dual-mode communication module, characterized in that: It includes an MCU, a backup power supply, and a supercapacitor charge / discharge management circuit, wherein the supercapacitor charge / discharge management circuit includes: A supercapacitor, wherein the supercapacitor is used to store electrical energy and serves as the backup power source; A capacitor charging control circuit is connected to the MCU and the supercapacitor respectively. The capacitor charging control circuit is used to charge the supercapacitor in a constant voltage and current limiting manner. A capacitor voltage detection circuit is connected to the MCU and the supercapacitor respectively. The capacitor voltage detection circuit is used to detect the voltage of the supercapacitor and send the detected voltage value to the MCU. A boost circuit connected to the supercapacitor is used to provide power to the MCU after the main power supply of the dual-mode communication module is cut off; A boost enable control circuit is connected to the MCU and the boost circuit respectively. The boost enable control circuit is used to monitor the main power supply status of the dual-mode communication module and control the opening and closing of the boost circuit according to the main power supply status of the dual-mode communication module.

2. The dual-mode communication module as described in claim 1, characterized in that: The capacitor charging control circuit includes a charging enable circuit and a charging circuit connected in sequence. The charging enable circuit is connected to the power supply terminal, and the charging circuit is connected to the supercapacitor. The charging enable circuit is used to control the charging circuit. When the capacitor voltage detection circuit detects that the supercapacitor has been charged to a set voltage, the charging enable circuit controls the charging circuit to stop charging the supercapacitor. When the voltage of the supercapacitor is detected to be lower than the set value, the charging enable circuit controls the charging circuit to start charging the supercapacitor.

3. The dual-mode communication module as described in claim 2, characterized in that: The charging enable circuit includes a first resistor, a second resistor, a third resistor, a first capacitor, a first transistor, and a MOSFET. One end of the first resistor is connected to the charging enable signal pin of the MCU, and the other end is connected to the base of the first transistor. One end of the second resistor is connected to the base of the first transistor, and the other end is grounded. The collector of the first transistor is connected to the third resistor, the emitter is grounded, and the emitter is also connected to the gate of the MOSFET. The source of the MOSFET is connected to the power supply terminal, and the drain is connected to the charging circuit. The other end of the third resistor is connected to the power supply terminal. The first capacitor and the third resistor are connected in parallel.

4. The dual-mode communication module as described in claim 2, characterized in that: The charging circuit includes a current limiting circuit, a sixth resistor, a second transistor, an adjustable Zener diode, a seventh resistor, an eighth resistor, and a second capacitor. One end of the current limiting circuit is connected to the output of the charging enable circuit, and the other end is connected to the collector of the second transistor. One end of the sixth resistor is connected to the output of the charging enable circuit, and the other end is connected to the cathode of the adjustable Zener diode, which is also connected to the base of the second transistor. The emitter of the second transistor is connected to the supercapacitor. The anode of the adjustable Zener diode is grounded, and its feedback input is connected to one end of the seventh and eighth resistors, respectively. The other end of the seventh resistor is connected to the emitter of the second transistor, and the other end of the eighth resistor is grounded. One end of the second capacitor is grounded, and the other end is connected to the supercapacitor.

5. The dual-mode communication module as described in claim 4, characterized in that: The current limiting circuit consists of a fourth resistor and a fifth resistor connected in parallel.

6. The dual-mode communication module as described in claim 1, characterized in that: The capacitor voltage detection circuit includes a tenth resistor and a third capacitor. One end of the tenth resistor is connected to the supercapacitor, and the other end is connected to the sampling signal input pin of the dual-mode communication module MCU. One end of the third capacitor is connected to the sampling signal input pin of the dual-mode communication module MCU, and the other end is grounded.

7. The dual-mode communication module as described in claim 1, characterized in that: The boost circuit includes an inductor, a first diode, an eleventh resistor, a twelfth resistor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, and a boost chip. One end of the inductor is connected to the supercapacitor, and the other end is connected to the anode of the first diode. The anode of the first diode is also connected to the switching pin of the boost chip, and the cathode of the first diode is connected to the voltage output terminal. One end of the eleventh resistor is connected to the feedback pin of the boost chip, and the other end is connected to the voltage output terminal. One end of the twelfth resistor is connected to the feedback pin of the boost chip, and the other end is grounded. The fourth capacitor and the eleventh resistor are connected in parallel. One end of the eighth capacitor is connected to the input pin of the boost chip, and the other end is grounded. One end of the fifth capacitor is connected to the voltage output terminal, and the other end is grounded. The sixth capacitor and the fifth capacitor are connected in parallel. The seventh capacitor and the fifth capacitor are connected in parallel. One end of the ninth capacitor is connected to the enable pin of the boost chip, and the other end is grounded.

8. The dual-mode communication module as described in claim 1, characterized in that: The boost enable control circuit includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, a tenth capacitor, a second diode, a third diode, a third transistor, and a voltage monitoring chip; one end of the thirteenth resistor is connected to the input pin of the voltage monitoring chip, and the other end is connected to the power supply terminal of the dual-mode communication module; one end of the fourteenth resistor is connected to the input pin of the voltage monitoring chip, and the other end is grounded; the tenth capacitor and the fourteenth resistor are connected in parallel. One end of the fifteenth resistor is connected to the input pin of the voltage monitoring chip, and the other end is connected to the cathode of the second diode; the anode of the second diode is connected to the voltage output terminal; one end of the sixteenth resistor is connected to the output pin of the voltage monitoring chip, and the other end is connected to the voltage output terminal; the output pin of the voltage monitoring chip is also connected to the base of the third transistor via the seventeenth resistor; the emitter of the third transistor is connected to the voltage output terminal, and the collector is connected to the tenth resistor; the other end of the eighteenth resistor is grounded; the nineteenth resistor is connected to the collector of the third transistor, and the other end of the nineteenth resistor is connected to the enable pin of the boost chip and also connected to the anode of the third diode; the cathode of the third diode is connected to the MCU.

9. The dual-mode communication module as described in claim 1, characterized in that: It also includes a discharge resistor connected in parallel with the supercapacitor, one end of which is connected to the output terminal of the charging circuit and the other end is grounded.

10. The dual-mode communication module as described in claim 1, characterized in that: The operation process of the supercapacitor charge and discharge management circuit is as follows: The boost enable control circuit monitors the main power supply of the dual-mode communication module in real time. If the main power supply is not interrupted, the boost circuit remains closed. When the main power supply of the dual-mode communication module is interrupted, the boost enable control circuit pulls up the boost enable control signal, and the boost circuit is enabled. The capacitor voltage detection circuit detects whether the voltage of the supercapacitor is greater than the boost threshold. If it is, the boost circuit is turned on; otherwise, the boost circuit remains off. After detecting a power failure in the main power supply of the dual-mode communication module and the activation of the boost circuit, the capacitor voltage detection circuit continuously monitors the voltage value of the supercapacitor. When the voltage of the supercapacitor is lower than the discharge undervoltage threshold, the MCU pulls down the control signal, the boost enable control signal is pulled down, and the boost circuit is turned off. When the boost enable control circuit detects that the main power supply of the dual-mode communication module has been restored, the MCU pulls the control signal low, the boost enable control circuit pulls the boost enable control signal low, and the boost circuit is turned off.