A novel inverter topology and its control method
By employing a novel inverter topology and control method, four-level output and energy recovery are achieved, solving the problem of insufficient DC-side voltage in multi-level inverters, improving system efficiency and power density, and making it suitable for new energy commercial vehicles and high-precision industrial drive systems.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TIANJIN RES INST OF ELECTRIC SCI
- Filing Date
- 2026-02-09
- Publication Date
- 2026-06-19
AI Technical Summary
Existing multilevel inverters require an external DC/DC converter to boost the voltage when the DC-side voltage is insufficient, which increases system energy consumption and violates the goals of carbon peaking and carbon neutrality.
A novel inverter topology is designed to achieve four-level output by combining switching devices and capacitors. During load current commutation, demagnetizing energy is recovered and fed to the boost capacitor to provide a voltage excitation higher than that of the DC power supply, thus avoiding the need for an external DC/DC converter.
It improves system efficiency and power density, reduces harmonic content, and minimizes electromagnetic interference, making it suitable for high-efficiency and high-power-density power electronic conversion applications.
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Figure CN122247224A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of circuit topology technology, and in particular to a novel inverter topology and its control method. Background Technology
[0002] Among various inverters, multilevel inverters are power electronic converters that achieve multilevel output by increasing the number of voltage levels. Typical topologies include diode-neutral-clamped (NPC) and T-type three-level inverters. Their core advantage lies in outputting a voltage waveform closer to a sine wave, significantly reducing harmonic content (THD is reduced by more than 30% compared to two-level inverters). Simultaneously, the clamping diodes halve the voltage stress on the devices, improving system reliability. However, in practical engineering applications, the DC-side voltage may be low, failing to meet the load's voltage requirements. In such cases, a DC / DC converter needs to be added to the DC side to boost the voltage. However, the introduction of multi-stage circuits inevitably increases the overall energy consumption of the system, which is inconsistent with the national strategic goal of "peak carbon emissions and carbon neutrality." Therefore, inverter efficiency optimization will be an important research direction in the future. Summary of the Invention
[0003] The purpose of this invention is to overcome the shortcomings of the prior art and propose a novel inverter topology and its control method. Through a clever combination of switching devices and capacitors, while achieving four-level output, it can recover the demagnetizing energy during load current commutation to the internal boost capacitor and release it when needed to generate a voltage excitation higher than that of the DC power supply. Thus, boost output can be achieved without an external DC-DC converter, significantly improving system efficiency and power density.
[0004] The technical problem solved by this invention is achieved through the following technical solution: A novel inverter topology includes a DC power supply Udc, a first switch V1, a second switch V2, a third switch V3, a fourth switch V4, a fifth switch V5, a sixth switch V6, a seventh switch V7, an eighth switch V8, a load resistor Rs, a load-side inductor L1, a load-side inductor L2, a load-side capacitor voltage Uc1, and a boost capacitor voltage Uc2. In this configuration, the positive terminal of the DC power supply Udc is connected to the source of the eighth switching transistor V8 and one end of the boost capacitor voltage Uc2. The drain of the eighth switching transistor V8 is connected to the source of the first switching transistor V1, the drain of the seventh switching transistor V7, and the source of the third switching transistor V3. The other end of the boost capacitor voltage Uc2 is connected to the source of the seventh switching transistor V7, the drain of the sixth switching transistor V6, and the drain of the fifth switching transistor V5. The drain of the first switching transistor V1 is connected to one end of the load-side inductor L1 and the source of the sixth switching transistor V6. The source of the second switch V2 and the drain of the third switch V3 are respectively connected to the source of the fifth switch V5, one end of the load-side inductor L2, and the source of the fourth switch V4. The negative terminal of the DC power supply Udc is respectively connected to the drain of the second switch V2 and the drain of the fourth switch V4. The other end of the load-side inductor L1 is respectively connected to one end of the load-side capacitor voltage Uc1 and one end of the load resistor Rs. The other end of the load-side inductor L2 is respectively connected to the other end of the load-side capacitor voltage Uc1 and the other end of the load resistor Rs.
[0005] Furthermore, the switching signals of the seventh switch V7 and the eighth switch V8 are complementary.
[0006] Moreover, the fifth switch V5 and the sixth switch V6 are mainly responsible for current demagnetization and energy storage.
[0007] A novel control method for an inverter topology allows the inverter to alternate between excitation and zero-voltage energy storage states by controlling the switching on and off of the first switch V1, the second switch V2, the third switch V3, the fourth switch V4, the fifth switch V5, the sixth switch V6, the seventh switch V7, and the eighth switch V8.
[0008] Furthermore, the excitation states include: high-voltage positive excitation state, high-voltage negative excitation state, normal-pressure positive excitation state, and normal-pressure negative excitation state; the zero-pressure energy storage state includes positive current demagnetization energy storage state and negative current demagnetization energy storage state.
[0009] Moreover, the inverter's operation process is as follows: normal voltage positive excitation state → positive current demagnetization and energy storage state → normal voltage negative excitation state → negative current demagnetization and energy storage state → high voltage positive excitation state → positive current demagnetization and energy storage state → high voltage negative excitation state → negative current demagnetization and energy storage state.
[0010] The advantages and positive effects of this invention are: This invention includes a DC power supply, eight switching transistors, a boost capacitor, a load-side capacitor, and a load. By controlling specific combinations of the switching transistors, six operating states can be achieved: high-voltage positive / negative excitation, normal-voltage positive / negative excitation, and positive / negative current demagnetization and energy storage. In the demagnetization and energy storage state, the energy of the load inductor is recovered to the boost capacitor; in the high-voltage excitation state, the voltage of this capacitor is superimposed with the DC power supply output to achieve the boost function. This invention integrates energy recovery and multi-level output functions into a single topology, eliminating the need for an external DC-DC converter. It features a compact structure, high efficiency, low output voltage harmonics, and fast dynamic response, making it suitable for power electronic conversion applications with high efficiency and power density requirements. Attached Figure Description
[0011] Figure 1 This is a circuit diagram of the novel inverter topology of the present invention; Figure 2 This is a schematic diagram of the current path under high-voltage positive excitation state according to the present invention; Figure 3 This is a schematic diagram of the current path under high-voltage negative excitation state according to the present invention; Figure 4 This is a schematic diagram of the current path under normal pressure positive excitation state according to the present invention; Figure 5 This is a schematic diagram of the current path under normal pressure negative excitation state according to the present invention; Figure 6 This is a schematic diagram of the current path under the forward current demagnetization energy storage state of the present invention; Figure 7 This is a schematic diagram of the current path under the negative current demagnetization energy storage state of the present invention; Figure 8 This is a flowchart of the present invention. Detailed Implementation
[0012] The present invention will be further described in detail below with reference to the accompanying drawings.
[0013] A novel inverter topology with four voltage levels is introduced, which can store the energy generated during load current commutation and use it as a high-voltage level for load excitation in the next electrical cycle. This energy-storing multilevel inverter can greatly improve current utilization, enhance overall system efficiency, reduce system energy loss to a certain extent, and save electricity.
[0014] like Figure 1 As shown, it includes a DC power supply Udc, a first switch V1, a second switch V2, a third switch V3, a fourth switch V4, a fifth switch V5, a sixth switch V6, a seventh switch V7, an eighth switch V8, a load resistor Rs, a load-side inductor L1, a load-side inductor L2, a load-side capacitor voltage Uc1, and a boost capacitor voltage Uc2.
[0015] In this configuration, the positive terminal of the DC power supply Udc is connected to the source of the eighth switching transistor V8 and one end of the boost capacitor voltage Uc2. The drain of the eighth switching transistor V8 is connected to the source of the first switching transistor V1, the drain of the seventh switching transistor V7, and the source of the third switching transistor V3. The other end of the boost capacitor voltage Uc2 is connected to the source of the seventh switching transistor V7, the drain of the sixth switching transistor V6, and the drain of the fifth switching transistor V5. The drain of the first switching transistor V1 is connected to one end of the load-side inductor L1 and the source of the sixth switching transistor V6. The source of the second switch V2 and the drain of the third switch V3 are respectively connected to the source of the fifth switch V5, one end of the load-side inductor L2, and the source of the fourth switch V4. The negative terminal of the DC power supply Udc is respectively connected to the drain of the second switch V2 and the drain of the fourth switch V4. The other end of the load-side inductor L1 is respectively connected to one end of the load-side capacitor voltage Uc1 and one end of the load resistor Rs. The other end of the load-side inductor L2 is respectively connected to the other end of the load-side capacitor voltage Uc1 and the other end of the load resistor Rs.
[0016] The seventh switch, V7, is called the high-voltage switch, and the eighth switch, V8, is called the normal-voltage switch. The switching signals of the seventh switch, V7, and the eighth switch, V8, are complementary. The seventh switch, V7, and the eighth switch, V8, cannot be turned on simultaneously.
[0017] A novel control method for an inverter topology is disclosed. By controlling the switching on and off of the first switch V1, the second switch V2, the third switch V3, the fourth switch V4, the fifth switch V5, the sixth switch V6, the seventh switch V7, and the eighth switch V8, the inverter alternately operates in an excitation state and a zero-voltage energy storage state. In this embodiment, the direction of the current flowing through the load Rs from top to bottom is considered positive. The excitation states include: high-voltage positive excitation state, high-voltage negative excitation state, normal-voltage positive excitation state, and normal-voltage negative excitation state. The zero-voltage energy storage states include positive current demagnetization energy storage state and negative current demagnetization energy storage state.
[0018] When V1, V4, and V7 are turned on, and V2, V3, V5, V6, and V8 are turned off, the load experiences a voltage of +(Udc + Uc2), and the current flows as follows: Figure 2 As shown, the load Rs will receive a higher voltage than the DC power supply at this time, which can speed up the current build-up and is suitable for situations where the field voltage is insufficient but a higher voltage excitation is required.
[0019] When V2, V3, and V7 are turned on, and V1, V4, V5, V6, and V8 are turned off, the load voltage is -(Udc + Uc2), and the current flow is as follows. Figure 3 As shown, a negative current can be quickly established at this time, accelerating the response speed.
[0020] Turn off the high-voltage switch V7 and turn on the normal-voltage switch V8. The inverter will switch to the normal-voltage conduction state. Then turn on V1 and V4, and turn off V2, V3, V5, and V6. At this time, the load voltage is +Udc, and the current flow is as follows. Figure 4 As shown. With V2, V3, and V8 on, and V1, V4, V5, V6, and V7 off, the load experiences a voltage of -Udc, and the current is as follows. Figure 5 As shown. The load is subjected to conventional excitation, which builds up the current slightly slower than under high-voltage excitation. The choice between high-voltage excitation and conventional excitation can be made based on the actual operating conditions.
[0021] Switches V5 and V6 are primarily responsible for current demagnetization and energy storage, only conducting V1, V5, and V8. Due to the presence of inductors L1 and L2 and load-side capacitor C1, the current will flow in the loop as follows: Figure 6 The current continues to flow in the direction shown, storing energy in the boost capacitor C2. Once C2 is fully charged, the system can switch to the next state. Alternatively, only V3, V6, and V8 can be turned on to charge C2, with the current flowing as shown. Figure 7 .
[0022] The inverter's boost capacitor needs to store energy before it can be used, such as... Figure 8 As shown, the execution order can be as follows: Normal pressure positive excitation state → positive current demagnetization and energy storage state → normal pressure negative excitation state → negative current demagnetization and energy storage state → high voltage positive excitation state → positive current demagnetization and energy storage state → high voltage negative excitation state → negative current demagnetization and energy storage state.
[0023] The novel multilevel inverter described above can reuse the energy during current demagnetization, thereby improving energy efficiency. The switching table is as follows, with "√" indicating that the switching device is on and "×" indicating that the switching device is off.
[0024] Table 1 Switch Table
[0025] A novel multilevel inverter, by increasing output level states, recovering demagnetizing energy, and optimizing current paths and switching processes, offers significant advantages over traditional inverters in terms of waveform quality, efficiency, and cost. Compared to the combination of DC-DC converters and inverter circuits, it reduces electromagnetic interference and decreases size. Since traditional DC-DC boost circuits lack electrical isolation, their safety is relatively low. The proposed multilevel inverter effectively avoids this problem and also avoids the cost increase associated with introducing isolation transformers. It is particularly suitable for applications with high efficiency requirements and harsh electromagnetic environments, such as new energy commercial vehicles, photovoltaic inverters, and high-precision industrial drive systems. With the advancement of power electronics technology, multilevel inverter topologies with energy storage designs will find wider application in high-voltage, high-power fields.
[0026] It should be emphasized that the embodiments described in this invention are illustrative rather than limiting. Therefore, this invention includes, but is not limited to, the embodiments described in the specific implementation. Any other implementations derived by those skilled in the art based on the technical solutions of this invention are also within the scope of protection of this invention.
Claims
1. A novel inverter topology, characterized in that: It includes a DC power supply Udc, a first switch V1, a second switch V2, a third switch V3, a fourth switch V4, a fifth switch V5, a sixth switch V6, a seventh switch V7, an eighth switch V8, a load resistor Rs, a load-side inductor L1, a load-side inductor L2, a load-side capacitor voltage Uc1, and a boost capacitor voltage Uc2. In this configuration, the positive terminal of the DC power supply Udc is connected to the source of the eighth switching transistor V8 and one end of the boost capacitor voltage Uc2. The drain of the eighth switching transistor V8 is connected to the source of the first switching transistor V1, the drain of the seventh switching transistor V7, and the source of the third switching transistor V3. The other end of the boost capacitor voltage Uc2 is connected to the source of the seventh switching transistor V7, the drain of the sixth switching transistor V6, and the drain of the fifth switching transistor V5. The drain of the first switching transistor V1 is connected to one end of the load-side inductor L1 and the source of the sixth switching transistor V6. The source of the second switch V2 and the drain of the third switch V3 are respectively connected to the source of the fifth switch V5, one end of the load-side inductor L2, and the source of the fourth switch V4. The negative terminal of the DC power supply Udc is respectively connected to the drain of the second switch V2 and the drain of the fourth switch V4. The other end of the load-side inductor L1 is respectively connected to one end of the load-side capacitor voltage Uc1 and one end of the load resistor Rs. The other end of the load-side inductor L2 is respectively connected to the other end of the load-side capacitor voltage Uc1 and the other end of the load resistor Rs.
2. The novel inverter topology according to claim 1, characterized in that: The fifth switch V5 and the sixth switch V6 are mainly responsible for current demagnetization and energy storage.
3. The novel inverter topology according to claim 1, characterized in that: The switching signals of the seventh switch V7 and the eighth switch V8 are complementary.
4. A control method for a novel inverter topology as described in claims 1 to 3, characterized in that: By controlling the on / off states of the first switch V1, the second switch V2, the third switch V3, the fourth switch V4, the fifth switch V5, the sixth switch V6, the seventh switch V7, and the eighth switch V8, the inverter can alternately operate in the excitation state and the zero-voltage energy storage state.
5. The control method for a novel inverter topology according to claim 4, characterized in that: The excitation states include: high-voltage positive excitation state, high-voltage negative excitation state, normal-pressure positive excitation state, and normal-pressure negative excitation state; the zero-pressure energy storage states include positive current demagnetization energy storage state and negative current demagnetization energy storage state.
6. The control method for a novel inverter topology according to claim 5, characterized in that: The inverter operates as follows: normal voltage positive excitation state → positive current demagnetization and energy storage state → normal voltage negative excitation state → negative current demagnetization and energy storage state → high voltage positive excitation state → positive current demagnetization and energy storage state → high voltage negative excitation state → negative current demagnetization and energy storage state.