Microdisplay chip structure and method of manufacture

Abstract

This application discloses a microdisplay chip structure and manufacturing method. The structure includes, from bottom to top, organic bonding adhesive, a Micro LED chip, an insulating adhesive, wiring lines, a protective adhesive layer, and electrodes. The insulating adhesive has a first through-hole extending from the top surface to the surface of the Micro LED chip, realizing the vertical interconnection between the wiring lines and the chip. The protective adhesive layer has a second through-hole extending from the top surface to the surface of the wiring lines, realizing the vertical interconnection between the top electrode and the wiring lines. The manufacturing method adopts a design of temporary sapphire support substrate + laser debonding adhesive film. After processing, the substrate is separated and the chip is singled out by laser debonding. The debonded substrate can be recycled. This application solves the pain points of the prior art, such as the substrate not being recyclable, complex process, redundant structure, and high production cost, reduces costs, and improves the electrical reliability, optical performance, and structural stability of the chip, making it suitable for mass production.

Description

Technical Field

[0001] This invention relates to the field of Micro LED display technology, and more specifically to a micro display chip structure and manufacturing method. Background Technology

[0002] Micro LED display technology, with its core advantages such as high brightness, high contrast, low power consumption, long lifespan, and fast response speed, has become the core development direction of next-generation high-definition micro-display technology, and is widely used in AR / VR near-eye displays, automotive displays, industrial monitoring, high-definition large screens, and other scenarios. In the large-scale fabrication of Micro LED integrated chips, three-dimensional integrated packaging is a core process, and its technical solution directly determines the chip's mass production yield, manufacturing cost, and terminal display performance.

[0003] In the prior art, Chinese patent application number 202110506421.1 discloses an LED integrated chip and display device. This solution carries the LED chip on a transparent substrate, sets the first lead and electrode layer on the substrate side, and realizes the fabrication of integrated display chip through three-dimensional packaging technology. To a certain extent, it reduces the requirements of subsequent processes such as mass transfer on yield and uniformity, and reduces maintenance costs. However, this technical solution still has unavoidable core defects: First, the transparent substrate is a fixed component of the chip, and each chip requires one substrate, which cannot be recycled, significantly increasing the raw material cost of the chip, especially in the fabrication of large-size wafers, where the cost of sapphire substrates accounts for a very high proportion; Second, complex processes such as wire patterning, via etching, and multilayer metal deposition are required on a rigid transparent substrate, resulting in a long process flow, high process difficulty, and low production efficiency; Third, the interconnect structure of the chip is redundant, with long conductive paths and high conduction losses, and there is still considerable room for optimization in the electrical reliability and long-term stability of the device; Fourth, without targeted optical optimization design, crosstalk between pixels is prone to occur, and the display contrast is difficult to meet the needs of high-definition micro-display scenarios such as AR / VR.

[0004] At the same time, existing temporary bonding and laser debonding technologies in the semiconductor field are only applicable to the thinning process of MicroLED epitaxial wafers and are only used for temporary support of epitaxial wafers. They cannot be adapted to the entire process of MicroLED integrated chip fabrication. There is no mature technical solution in the field that can deeply integrate temporary substrate technology with the integrated chip stacked interconnect structure, and at the same time achieve substrate recycling, process simplification, and performance optimization.

[0005] Therefore, developing a microdisplay chip structure and manufacturing method that is simple in structure, simplified in process, recyclable in substrate, and has excellent performance is of vital industrial value and technical significance for the large-scale mass production and popularization of Micro LED display technology. Summary of the Invention

[0006] The purpose of this invention is to overcome the aforementioned defects and shortcomings of the prior art and provide a micro-display chip structure and manufacturing method, which addresses four major technical pain points in the prior art: First, the rigid substrate of Micro LED integrated chips cannot be recycled, resulting in high raw material costs; second, the existing three-dimensional integrated chip manufacturing process is complex, has a long process flow, and low production efficiency; third, the existing chip interconnect structure is redundant, has high conduction loss, and insufficient electrical reliability; and fourth, the existing chips have insufficient optical performance optimization, resulting in severe inter-pixel crosstalk and low display contrast.

[0007] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: A microdisplay chip structure includes, from bottom to top, an organic bonding adhesive, a Micro LED chip, an insulating adhesive, wiring lines, a protective adhesive layer, and electrodes. The insulating adhesive covers the organic bonding adhesive and the upper surface of the Micro LED chip. The insulating adhesive has a first through hole extending from its top surface to the surface of the Micro LED chip. The wiring lines form an electrical interconnect with the Micro LED chip through the first through hole. The protective adhesive layer covers the upper surface of the wiring line and the insulating adhesive. The protective adhesive layer has a second through hole extending from its top surface to the surface of the wiring line. The electrode is electrically interconnected with the wiring line through the second through hole.

[0008] In a preferred embodiment, the organic bonding adhesive is an organic transparent material with a thickness of 0.5-15 μm and a light transmittance of ≥95% in the 400-600 nm wavelength band; the material of the organic bonding adhesive is selected from any one of BCB, epoxy resin, silicone, and PMMA.

[0009] In a preferred embodiment, the Micro LED chip is any one, two, or a combination of three of the following: blue Micro LED chip, green Micro LED chip, and red Micro LED chip.

[0010] In a preferred embodiment, the insulating adhesive is a non-transparent insulating material with a thickness greater than that of the Micro LED chip, the thickness difference being 0.5-8 μm; the bottom surface dimension of the first through hole is smaller than that of the corresponding Micro LED chip, the width difference being 1-6 μm, and the aperture of the first through hole gradually increases from the bottom surface to the top surface.

[0011] In a preferred embodiment, the wiring line is a layered metal structure, wherein the bottom and top layers are metal bonding materials, and the middle layer is a conductive material; the metal bonding material is selected from any one of Ti, Cr, and Ni, and the conductive material is selected from any one of Al and Au;

[0012] The electrode has a layered metal structure, with a bottom layer of metal bonding material and a top layer of welding material; the metal bonding material is selected from any one of Ti and Cr, and the welding material is selected from any one of Au, Sn, Ni or their alloys.

[0013] In a preferred embodiment, an organic support adhesive is further laminated on the lower surface of the organic bonding adhesive; the organic support adhesive is an organic transparent material with a thickness of 5-30 μm and a light transmittance of ≥95% in the 400-600 nm wavelength band; the material of the organic support adhesive is selected from any one of BCB, epoxy resin, and CPI.

[0014] In a preferred embodiment, a BM adhesive is further disposed between the organic bonding adhesive and the insulating adhesive. The BM adhesive covers the upper surface of the organic bonding adhesive and avoids the placement area of ​​the Micro LED chip. The BM adhesive is a black light-absorbing organic material with a visible light transmittance ≤2.0% and a reflectance ≤5.0%.

[0015] In addition, this application also proposes a method for manufacturing a microdisplay chip structure, including the following steps: S1. A transparent sapphire support substrate is provided, and a hot-pressed debonding adhesive film is applied to the surface of the transparent sapphire support substrate. S2. Coat the upper surface of the debonding adhesive film with organic bonding adhesive and perform initial curing. Then, transfer the Micro LED chip to the upper surface of the organic bonding adhesive using a mass transfer process to complete the full curing. S3. An insulating layer is formed on the upper surface of the organic bonding adhesive and the Micro LED chip. A first through hole is formed on the insulating layer by photolithography, etching and resist removal processes. The first through hole extends to the surface of the Micro LED chip. S4. Wiring lines are fabricated on the upper surface of the insulating adhesive layer by photolithography, vapor deposition and resist removal processes. The wiring lines are electrically interconnected with the Micro LED chip through the first through hole. S5. A protective adhesive layer is formed on the upper surface of the wiring line and the insulating adhesive layer. A second through hole is formed on the protective adhesive layer by photolithography, etching and adhesive removal processes. The second through hole penetrates to the surface of the wiring line. S6. Electrodes are fabricated on the upper surface of the protective adhesive layer by photolithography, vapor deposition, and resist removal processes. The electrodes are electrically interconnected with the wiring lines through the second through-hole. S7. Etch away the protective adhesive layer, insulating adhesive layer, and organic bonding adhesive around the chip structure to expose the debonding adhesive film; S8. The debonding adhesive film is irradiated with a laser to decompose and complete the debonding, separating the transparent sapphire support substrate to obtain a single microdisplay chip.

[0016] In a preferred embodiment, in step S2, the initial curing temperature of the organic bonding adhesive is 80-120℃, and the curing time is 5-15 min; after the Micro LED chip transfer is completed, a full curing process is adopted, with a curing temperature of 150-200℃ and a curing time of 30-60 min.

[0017] In a preferred embodiment, in step S8, the laser is an ultraviolet pulsed laser with a laser wavelength matching the absorption peak of the debonding adhesive film, a laser energy density of 200-800 mJ / cm², and a scanning path matching the dicing area of ​​the chip.

[0018] Due to the application of the above technical solution, the beneficial effects of this application compared with the prior art are as follows: 1. Significantly reduce raw material costs and achieve 100% substrate recycling: This invention adopts a core design of temporary sapphire support substrate + laser debonding. The sapphire substrate is only used as a temporary support carrier in the process. Laser debonding can achieve non-destructive separation from the chip structure. The separated substrate can be recycled and reused after simple cleaning. The number of cycles can reach more than 20 times without significant performance degradation. This completely solves the pain points of non-recyclable substrates and high raw material costs in the existing technology, and reduces the substrate cost of a single chip by more than 95%.

[0019] 2. Significantly simplifies the manufacturing process and improves production efficiency: This invention adopts a three-layer adhesive stack design of "organic bonding adhesive - insulating adhesive - protective adhesive layer" and a two-level vertical via interconnect structure, which eliminates the complex processes of patterning hard substrates, deep hole etching, and substrate thinning in the prior art. The core process flow is shortened by more than 40%, while the investment threshold of process equipment is reduced, significantly improving mass production efficiency and reducing manufacturing costs.

[0020] 3. Optimize electrical performance and improve device reliability: The vertical interconnect structure of this invention significantly shortens the conductive path from the MicroLED chip electrode to the external welding electrode, significantly reduces series resistance and conduction loss, and improves the chip's luminous efficiency; at the same time, the design of the gradient tapered via greatly improves the step coverage of the metal wiring, reduces the failure risk of interconnect open circuits, and can improve the wafer-level chip yield to over 98%, significantly enhancing the long-term stability of the device.

[0021] 4. Multi-dimensional optical and structural optimization, adaptable to multiple application scenarios: This invention can selectively add BM black matrix adhesive to effectively suppress light crosstalk between adjacent pixels, and the display contrast ratio can be improved to more than 5000:1, which fully meets the high-definition requirements of AR / VR near-eye display; it can also selectively add organic support adhesive to increase the bending modulus of the chip structure by more than 1 times, and significantly enhance the structural rigidity and bending reliability, which can adapt to the application needs of multiple scenarios such as flexible display, automotive, and wearable devices.

[0022] 5. Strong process compatibility, suitable for large-scale mass production: The manufacturing method of this invention adopts mature semiconductor industry processes such as photolithography, etching, evaporation, and mass transfer throughout the entire process, which is fully compatible with existing Micro LED mass production lines and does not require additional special equipment; at the same time, substrate separation and chip individualization are completed in one step through laser debonding, eliminating the traditional laser cutting process, avoiding mechanical damage to the chip structure during the cutting process, further improving product yield, and adapting to the large-scale mass production needs of 6-inch and 8-inch wafers. Attached Figure Description

[0023] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0024] Figure 1 This is a cross-sectional schematic diagram of the microdisplay chip structure described in Embodiment 1 of the present invention; Figure 2 This is a cross-sectional schematic diagram of the microdisplay chip structure described in Embodiment 3 of the present invention; Figure 3 This is a cross-sectional schematic diagram of the microdisplay chip structure described in Embodiment Six of the present invention; Figure 4 This is a flowchart illustrating a method for fabricating a microdisplay chip structure according to the present invention; Figure 5 This is a schematic cross-sectional view of the chip structure in step S1 of the manufacturing method of Embodiment 8 of the present invention; Figure 6 This is a schematic cross-sectional view of the chip structure in step S2 of the manufacturing method of Embodiment 8 of the present invention; Figure 7 This is a schematic cross-sectional view of the chip structure in step S3 of the manufacturing method of Embodiment 8 of the present invention; Figure 8 This is a schematic cross-sectional view of the chip structure in step S4 of the manufacturing method of Embodiment 8 of the present invention; Figure 9 This is a schematic cross-sectional view of the chip structure in step S5 of the manufacturing method of Embodiment 8 of the present invention. Figure 10 This is a schematic cross-sectional view of the chip structure in step S6 of the manufacturing method of Embodiment 8 of the present invention. Figure 11 This is a schematic cross-sectional view of the chip structure in step S7 of the manufacturing method of Embodiment 8 of the present invention; Figure 12 This is a schematic cross-sectional view of the chip structure in step S8 of the manufacturing method of Embodiment 8 of the present invention; Figure 13 This is a schematic cross-sectional view of the chip structure in step S9 of the manufacturing method of Embodiment 8 of the present invention; Figure 14 This is a schematic cross-sectional view of the chip structure in step S10 of the manufacturing method of Embodiment 8 of the present invention; The components are: 1. Sapphire support substrate; 2. Debonding adhesive film; 3. Organic bonding adhesive; 4. Micro LED chip; 5. Isolating and insulating adhesive; 6. Wiring lines; 7. Protective adhesive layer; 8. Electrode; 9. Organic support adhesive; 10. BM adhesive. Detailed Implementation

[0025] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing the invention and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0028] Furthermore, in addition to indicating direction or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in certain situations to indicate a dependency or connection. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0029] Furthermore, the terms "installation," "setup," "equipped with," "connection," "linking," and "socketing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0030] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will be further described in detail below with reference to detailed embodiments, comparative examples, and performance tests. Those skilled in the art will understand that the following embodiments are for illustrative purposes only and should not be considered as limiting the scope of protection of the present invention. Where specific technologies or conditions are not specified in the embodiments, they are performed according to conventional semiconductor process technologies or conditions described in the literature in the field. Materials, reagents, and equipment used, unless otherwise specified, are all conventional products that can be purchased through legitimate channels.

[0031] General testing method description: 1. Light transmittance: The average transmittance of the sample in the 400-600nm visible light band was measured using a UV-Vis spectrophotometer. 2. Display contrast ratio: A high-precision luminance meter is used to test the brightness of the chip's full white and full black screens respectively, and the contrast ratio is calculated. 3. Chip yield: Using a wafer-level probe station, all chips on the 6-inch wafer are electrically powered on and tested. The percentage of chips that are powered on normally and have no leakage is counted. 4. Conduction Loss: The series resistance from the Micro LED chip electrode to the top external electrode is measured using a semiconductor parameter analyzer to characterize the conduction loss. 5. Structural rigidity: The bending modulus of the chip structure is tested using a thin film stress and modulus tester. The higher the bending modulus, the better the structural rigidity. 6. Debonding yield: The percentage of effective chips without structural damage or residue after laser debonding.

[0032] Example 1 Please see Figure 1 This embodiment provides a micro display chip structure, which is a basic structure including the following layers stacked from bottom to top: organic bonding adhesive 3, Micro LED chip 4, insulating adhesive 5, wiring lines 6, protective adhesive layer 7, and electrode 8.

[0033] Organic bonding adhesive 3: Bisphenol A type epoxy resin is selected, with a thickness of 0.5μm and an average transmittance of 96.2% in the 400-600nm wavelength band; Micro LED chip 4: It adopts a full-color pixel array of blue, green and red, with a single pixel size of 10μm×10μm and a pixel pitch of 5μm; Insulating adhesive 5: Black non-transparent phenolic epoxy resin is selected, and its thickness is 0.5μm greater than that of Micro LED chip 4; a circular first through hole is opened, and the bottom surface size of the through hole is 1μm smaller than the corresponding Micro LED chip 4 size. The hole diameter increases linearly from the bottom surface to the top surface, and the cone angle is 15°. Wiring line 6: adopts a Ti / Al / Ti three-layer stacked structure with a total thickness of 800nm, of which the bottom Ti layer is 50nm thick, the middle Al layer is 700nm thick, and the top Ti layer is 50nm thick. It forms an ohmic contact with the Micro LED chip 4 through the first through-hole. Protective adhesive layer 7: PI (polyimide) material is selected, with a thickness of 5μm; a circular second through hole is opened, the bottom surface size of the through hole is 1μm smaller than the corresponding wiring line 6 pad size, the hole diameter increases linearly from the bottom surface to the top surface, and the cone angle is 20°; Electrode 8: It adopts a Cr / AuSn stacked structure, with a bottom Cr thickness of 30nm and a top AuSn eutectic alloy thickness of 3μm. It forms a stable electrical interconnect with wiring line 6 through the second through hole.

[0034] Example 2 This embodiment provides another microdisplay chip structure, which is also the basic structure, and the stacking order is exactly the same as that in Embodiment 1: Organic bonding adhesive 3: PMMA (polymethyl methacrylate) is used, with a thickness of 15μm and an average transmittance of 95.5% in the 400-600nm wavelength band; Micro LED Chip 4: It adopts a blue and green dual-color pixel array, with a single pixel size of 30μm×30μm and a pixel pitch of 10μm, which is suitable for industrial dual-color display scenarios. Insulating adhesive 5: Non-transparent UV-curable acrylic resin is selected, and its thickness is 8μm greater than that of Micro LED chip 4; an elliptical first through hole is opened, and the bottom surface size of the through hole is 6μm smaller than the corresponding Micro LED chip 4 size. The hole diameter gradually increases from the bottom surface to the top surface, and the cone angle is 30°. Wiring line 6: adopts a Cr / Au / Cr three-layer stacked structure with a total thickness of 1.2μm, of which the bottom layer Cr is 80nm thick, the middle Au is 1040nm thick, and the top layer Cr is 80nm thick; Protective adhesive layer 7: BCB (benzocyclobutene) material is selected, with a thickness of 10μm; a diamond-shaped second through hole is opened, the bottom surface size of the through hole is 7μm smaller than the corresponding wiring line 6 pad size, the hole diameter gradually increases from the bottom surface to the top surface, and the cone angle is 25°; Electrode 8: It adopts a Ti / Ni / Au stacked structure, with a Ti layer thickness of 50nm, a Ni layer thickness of 2μm, and an Au layer thickness of 500nm.

[0035] Example 3 In this embodiment, an organic support adhesive 9 is added to the basic structure to enhance the rigidity of the chip structure. This is a rigid-enhanced structure, suitable for high-reliability scenarios such as bending and automotive applications. The structure is as follows: Figure 2 As shown: Organic support adhesive 9: CPI (transparent polyimide) is selected, with a thickness of 18μm and an average transmittance of 95.8% in the 400-600nm wavelength band. It is laminated on the lower surface of organic bonding adhesive 3. Organic bonding adhesive 3: Made of highly transparent silicone, 3μm thick, with an average transmittance of 97.1% in the 400-600nm wavelength band; Micro LED Chip 4: It adopts a blue, green and red three-color pixel array, with a single pixel size of 5μm×5μm and a pixel pitch of 2μm, which is suitable for AR / VR near-eye display scenarios; Insulating adhesive 5: Non-transparent thermosetting epoxy resin is selected, and its thickness is 3μm greater than that of Micro LED chip 4; a circular first through hole is opened, and the bottom surface size of the through hole is 3μm smaller than the corresponding Micro LED chip 4 size, with a cone angle of 20°;

[0036] Wiring line 6, protective adhesive layer 7, electrode 8: The structure is the same as in Example 1, and the graphic size is adjusted according to the preferred parameters.

[0037] Example 4 This embodiment verifies the parameter boundaries of organic support adhesive 9, and the layering order is consistent with that in Example 3: Organic support adhesive 9: Made of BCB material, 5μm thick, with an average transmittance of 96.0% in the 400-600nm wavelength band; Organic bonding adhesive 3: Epoxy resin, 2μm thickness; The remaining structure is completely consistent with that of Example 3, verifying the structural reliability of the thin support adhesive.

[0038] Example 5 This embodiment verifies the upper limit of the parameters of organic support adhesive 9, and the layering order is consistent with that in Embodiment 3: Organic support adhesive 9: Made of modified transparent epoxy resin, 30μm thick, with an average transmittance of 95.2% in the 400-600nm wavelength range; Organic bonding adhesive 3: PMMA is used, with a thickness of 10μm; The remaining structure is completely consistent with Example 3, verifying the optical and rigid properties of the thick support adhesive.

[0039] Example 6 This embodiment adds BM adhesive 10 (black matrix adhesive) to the rigidified structure to suppress inter-pixel optical crosstalk, improve display contrast, and adapt to high-definition micro-display scenarios such as AR / VR. The structure is as follows: Figure 3 As shown: Organic support adhesive 9, organic bonding adhesive 3, and Micro LED chip 4: completely consistent with Example 3; BM Glue 10: An acrylic resin doped with carbon black is laminated between the organic bonding adhesive 3 and the insulating adhesive 5, completely covering the pixel gap area of ​​the organic bonding adhesive 3 and completely avoiding the placement position of the Micro LED chip 4; it has a thickness of 2μm, an average transmittance of 0.8% in the visible light band, and an average reflectance of 3.2%; 5. Insulating adhesive, 6. Wiring lines, 7. Protective adhesive layer, and 8. Electrode: completely consistent with Example 3.

[0040] Example 7 This embodiment targets monochrome display scenarios such as industrial inspection and smart wearables, and uses a single-wavelength Micro LED chip 4, which is a monochrome microdisplay chip structure, as shown in the following details: Organic bonding adhesive 3: Made of BCB material, 5μm thick, with an average transmittance of 96.5% in the 400-600nm wavelength band; Micro LED chip 4: Uses a single blue Micro LED chip 4 with a single pixel size of 20μm×20μm and a pixel pitch of 8μm; 5. Insulating adhesive, 6. Wiring lines, 7. Protective adhesive layer, 8. Electrode: Same as in Example 1, the electrode 8 is adapted to the monochrome chip, and the through hole position and pattern are adjusted.

[0041] Example 8 See Figure 4 This embodiment provides a method for manufacturing a 6-inch wafer-level microdisplay chip, used to prepare the basic structure of Embodiment 1, and further refines the process steps. The structures corresponding to each step are as follows: Figures 5 to 14 As shown, the specific steps are as follows: S1. Substrate Pretreatment: A 6-inch double-sided polished c-side transparent sapphire support substrate 1 was provided. It was ultrasonically cleaned sequentially with acetone, anhydrous ethanol, and deionized water for 10 minutes each, and then dried with high-purity nitrogen. The substrate surface was then activated using ICP plasma at a power of 300W, an oxygen flow rate of 50 sccm, and a treatment time of 5 minutes, resulting in a clean and activated sapphire substrate with the structure shown below. Figure 5 As shown; S2. Hot pressing of debonded adhesive film 2: Using a vacuum hot press, UV laser debonded adhesive film 2 is hot-pressed onto the activated surface of the sapphire support substrate 1. The hot pressing temperature is 100℃, the vacuum degree is ≤10Pa, the pressure is 0.5MPa, the hot pressing time is 10min, and the film thickness is 2μm. The structure is as follows. Figure 6 As shown; S3, Organic Bonding Adhesive 3 Coating and Initial Curing: Epoxy resin organic bonding adhesive 3 was coated onto the surface of the debonded adhesive film 2 using a spin coater at a speed of 3000 rpm for 30 seconds, resulting in a coating thickness of 0.5 μm. After coating, initial curing was performed in an oven at 100℃ for 10 minutes, resulting in the following structure: Figure 7 As shown; S4. Mass Transfer of Micro LED Chips 4: Using a laser mass transfer device, blue, green, and red MicroLED chips 4 are precisely transferred to the surface of organic bonding adhesive 3 with a transfer accuracy of ±0.5μm. After transfer, they are fully cured in an oven at 180℃ for 40 minutes, completing chip fixation. The structure is as follows. Figure 8 As shown; S5. Fabrication of the insulating adhesive layer 5 and the first via: Insulating adhesive layer 5 is coated onto the surfaces of organic bonding adhesive 3 and MicroLED chip 4 using a slot coating process. The coating thickness is 0.5 μm greater than the chip thickness. Preheating at 110℃ for 3 minutes is performed. Photolithography is used to expose and develop the via pattern. Then, ICP dry etching is used to fabricate the first via. The etching gas is a CF4 / O2 mixture. After etching, the photoresist is removed with a resist remover. Curing is completed by preheating at 150℃ for 20 minutes. The structure is as follows: Figure 9 As shown; S6. Fabrication of Wiring Line 6: A wiring pattern is formed on the surface of the insulating adhesive 5 using photolithography. Ti / Al / Ti metal layers are sequentially deposited using magnetron sputtering. Excess metal and photoresist are then removed using a stripping process to form wiring line 6. Wiring line 6 is electrically interconnected with the electrode 8 of the Micro LED chip 4 through the first via. The structure is as follows: Figure 10 As shown; S7, Protective Adhesive Layer 7 and Second Through-Hole Fabrication: A PI protective adhesive layer 7 is coated onto the surfaces of wiring line 6 and insulating adhesive 5 using a spin-coating process at 2500 rpm, with a thickness of 5 μm, and pre-baked at 120℃ for 5 minutes. The second through-hole is fabricated using photolithography and ICP dry etching processes. After etching, the adhesive is removed, and the via is cured at 200℃ for 30 minutes. The structure is as follows. Figure 11 As shown; S8, Top Electrode 8 Fabrication: The electrode 8 pattern is formed using photolithography. A Cr / AuSn metal layer is sequentially deposited using electron beam evaporation. After peeling, the top electrode 8 is formed. The electrode 8 is electrically interconnected with the wiring line 6 through a second via. The structure is as follows: Figure 12 As shown; S9. Edge Etching: Photolithography is used to protect the effective area of ​​the chip. ICP dry etching is used to remove the protective adhesive layer 7, insulating adhesive 5, and organic bonding adhesive 3 around the chip until the unbonding adhesive film 2 is exposed. After adhesive removal, the front-end wafer process is completed, and the structure is as follows. Figure 13 As shown; S10. Laser Debonding and Chip Separation: A 355nm ultraviolet pulsed laser is used to irradiate the debonding film 2 from the back of the sapphire substrate. The laser energy density is 500mJ / cm², the scanning path matches the chip cutting track, the scanning speed is 500mm / s, and the scanning overlap rate is 30%. After laser irradiation, the debonding film 2 undergoes photodecomposition, completing the separation of the sapphire support substrate 1 from the chip structure. The separated sapphire substrate can be recycled after cleaning. After debonding, cleaning and sorting yield a single microdisplay chip, as shown in the figure. Figure 14 As shown.

[0042] Example 9 This embodiment addresses the need for adapting to flexible substrates and high-temperature-sensitive devices by optimizing the low-temperature curing process for preparing the stiffened structure of Example 3. The core steps are adjusted as follows: S3, Organic Bonding Adhesive 3 Coating and Initial Curing: UV-curable organic bonding adhesive 3 is selected, with a spin coating thickness of 3μm. It is cured by 365nm ultraviolet light irradiation with an irradiation energy of 800mJ / cm², without a high-temperature initial curing step. S4. Chip Transfer and Curing: After the mass transfer is completed, a second curing process is carried out using ultraviolet light with an irradiation energy of 1200mJ / cm². There is no high-temperature treatment throughout the process, and the maximum process temperature is ≤120℃. S5, the insulating adhesive 5 is made of UV-curable non-transparent acrylic resin, the pre-baking temperature is 80℃, the curing is carried out by ultraviolet light irradiation, and there is no high-temperature curing step. S7, the protective adhesive layer 7 is made of low-temperature curing PI, with a curing temperature of 150℃ and a curing time of 30min; The remaining steps are completely consistent with those in Example 8, realizing a low-temperature process throughout the entire process, which is suitable for the fabrication requirements of flexible micro-display devices.

[0043] Example 10 This embodiment optimizes process parameters, reduces process damage, and improves product yield. The core steps are adjusted as follows: S5. Fabrication of the first through-hole: A two-step etching process is adopted. The first step uses low-power etching to penetrate the insulating adhesive 5 with an etching power of 200W. The second step uses ultra-low-power over-etching with an etching power of 50W and an over-etching thickness of 50nm to avoid etching damage to the Micro LED chip 4 electrodes 8. The etching damage rate of electrode 8 is ≤0.1%. S10. Laser debonding: A flat-top beam ultraviolet laser with an energy density of 200 mJ / cm² and a scanning overlap rate of 30% is used to avoid damage to the chip structure due to excessive laser energy. The debonding yield is ≥99.5%. The remaining steps are exactly the same as in Example 8, and the final yield of 6-inch wafer-level chips is ≥98%.

[0044] Example 11 This embodiment verifies the feasibility and stability of the sapphire support substrate 1 for repeated use, as detailed below: First-round process: The first-round chip fabrication was completed using the process of Example 8. The separated sapphire support substrate 1 was ultrasonically cleaned with acetone, adhesive remover, and deionized water in sequence to remove residual debonding adhesive and impurities on the surface, and then dried with high-purity nitrogen for later use. Cyclic process: Repeat steps S2-S10 of Example 8 with the cleaned sapphire support substrate 1 to complete 5, 10 and 20 cycles respectively; Test results show that within 20 cycles, the visible light transmittance of the sapphire support substrate 1 changes by ≤0.5%, the surface roughness does not change significantly, the yield of the prepared chips is ≥97%, and the photoelectric performance is not significantly different from that of the first batch of prepared chips, which verifies the long-term stability of substrate recycling.

[0045] Example 12 This embodiment is used to prepare the high-contrast structure of Example 6. Based on Example 8, an additional step of preparing BM adhesive 10 is added: S4. After completing the full curing of Micro LED chip 4, add step S4-1: use spin coating process to coat BM adhesive 10 on organic bonding adhesive 3 and chip surface, spin coating speed 3500rpm, thickness 2μm, pre-baking at 90℃ for 3min; use photolithography process to expose and develop, remove BM adhesive 10 in pixel area, retain BM adhesive 10 in pixel gap, cure at 130℃ for 20min. The subsequent steps S5-S10 are completely consistent with those in Example 8, completing the fabrication of the high-contrast microdisplay chip.

[0046] To further demonstrate the beneficial effects of the present invention, four sets of comparative examples were set up for parallel testing and comparison with the embodiments of the present invention. All tests were completed under the same environment and the same testing equipment.

[0047] Comparative Example 1: Existing technical solution: Using the existing technical solution of application number CN202110506421.1, an LED integrated chip with a fixed transparent substrate is prepared. The structure includes: a fixed sapphire transparent substrate, an LED chip, substrate side leads, and an electrode layer. It adopts a three-dimensional integrated structure, without temporary substrate and laser debonding design, and without the three-layer adhesive layer vertical interconnection structure of the present invention.

[0048] Comparative Example 2: No Gradient Through-Hole Solution Based on the structure of Embodiment 1 of the present invention, only the first through hole and the second through hole are changed to straight holes (the hole diameter is the same from top to bottom, without a gradual tapered design), and the rest of the structure and preparation method are completely the same as Embodiments 1 and 8.

[0049] Comparative Example 3: No Temporary Substrate Scheme Based on the structure of Embodiment 1 of the present invention, the temporary sapphire support substrate 1 and the debonding adhesive film 2 are eliminated, and the organic bonding adhesive 3 is directly coated on the fixed glass substrate. Substrate separation and recycling cannot be achieved. The remaining structure and preparation method are completely consistent with Embodiments 1 and 8.

[0050] Comparative Example 4: Solution 5 without insulating adhesive: Based on the structure of Embodiment 1 of the present invention, the insulating adhesive 5 is eliminated, and the wiring line 6 is directly fabricated on the surface of the organic bonding adhesive 3 and the Micro LED chip 4. The remaining structure and preparation method are completely consistent with Embodiments 1 and 8.

[0051] Performance comparison test results The key performance characteristics of each core embodiment of the present invention and the comparative example were tested in parallel, and the results are shown in the table below: Test Project substrate utilization Total number of process steps Chip yield Display contrast Series resistance (conduction loss) Flexural modulus (structural stiffness) Example 1 100% recyclable 10 steps 98.2% 1200:1 18Ω 2.1 GPa Example 3 100% recyclable 11 steps 97.8% 1250:1 19Ω 4.5GPa Example 6 100% recyclable 12 steps 97.5% 5800:1 19Ω 4.6 GPa Comparative Example 1 0% (fixed) 17 steps 92.3% 1100:1 42Ω 3.2 GPa Comparative Example 2 100% recyclable 10 steps 90.5% 1180:1 35Ω 2.1 GPa Comparative Example 3 0% (fixed) 10 steps 97.9% 1210:1 18Ω 2.2 GPa Comparative Example 4 100% recyclable 9 steps 82.1% 950:1 22Ω 1.8GPa Test Result Analysis: All embodiments of the present invention can achieve 100% recycling of sapphire support substrate 1. Compared with the prior art comparative example 1, the core process steps are reduced by more than 40%, which greatly reduces the cost of raw materials and process. The gradient tapered via design of the present invention significantly improves the step coverage of metal wiring, reduces series resistance and conduction loss, improves chip yield by more than 7%, and effectively reduces the risk of interconnect failure compared to the straight via design of Comparative Example 2. Example 6, which adds BM adhesive 10, improves the display contrast by more than 4 times compared with the existing technology, completely solves the pain point of light crosstalk between pixels, and fully meets the needs of high-definition micro-display scenarios; Examples 3 and 6, which add organic support adhesive 9, show that the flexural modulus is more than doubled compared to the basic structure, the structural rigidity and bending reliability are significantly enhanced, and the application scenarios of the chip are expanded. Compared with Comparative Example 4, the isolation and insulating adhesive 5 design of this invention effectively achieves insulation isolation between adjacent pixels, avoids leakage and crosstalk between pixels, improves chip yield by more than 15%, and significantly optimizes display contrast and long-term device reliability.

[0052] Finally, it should be noted that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A microdisplay chip structure, characterized by, It includes organic bonding adhesive, Micro LED chip, insulating adhesive, wiring lines, protective adhesive layer and electrodes, which are stacked from bottom to top; The insulating adhesive covers the organic bonding adhesive and the upper surface of the Micro LED chip. The insulating adhesive has a first through hole extending from its top surface to the surface of the Micro LED chip. The wiring lines form an electrical interconnect with the Micro LED chip through the first through hole. The protective adhesive layer covers the upper surface of the wiring line and the insulating adhesive. The protective adhesive layer has a second through hole extending from its top surface to the surface of the wiring line. The electrode is electrically interconnected with the wiring line through the second through hole.

2. The microdisplay chip structure of claim 1, wherein, The organic bonding adhesive is an organic transparent material with a thickness of 0.5-15μm and a light transmittance of ≥95% in the 400-600nm wavelength band; the material of the organic bonding adhesive is selected from any one of BCB, epoxy resin, silicone, and PMMA.

3. The microdisplay chip structure of claim 1, wherein, The Micro LED chip is any one, two, or a combination of three of the following: blue Micro LED chip, green Micro LED chip, and red Micro LED chip.

4. The microdisplay chip structure of claim 1, wherein, The insulating adhesive is a non-transparent insulating material with a thickness greater than that of the Micro LED chip, the difference in thickness being 0.5-8 μm; the bottom dimension of the first through hole is smaller than that of the corresponding Micro LED chip, the difference in width being 1-6 μm, and the diameter of the first through hole gradually increases from the bottom to the top.

5. The microdisplay chip structure of claim 1, wherein, The wiring is a layered metal structure, with the bottom and top layers being metal bonding materials and the middle layer being a conductive material. The metal bonding material is selected from any one of Ti, Cr, and Ni, and the conductive material is selected from any one of Al and Au; The electrode has a layered metal structure, with a bottom layer of metal bonding material and a top layer of welding material; the metal bonding material is selected from any one of Ti and Cr, and the welding material is selected from any one of Au, Sn, Ni or their alloys.

6. The microdisplay chip structure of claim 1, wherein, An organic support adhesive is also stacked on the lower surface of the organic bonding adhesive; the organic support adhesive is an organic transparent material with a thickness of 5-30 μm and a light transmittance of ≥95% in the 400-600 nm wavelength band; the material of the organic support adhesive is selected from any one of BCB, epoxy resin, and CPI.

7. The microdisplay chip structure of claim 1, wherein, A BM adhesive is also disposed between the organic bonding adhesive and the insulating adhesive. The BM adhesive covers the upper surface of the organic bonding adhesive and avoids the placement area of ​​the Micro LED chip. The BM adhesive is a black light-absorbing organic material with a visible light transmittance ≤2.0% and a reflectance ≤5.0%.

8. A method of fabricating a microdisplay chip structure, comprising: Includes the following steps: S1. A transparent sapphire support substrate is provided, and a hot-pressed debonding adhesive film is applied to the surface of the transparent sapphire support substrate. S2. Coat the upper surface of the debonding adhesive film with organic bonding adhesive and perform initial curing. Then, transfer the Micro LED chip to the upper surface of the organic bonding adhesive using a mass transfer process to complete the full curing. S3. An insulating layer is formed on the upper surface of the organic bonding adhesive and the Micro LED chip. A first through hole is formed on the insulating layer by photolithography, etching and resist removal processes. The first through hole extends to the surface of the Micro LED chip. S4. Wiring lines are fabricated on the upper surface of the insulating adhesive layer by photolithography, vapor deposition and resist removal processes. The wiring lines are electrically interconnected with the Micro LED chip through the first through hole. S5. A protective adhesive layer is formed on the upper surface of the wiring line and the insulating adhesive layer. A second through hole is formed on the protective adhesive layer by photolithography, etching and adhesive removal processes. The second through hole penetrates to the surface of the wiring line. S6. Electrodes are fabricated on the upper surface of the protective adhesive layer by photolithography, vapor deposition, and resist removal processes. The electrodes are electrically interconnected with the wiring lines through the second through-hole. S7. Etch away the protective adhesive layer, insulating adhesive layer, and organic bonding adhesive around the chip structure to expose the debonding adhesive film; S8. The debonding adhesive film is irradiated with a laser to decompose and complete the debonding, separating the transparent sapphire support substrate to obtain a single microdisplay chip.

9. The method for manufacturing a microdisplay chip according to claim 8, characterized in that, In step S2, the initial curing temperature of the organic bonding adhesive is 80-120℃, and the curing time is 5-15 min. After the Micro LED chip transfer is completed, a full curing process is adopted, with a curing temperature of 150-200℃ and a curing time of 30-60 min.

10. The method for manufacturing a microdisplay chip structure according to claim 8, characterized in that, In step S8, the laser is an ultraviolet pulsed laser with a wavelength matching the absorption peak of the debonding adhesive film, a laser energy density of 200-800 mJ / cm², and a scanning path matching the dicing area of ​​the chip.

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