A multi-channel fault recording data construction method and device

Abstract

The application discloses a kind of multi-channel fault recording data construction method and device, applied to data acquisition system.The method includes: initialization stage divides memory pool;Normal sampling is organized multi-channel signal according to data frame, to construct cycle buffer sequence in units of cycle and store historical data;When detecting fault trigger signal, determine fault starting point according to the position of data frame in buffer sequence, and carry out offset positioning based on preset sampling point number;Extract data before fault based on offset positioning result, and frame by frame migration to target memory block according to sampling rhythm;Continue to collect data after fault and write into target memory block to form complete recording data, send storage and release memory block.The present application avoids high load of processor caused by centralized copy through cycle buffer and frame by frame migration, and guarantees system sampling real-time performance.

Description

Technical Field

[0001] This invention relates to the field of power system data acquisition and processing technology, specifically to a method and apparatus for constructing multi-channel fault recording data. Background Technology

[0002] In power system fault recording and transient signal analysis, it is necessary to record and construct multi-channel sampling data within a certain time range before and after the fault occurs in order to realize fault analysis and source tracing.

[0003] In existing technologies, a continuous buffering method is typically used to store sampled data. After a fault is triggered, historical data is retrieved from the buffer and then concatenated with subsequent sampled data to construct the waveform recording. However, under conditions of high channel count and high sampling rate, this method has gradually revealed several problems: First, in order to ensure that enough data before the failure can be obtained, a large amount of historical data needs to be continuously cached, resulting in a large memory resource consumption. Secondly, when a fault is triggered, it is usually necessary to copy or move the entire historical data, which can lead to a decrease in data building efficiency when the data volume is large. Meanwhile, in multi-channel scenarios, there are often differences between the organization of cached data and the structure of waveform recording data, which makes the data splicing process complex. Furthermore, under high-frequency sampling conditions, large-scale data block copying can easily cause a sudden increase in processor load, thereby affecting the real-time performance of system sampling. On the other hand, traditional data management methods that use dynamic memory allocation are prone to memory fragmentation, which can lead to reduced storage space utilization and affect system operating efficiency. In real-time operating systems, it may also affect system stability due to the inability to obtain contiguous memory blocks.

[0004] Therefore, there is an urgent need for a data construction method that can rapidly construct data before and after a fault while ensuring real-time sampling, and effectively reduce processor load and memory management overhead. Summary of the Invention

[0005] To address the problems of large historical data buffer usage, low data migration efficiency, and difficulty in guaranteeing real-time performance in existing technologies under high channel count and high sampling rate conditions, this invention provides a method for constructing multi-channel fault waveform data. Based on a cycle buffer structure, this method introduces an offset positioning mechanism based on the number of sampling points to determine the fault initiation point. When crossing the ring buffer boundary, it reconstructs the data before the fault using a frame-by-frame migration method according to the sampling rhythm. Simultaneously, it combines independent target memory blocks to achieve continuous splicing of data before and after the fault, thereby completing the rapid construction of waveform data while ensuring real-time sampling.

[0006] A method for constructing multi-channel fault recording data, applied to a data acquisition system, the method comprising: During the system initialization phase, the memory is divided into a memory pool consisting of multiple fixed-size memory blocks; Under normal sampling conditions, the target memory block continuously samples multi-channel signals and organizes the sampled data according to data frames; a cycle buffer sequence is constructed in the memory block in units of cycles to store historical sampled data before the current moment; When a fault trigger signal is detected, the fault start point is determined according to the position of the data frame in the cycle buffer sequence, and the fault start point is offset and located based on a preset number of sampling points; Based on the offset positioning results, the data before the fault is extracted from the cycle buffer sequence and migrated to the target memory block frame by frame according to the sampling rhythm; Continue collecting data frames from the fault initiation point and writing them into the target memory block until waveform data containing post-fault data is formed. When the target memory block is full, it is sent to the storage task as a waveform recording data block, and the target memory block is released and returned to the memory pool after storage is completed.

[0007] As one specific embodiment, the cycle buffer sequence adopts a circular buffer structure, which organizes the multi-channel sampling data according to the cycle unit. Each cycle contains a fixed number of data frames. The circular buffer sequence includes at least P+1 cycles of data, which are used to store historical sampling data before the current sampling time, where P is a preset number of cycles used to obtain data before the fault.

[0008] As one specific embodiment, the offset positioning searches for and locates the fault starting point based on a preset number of sampling points N, so as to determine the starting position that meets the conditions in the cycle buffer sequence.

[0009] As one specific embodiment, the waveform data block includes a timestamp and multi-channel sampling data arranged by channel number, wherein the multi-channel sampling data is arranged in a preset channel order.

[0010] As one specific embodiment, the method is applicable to multi-channel analog sampling systems, including power fault recording systems or low-current grounding line selection systems.

[0011] As one specific embodiment, the length of the data after the fault is set according to the cycle unit to avoid data truncation across cycles and to ensure the integrity of the fault data.

[0012] In one specific embodiment, the waveform recording data block is sent to the storage task through a message queue, and the storage task writes the waveform recording data block to an external storage medium.

[0013] As one specific embodiment, the target memory block is a contiguous or non-contiguous storage space.

[0014] A multi-channel fault recording data construction device, comprising: The memory management module is used to divide the storage into multiple memory blocks and form a memory pool; The data acquisition module is used to continuously sample multi-channel signals and organize them according to data frames; at the same time, it cyclically buffers the data frames in units of cycles to form a cycle buffer sequence. The fault location module is used to determine the fault start point based on the position of the data frame in the cycle buffer sequence when a fault trigger signal is detected, and to offset and locate the fault start point. The waveform construction module is used to migrate the pre-fault data to the target memory block frame by frame according to the sampling rhythm based on the offset positioning result, and continuously collect data frames and write them to the target memory block after the fault initiation point to form a waveform data block. The storage scheduling module is used to send a full target memory block to a storage task and release the target memory block to return it to the memory pool after storage is completed.

[0015] In one specific embodiment, the storage scheduling module implements data transmission through a message queue.

[0016] The advantages and beneficial effects of this invention are as follows: This invention constructs a cycle-based circular cache structure and introduces a sampling point-level offset positioning mechanism to accurately trace back historical data while determining the fault initiation location. Furthermore, it replaces the traditional whole-block data copying with a frame-by-frame migration method according to the sampling rhythm, effectively reducing the instantaneous load impact on the processor during data migration when crossing the circular cache boundary, thereby avoiding the impact on sampling real-time performance. At the same time, it continuously splices data before and after the fault through independent target memory blocks and combines a memory pool management mechanism to realize the recycling of memory resources, thereby improving the efficiency of waveform data construction and enhancing system operation stability under multi-channel, high sampling rate and resource-constrained conditions. Attached Figure Description

[0017] Figure 1 Flowchart for constructing fault waveform data.

[0018] For those skilled in the art, other related figures can be obtained from the above figures without any creative effort. Detailed Implementation

[0019] The various embodiments of the present invention revolve around different aspects such as reading, constructing and controlling multi-channel sampling data. The technical features of each embodiment are functionally related or complementary. Without violating the technical logic, they can be combined, replaced or equivalently transformed to form other embodiments.

[0020] Example 1 This invention provides a method for constructing multi-channel fault recording data, applied to a data acquisition system. The method includes: A memory pool is constructed during the system initialization phase; in one embodiment, the memory pool is managed using fixed-size memory blocks. By dividing the data cache storage into multiple independent memory blocks and releasing and reusing them after data writing is complete, the data caching process does not rely on dynamic memory allocation, thereby avoiding memory fragmentation issues.

[0021] Under normal sampling conditions, multi-channel signals are continuously sampled and organized according to data frames. Simultaneously, a cycle buffer sequence is formed in cycle units and then written to allocated memory blocks. By organizing the buffered data in cycle units, historical data acquires structured temporal attributes, facilitating rapid location of data prior to a fault. The data frame is a structured representation of multi-channel data, including sampling sequence number, time information, and the corresponding sampling data set for each channel. The sampling data set may include one or more sampling points. The waveform recording data is a continuous sequence composed of multiple data frames arranged in chronological order. Through a memory block release and circular reuse mechanism, limited memory resources can continuously support the waveform recording data buffering requirements, thereby achieving long-term continuous waveform recording without increasing hardware resources, improving the overall system resource utilization and operational sustainability.

[0022] In one embodiment, the cycle buffer sequence is divided according to the sampling period corresponding to the power grid frequency, with each cycle containing a fixed number of sampling points. This method structures the sampled data according to the electrical cycle, providing a structural basis for cycle-based fault location and data construction, and avoiding global searches of continuous sampled data, thus improving data location efficiency.

[0023] When a fault trigger signal is detected, the fault start point is determined based on the position of the data frame in the cycle buffer sequence, and offset correction is performed. In one embodiment, the offset correction is calculated backtracking based on a preset number of sampling points. In this way, the delay error of the fault trigger signal can be eliminated, the fault start point can be accurately located, and the effectiveness of the recorded waveform data can be improved.

[0024] The data before the fault is migrated to the target memory block in frame-by-frame order. After the fault initiation point, data frames are continuously acquired and written to the target memory block. By continuously acquiring and writing post-fault data, the waveform data is continuously constructed. The data migration is performed frame-by-frame, that is, the data frames are migrated one by one according to the sampling time order, rather than copying the entire continuous data block at once. This allows the data migration process and the sampling process to be distributed in time, reducing the instantaneous load on the processor and ensuring the real-time performance of the system.

[0025] The filled target memory block is sent as a waveform recording data block to the storage task and released after storage is complete. The target memory block can be a contiguous or non-contiguous storage space. By supporting contiguous or non-contiguous storage of the target memory block, i.e., the target cache area, the data construction method of this invention is not dependent on a specific storage structure, thereby improving system adaptability. By dividing the data construction process into a data acquisition stage and a data writing stage, and performing segmented processing based on the memory block, data writing operations are not concentrated in time, thereby reducing the impact on the sampling process, improving the system stability under high sampling rate conditions, and supporting long-term continuous waveform recording.

[0026] This invention achieves rapid construction of data before and after a fault by constructing a collaborative mechanism of cycle caching, offset positioning, and frame-by-frame migration, while ensuring real-time sampling; it reduces the computational load during data migration and avoids system blockage caused by whole-block copying; it effectively improves the efficiency of fault waveform data construction and system response capability; and it achieves efficient data management under limited memory resources.

[0027] In one embodiment, the target memory block is used to store data from a complete fault waveform recording, including pre-fault data and post-fault data. The data is written sequentially within the memory block in chronological order, forming a structurally complete waveform recording data unit. By confining the construction of the waveform recording data within the target memory block, pre-fault and post-fault data are organized sequentially in the same data carrier, thus avoiding data splicing operations across cache regions and improving data construction efficiency. Simultaneously, through the independent allocation and release mechanism of the memory block, each waveform recording data is spatially isolated, and combined with memory pool reuse, the limited memory resources are continuously utilized, thereby supporting long-term continuous waveform recording under high sampling rates and improving system stability.

[0028] As one embodiment, the data frame is divided into multiple consecutive cycle data blocks according to the sampling period corresponding to the power grid frequency. Each cycle data block contains a fixed number of sampling points. By organizing the multi-channel sampled data according to a unified data frame structure and further dividing it into cycle buffer sequences according to the power grid frequency, the sampled data simultaneously possesses time consistency and periodic structure characteristics. This achieves natural segmentation of data at the structural level, avoiding the problem of unclear data boundaries in traditional continuous buffering, and providing a direct structural index basis for fault location and data construction, thereby improving the efficiency and accuracy of multi-channel data processing and analysis.

[0029] In one embodiment, the system continuously caches data from the most recent P+1 cycles during normal operation. P cycles are used as pre-fault data in case of a fault, and the remaining cycle carries the current sampled data and fault detection. By setting a P+1 cycle cache structure, historical data has a clear time segmentation attribute. This ensures the integrity of pre-fault historical data while allowing the system to balance data integrity and criterion stability during fault detection and data construction. It avoids the loss of critical data due to insufficient cache length, providing redundant data support for fault identification and origin location, thereby improving the reliability of fault identification and the effectiveness of waveform data.

[0030] In one embodiment, under normal operating conditions, the multi-channel signal is sampled at a preset sampling frequency, and each sampling forms a sampling point data, which includes the sampled values ​​of X channels, and can be represented as CH[X].

[0031] The continuous sampling points are organized in chronological order, with each sampling moment corresponding to a set of multi-channel data, thus forming a data frame. Each data frame includes a timestamp and the multi-channel sampling data at the corresponding moment, and its structure can be represented as follows: {Timestamp, CH[X]} Furthermore, according to the cycle corresponding to the power grid frequency, the continuous data frames are divided into cycle data blocks, each cycle data block containing K data frames, thus forming a cycle data structure, which can be represented as: CH[X][K].

[0032] During system operation, P+1 cycles of data are continuously cached to form a cycle cache sequence, the data structure of which can be represented as follows: CH[X][K×(P+1)], Where P is the preset number of cycles used to acquire data before the fault, and a single memory block and a target memory block are used to store a continuous waveform data. The duration of the data that can be recorded is determined by the memory capacity, sampling frequency, number of channels and data bit width.

[0033] After detecting the fault trigger signal, the system continues to collect data for Q cycles and concatenates it with the data in the cycle buffer sequence to form complete fault waveform data, the data structure of which can be represented as follows: CH[X][(P+Q)×K].

[0034] In one embodiment, the target memory block is used to store a complete waveform recording, which includes P cycles of data before the fault and Q cycles of data after the fault. The length of the post-fault data is set in cycles to avoid data truncation across cycles and to ensure the integrity of the fault data. By controlling the length of the post-fault data in cycles, the waveform recording data can cover the entire fault process while avoiding invalid data redundancy, thereby improving storage efficiency while ensuring data integrity and supporting flexible configuration of waveform recording strategies according to different application scenarios.

[0035] The capacity of the target memory block is determined based on the sampling frequency, the number of channels, and the preset number of cycles to ensure that the recorded waveform data can be stored completely.

[0036] In view of the characteristics of strong real-time performance and cycle structure of multi-channel synchronous sampling data in power systems, the system constructs a cyclic buffer structure according to cycle units under normal sampling conditions. Each cycle contains a fixed number of sampling points, and the cyclic buffer is continuously updated by writing pointers to form a cycle buffer sequence containing P+1 cycles, where P is the preset number of cycles used to obtain data before the fault, represents the number of historical cycles, and 1 represents the current sampling cycle.

[0037] like Figure 1 As shown, when a fault trigger signal is detected, based on the monitoring requirements of the fault identification algorithm for N consecutive sampling points, the current sampling position is used as a reference in the cycle buffer sequence, and offset positioning is performed by combining the cycle index and the sampling point offset. That is, the fault starting point is searched and located based on the preset number of sampling points N, so as to determine the starting position that meets the conditions in the cycle buffer sequence, and the fault starting point is located at the Nth sampling point position in the P+1th cycle.

[0038] After determining the fault initiation point, based on its position in the circular buffer, backtrack P complete cycles and the corresponding N sampling point data within the current cycle as the pre-fault data. When crossing the beginning and end boundaries of the circular buffer, migrate the data frame by frame to an independent target memory block according to the sampling rhythm to achieve continuous reconstruction of the pre-fault data.

[0039] By introducing an offset positioning mechanism based on a preset number of sampling points N, the fault initiation point is accurately determined on the basis of a cycle-level buffer structure. This transforms fault positioning from relying solely on trigger signals to backtracking based on historical sampling data, effectively eliminating positioning errors caused by trigger delays or criterion lags. Simultaneously, a dual-layer positioning method using cycle index and sampling point offset improves the positioning accuracy of the fault initiation point within the cycle structure. Furthermore, when there are fluctuations or delays in the trigger signal, the risk of misjudgment is reduced by constraining the range of sampling points. Moreover, when crossing the circular buffer boundary, the data before the fault is reconstructed by migrating frame by frame according to the sampling rhythm. This avoids a sudden increase in processor load caused by large-scale data block copying, thereby ensuring the real-time performance of the sampling process and improving the accuracy and continuity of the recorded waveform data in subsequent analysis.

[0040] Preferably, the frame-by-frame migration is a data migration method that is executed step by step according to the sampling rhythm during the data acquisition process. By replacing the traditional large-scale data copying method with the frame-by-frame migration method, the data construction process is changed from centralized processing to step-by-step processing according to the sampling rhythm, thereby significantly reducing the instantaneous load peak of the processor during the data transfer process, avoiding blocking of real-time sampling tasks, and ensuring the real-time performance and stability of the system even under high channel number and high sampling rate conditions. This technology directly solves the technical problem of data copying affecting real-time performance in the prior art.

[0041] Specifically, the fault waveform recording data block includes timestamps and multi-channel sampled data arranged by channel number. By adopting a unified data structure that includes timestamps and multi-channel sampled data, the data of each channel is logically kept strictly synchronized, and a standardized data organization method is formed, which facilitates subsequent waveform reconstruction, fault analysis and data playback processing, and improves the system's data consistency and scalability.

[0042] As one specific implementation, sending the waveform data block to the storage task includes data transmission via a message queue. The message queue decouples the sampling task (producer) from the storage task (consumer), making the data acquisition and data storage processes independent in execution. This avoids the impact of storage operations on the real-time performance of sampling and allows the queue buffering mechanism to maintain stable system operation during storage rate fluctuations, improving system throughput and resilience to fluctuations.

[0043] This invention, through further refinement of the data organization structure, cache management method, and task scheduling mechanism, achieves synergistic improvements in data consistency, real-time performance, and system stability, thereby enabling long-term continuous waveform recording under conditions of high channels, high sampling rates, and limited memory resources. Specifically, the memory pool construction transforms the continuous storage problem into discrete memory block management, avoiding dynamic memory fragmentation and improving memory utilization efficiency. The data frame, combined with the cycle buffer, achieves a unified data structure, improving data analysis consistency. Furthermore, the introduction of a correction for trigger delay errors enables precise fault location. The use of target memory blocks achieves fast cache allocation, avoiding data overwriting and improving data construction efficiency.

[0044] In one embodiment, the pre-fault data is obtained from the current cycle buffer sequence. When the amount of data in the cycle buffer sequence is less than a preset number of cycles, the range of pre-fault data is determined based on the currently buffered data. The pre-fault data does not depend on completed waveform recording data blocks, thereby avoiding data access across memory blocks.

[0045] In terms of storage implementation, the waveform data is segmented and stored through target memory blocks. Each target memory block is used to store a continuous sequence of data frames. Different memory blocks are logically connected end to end to form complete waveform data.

[0046] In some implementations, the system achieves stable control of the waveform recording process through a dynamic scheduling mechanism based on cache load status. Specifically, the execution priority of the storage task is adaptively adjusted according to the usage status of memory blocks in the memory pool or the number of data blocks to be processed in the message queue: when the amount of cached data reaches a preset threshold, the execution priority of the storage task is increased to speed up data writing; when the cache load decreases to a preset range, the initial priority of the storage task is restored.

[0047] Furthermore, the priority adjustment is triggered based on memory block utilization or the number of remaining memory blocks. When memory resource usage exceeds a set ratio or the number of remaining memory blocks is lower than a threshold, priority is increased. When memory resources recover to a safe range, priority is restored, thereby achieving dynamic response to the system's operating status.

[0048] Based on this, a data buffer structure is constructed through a memory pool and a message queue, enabling a producer-consumer relationship between sampling tasks and storage tasks. The sampling tasks continuously write data to the cache, while the storage tasks asynchronously read and store the data. Through the synergistic effect of the dynamic priority scheduling mechanism and the cache structure, the system maintains a matching processing capacity even when sampling rate and storage rate fluctuate, thereby achieving long-term continuous waveform recording.

[0049] By employing a dynamic priority scheduling mechanism based on cache load status, and combining a data buffer structure built with a memory pool and message queue, an adaptive adjustment relationship is formed between sampling tasks and storage tasks. This allows for dynamic matching of data production and consumption capabilities under varying system load or data processing rate fluctuations, thereby avoiding cache backlog or data loss, reducing task scheduling latency, improving system stability, and enabling long-term continuous waveform recording processing capabilities.

[0050] In some implementations, because the circular cache is organized in a ring structure, the data address exhibits discontinuous jump characteristics when crossing the beginning and end of the cache. Furthermore, in multi-channel acquisition scenarios using multiple analog-to-digital converters, different data sources correspond to multiple discrete address spaces, making DMA-based continuous address transfer methods difficult to adapt to this data structure. Therefore, a frame-by-frame migration method based on the sampling rhythm is adopted to reconstruct historical data, distributing the data migration process across multiple sampling cycles. This avoids sudden increases in processor load caused by large-scale data block copying and ensures the real-time and continuous nature of the sampling process.

[0051] In the target memory block, subsequent sampled data is continuously written from the fault initiation point using a new write pointer, realizing the continuous splicing of data before and after the fault. By decoupling the sampling task from the storage task, the sampling task is responsible for writing and the storage task is responsible for reading, thereby supporting the data acquisition and waveform recording processing of multiple intermittent faults in resource-constrained embedded systems.

[0052] This invention addresses the cycle structure and strong real-time characteristics of multi-channel synchronous sampling data in power systems. Based on a circular cache structure, it introduces an offset positioning mechanism based on the number of sampling points to accurately determine the fault initiation point in both cycle and sampling point dimensions. Furthermore, considering the data reconstruction requirements across the circular cache boundary, it employs a frame-by-frame migration method according to the sampling rhythm to reassemble the data before the fault. This avoids sudden increases in processor load caused by large-scale data block copying while ensuring the sampling process is not blocked, enabling continuous splicing and real-time construction of data before and after the fault. Simultaneously, through a decoupling mechanism between sampling and storage tasks, it improves the system's data processing capabilities and operational stability under multiple intermittent fault scenarios.

[0053] It should be emphasized that the frame-by-frame migration method is not only applicable to the data construction process in this embodiment, but can also be used in combination with waveform control strategies or data management mechanisms in other embodiments. The data management method of memory pool and message queue can be used in conjunction with any of the above data acquisition or waveform construction methods to achieve decoupling of data processing and storage.

[0054] Example 2 This embodiment discloses a multi-channel fault recording data construction device, including: The memory management module is used to divide the storage into multiple memory blocks and form a memory pool; The data acquisition module is used to continuously sample multi-channel signals and organize them according to data frames; at the same time, it cyclically buffers the data frames into memory blocks in units of cycles to form a cycle buffer sequence. The fault location module is used to determine the fault start point based on the position of the data frame in the cycle buffer sequence when a fault trigger signal is detected, and to offset and locate the fault start point. The waveform construction module is used to migrate the pre-fault data to the target memory block frame by frame according to the sampling rhythm based on the offset positioning result, and continuously collect data frames and write them to the target memory block after the fault initiation point to form a waveform data block. The storage scheduling module is used to send a full target memory block to the storage task and release the target memory block after storage is completed. The storage scheduling module uses a message queue to transfer data.

[0055] In one embodiment, the data sampling module continuously samples multi-channel electrical signals and generates data frames according to a preset sampling frequency. Each data frame includes a timestamp and sampled data from multiple channels, with each channel's data acquired synchronously at the same sampling time. The sampling module enables synchronous multi-channel sampling and organizes the data in a unified manner as data frames, ensuring temporal consistency between different channels and improving the accuracy of subsequent data analysis. The continuously generated data frames are divided according to the sampling period corresponding to the power grid frequency. Multiple continuous data frames are combined to form a cycle data block, and a corresponding cycle cache sequence is further constructed and cached in memory. The cycle cache sequence is continuously updated using a sliding window method. By dividing the data by cycle, the sampled data is aligned with the electrical cycle, facilitating fault location and analysis based on the cycle. Simultaneously, the cache sequence ensures the continuous retention of historical data, improving the system's response capability to sudden faults.

[0056] The fault location module, upon detecting a fault trigger signal, determines the fault initiation point based on the position of the current data frame in the cycle buffer sequence. It then corrects the fault initiation point by incorporating a preset number of offset sampling points to obtain a more precise fault location. This combination of location and offset correction improves the accuracy of fault initiation point positioning, enabling the recorded waveform data to more accurately reflect the moment of fault occurrence and the electrical changes before and after it. Simultaneously, upon fault triggering, the pre-fault data in the cycle buffer sequence is migrated frame by frame to the target memory block. This frame-by-frame migration process is executed progressively according to the sampling rhythm during data acquisition. By transforming the previously centralized, large-scale data copying into a distributed data movement, the instantaneous load on the processor is reduced, improving system real-time performance and stability.

[0057] The waveform recording construction module continuously receives data frames generated by the sampling module after the fault initiation point and writes them into the target memory block in chronological order, forming a complete waveform recording data sequence together with the data before the fault. This continuous writing method enables online construction of the waveform recording data, ensuring that the data before and after the fault form a continuous time series within the same memory block, thus guaranteeing the integrity and continuity of the waveform recording data.

[0058] The storage scheduling module marks the target memory block as a waveform recording data block when it is full or reaches a preset waveform recording length, and sends it to the storage task via a message queue. The storage task then writes the data to an external storage medium and releases the memory block for reuse upon completion. The message queue decouples data acquisition and storage tasks, preventing storage operations from blocking the sampling process. Simultaneously, the memory block reuse mechanism improves memory utilization and supports long-term stable system operation.

[0059] In one embodiment, the system sets task priorities during the data acquisition and data writing process, wherein the priority of the data acquisition task is higher than that of the data writing task, in order to ensure the real-time performance of the sampling process.

[0060] In another embodiment, when the system load is high, the sampling data writing operation is performed first to avoid data loss.

[0061] This invention achieves real-time processing of multi-channel sampled data and efficient construction of waveform data through the coordinated operation of a sampling module, a cycle construction module, a fault location module, a data migration module, a data construction module, and a storage scheduling module. By employing a cycle caching and frame-by-frame migration mechanism, the instantaneous computational load of the system is reduced; and by using a memory pool and message queue mechanism, the data acquisition and storage processes are decoupled, thereby improving the system's real-time performance, stability, and resource utilization efficiency. In terms of storage implementation, the waveform data is segmented and stored using target memory blocks. Each target memory block stores a continuous sequence of data frames, and different memory blocks are logically concatenated to form complete waveform data.

[0062] In some implementations, the system includes a cache status monitoring module, a threshold judgment module, and a scheduling control module. The cache status monitoring module is used to obtain the memory block usage in the memory pool or the amount of data to be processed in the message queue in real time. The threshold judgment module judges the cache status according to a preset threshold. The scheduling control module is used to adjust the execution priority of the storage task when the cache status reaches the preset threshold, and restore the execution priority of the storage task when the cache status recovers to the preset range. That is, the execution priority of the storage task is dynamically adjusted according to the judgment result.

[0063] Furthermore, the system also includes a data buffer module composed of a memory pool and a message queue, which is used to cache data generated by sampling tasks and provide data to storage tasks. The sampling task, as a data producer, writes data to the data buffer module, and the storage task, as a data consumer, reads data from the data buffer module. The storage task reads data from the data buffer module, and through the coordinated action of the scheduling control module and the data buffer module, the system can maintain a matching processing capacity when the data generation rate and data processing rate change. The scheduling control module dynamically adjusts the processing relationship between the sampling task and the storage task based on the cache state to maintain a balance in the system's data processing capacity. The cache state includes memory block utilization or the number of remaining memory blocks, and the threshold judgment module triggers priority adjustment based on the utilization rate or the number of remaining blocks. The scheduling control module sets a first threshold and a second threshold, wherein when the cache state exceeds the first threshold, the priority of the storage task is increased, and when the cache state falls below the second threshold, the priority of the storage task is restored.

[0064] By setting up a dynamic scheduling control mechanism that monitors cache status and triggers thresholds, and combining it with a data buffer structure built from memory pools and message queues, the system can adaptively adjust the execution priority of storage tasks based on memory usage or data backlog. This allows for dynamic balancing of data production and consumption when data acquisition and storage processing rates fluctuate, preventing cache backlog or data loss, reducing task scheduling latency, improving system stability, and enabling long-term continuous waveform recording.

[0065] Example 3 Based on Embodiment 1, this embodiment discloses an adaptive long-time waveform recording control procedure, including: When a ground fault is detected, a long-term fault recording is initiated, and the recording start time is recorded. Count the number of grounding occurrences within a preset time window; When the number of grounding events within the time window is once, it is determined to be a short-term grounding fault and long-term waveform recording is stopped; the preset time window is a fixed time length window used to count the number of grounding events.

[0066] When the number of grounding incidents within the time window exceeds one, it is determined to be a continuous grounding fault, and the extended duration is added to the initial recording duration. During subsequent waveform recording, the waveform recording duration is increased by a preset step size for each additional grounding event until the maximum waveform recording time is reached. The waveform recording duration is dynamically adjusted by accumulating the initial duration with the preset step size. Waveform recording stops when the maximum waveform recording time is reached or the fault is cleared.

[0067] In some embodiments, this invention provides an adaptive long-term waveform recording control method for multi-channel real-time sampling scenarios in power systems, applicable to waveform recording processing of intermittent grounding faults or reignition faults under resource-constrained conditions in embedded systems. The system continuously and synchronously acquires multi-channel analog signals and maintains a short-term data buffer during normal operation. During the acquisition process, zero-sequence voltage is monitored in real time through fault detection. In one embodiment, by calculating the amplitude of instantaneous sampling points point by point, a grounding fault is determined to have occurred when the number of sampling points continuously exceeding a threshold value accounts for a preset proportion of the number of sampling points in a single cycle.

[0068] Upon detecting a ground fault, a target memory block is allocated from the memory pool to store the fault waveform data. Simultaneously, the system enters a long-duration waveform recording mode. During recording, the system statistically analyzes grounding events based on a preset time window, where a single ground fault is defined as the complete process from its occurrence to its resolution. It should be noted that the control of the waveform recording duration in this embodiment does not conflict with the inclusion of Q cycles of waveform data after the fault in the aforementioned waveform data. This embodiment adds a dynamic generation judgment of the waveform recording time, and the waveform data in this embodiment naturally also includes P cycles of waveform data before the fault, which will not be elaborated further here.

[0069] Within the specified time window, such as 5 seconds, if the number of grounding incidents is once, it is determined to be a short-term grounding fault, and the system stops recording waveforms for an extended period of time. If the number of grounding incidents is more than once, it is determined to be a continuous grounding fault, and the system adds a preset extension time, such as 2 seconds, to the initial recording duration and continues recording waveforms.

[0070] Furthermore, during subsequent waveform recording, for each additional grounding event, the system increments the waveform recording duration by a preset step size until the set maximum waveform recording time is reached, thereby achieving dynamic adjustment of the waveform recording duration. When the waveform recording duration reaches the maximum waveform recording time or the fault is detected to be cleared, the system terminates waveform recording.

[0071] In one implementation, the waveform data is cached and managed through a memory pool, and data transmission is achieved in conjunction with a message queue. The sampling task acts as a data producer, writing data into the cache, while the storage task acts as a data consumer, reading data from the cache and writing it into an external storage medium. After writing is completed, the memory block is released and returned to the memory pool, thus realizing the recycling of memory resources.

[0072] By employing the above methods, the system can dynamically adjust the waveform recording strategy according to the changes in fault status over time under conditions of multi-channel high-speed sampling and limited storage resources. This enables continuous waveform recording processing of intermittent grounding and multiple reignition faults, while ensuring the real-time performance of the sampling process and the stability of data processing.

[0073] This invention introduces an adaptive control mechanism based on the statistical analysis of grounding counts within a time window. During waveform recording, the recording duration is incrementally adjusted according to the dynamic changes in the fault state. This transforms waveform recording control from a fixed-duration strategy into a dynamic decision-making process related to fault behavior. As a result, while ensuring the rapid termination of waveform recording for short-term faults, continuous tracking and recording of intermittent grounding and reignition faults are achieved. In this way, under the condition of limited storage resources in embedded systems, the relationship between waveform data integrity and storage resource consumption is effectively balanced, improving the system's adaptability to complex fault scenarios and the effectiveness of waveform recording.

[0074] It is important to emphasize that the waveform recording duration control mechanism based on the number of groundings and the time window can be applied independently to the waveform recording control process, or it can be combined with different data caching structures or data construction methods. For example, the cycle caching structure and frame-by-frame migration mechanism in the data construction implementation can be combined with the adaptive waveform recording strategy in different waveform recording control implementations; the waveform recording control implementation can also be combined with different data management methods (such as memory pool management or message queue transmission mechanisms), thereby forming a complete data scheduling and waveform recording scheme in a multi-channel data acquisition system.

[0075] The present invention has been described above by way of example. It should be noted that any simple modifications, alterations or other equivalent substitutions that can be made by those skilled in the art without creative effort without departing from the core of the present invention fall within the protection scope of the present invention.

Claims

1. A method for constructing multi-channel fault recording data, characterized in that, The method, applied to a data acquisition system, includes: During the system initialization phase, the memory is divided into a memory pool consisting of multiple fixed-size memory blocks; Under normal sampling conditions, the target memory block continuously samples multi-channel signals and organizes the sampled data according to data frames; a cycle buffer sequence is constructed in the memory block in units of cycles to store historical sampled data before the current moment; When a fault trigger signal is detected, the fault start point is determined according to the position of the data frame in the cycle buffer sequence, and the fault start point is offset and located based on a preset number of sampling points; Based on the offset positioning results, the data before the fault is extracted from the cycle buffer sequence and migrated to the target memory block frame by frame according to the sampling rhythm; Continue collecting data frames from the fault initiation point and writing them into the target memory block until waveform data containing post-fault data is formed. When the target memory block is full, it is sent to the storage task as a waveform recording data block, and the target memory block is released and returned to the memory pool after storage is completed.

2. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, The cycle buffer sequence adopts a circular buffer structure, which organizes the multi-channel sampled data according to the cycle unit. Each cycle contains a fixed number of data frames. The circular buffer sequence includes at least P+1 cycles of data, which are used to store historical sampled data before the current sampling time, where P is a preset number of cycles used to obtain data before the fault.

3. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, The offset positioning is based on a preset number of sampling points N to search and locate the fault starting point, so as to determine the starting position that meets the conditions in the cycle buffer sequence.

4. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, The waveform data block includes a timestamp and multi-channel sampling data arranged by channel number, and the multi-channel sampling data is arranged in a preset channel order.

5. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, It is suitable for multi-channel analog sampling systems, including power fault recording systems or low-current grounding fault location systems.

6. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, The length of the data after a fault is set according to the cycle unit to avoid data truncation across cycles and to ensure the integrity of the fault data.

7. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, The waveform recording data block is sent to the storage task through a message queue, and the storage task writes the waveform recording data block to an external storage medium.

8. The method for constructing multi-channel fault recording data as described in claim 1, characterized in that, The target memory block can be a contiguous or non-contiguous storage space.

9. A multi-channel fault recording data construction device, characterized in that, include: The memory management module is used to divide the storage into multiple memory blocks and form a memory pool; The data acquisition module is used to continuously sample multi-channel signals and organize them according to data frames; at the same time, it cyclically buffers the data frames in units of cycles to form a cycle buffer sequence. The fault location module is used to determine the fault start point based on the position of the data frame in the cycle buffer sequence when a fault trigger signal is detected, and to offset and locate the fault start point. The waveform construction module is used to migrate the pre-fault data to the target memory block frame by frame according to the sampling rhythm based on the offset positioning result, and continuously collect data frames and write them to the target memory block after the fault initiation point to form a waveform data block. The storage scheduling module is used to send a full target memory block to a storage task and release the target memory block to return it to the memory pool after storage is completed.

10. The multi-channel fault recording data construction device as described in claim 9, characterized in that, The storage scheduling module uses a message queue to transmit data.

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