A high fidelity class ab audio power amplifier

By adopting a new architecture based on a two-stage amplifier and gain bootstrapping technology, the problems of insufficient gain and poor stability of traditional amplifiers when driving small-impedance headphone loads are solved. High linearity and simplified frequency compensation network design are achieved, thus improving the performance of audio amplifiers.

CN122268285APending Publication Date: 2026-06-23FUDAN UNIVERSITY

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
FUDAN UNIVERSITY
Filing Date
2026-03-31
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

Traditional two-stage amplifiers have insufficient gain and poor system stability when driving low-impedance headphone loads, requiring complex frequency compensation networks to maintain high linearity.

Method used

A novel architecture based on a two-stage amplifier is adopted, which combines gain bootstrapping technology and a bias circuit with a floating voltage source. By introducing an auxiliary operational amplifier, the loop gain is improved, nonlinearity is reduced, and the frequency compensation network design is simplified.

Benefits of technology

Maintaining high gain while driving low-resistance headphone loads reduces nonlinearity, simplifies the design of the frequency compensation network, and improves the linearity and stability of the audio amplifier.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122268285A_ABST
    Figure CN122268285A_ABST
Patent Text Reader

Abstract

The application discloses a high-fidelity AB class audio power amplifier. According to an embodiment of the audio power amplifier, the main architecture is a two-stage operational amplifier adopting a gain boosting technology, and according to a circuit topology structure and working principle, the audio power amplifier can be divided into five parts, i.e. an input stage, a gain boosting stage, an output stage, a bias circuit of a floating voltage source and a frequency compensation circuit. By setting the gain boosting stage, the output impedance can be increased without additionally increasing the common-source and common-gate device, and then the gain is increased. The application can make the audio power amplifier keep high gain to reduce nonlinearity when driving a small resistance earphone load, and a complex frequency compensation network is not needed to be designed.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention belongs to the field of consumer electronics audio system design, and specifically relates to an audio power amplifier. Background Technology

[0002] Audio power amplifiers amplify input audio signals in the 20 Hz-20 kHz range, providing sufficient power to drive headphone loads, and are in huge demand in the global consumer electronics market. In 2022, the audio power amplifier market reached $4.12 billion, and is projected to grow to $6.43 billion by 2030. Many portable devices on the market require audio power amplifiers, and supporting high-fidelity (Hi-Fi) audio has become an indispensable feature of modern mobile devices such as smartphones and portable media players. Currently, the audio amplifier market is mainly dominated by two types of products: Class AB audio amplifiers (linear amplifiers) and Class D audio amplifiers (switching amplifiers). Class AB amplifiers have become the preferred solution in the high-fidelity audio field due to their convenient integration, superior sound quality, stronger power supply noise suppression, and avoidance of the electromagnetic interference (EMI) problems common in Class D amplifiers. The linearity of an audio power amplifier is closely related to its loop gain; the higher the loop gain, the better the linearity.

[0003] As device size and supply voltage continue to shrink in nanoscale CMOS technology, the single-stage gain of amplifiers decreases accordingly. Traditional two-stage amplifiers lack sufficient gain when driving small-resistance headphone loads with a typical value of 16Ω, resulting in poor linearity. While multi-stage amplifiers can achieve high gain, system stability gradually decreases with increasing number of stages. Therefore, complex compensation networks are usually required to ensure the stability of multi-stage amplifiers, significantly increasing circuit complexity. Summary of the Invention

[0004] The purpose of this invention is to address the problems pointed out in the background art by proposing a new architecture based on a two-stage amplifier, so that the audio amplifier can maintain high gain to reduce nonlinearity when driving a low-resistance headphone load without designing a complex frequency compensation network.

[0005] According to an embodiment of the present invention, an audio power amplifier is provided, comprising:

[0006] Input level, including:

[0007] The first and second transistors are used to receive differential input signals;

[0008] A first common-source cascode cell is used to connect to the first and second transistors, and includes a first common-source transistor pair consisting of a third and a fifth transistor, and a second common-source transistor pair consisting of a fourth and a sixth transistor, wherein the fifth and sixth transistors are connected in a common-gate configuration.

[0009] The second cascode cell is used to connect to the first cascode cell and includes a third cascode transistor pair consisting of a seventh and a ninth transistor, and a fourth cascode transistor pair consisting of an eighth and a tenth transistor, wherein the seventh and eighth transistors are connected in a common gate configuration.

[0010] Gain booster levels include:

[0011] The first amplifier has its positive input terminal connected between the third and fifth transistors, its negative input terminal connected between the fourth and sixth transistors, and its output terminal connected to the gate of the fourth transistor.

[0012] The second amplifier has its positive input connected between the seventh and ninth transistors, its negative input connected between the eighth and tenth transistors, and its output connected to the gate of the tenth transistor.

[0013] The output stage includes two output power transistors, the thirteenth and fourteenth transistors, which are used to receive voltage signals from the tenth and fourth transistors, respectively, and output the audio power amplifier output voltage signal.

[0014] Optionally, the source of the third transistor is connected to the drain of the fifth transistor, and is connected to the drain of the first transistor and the positive input terminal of the first amplifier; the source of the fourth transistor is connected to the drain of the sixth transistor, and is connected to the drain of the second transistor and the negative input terminal of the first amplifier; the drain of the fourth transistor is connected as output node B to the gate of the fourteenth transistor of the output power transistor.

[0015] Optionally, the source of the ninth transistor is connected to the drain of the seventh transistor and connected to the positive input terminal of the second amplifier; the source of the tenth transistor is connected to the drain of the eighth transistor and connected to the negative input terminal of the second amplifier; the gate of the seventh transistor is connected to the drain of the ninth transistor; and the drain of the tenth transistor is connected to the gate of the thirteenth output power transistor as output node A.

[0016] Optionally, the input stage further includes a floating voltage source composed of an eleventh and a twelfth transistor, wherein the drain of the eleventh transistor and the source of the twelfth transistor are both connected to the output node A, the source of the eleventh transistor and the drain of the twelfth transistor are both connected to the output node B, and the gate of the eleventh transistor and the gate of the twelfth transistor are each connected to a bias voltage.

[0017] Optionally, the audio power amplifier further includes a bias circuit for a floating voltage source, used to provide the bias voltage to the eleventh and twelfth transistors; the bias circuit for the floating voltage source, the floating voltage source, and the output power transistor form a transconductance linear loop.

[0018] Optionally, the bias circuit of the floating voltage source includes the fifteenth to eighteenth transistors, wherein:

[0019] The source of the fifteenth transistor is connected to the gate of the sixteenth transistor, and the gate of the fifteenth transistor is connected to the drain of the sixteenth transistor and the gate of the eleventh transistor.

[0020] The source of the sixteenth transistor is connected to the source of the fourteenth transistor;

[0021] The source of the seventeenth transistor is connected to the gate of the eighteenth transistor, and the gate of the seventeenth transistor is connected to the drain of the eighteenth transistor and the gate of the twelfth transistor.

[0022] The source of the eighteenth transistor is connected to the source of the thirteenth transistor.

[0023] Optionally, transistors 11, 14, 16, and 15 form a transcontinental linear loop, wherein the sum of the gate-source voltages of transistors 11 and 14 is equal to the sum of the gate-source voltages of transistors 16 and 15; and transistors 12, 13, 18, and 17 form another transcontinental linear loop, wherein the sum of the gate-source voltages of transistors 12 and 13 is equal to the sum of the gate-source voltages of transistors 18 and 17.

[0024] Optionally, the quiescent current of the output power transistor can be adjusted by changing the width-to-length ratio of the fourteenth and sixteenth transistors, and / or by changing the width-to-length ratio of the thirteenth and eighteenth transistors.

[0025] Optionally, the bias circuit of the floating voltage source further includes a nineteenth and a twentieth transistor, wherein:

[0026] The source of the nineteenth transistor is connected to the source of the thirteenth transistor, and the gate and drain of the nineteenth transistor are connected and connected to the drain of the fifteenth transistor.

[0027] The source of the twentieth transistor is connected to the source of the fourteenth transistor, and the gate of the twentieth transistor is connected to the drain and then to the drain of the seventeenth transistor.

[0028] Optionally, the audio power amplifier further includes a frequency compensation circuit disposed between the input stage and the output stage.

[0029] This invention is based on a two-stage amplifier architecture and employs gain bootstrapping technology. It introduces an auxiliary operational amplifier to enhance the loop gain of the audio amplifier, enabling the audio amplifier to maintain high gain to reduce nonlinearity when driving a small-resistance headphone load without the need to design a complex frequency compensation network. Attached Figure Description

[0030] Figure 1 A circuit diagram of a Class AB audio power amplifier according to an embodiment of the present invention.

[0031] Figure 2 for Figure 1 The schematic diagram of the gain boosting circuit in the image.

[0032] Figure 3 for Figure 2 The equivalent circuit diagram. Detailed Implementation

[0033] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

[0034] Figure 1 The circuit diagram of the AB class audio power amplifier designed for this invention has a main architecture of a two-stage operational amplifier using gain boosting technology. According to the circuit topology and working principle, it can be divided into the following five core functional unit modules: input stage 10, gain boosting stage, output stage 20, bias circuit of floating voltage source 30, and frequency compensation circuit 40.

[0035] The first to twelfth transistors M1~M12 and resistors R1~R4 constitute the input stage 10 of the audio amplifier. Figure 1 (Represented by a blue box in the image), this input stage 10 receives differential input voltage signals VIN and VIP through differential input pairs M1 and M2, and outputs voltage signals at points A and B. This input stage 10 employs a high-gain folded cascode structure and incorporates a gain boost stage composed of amplifiers A1 and A2. Figure 1 (marked in red in the image) This can effectively increase the output impedance at points A and B, thereby increasing the amplifier's gain and reducing total harmonic distortion.

[0036] like Figure 1As shown, the sources of M1 and M2 are connected to VDD through current source I1, and the gates of M1 and M2 receive input signals VIN and VIP, respectively. The folded cascode structure includes the third to tenth transistors M3 to M10. M3 to M6 form one cascode unit, and M7 to M10 form another cascode unit. Amplifiers A1 and A2, which serve as gain boosting stages, are respectively located in these two cascode units. According to a specific embodiment, the gate of M3 is connected to the bias voltage VBN1, the source is connected to the drain of M5 and the drain of M1 and the positive input terminal of A2, and the drain is connected to the drain of M9; the gate of M4 is connected to the output terminal of A2, the source is connected to the drain of M6 and the drain of M2 and the negative input terminal of A2, and the drain is the output node B; the gate of M5 is connected to the gate of M6 and is connected to the bias voltage VBN2, and the source is connected to VSS through R1; the source of M6 is connected to VSS through R2; the gate of M9 is connected to the bias voltage VBP2, the source is connected to the drain of M7 and the positive input terminal of A1, and the drain is connected to the drain of M3; the gate of M10 is connected to the output terminal of A1, the source is connected to the drain of M8 and the negative input terminal of A1, and the drain is the output node A; the gate of M7 is connected to the gate of M8 and is connected to the drain of M9, and the source is connected to VDD through R3; the source of M8 is connected to VDD through R4. R1, R2, R3, and R4 are source degradation resistors used to reduce the transconductance of the load current mirror transistors M5, M6, M7, and M8, thereby reducing output noise. M11 and M12 are floating voltage sources used to provide bias voltage to the output stage power transistors. The drain of M11 and the source of M12 are both connected to output node A, and the source of M11 and the drain of M12 are both connected to output node B. The floating voltage source structure does not affect the output impedance of the cascode structure, which is equivalent to an AC short circuit.

[0037] Figure 2 This is the circuit schematic of the gain boosting unit composed of amplifier A and common-source transistors M01 and M02. Figure 3 For calculation Figure 2 The circuit diagram shown illustrates the equivalent circuit diagram of the output impedance. The principle of gain enhancement technology is to increase the output impedance without adding additional cascode devices, thereby increasing the gain. Based on the current i and voltages vi and vj in the equivalent circuit diagram... g v s The relationship can be expressed as follows:

[0038]

[0039] Among them, g m1 For the transconductance of M01, r o1 and r o2 Let M01 and M02 be the small-signal equivalent output resistances, respectively, and A be the amplifier gain. The calculation results show that the gain boosting technique will reduce the output impedance R of the cascode structure. out It increased by (1+A) times.

[0040] Similarly, the gain expression for input stage 10 can be easily calculated as follows:

[0041]

[0042] Among them, g m1 g m4 g m6 g m8 g m10 The transconductances of M1, M4, M6, M8, and M10 are respectively, r o4 r o6 r o8 r o10 The small-signal equivalent output resistances of M4, M6, M8, and M10 are respectively, and A1 and A2 are the amplification factors of amplifiers A1 and A2, respectively.

[0043] As can be seen, the high-gain folded cascode structure of the present invention can convert the input voltage signal into a current signal, and then convert it into an amplified voltage signal after passing through a high-impedance node.

[0044] Continue reading Figure 1 Transistors M13 and M14 form output stage 20 (shown in green in the diagram). Its inputs are the voltage signals at points A and B, and its output is the audio power amplifier's output voltage signal VOUT. The audio amplifier designed in this invention drives a small-resistance load with a typical value of 16 Ω. Therefore, the amplifier's output stage needs to provide a sufficiently large current to the load. A Class AB output stage can provide a large dynamic current while consuming relatively little quiescent current, making it suitable as the output stage of an audio amplifier.

[0045] Transistors M15-M20 form a bias circuit 30 for a floating voltage source (shown in orange in the figure). Its inputs are current sources I2-I5, and its outputs are voltages VBN3 and VBP3, which are connected to the gates of M11 and M12. According to a specific embodiment, the gate of M15 is connected to the drain of I2 and VBN3 and M16, its source is connected to the gates of I3 and M16, and its drain is connected to the drain of M19; the source of M16 is connected to the source of M14; the gate of M17 is connected to the drain of I5 and VBP3 and M18, its source is connected to the gates of I4 and M18, and its drain is connected to the drain of M20; the source of M18 is connected to the source of M13; the gate and drain of M19 are connected, and its source is connected to the source of M13; the gate and drain of M20 are connected, and its source is connected to the source of M14.

[0046] The bias circuit 30 of the floating voltage source, together with the floating voltage sources M11 and M12 and the output power transistors M13 and M14, forms a transconducting linear loop. Taking the transconducting linear loop M11, M14, M15, and M16 as an example, the sum of the gate-source voltages of M11 and M14 is equal to the sum of the gate-source voltages of M15 and M16. When designing the width-to-length ratio of the MOSFETs, if the width-to-length ratio of M11 and M15 is matched according to their current, and the width-to-length ratio of M14 and M16 is matched according to their current, then the quiescent current of the output power transistor can be adjusted by changing the ratio of the width-to-length ratio of M14 and M16. The function of M19 is to make the drain voltages of M15 and M11 the same, reducing the influence of the channel length modulation effect and making the quiescent current of the output power transistor more accurate. R5, R6, C1, and C2 form the frequency compensation circuit 40 (shown in purple in the diagram). It employs Miller compensation with a zero-adjustment resistor. Adjusting the values ​​of capacitors C1 and C2 adjusts the position of the dominant pole, while changing the values ​​of resistors R5 and R6 alters the position of the zero point in the left half-plane, increasing the phase margin and ensuring the stability of the entire audio amplifier. RL and CL represent the resistive and capacitive loads driven by the audio amplifier, respectively. A typical value for RL is 16Ω, and CL is usually several hundred pF or higher.

[0047] The design of this invention enables higher linearity in audio power amplifiers: the total harmonic distortion plus noise of the Class AB audio power amplifier based on UMC's 0.25μm BCD process is as low as -84.5dB, while the total harmonic distortion plus noise of existing Class AB audio power amplifiers is around -70dB. The total harmonic distortion plus noise of the audio power amplifier of this invention is about 15dB lower, indicating that the Class AB audio power amplifier designed in this invention can meet the requirements of high-fidelity audio applications.

Claims

1. An audio power amplifier characterized by, include: Input level, including: The first and second transistors are used to receive differential input signals; A first common-source cascode cell is used to connect to the first and second transistors, and includes a first common-source transistor pair consisting of a third and a fifth transistor, and a second common-source transistor pair consisting of a fourth and a sixth transistor, wherein the fifth and sixth transistors are connected in a common-gate configuration. The second cascode cell is used to connect to the first cascode cell and includes a third cascode transistor pair consisting of a seventh and a ninth transistor, and a fourth cascode transistor pair consisting of an eighth and a tenth transistor, wherein the seventh and eighth transistors are connected in a common gate configuration. Gain booster levels include: The first amplifier has its positive input terminal connected between the third and fifth transistors, its negative input terminal connected between the fourth and sixth transistors, and its output terminal connected to the gate of the fourth transistor. The second amplifier has its positive input connected between the seventh and ninth transistors, its negative input connected between the eighth and tenth transistors, and its output connected to the gate of the tenth transistor. The output stage includes two output power transistors, the thirteenth and fourteenth transistors, which are used to receive voltage signals from the tenth and fourth transistors, respectively, and output the audio power amplifier output voltage signal.

2. The audio power amplifier of claim 1, wherein, The source of the third transistor is connected to the drain of the fifth transistor, and is connected to the drain of the first transistor and the positive input terminal of the first amplifier; the source of the fourth transistor is connected to the drain of the sixth transistor, and is connected to the drain of the second transistor and the negative input terminal of the first amplifier; the drain of the fourth transistor is connected as output node B to the gate of the fourteenth transistor of the output power transistor.

3. The audio power amplifier as described in claim 2, characterized in that, The source of the ninth transistor is connected to the drain of the seventh transistor and is connected to the positive input terminal of the second amplifier; the source of the tenth transistor is connected to the drain of the eighth transistor and is connected to the negative input terminal of the second amplifier; the gate of the seventh transistor is connected to the drain of the ninth transistor; the drain of the tenth transistor is connected to the gate of the thirteenth output power transistor as output node A.

4. The audio power amplifier as described in claim 3, characterized in that, The input stage further includes a floating voltage source composed of an eleventh and a twelfth transistor, wherein the drain of the eleventh transistor and the source of the twelfth transistor are both connected to the output node A, the source of the eleventh transistor and the drain of the twelfth transistor are both connected to the output node B, and the gate of the eleventh transistor and the gate of the twelfth transistor are each connected to a bias voltage.

5. The audio power amplifier as described in claim 4, characterized in that, The audio power amplifier also includes a bias circuit for a floating voltage source, used to provide the bias voltage to the eleventh and twelfth transistors; the bias circuit for the floating voltage source, the floating voltage source, and the output power transistor form a transconductance linear loop.

6. The audio power amplifier as described in claim 5, characterized in that, The bias circuit of the floating voltage source includes transistors fifteen through eighteen, wherein: The source of the fifteenth transistor is connected to the gate of the sixteenth transistor, and the gate of the fifteenth transistor is connected to the drain of the sixteenth transistor and the gate of the eleventh transistor. The source of the sixteenth transistor is connected to the source of the fourteenth transistor; The source of the seventeenth transistor is connected to the gate of the eighteenth transistor, and the gate of the seventeenth transistor is connected to the drain of the eighteenth transistor and the gate of the twelfth transistor. The source of the eighteenth transistor is connected to the source of the thirteenth transistor.

7. The audio power amplifier as described in claim 6, characterized in that, Transistors 11, 14, 16, and 15 form a transcontinental linear loop, and the sum of the gate-source voltages of transistors 11 and 14 is equal to the sum of the gate-source voltages of transistors 16 and 15. Transistors 12, 13, 18, and 17 form another transcontinental linear loop, and the sum of the gate-source voltages of transistors 12 and 13 is equal to the sum of the gate-source voltages of transistors 18 and 17.

8. The audio power amplifier as described in claim 7, characterized in that, The quiescent current of the output power transistor is adjusted by changing the width-to-length ratio of the fourteenth and sixteenth transistors, and / or by changing the width-to-length ratio of the thirteenth and eighteenth transistors.

9. The audio power amplifier as described in claim 6, characterized in that, The bias circuit of the floating voltage source also includes the nineteenth and twentieth transistors, wherein: The source of the nineteenth transistor is connected to the source of the thirteenth transistor, and the gate and drain of the nineteenth transistor are connected and connected to the drain of the fifteenth transistor. The source of the twentieth transistor is connected to the source of the fourteenth transistor, and the gate of the twentieth transistor is connected to the drain and then to the drain of the seventeenth transistor.

10. The audio power amplifier as claimed in claim 1, characterized in that, The audio power amplifier also includes a frequency compensation circuit disposed between the input stage and the output stage.