amplifier circuit

Abstract

An amplifier circuit is provided. The amplifier circuit includes a first transimpedance amplifier and a first transconductance amplifier. The first transimpedance amplifier is to receive a first input signal. A first input of the first transconductance amplifier is coupled to a first output of the first transimpedance amplifier. The first transconductance amplifier includes a first passive feedback structure and a first active feedback structure. The first passive feedback structure includes a first resistor coupled between the first output of the first transimpedance amplifier and the first input of the first transimpedance amplifier. The first active feedback structure includes a first inverter having an output coupled to the first input of the first transimpedance amplifier. This configuration optimizes the gain-bandwidth product and stability of the amplifier circuit.

Description

Technical Field

[0001] This disclosure relates to an amplifier circuit, and more particularly to an amplifier circuit with a feedback architecture. Background Technology

[0002] A transimpedance amplifier (TIA) is a current-to-voltage converter. Specifically, a TIA converts an input current signal into an output voltage signal. The gain of a TIA is related to its feedback architecture. TIA feedback architectures include active feedback architectures using active components and passive feedback architectures using passive components. Active feedback architectures help improve the gain-bandwidth product (GBP) of the TIA, but they are detrimental to the stability of the TIA. Passive feedback architectures offer better stability than active feedback architectures; however, due to the loading effect, it is difficult to improve the gain-bandwidth product in passive feedback architectures. To improve the gain-bandwidth product of a passive feedback architecture TIA, a large inductor is required, resulting in poor area utilization efficiency. Summary of the Invention

[0003] This disclosure provides an amplifier circuit including a first transconductance amplifier and a first transimpedance amplifier. The first transconductance amplifier is used to receive a first input signal. A first input terminal of the first transimpedance amplifier is coupled to a first output terminal of the first transconductance amplifier. The first transimpedance amplifier includes a first passive feedback structure and a first active feedback structure. The first passive feedback structure includes a first resistor coupled between the first output terminal and the first input terminal of the first transimpedance amplifier. The first active feedback structure includes a first inverter, the output terminal of which is coupled to the first input terminal of the first transimpedance amplifier.

[0004] This disclosure provides an amplifier circuit including a first transconductance amplifier and a first transimpedance amplifier. The first transconductance amplifier has a first input terminal and a second input terminal for receiving a first input signal and a second input signal, respectively, wherein the first and second input signals are a differential signal pair. The first transconductance amplifier further has a first output terminal and a second output terminal for generating a first output signal and a second output signal corresponding to the first and second input signals, respectively. The first transimpedance amplifier includes a first inverter, a first resistor, and a second inverter. The input terminal of the first inverter is coupled to the first output terminal of the first transconductance amplifier. The first resistor is coupled between the input terminal and the output terminal of the first inverter. The input terminal of the second inverter is coupled to the output terminal of the first inverter, and the output terminal of the second inverter is coupled to the second output terminal of the first transconductance amplifier. Attached Figure Description

[0005] An embodiment of this application will be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, according to standard industry practice, the features are not drawn to scale. In fact, the dimensions of the features may be increased or decreased arbitrarily for clarity of explanation.

[0006] Figure 1 This is a schematic diagram of a circuit according to some embodiments of the present disclosure;

[0007] Figure 2 Based on some embodiments of this disclosure Figure 1 A schematic diagram of the circuit configuration;

[0008] Figure 3 Based on some embodiments of this disclosure Figure 2 A schematic diagram of the circuit configuration;

[0009] Figure 4 Based on some embodiments of this disclosure Figure 3 A schematic diagram of the circuit configuration;

[0010] Figure 5 Based on some embodiments of this disclosure Figures 1 to 4 A schematic diagram of the circuit configuration; and

[0011] Figure 6 Based on some embodiments of this disclosure Figures 1 to 5 A schematic diagram of the circuit configuration.

[0012] [Symbol Explanation]

[0013] 10: Circuit

[0014] 100: Circuit

[0015] 110: Transconductance Amplifier Circuit

[0016] 111: Inverter

[0017] 112: Inverter

[0018] 120: Transimpedance Amplifier Circuit

[0019] 121: Inverter

[0020] 122: Inverter

[0021] 123: Inverter

[0022] 124: Inverter

[0023] 130: Circuit

[0024] 130a: Circuit

[0025] 130b: Circuit

[0026] 20: Circuit

[0027] 201: Amplifier

[0028] 202: Inverter

[0029] 203: Inverter

[0030] 30: Circuit

[0031] 301: Amplifier

[0032] 302: Inverter

[0033] 303: Inverter

[0034] 40: Circuit

[0035] C1: Capacitor

[0036] C2: Capacitor

[0037] C3: Capacitor

[0038] GND: Earth

[0039] I1: Input terminal

[0040] I2: Input terminal

[0041] L1: Inductor

[0042] L2: Inductor

[0043] L3: Inductor

[0044] L4: Inductor

[0045] N1: Node

[0046] N2: Node

[0047] N3: Node

[0048] N4: Node

[0049] O1: Output terminal

[0050] O2: Output terminal

[0051] R1: Resistor

[0052] R2: Resistor

[0053] R3: Resistor

[0054] R4: Resistor

[0055] R5: Resistor

[0056] R6: Resistor

[0057] R7: Resistor

[0058] VCMP: Voltage signal

[0059] VCMN: Voltage signal

[0060] VIP: Voltage signal

[0061] VIN: Voltage signal

[0062] VOP: Voltage signal

[0063] VOPCM: Voltage signal

[0064] VOPMM: Voltage signal

[0065] VON: Voltage signal

[0066] VONCM: Voltage signal

[0067] VONMM: Voltage signal

[0068] VREF: Reference Voltage Detailed Implementation

[0069] The following disclosure provides many different embodiments or examples for implementing various features of the provided object. Specific examples of elements and arrangements described below are used to simplify one embodiment of this application. Of course, these are merely examples and are not intended to be limiting.

[0070] refer to Figure 1 , Figure 1 This is a schematic diagram of a circuit 10 according to some embodiments of the present disclosure. In some embodiments, circuit 10 is an integrated circuit (IC). In application, circuit 10 is an amplifier circuit. In some embodiments, circuit 10 is a differential amplifier circuit. In some embodiments, circuit 10 is a differential voltage amplifier circuit.

[0071] like Figure 1As shown, circuit 10 has input terminal I1 and input terminal I2, which are used to receive voltage signal VIP and voltage signal VIN, respectively. In some embodiments, voltage signal VIP and voltage signal VIN are a pair of differential signals. In some embodiments, input terminal I1 is the positive input terminal of circuit 10, which functions as an amplifier, and input terminal I2 is the negative input terminal of circuit 10, which functions as an amplifier.

[0072] Circuit 10 has output terminals O1 and O2, which are used to output voltage signal VOP and voltage signal VON, respectively. In some embodiments, circuit 10 amplifies voltage signal VIP and voltage signal VIN to generate a pair of differential signals, namely voltage signal VOP and voltage signal VON.

[0073] In some embodiments, output terminal O1 is the positive output terminal of circuit 10, which serves as an amplifier, and input terminal O2 is the negative output terminal of circuit 10, which serves as an amplifier.

[0074] In some embodiments, circuit 10 includes at least one stage of amplifier circuit 100. For example... Figure 1 In one embodiment, the first-stage amplifier circuit 100 includes a transconductance amplifier circuit 110 and a transimpedance amplifier circuit 120. The transconductance amplifier circuit 110 is coupled between the input terminals I1 and I2 and the transimpedance amplifier circuit 120. The transimpedance amplifier circuit 120 is coupled between the output terminals O1 and O2 and the transconductance amplifier circuit 110.

[0075] In some embodiments, the transconductance amplifier circuit 110 is used to generate a current signal based on the input voltage signals VIP and VIN. The transconductance amplifier circuit 110 is a device that converts an input voltage signal into an output current signal, and its gain is expressed as the ratio of the supply current to the input voltage.

[0076] The transimpedance amplifier circuit 120 receives the current signal generated by the transconductance amplifier circuit 110 and generates output voltage signals VOP and VON based on the current signal. The transimpedance amplifier circuit 120 is a circuit that converts a current signal into a voltage signal, and its gain is related to its feedback architecture. In some embodiments, an active feedback architecture using only active elements in the transimpedance amplifier circuit 120 helps improve the gain-bandwidth product (GBP), but is detrimental to stability. In some embodiments, a passive feedback architecture using only passive elements in the transimpedance amplifier circuit 120 provides better stability, but the gain-bandwidth product is difficult to improve, requiring a larger inductor and thus reducing area efficiency.

[0077] In some embodiments, the transimpedance amplifier circuit 120 of the amplifier circuit 100 combines the advantages of active and passive feedback architectures, achieving a balance in gain, bandwidth, and stability to adapt to different application requirements. Details regarding the active and passive feedback architectures will be further described in subsequent embodiments.

[0078] In some embodiments, the gain of amplifier circuit 100 is equal to the product of the gain of transconductance amplifier circuit 110 and the gain of transimpedance amplifier circuit 120.

[0079] In some embodiments, the transconductance amplifier circuit 110 includes an inverter 111 and an inverter 112. The transconductance amplifier circuit 110 is used to generate current signals based on the input voltage signals VIP and VIN, respectively. The input and output terminals of inverter 111 are coupled to input terminal I1 and node N1, respectively. The input and output terminals of inverter 112 are coupled to input terminal I2 and node N2, respectively. The output current of inverter 111 inverts the voltage at node N1 compared to the input voltage signal VIP and is further amplified by the gain of inverter 111. The output current of inverter 112 inverts the voltage at node N2 compared to the input voltage signal VIN and is further amplified by the gain of inverter 111.

[0080] In some embodiments, the transimpedance amplifier circuit 120 includes inverters 121, 122, 123, and 124, resistors R1 and R2. Inverters 122 and 123 serve as two gain amplifiers in the transimpedance amplifier circuit 120.

[0081] Inverter 121 is used as the active feedback structure of one of the gain amplifiers (i.e., inverter 122), and resistor R1 is used as the passive feedback structure of this gain amplifier (i.e., inverter 122).

[0082] Inverter 124 is used as the active feedback structure for another gain amplifier (i.e., inverter 123). Resistor R2 is used as the passive feedback structure for this gain amplifier (i.e., inverter 123).

[0083] The input and output terminals of inverter 122 are coupled to node N1 and output terminal O1, respectively. The input and output terminals of inverter 123 are coupled to node N2 and output terminal O2, respectively. The input and output terminals of inverter 121 are coupled to output terminal O1 and node N2, respectively. The input and output terminals of inverter 124 are coupled to output terminal O2 and node N1, respectively.

[0084] Resistor R1 is coupled between node N1 and output terminal O1. Resistor R2 is coupled between node N2 and output terminal O2. Resistor R1 is used to feed back the output signal of inverter 122 to the input terminal of inverter 122. Resistor R1 itself is a passive component and can realize the passive feedback function of the signal of inverter 122.

[0085] Inverter 124 is used to feed back the output signal of inverter 123 to the input terminal of inverter 122. Inverter 124 itself is an active element and can realize active feedback function.

[0086] Specifically, resistor R1 and inverter 124 are used to provide a positive feedback signal to suppress voltage changes at node N1 and further maintain voltage stability at output terminal O1.

[0087] Similarly, resistor R2 is used to feed back the output signal of inverter 123 to the input terminal of inverter 123. Resistor R2 itself is a passive component that can realize the passive feedback function of the signal of inverter 123.

[0088] Inverter 121 is used to feed back the output signal of inverter 122 to the input terminal of inverter 123. Inverter 121 itself is an active element and can realize active feedback function.

[0089] Specifically, resistor R2 and inverter 121 are used to implement the function of feedback negative signal to suppress voltage changes at node N2 and further maintain voltage stability at output terminal O2 (e.g., maintain the output -8V voltage signal VON).

[0090] According to some embodiments of this disclosure, the gain of the transimpedance amplifier circuit 120 is based on the transconductance values ​​of the transistors in inverters 121 and 124 and the resistance values ​​of resistors R1 and R2.

[0091] Based on the above embodiments, the transimpedance amplifier circuit 120 includes two main gain amplifiers (i.e., inverters 122 and 123). Each gain amplifier has both an active feedback structure and a passive feedback structure to stabilize the output signals of the two gain amplifiers. In this way, the transimpedance amplifier circuit 120 of the amplifier circuit 100 combines the advantages of active and passive feedback architectures, achieving a balance in gain, bandwidth, and stability to adapt to different application requirements.

[0092] In some embodiments, circuit 10 has a symmetrical structure. Specifically, inverters 111 and 112 are configured identically, inverters 122 and 123 are configured identically, inverters 121 and 124 are configured identically, and resistors R1 and R2 are configured identically. For example, inverters 111 and 112 have the same gain, inverters 122 and 123 have the same gain, inverters 121 and 124 have the same gain, and resistors R1 and R2 have the same resistance value.

[0093] refer to Figure 2 , Figure 2 Based on some embodiments of this disclosure Figure 1 A schematic diagram of circuit 20 configured with circuit 10. Relative to... Figure 1 In the embodiments described, for ease of understanding, Figure 2 Similar components are identified by the same reference number. For the sake of brevity, the specific operations of similar components, which have been discussed in detail in the preceding paragraphs, are omitted in this paper.

[0094] Figure 1 Circuit 10 and Figure 2 The difference in circuit 20 is that circuit 20 also includes circuit 130. For example... Figure 2 As shown, circuit 130 is used to feed back the signals from output terminals O1 and O2 to nodes N1 and N2 to adjust the voltages of nodes N1 and N2. In some embodiments, circuit 130 adjusts VOP and VON through the above feedback to reduce the common-mode noise and / or differential-mode noise of VOP and VON.

[0095] refer to Figure 3 , Figure 3 Based on some embodiments of this disclosure Figure 2 A schematic diagram of circuit 130a configured with circuit 130. Relative to... Figures 1 to 2 In the embodiments described, for ease of understanding, Figure 3 Similar components are identified by the same reference number.

[0096] like Figure 3As shown, circuit 130a is a differential feedback circuit that samples O1 and O2, amplifies them, and feeds them back to N1 and N2 to reduce the differential noise of VOP and VON. Circuit 130a includes resistors R3 and R4, capacitors C1 and C2, amplifier 201, inverter 202, and inverter 203.

[0097] In some embodiments, amplifier 201 is an operational amplifier (OP). In some embodiments, amplifier 201 is a fully differential amplifier.

[0098] Specifically, resistor R3 is coupled between output terminal O1 and node N3. Capacitor C1 is coupled between node N3 and ground GND. Resistor R4 is coupled between output terminal O2 and node N4. Capacitor C2 is coupled between node N4 and ground GND.

[0099] Node N3 is coupled to the positive input terminal of amplifier 201, and node N4 is coupled to the negative input terminal of amplifier 201.

[0100] The positive output terminal of amplifier 201 is coupled to the input terminal of inverter 202, and the negative output terminal of amplifier 201 is coupled to the input terminal of inverter 203.

[0101] The output of inverter 202 is coupled to node N1, and the output of inverter 203 is coupled to node N2.

[0102] In some embodiments, resistors R3 and R4 are configured identically, capacitors C1 and C2 are configured identically, and inverters 202 and 203 are configured identically. For example, resistors R3 and R4 have the same resistance value, capacitors C1 and C2 have the same capacitance value, and inverters 202 and 203 have the same components.

[0103] In operation, resistor R3 and capacitor C1 form a filter circuit to filter the voltage signal VOP at the output terminal O1 to generate a voltage signal VCMP, which is the average value of the voltage signal VOP. Similarly, resistor R4 and capacitor C2 form a filter circuit to filter the voltage signal VON at the output terminal O2 to generate a voltage signal VCMN, which is the average value of the voltage signal VON.

[0104] Amplifier 201 detects the voltage difference between voltage signals VCMP and VCMN, and generates a differential signal pair at the positive and negative output terminals of amplifier 201 based on this voltage difference. Inverters 202 and 203 generate an output differential signal pair (i.e., voltage signals VOPMM and VONMM) that are inverted from this differential signal pair.

[0105] Amplifier 201 outputs voltage signals VOPMM and VONMM to nodes N1 and N2 respectively as differential compensation signals for circuit 10.

[0106] refer to Figure 4 , Figure 4 Based on some embodiments disclosed herein Figure 3 A schematic diagram of circuit 130b configured with circuit 130a. Relative to... Figures 1 to 3 In the embodiments described, for ease of understanding, Figure 4 Similar components are identified by the same reference number.

[0107] Compared to Figure 3 Circuit 130a, Figure 4 Circuit 130b also includes components constituting a differential feedback circuit (resistors R3 and R4, capacitors C1 and C2, amplifier 201, inverter 202, and inverter 203). Compared to Figure 3 Circuits 130a and 130b also include resistors R5, R6, and R7, capacitor C3, amplifier 301, inverter 302, and inverter 303, which are used as a common-mode feedback circuit. That is, circuit 130b samples O1 and O2, amplifies them, and feeds them back to N1 and N2 to reduce the common-mode noise of VOP and VON.

[0108] For the purposes of this description, resistor R5 is coupled between node N3 and the negative input terminal of amplifier 301, and resistor R6 is coupled between node N4 and the negative input terminal of amplifier 301.

[0109] Resistor R7 is coupled between the reference voltage VREF and the positive input terminal of amplifier 301.

[0110] Capacitor C3 is coupled between the positive input terminal of amplifier 301 and ground GND.

[0111] The output of amplifier 301 is coupled to the input of inverters 302 and 303.

[0112] The output of inverter 302 is coupled to node N1, and the output of inverter 303 is coupled to node N2.

[0113] In some embodiments, resistors R5 and R6 are configured identically, as are inverters 302 and 303. For example, resistors R5 and R6 have the same resistance value, and inverters 302 and 303 have the same components.

[0114] According to some embodiments, resistors R5 and R6 receive voltage signals VCMP and VCMN respectively, and are used to generate a voltage signal at the negative input terminal of amplifier 301 that is the average value of the corresponding voltage signals VCMP and VCMN.

[0115] Resistor R7 and capacitor C3 are used to form a filter circuit to filter the reference voltage VREF and generate a filtered signal at the positive input of amplifier 301.

[0116] In some embodiments, amplifier 301 is a single-ended output operational amplifier. In some embodiments, amplifier 301 generates an output voltage signal by subtracting the voltage value at the negative input terminal from the voltage value at the positive input terminal.

[0117] Inverters 302 and 303 receive the voltage signal output from amplifier 301 and generate voltage signals VOPCM and VONCM, which are inverted from this voltage signal, to nodes N1 and N2 as common-mode compensation signals for circuit 10. According to some embodiments, the voltage values ​​of voltage signals VOPCM and VONCM are equal to each other.

[0118] refer to Figures 1 to 5 , Figure 5 Based on some embodiments of this disclosure Figures 1 to 4 A schematic diagram of circuit 30 configured with circuits 10 and 20. Relative to... Figures 1 to 4 In the embodiments described, for ease of understanding, Figure 5 Similar components are identified by the same reference number.

[0119] Compared to Figures 1 to 4 Circuits 10 and 20, Figure 5 The circuit 30 includes multiple circuits 100. These circuits 100 form a multi-stage amplifier circuit. In some embodiments, the gain of the circuit 30 is equal to the product of the gains of these circuits 100. For simplicity, in Figure 5 The components of circuit 100 other than the first stage are omitted.

[0120] like Figure 5 As shown, multiple circuits 100 of circuit 30 are connected in series and coupled. Specifically, the input terminals I1 and I2 of the first-stage circuit 100 receive voltage signals VIP and VIN.

[0121] The input terminals I1 and I2 of the second-stage circuit 100 are coupled to the output terminals O1 and O2 of the previous-stage circuit 100, respectively. The output terminals O1 and O2 of the second-stage circuit 100 are coupled to the input terminals I1 and I2 of the third-stage circuit 100, respectively, and so on.

[0122] Next, the output terminals O1 and O2 of the last stage circuit 100 generate voltage signals VOP and VON, respectively.

[0123] In some embodiments, circuit 30 further includes Figures 3 to 4 The circuits shown are 130a or 130b. In circuit 130a or 130b of circuit 30, resistors R3 and R4 are coupled to the output terminals O1 and O2 of the last stage circuit 100, respectively, and the output terminals of inverters 202 and 203 are coupled to nodes N1 and N2 of the first stage circuit 100, respectively. In circuit 130b of circuit 30, the output terminals of inverters 302 and 303 are coupled to nodes N1 and N2 of the first stage circuit 100, respectively.

[0124] refer to Figures 1 to 6 , Figure 6 Based on some embodiments of this disclosure Figures 1 to 5 A schematic diagram of circuit 40 configured with circuits 10, 20, and 30. Relative to... Figures 1 to 5 In the embodiments described, for ease of understanding, Figure 6 Similar components are identified by the same reference number.

[0125] like Figure 6 As shown, compared to circuit 100 of circuits 10, 20 and 30, each circuit 100 of circuit 40 also includes inductor L1, inductor L2, inductor L3 and inductor L4.

[0126] For clarity, inductor L1 is coupled between node N1 and inverter 122. Inductor L2 is coupled between the output terminal and output terminal O1 of inverter 122. Inductor L3 is coupled between node N2 and inverter 123. Inductor L4 is coupled between the output terminal and output terminal O2 of inverter 123. For simplicity, in... Figure 6 The components of circuit 100 other than the first stage are omitted.

[0127] In operation, inductors L1, L2, L3 and L4 are used to increase the bandwidth of circuit 100, thereby increasing the bandwidth of circuit 40.

[0128] In some embodiments, inductors L1 and L3 are configured identically, and inductors L2 and L4 are configured identically. For example, inductors L1 and L3 have the same inductance value, and inductors L2 and L4 have the same inductance value.

[0129] Figures 1 to 6 The configuration is provided for illustrative purposes. Figures 1 to 6 Various implementations are within the scope of an embodiment of this application. For example, in some embodiments, circuits 30 and 40 each have only two levels of circuit 100.

[0130] In summary, this disclosure provides an amplifier circuit with hybrid active / passive feedback, which incorporates both active and passive feedback architectures. The hybrid active / passive feedback amplifier circuit combines the advantages of both active and passive feedback architectures, thereby optimizing the amplifier circuit's gain-bandwidth product and stability.

Claims

1. An amplifier circuit, characterized in that, Include: A first transconductance amplifier is used to receive the first input signal; as well as A first transimpedance amplifier, wherein the first input terminal of the first transimpedance amplifier is coupled to the first output terminal of the first transconductance amplifier. The first transimpedance amplifier includes: A first resistor is coupled between the first output terminal of the first transimpedance amplifier and the first input terminal of the first transimpedance amplifier. as well as The first inverter has its output terminal coupled to the first input terminal of the first transimpedance amplifier.

2. The amplifier circuit of claim 1, wherein the first transconductance amplifier comprises: The second inverter has its input terminal used to receive the first input signal, and its output terminal is coupled to the first output terminal of the first transconductance amplifier.

3. The amplifier circuit of claim 2, wherein the first transconductance amplifier further comprises: The third inverter has its input terminal used to receive the second input signal, and its output terminal is coupled to the second output terminal of the first transconductance amplifier.

4. The amplifier circuit of claim 3, wherein the first input signal and the second input signal are out of phase with each other.

5. The amplifier circuit of claim 1, wherein the first transimpedance amplifier further comprises: The second inverter has its input terminal coupled to the first input terminal of the first transimpedance amplifier, and its output terminal coupled to the first output terminal of the first transimpedance amplifier.

6. The amplifier circuit of claim 5, wherein the first transimpedance amplifier further comprises: A third inverter, the input of which is coupled to the second input of the first transimpedance amplifier, and the output of which is coupled to the second output of the first transimpedance amplifier. The second inverter and the third inverter are used to generate a first output signal and a second output signal, respectively, and the first and second output signals are inverted.

7. The amplifier circuit of claim 6, wherein the first transimpedance amplifier further comprises: A second resistor is coupled between the second output terminal and the second input terminal of the first transimpedance amplifier; and A fourth inverter, the input of which is coupled to the first output of the first transimpedance amplifier, and the output of which is coupled to the second input of the first transimpedance amplifier.

8. The amplifier circuit of claim 7, wherein the resistance value of the first resistor is equal to the resistance value of the second resistor.

9. The amplifier circuit of claim 6, further comprising: Differential feedback circuit, including: A differential amplifier is used to generate a third output signal and a fourth output signal based on the first and second output signals; A fourth inverter, the input of which is coupled to the third output signal, and the output of which is coupled to the first input of the first transimpedance amplifier; as well as The fifth inverter has its input terminal coupled to the fourth output signal and its output terminal coupled to the second input terminal of the first transimpedance amplifier.

10. The amplifier circuit of claim 9, further comprising: Common-mode feedback circuit, including: An amplifier for generating a fifth output signal based on the first output signal, the second output signal, and a reference voltage; The sixth inverter, the input of which is coupled to the fifth output signal, and the output of which is coupled to the first input of the first transimpedance amplifier; as well as The seventh inverter has its input terminal coupled to the fifth output signal and its output terminal coupled to the second input terminal of the first transimpedance amplifier.

11. The amplifier circuit of claim 1, further comprising: A second transconductance amplifier, wherein the first input terminal of the second transconductance amplifier is coupled to the first output terminal of the first transimpedance amplifier; as well as A second transimpedance amplifier, wherein the first input terminal of the second transimpedance amplifier is coupled to the first output terminal of the second transconductance amplifier. The second transimpedance amplifier includes: The second resistor is coupled between the first output terminal of the second transimpedance amplifier and the first input terminal of the second transimpedance amplifier. as well as The output of the second inverter is coupled to the first input of the second transimpedance amplifier.

12. The amplifier circuit of claim 11, further comprising: A first inductor is coupled between the first output terminal of the first transconductance amplifier and the first input terminal of the first transimpedance amplifier; and The second inductor is coupled between the first output terminal of the first transimpedance amplifier and the first input terminal of the second transconductance amplifier.

13. An amplifier circuit, characterized in that, Include: A first transconductance amplifier has a first input terminal and a second input terminal, which are used to receive a first input signal and a second input signal, respectively. The first and second input signals are a differential signal pair. The first transconductance amplifier further has a first output terminal and a second output terminal, which are used to generate a first output signal and a second output signal corresponding to the first and second input signals, respectively. as well as The first transimpedance amplifier includes: A first inverter, the input of which is coupled to the first output of the first transconductance amplifier; A first resistor is coupled between the input terminal of the first inverter and the output terminal of the first inverter; as well as The second inverter has its input terminal coupled to the output terminal of the first inverter, and its output terminal coupled to the second output terminal of the first transconductance amplifier.

14. The amplifier circuit of claim 13, wherein the first transimpedance amplifier further comprises: A third inverter, the input of which is coupled to the second output of the first transconductance amplifier; The second resistor is coupled between the input terminal and the output terminal of the third inverter; as well as The fourth inverter has its input terminal coupled to the output terminal of the third inverter, and its output terminal coupled to the first output terminal of the first transconductance amplifier.

15. The amplifier circuit of claim 14, further comprising: A first inductor is coupled between the first output terminal of the first transconductance amplifier and the input terminal of the first inverter; and The second inductor is coupled between the second output terminal of the first transconductance amplifier and the input terminal of the third inverter.

16. The amplifier circuit of claim 14, further comprising: The second transconductance amplifier has its first and second input terminals respectively coupled to the output terminal of the first inverter and the output terminal of the third inverter.

17. The amplifier circuit of claim 16, further comprising: The second transimpedance amplifier includes: The fifth inverter, the input of which is coupled to the first output of the second transconductance amplifier; The third resistor is coupled between the input terminal and the output terminal of the fifth inverter; as well as The sixth inverter has its input terminal coupled to the output terminal of the fifth inverter, and its output terminal coupled to the second output terminal of the second transconductance amplifier.

18. The amplifier circuit of claim 16, further comprising: A first inductor is coupled between the output terminal of the first inverter and the first output terminal of the second transconductance amplifier; and The second inductor is coupled between the output terminal of the third inverter and the second output terminal of the second transconductance amplifier.

19. The amplifier circuit of claim 18, wherein the inductance value of the first inductor is equal to the inductance value of the second inductor.

20. The amplifier circuit of claim 13, wherein the first transconductance amplifier comprises: A third inverter is coupled between the first input terminal and the first output terminal of the first transconductance amplifier; and A fourth inverter is coupled between the second input terminal of the first transconductance amplifier and the second output terminal of the first transconductance amplifier.

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