High-speed stabilized offset-compensated photon counting front end

Abstract

A front-end circuit for a photon counting component is provided. The front-end circuit comprises a signal amplifier configured to operate in a first phase (offset compensation) and a second phase (output phase), a feedback capacitor connected in parallel with the signal amplifier, and an active feedback circuit including an auto-zero (AZ) active feedback amplifier connected in parallel with the feedback capacitor in the second phase and configured to be isolated from the feedback capacitor in the first phase. The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase. The active feedback circuit is configured to auto-zero the active feedback amplifier in the AZ phase.

Description

[Technical Field]

[0001] This disclosure generally relates to photon counting components. [Background technology]

[0002] Various applications utilize photon counting components that require low noise intensity measurements and, if possible, spectral information. These include medical imaging, spectroscopy, and security scanners.

[0003] Figure 1 shows a schematic of a single photon counting component 10, which includes a photon detector 2, a front-end circuit 5, a discriminator 7 with multiple comparators 8, and multiple counters 9, each of which is coupled to one of the comparators 8. The comparators 8 are configured with different thresholds, allowing for the determination of the voltage amplitude of the received voltage signal. All counters 9 with thresholds exceeding the threshold of the comparator preceding them register a count by pulse amplitude. This can be converted by post-processing into a single count and a corresponding energy bin. Thus, the photon detector 2 generates a pulse signal 3 corresponding to the incident photon 1. The front-end 5 converts the pulse signal 3 into a voltage pulse signal 6.

[0004] The photon counter 9 corresponds to a comparator 8 that corresponds to the voltage amplitude of the voltage pulse 8 corresponding to the detected photon.

[0005] The pulse length of the voltage pulse signal 6, for example, the full width at half maximum (FWHM), corresponds to the number of photons detected simultaneously or within overlapping time windows. The amplitude of the pulses in the voltage pulse signal 6 corresponds to the energy of the detected photons. Ideally, the photon pulses do not overlap in time, enabling the detection of single photons. Therefore, the energy of the detected photons can be determined by the energy determined using a pair of comparators 8 and counters 9.

[0006] Therefore, in the photon counting component 10, single-photon events 1 are detected and counted to obtain intensity and spectral information, and since photons are detected individually, the photon energy can also be extracted. Single-photon detection can be made possible by the sensor material of the photon detector 2, which converts the photon quantum 1 into a current pulse 3, for example, CdTe or CdZnTe for X-ray conversion. These current pulses 3 are converted into voltage pulses 6 by a shaper circuit 12 (see, for example, Figures 2A to 2C) within the (CMOS) front-end circuit 6. In the shaper circuit, the height of the output voltage peak 6 is proportional to the photon energy and therefore contains spectral information. Digitization of spectral information such as output pulse height can be performed using a discriminator 7. The output of the discriminator is counted individually by a counter 9 to obtain the spectral distribution.

[0007] The main concern with the single-photon counting component 10 is baseline stability. If the baseline shifts, the measured count rate and energy will also shift.

[0008] Figures 2A to 2C show comparative examples of front-end circuit 5 that are not necessarily prior art.

[0009] In the front-end circuit 5, a baseline restorer circuit 16 can be used to compensate for offset and low-frequency noise and maintain a stable baseline for the voltage pulse signal 6 (Figure 1). The baseline restorer 16 involves using a comparator 14 to detect the baseline under pulse activity 6, which presents challenges, especially at high input count rates, because the arrival times of the incident photons 1 (Figure 1) are random.

[0010] Figure 2A shows the circuit diagram of a baseline restorer 16 for offset compensation in the reset topology. The incident pulse current 3 is integrated in a feedback capacitor 11 around a shaper circuit 12 having an operational transconductance amplifier (OTA) that reaches a step response in the output section. To force a return to the baseline, this topology resets the feedback capacitor 11 17 after a predetermined delay 13 with respect to the incident pulse. The event of the incident pulse is determined by a comparator 14 having a comparison threshold that safely exceeds the inter-peak noise level. However, if a pulse occurs with an amplitude below the detection threshold, the reset is not triggered. Therefore, the corresponding charge of these sub-threshold pulses is subsequently added to the next incident charge in the feedback capacitor 11. This corresponds to a baseline shift. The offset and low-frequency noise are compensated by the reset 17, but kT / C noise accumulates in the feedback capacitor 11. This kT / C noise can introduce additional noise in the front-end output section 6. Furthermore, since the feedback capacitor 11 is usually chosen to be small in order to obtain the maximum gain, kT / C noise can become noticeable.

[0011] Figure 2B shows a non-reset front-end topology with offset compensation based on a baseline restorer, which provides a continuous-time feedback circuit around the front-end to compensate for sensor leakage current. In the non-reset topology, the feedback capacitor 11 is discharged by a parallel resistor 21. Therefore, the circuit 16 does not allow the offset to be directly accumulated in the feedback capacitor 11, and the offset compensation can be performed via the auxiliary input aux to the OTA of the shaper circuit 12. However, in the non-reset topology, the offset accumulation capacitor 22 can be designed to be large independently of the feedback capacitor 11. As shown by the switch az in Figure 2B, the photon counting front-end input is disconnected during offset compensation. The disconnection time is assumed to be very short, resulting in the loss of only a small number of incident photons and no dose penalty. Because the disconnection switch az is in series with the input path 3 of the photon counting front-end 5, the speed during count mode operation is reduced, requiring high power consumption to compensate for this.

[0012] Regarding power, it is often desirable to implement the OTA as a single-input OTA for efficiency, but this necessitates the use of an additional feedback OTA to decouple the baseline from the input bias potential of the main OTA. Since the feedback OTA also needs to be offset compensated, this topology is incompatible with a single-stage topology.

[0013] Figure 2C shows a circuit diagram of a baseline restorer 16 using a shaper circuit 12 having a single input OTA. The OTA input may be the bias voltage of an input device, for example, a photon detector 2 (see Figure 1). Here, the high temperature dependence of the bias voltage requires that the active feedback circuit 31 isolate the baseline from the front-end input. In this topology, the active feedback circuit 31 defines the baseline.

[0014] Furthermore, the time-off of the single-photon counting component 10, which is unable to detect photons, for example, those of several hundred nanoseconds, and the energy efficiency related to cooling efficiency and thermal baseline stability, for example, can be important in applications such as medical applications when detecting X-rays. [Overview of the Initiative] [Problems that the invention aims to solve]

[0015] The object of the present invention is to provide a front-end circuit that overcomes or mitigates at least one of the above-mentioned problems.

[0016] In one embodiment, a front-end circuit for a photon counting component is provided. The front-end circuit comprises a signal amplifier configured to operate in a first phase and a second phase, wherein in the first phase, the signal amplifier input is not used, and in the second phase, the signal amplifier receives an input signal from the input of the front-end circuit and provides an output signal to the output of the front-end circuit while being offset compensated by an active feedback amplifier. A feedback capacitor is connected in parallel with the signal amplifier. An active feedback circuit includes an auto-zero (AZ) active feedback amplifier connected in parallel with the feedback capacitor in the second phase and configured to be isolated from the feedback capacitor in the first phase. The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase. The active feedback circuit is configured to auto-zero the active feedback amplifier in the AZ phase.

[0017] Therefore, when the active feedback amplifier is configured to operate in an output phase corresponding to the second phase, the active feedback amplifier reduces or compensates for any offset of the signal amplifier. In the first phase of the signal amplifier, the active feedback amplifier is offset compensated (auto-zeroed), for example, the active feedback amplifier is disconnected from the signal amplifier and the parallel feedback capacitor. During the second phase, the active feedback amplifier is in an output mode. Thus, the active feedback amplifier can compensate for any offset of the signal amplifier during the second phase.

[0018] The conditioning amplifier circuit of the front-end circuit may have an output coupled to the baseline control terminal of the signal amplifier and at least one input coupled to the output of the front-end circuit in the AZ phase and insulated from the output in the output phase.

[0019] Therefore, the front-end circuit enables offset compensation of the photon circuit front-end without requiring a continuous baseline restoration loop.

[0020] Alternatively, or additionally, the front-end circuit may use a parallel capacitor charging path. The parallel capacitor charging path can provide fast auto-zero stabilization with low noise and charge injection error. Thus, the front-end circuit can enable either offset compensation or low-frequency noise compensation of the photon counting front-end within a small dead time window. The dead time window may be adapted to the minimum loss requirements in medical imaging, for example. Further, the front-end circuit can directly provide either offset compensation or low-frequency noise compensation in the signal path without switches. Also, the front-end circuit may not depend on a baseline restore circuit. Therefore, the front-end circuit reduces circuit complexity, power consumption, and occupied area.

[0021] In another aspect, a compensation circuit for a signal amplifier is provided. The signal amplifier may be configured to operate in a first phase and a second phase. In the first phase, the signal amplifier is not used. In the second phase, the signal amplifier receives an input signal and provides an output signal based on the input signal to the output. The compensation circuit includes a feedback capacitor connected in parallel with the signal amplifier, and an active feedback circuit including an auto zero (AZ) active feedback amplifier configured to be connected in parallel with the feedback capacitor in the second phase and insulated from the feedback capacitor in the first phase. The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto zero (AZ) phase corresponding to at least a part of the first phase. The active feedback circuit includes an AZ capacitor connected to an auxiliary input of the active feedback amplifier. This is feedback around the capacitor that is disconnected during the output phase, i.e., the AZ capacitor stores the required AZ compensation voltage during the output phase. The compensation circuit further includes a buffer circuit including an AZ auxiliary capacitor having a capacitance larger than the capacitance of the AZ capacitor. The AZ auxiliary capacitor is insulated from the AZ capacitor in the AZ phase, and the AZ auxiliary capacitor is connected in parallel with the AZ capacitor to the auxiliary input of the active feedback amplifier in the output phase.

Brief Description of the Drawings

[0022] In the drawings, the same reference numerals generally refer to the same parts throughout different figures. The drawings are not necessarily to scale, and instead, emphasis is generally placed on illustrating the principles of the invention. In the following description, various aspects of the invention are described with reference to the following drawings.

[0023] [Figure 1] A circuit diagram of a photon counting component is shown. [Figure 2A]Figure 1 shows a schematic of a known front-end topology for the photon counting component. [Figure 2B] Figure 1 shows a schematic of a known front-end topology for the photon counting component. [Figure 2C] Figure 1 shows a schematic of a known front-end topology for the photon counting component. [Figure 3A] The schematic diagram of the front-end topology for the photon counting component is shown. [Figure 3B] The schematic diagram of the front-end topology for the photon counting component is shown. [Figure 4A] The schematic diagram of the front-end topology for the photon counting component is shown. [Figure 4B] The schematic diagram of the front-end topology for the photon counting component is shown. [Figure 5] The schematic diagram of the front-end topology for the photon counting component is shown. [Figure 6A] The diagram of the front-end topology is shown. [Figure 6B] The diagram of the front-end topology is shown. [Figure 7A] The diagram of the front-end topology is shown. [Figure 7B] The diagram of the front-end topology is shown. [Figure 8] The diagram of the front-end topology is shown. [Figure 9A] The diagram of the front-end topology is shown. [Figure 9B] The diagram of the front-end topology is shown.

[0024] The following detailed description refers to the accompanying drawings illustrating specific details and embodiments of how this disclosure may be implemented. One or more embodiments are described in sufficient detail to enable a person skilled in the art to implement this disclosure. Other embodiments may be used without departing from the scope of this disclosure, and structural, logical, and electrical modifications may be made. The various embodiments described herein are not necessarily mutually exclusive, so that some embodiments may be combined with one or more other embodiments to form new embodiments. Various embodiments are described in relation to methods, and various embodiments are described in relation to apparatus. However, it should be understood that embodiments described in relation to methods may be similarly applied to apparatus, and vice versa. Note that throughout the drawings, the same reference numerals are used to indicate the same or similar elements, features, and structures. Note that throughout the drawings, proportions are not necessarily to scale, and the size of features may be exaggerated to facilitate illustration. [Modes for carrying out the invention]

[0025] Figure 3A shows the schematic of the front-end topology 600 for the photon counting component. The front-end topology 600 consists of an input section 601, an output section 602, a signal amplifier 603, a feedback capacitor (circuit) 604, an active feedback circuit 605, an active feedback amplifier 606, and an AZ capacitor C az This includes 607, a conditioning amplifier (circuit) 608, and a bypass circuit 614. Figure 3B shows an exemplary implementation of Figure 3A. Figure 4A shows an auxiliary amplifier 611 and an auxiliary AZ capacitor C az_aux Figure 3A shows a schematic diagram of the front-end topology, further including a buffer circuit 610 having 612. Figure 4B shows an exemplary implementation of Figure 4A. Figure 5 shows an exemplary implementation of the front-end topology of Figure 4A, further including a current buffer (circuit) 800.

[0026] In various examples, auto-zero (AZ) amplifiers are used in front-end circuits. An AZ amplifier is an electronic circuit for amplifying very small DC voltages and is a special operational amplifier that typically has a very low and stable offset voltage. An AZ amplifier typically operates in two phases per clock cycle: a first phase which may be an auto-zero phase and a second phase which may be a second phase. The phases of an AZ amplifier are usually changed by switches for the input and storage capacitors. Thus, an AZ amplifier is an amplifier that, from an external perspective, looks like an amplifier with extremely small offset and 1 / f noise. This AZ amplifier is not simply an amplifier that is auto-zeroed, but includes an AZ circuit, i.e., an auxiliary amplifier. For example, in the circuit shown in Figure 2B, amplifier 12 that receives the AZ voltage via the auxiliary input is an AZ amplifier. In the circuit shown in Figure 3A, the active feedback amplifier 606 of the active feedback circuit 605 is auto-zeroed during the first phase, so together with the AZ circuit, e.g., AZ capacitor 607 and switch az, the active feedback circuit 605 functions as an AZ amplifier. As an example, in Figure 3A, the signal amplifier 603 can function as a normal amplifier, but this normal amplifier is continuously offset and noise-compensated by the auto-zeroed active feedback circuit 605. Thus, the signal amplifier 603 is offset and low-frequency noise-compensated by the active feedback circuit 605 surrounding it.

[0027] In other words, the auto-zero phase of the active feedback amplifier 606 corresponds to at least a portion of the first phase of the signal amplifier 603, for example, the idle phase. The output phase of the active feedback amplifier 606 corresponds to the second phase of the signal amplifier 603, for example, the offset compensation and output phase. For this reason, the auto-zero phase of the active feedback amplifier may occur during the first phase of the signal amplifier, and the output phase of the active feedback amplifier and the output phase of the signal amplifier may be aligned, for example, to start at the same (common or shared) timing.

[0028] As an example, a front-end circuit 600 having a signal amplifier 603 is provided, for example, in a photon counting front-end 5 (see Figure 1) using active feedback for a single photon counting component 10 (see Figure 1), configured in an auto-zero scheme for compensating for offset. The front-end circuit 600 enables compensation for either offset or low-frequency noise within a short dead period of several hundred ns (corresponding to the first phase). This can be achieved by active feedback compensation using a conditioning amplifier (circuit) 608 while isolating the signal amplifier 603 from the incident charge pulse. During the auto-zero (first phase) of the active feedback circuit, the signal amplifier 603 (also referred to as the shaper, shaper OTA, signal amplifier 603, or signal shaper in the amplifier 603 containing the feedback element) may be conditioned by the conditioning amplifier (circuit) 608. The conditioning amplifier (circuit) 608 may include a conditioning amplifier. Alternatively, the output node of signal amplifier 603 is V ref It may be directly connected to a low-ohmic copy of V. ref A unit gain voltage buffer connects the output section to the front-end output section (for example, the output section of signal amplifier 603) with V ref This may be provided by buffering. In this way, fast stabilization is achieved after the auto-zero phase has finished.

[0029] Therefore, the buffer circuit 610, which has a second auto-zero capacitor (also referred to as auxiliary AZ capacitor 612), is charged after the auto-zero (AZ) phase, for example, in the output phase of the active feedback amplifier 606, by an offset-compensated buffer connected only to the offset compensation input. Therefore, the auxiliary AZ capacitor 612 enables fast stabilization of the auto-zero loop of the active feedback amplifier 606, for example, without penalty to noise and charge injection errors. In this way, charge injection errors in the signal amplifier 603 can be reduced without compromising stability during the auto-zero phase. Therefore, the front-end circuit 600 can be provided without requiring a baseline restore loop. Thus, the photon counting front-end can operate at lower power, have a reduced footprint, and be provided with reduced or no image artifacts. Alternatively, or further, the front-end circuit 600 can be provided with fast stabilization of the signal amplifier 603 without charge injection and noise trade-offs.

[0030] As an example, the front-end circuit 600 provides a signal amplifier 603 (e.g., a shaper) with active feedback. In this way, the front-end circuit 600 can overcome the conventional trade-off between stabilization time and charge injection error. Thus, baseline stability can be achieved without a baseline restorer (BLR) loop and without the speed penalty of the shaper. Consequently, the offset drift of the front-end circuit 600, as well as flicker and random telegraph noise (RTN), can be compensated without the need for a baseline restorer loop. This can save power and area and avoid the effects of BLR-related baseline distortion at high input count rates.

[0031] The provided front-end circuit 600 may be configured to achieve fast auto-zero loop stabilization for high-output impedance active feedback OTA without being plagued by excessive kT / C noise, charge injection errors, and drops. This allows the front-end circuit 600 to have a switching scheme suitable for photon counting front-end topologies with active feedback. Thus, the front-end circuit 600 may also be an active feedback shaper topology. In an active feedback shaper topology, it may be sufficient to simply compensate the active feedback circuit 605. If the active feedback circuit 605 is offset-free, the active feedback amplifier 606 of the active feedback circuit 605 has a large DC gain A DC_AFB The offset V of signal amplifier 603 off_AZ_amplifier This may be compensated for. And the baseline offset ΔV in the front-end output. baseline teeth,

number

[0032] The signal amplifier 603 may be disconnected from the output of the active feedback amplifier 606, for example, during the AZ phase of the active feedback amplifier 606, using a switch "az" as shown in Figure 3A, to compensate for the offset of the active feedback circuit 605. With the DC feedback loop open around the main OTA, the front-end input 601 may be forced to a low-impedance bias source to absorb the incident pulse current. The residual charge flowing into the signal amplifier 603 does not affect the auto-zero operation of the disconnected active feedback circuit 605. Therefore, it may not be necessary to disconnect the front-end input 601 from the pulse input 3 itself (see Figure 1). As a result, the impact on the speed of the main path may be minimal.

[0033] The signal amplifier 603 may be connected to the high-speed feedback path during the auto-zero of the active feedback circuit 605 by the conditioning amplifier 608. Regarding the high-speed stabilization to the baseline after the auto-zero phase of the active feedback amplifier 606, it may be important that the output of the signal amplifier 603 does not swing to the supply rail during the auto-zero phase of the active feedback amplifier 606. Due to the high DC gain of the signal amplifier 603, a slight mismatch in the low impedance bias voltage V BiAsn can cause such a scenario. The high-speed feedback path may change the current source load of the signal amplifier 603, and as a result, the output of the signal amplifier 603 becomes approximately the desired baseline V ref . As a result, the signal amplifier 603 can quickly stabilize after the end of the auto-zero phase, minimizing the overall dead time. One implementation of such a high-speed feedback path is shown in FIG. 3B.

[0034] The trade-off in this topology can be the stabilization time of the auto-zero loop of the active feedback circuit 605 against charge injection error, specifically for the application. The active feedback circuit 605 may be designed for low current in order to implement a large effective feedback resistor for high shaper gain. For the high-speed stabilization of the auto-zero loop, for example, of the active feedback amplifier 606 in the active feedback circuit 605, within several hundred nanoseconds, the output load capacitance in the active feedback circuit 605 should be minimized by reducing the auto-zero capacitance C az . However, this may cause high kT / C noise, charge injection, and voltage drop due to charge loss in the count phase (also referred to as the second phase). Therefore, the front end may include a buffer circuit 610 to overcome this trade-off, as shown in FIGS. 4A and 4B. The buffer circuit 610 includes a larger capacitor C az_aux 612 that is charged in parallel with the AZ capacitor 607.

[0035] During auto-zero loop operation, a larger capacitor C az_aux 612 is not connected to the auxiliary input of the active feedback amplifier 606 of the active feedback circuit 605. Therefore, a larger auxiliary AZ capacitor C az_aux 612 does not cause any stabilization limitations.

[0036] After the auto-zero phase, a larger capacitor C az_aux 612 is connected in parallel with the AZ capacitor 607 to the auxiliary input of the active feedback amplifier 606 of the active feedback circuit 605. In this way, the kT / C noise charge and charge injection in the AZ capacitor 607 result in a larger combined capacitance C az +C az_aux It can be distributed to the equivalent capacitance C. az + C az_aux This reduces their effects in the voltage domain.

[0037] The buffer (e.g., auxiliary amplifier 611) driving the large auxiliary AZ capacitor 612 may, application-specifically, need to be offset-free itself. However, this buffer can be easily auto-zeroed during the front-end acquisition time (second phase). One possible implementation of an auto-zeroed capacitor-driven amplifier is shown in Figure 4B. Note that Figure 4B shows only the implementation of auxiliary amplifier 611, and capacitors Caux_fb and Cfb may be outside this circuit (not shown).

[0038] As shown in Figure 5, for applications where the front-end input has a large parasitic capacitance, the front-end can be addressed using a two-stage topology. In this topology, the signal amplifier 603 is located before the current buffer 800 or the charge-sensitive amplifier (CSA), isolating the front-end from the large input capacitance. This enables maximum speed to be achieved. In the two-stage topology, one of the offset compensation methods described above can be employed.

[0039] The CSA offset and low-frequency noise may be matched with the offset of the signal amplifier 603 and compensated by active feedback. In a two-stage topology, the input bias switch may be omitted, and the CSA feedback resistor may be shorted by a switch. This configuration allows the incident current pulse to be absorbed by the CSA without being transferred to the signal amplifier 603 that follows the CSA.

[0040] The front-end circuit 600 shown in Figures 6A to 8 can be implemented in, for example, a medical imaging device, a spectrometer, a security scanner, or a communication device.

[0041] The front-end circuit 600 may be configured for photon counting components. The front-end circuit 600 may include an input section 601, an output section 602, and a signal amplifier 603. The signal amplifier 603 may operate in the second phase to output a signal to the output section 602 based on the input signal provided by the input section 601 (Figure 6A) and the offset compensation performed by the signal amplifier 603 (Figure 6B) in the first phase.

[0042] In the first phase, the signal amplifier 603 may be offset compensated. In this way, any offset is roughly compensated by the conditioning amplifier 608 to avoid clipping. However, the compensation does not have to be remembered for the second phase. The actual offset compensation of the signal amplifier 603 may be performed by the active feedback amplifier 605 during the first phase. Therefore, any offset of the signal amplifier 603 is reset in the signal amplifier 603.

[0043] In the second phase, the signal amplifier 603 receives an input signal from the input section 601 of the front-end circuit 600 and provides an output signal to the output section 602 of the front-end circuit 600. The output signal may be based on the input signal, for example, an amplified signal of the input signal. For example, the input signal may be an analog signal and the output signal may be a digital signal.

[0044] The front-end circuit 600 may further include a feedback capacitor circuit 604 connected in parallel with the signal amplifier 603.

[0045] The active feedback circuit 605 includes an auto-zero (AZ) active feedback amplifier 606, which is connected in parallel with the feedback capacitor in the second phase and isolated from the feedback capacitor in the first phase. The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase. The active feedback circuit is configured to auto-zero the active feedback amplifier in the AZ phase.

[0046] The second (output) phase of the signal amplifier includes a first duration, and the auto-zero phase of the active feedback amplifier includes a second duration. The second duration may be shorter than the first duration.

[0047] The active feedback circuit 605 may be configured for low currents to accommodate a large effective feedback resistor.

[0048] The active feedback circuit 605 may include at least one switch to connect the feedback capacitor circuit 604 in parallel during the output phase and to isolate the feedback capacitor circuit 604 during the AZ phase. The active feedback circuit 605 may include an operational transconductance amplifier (OTA) 606. The OTA 606 may be isolated from the input 601 of the front-end circuit 600 during the AZ phase. The active feedback circuit 605 may further include an AZ capacitor 607 connected to the auxiliary input 601 of the OTA 606 during the AZ phase. The AZ capacitor 607 may be configured to compensate the OTA 606 during the AZ phase. The OTA 606 may be configured such that the auxiliary input (supplied by the AZ capacitor 607) can vary the output of the OTA 606, for example, so that the output of the OTA 606 is approximately a desired baseline voltage. The front-end circuit 600 may further include a conditioning amplifier circuit 608, which includes an output section connected to, for example, a power source, and at least one input section connected to the output section 602 of the front-end circuit 600 in the AZ phase and isolated from the output section 602 in the output phase. The conditioning amplifier circuit 608 may be configured to replace the active feedback circuit 605 in the AZ phase. The active feedback circuit 605 may include a first reference voltage, and the conditioning amplifier circuit 608 may include a second reference voltage. The first reference voltage and the baseline reference voltage may be substantially the same.

[0049] In other words, in the first phase, the signal amplifier 603 is offset compensated, the active feedback circuit 605 is isolated from the feedback capacitor circuit 604 in the AZ phase, and the conditioning amplifier circuit provides voltage to the input 601 of the signal amplifier 603. The AZ capacitor 607 compensates the OTA 606 via the auxiliary input of the OTA by changing the output voltage of the OTA 606 so that the output of the OTA 606 is approximately the desired baseline voltage.

[0050] In the second phase, the signal amplifier 603 receives an input signal from the input section 601 of the front-end circuit 600 and provides an output signal to the output section 602 of the front-end circuit 600. The active feedback circuit 605 is connected in parallel with the feedback capacitor circuit 604, and the conditioning amplifier circuit is isolated from the signal amplifier 603.

[0051] The front-end circuit 600 may further include a bypass circuit. The bypass circuit may include a switch and may be configured to short-circuit the signal amplifier 603 in the AZ phase. The bypass circuit may include a low-impedance output section 602 which is connected to the input section 601 and the feedback capacitor circuit 604 of the signal amplifier 603 in the AZ phase, and may be isolated from the input section 601 and the feedback capacitor circuit 604 in the output phase.

[0052] Optionally, as shown in Figure 7A (second (output) phase) and Figure 7B (first (offset compensation) phase), the front-end circuit 600 may optionally include a buffer circuit 610. The buffer circuit 610 may have an auxiliary AZ capacitor 612 having a capacitance greater than that of the active feed capacitor AZ capacitor 607. The auxiliary AZ capacitor 612 may be isolated from the AZ capacitor 607 in the AZ phase, and the auxiliary AZ capacitor 612 may be connected in parallel with the AZ capacitor 607 to the auxiliary input 601 of the active feedback circuit 605 in the output phase. The auxiliary AZ capacitor 612 may be charged in parallel with the AZ capacitor 607. The buffer circuit 610 may include an offset-compensated auxiliary amplifier 611. The offset-compensated auxiliary amplifier 611 may be a buffer AZ amplifier 611. The buffer AZ amplifier 611 may be configured to include an AZ phase in the output phase of the AZ active feedback amplifier 606. The buffer AZ amplifier 611 may be configured to charge the AZ auxiliary capacitor 612 during the AZ phase of the active feedback circuit 605. The buffer AZ amplifier 611 may auto-zero during the output phase of the active feedback circuit 605.

[0053] Optionally, as shown in Figure 8, the front-end circuit 600 may include a current buffer circuit 800 prior to the signal amplifier 603. The current buffer circuit 800 may be configured to isolate the input section 601 of the front-end circuit 600 from the large capacitance of the input section 601. The current buffer circuit 800 may include a charge-sensitive amplifier (CSA). Active feedback may be configured to compensate for the offset and low-frequency noise of the current buffer circuit 800 and the signal amplifier 603.

[0054] The current buffer circuit 800 may include a feedback resistor in parallel with the feedback capacitor circuit 604, which can be short-circuited in the AZ phase.

[0055] The compensation circuit 900 for the auto-zero (AZ) amplifier shown in Figure 9A (second phase) and Figure 9B (first phase) can be implemented in, for example, a medical imaging device, a spectrometer, a security scanner, or a communication device.

[0056] The compensation circuit 900 includes a feedback capacitor circuit 904 connected in parallel with the signal amplifier via a first terminal 901 and a second terminal 902.

[0057] The signal amplifier is configured to operate in a first phase and a second phase. In the first phase, the signal amplifier is not used, and in the second phase, the signal amplifier receives an input signal from the first terminal 901 and provides an output signal to the second terminal 902 based on the input signal.

[0058] The compensation circuit 900 further includes an active feedback circuit 905 which includes an auto-zero (AZ) active feedback amplifier 906 configured to be connected in parallel with the feedback capacitor 904 in the second phase and isolated from the feedback capacitor 904 in the first phase.

[0059] The active feedback amplifier 906 is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase. The active feedback circuit 905 includes an AZ capacitor 907 connected to the auxiliary input of the active feedback amplifier 906 during the AZ phase.

[0060] The compensation circuit 900 further includes a buffer circuit 910 which includes an auxiliary AZ capacitor 912 having a capacitance greater than that of the AZ capacitor 904. The auxiliary AZ capacitor 912 is isolated from the AZ capacitor 904 during the AZ phase. During the output phase, the auxiliary AZ capacitor 912 is connected in parallel with the AZ capacitor 904 to the auxiliary input of the active feedback amplifier 906.

[0061] The active feedback circuit 905 may include at least one switch to connect the feedback capacitor circuit 904 in parallel during the output phase and to isolate the feedback capacitor circuit 904 during the AZ phase. The AZ capacitor 907 may be configured to compensate the OTA 906 in the AZ phase. The OTA 906 may be configured such that the auxiliary input 901 modifies the current source load of the OTA 906 so that the output 902 of the OTA 906 is approximately the desired baseline voltage.

[0062] The active feedback circuit may be configured for low currents to accommodate a large effective feedback resistor.

[0063] The AZ auxiliary capacitor 912 may be charged in parallel with the AZ capacitor 907.

[0064] The buffer circuit 910 may include an offset-compensated amplifier 911. The offset-compensated amplifier 911 may be a buffer AZ amplifier. The buffer circuit 910 may include a buffer AZ amplifier, and the buffer AZ amplifier may be configured to include an AZ phase in the output phase of the AZ amplifier.

[0065] The following are some examples of what is described and illustrated in this specification.

[0066] Embodiment 1 is a front-end circuit for a photon counting component, the front-end circuit comprising an input section, an output section, and a signal amplifier configured to operate in a first phase and a second phase. In the first phase, the signal amplifier is not used, and in the second phase, the signal amplifier receives an input signal from the input section of the front-end circuit and provides an output signal to the output section of the front-end circuit. The front-end circuit further comprises a feedback capacitor connected in parallel with the signal amplifier and an active feedback circuit including an auto-zero (AZ) active feedback amplifier connected in parallel with the feedback capacitor in the second phase and configured to be isolated from the feedback capacitor in the first phase. The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase, and the active feedback circuit is configured to auto-zero the active feedback amplifier in the AZ phase.

[0067] The first phase of a signal amplifier may include a first period, and the auto-zero phase of an active feedback amplifier may include a second period. The second period may be shorter than the first period.

[0068] The second phase of the signal amplifier may include a first output timing (e.g., the start of the output phase), and the output phase of the active feedback amplifier may include a second output timing. The second output timing and the first output timing may be substantially identical. In other words, the output phase of the active feedback amplifier and the output phase of the signal amplifier may start simultaneously, for example, in parallel.

[0069] In Example 1a, the subject of Example 1 may optionally include a conditioning amplifier circuit having, for example, an output section connected to a power source, and at least one input section connected to the output section of a front-end circuit in the first phase and isolated from the output section of the front-end circuit in the second phase, at the baseline control input section of a signal amplifier.

[0070] In Example 2, the subject matter described in Example 1 or 1a may optionally include the fact that the output signal is based on the input signal.

[0071] In Example 3, the subject matter described in Examples 1 and 2 may optionally include an active feedback circuit that includes at least one switch to connect the feedback capacitors in parallel during the output phase and to isolate the feedback capacitors during the AZ phase.

[0072] In Example 4, the subject matter described in any one of Examples 1 to 3 may optionally further include a bypass circuit that includes a switch and is configured to short-circuit the signal amplifier in the AZ phase.

[0073] In Example 5, the subject matter described in any one of Examples 1 to 4 may optionally include the active feedback circuit comprising an operational transconductance amplifier (OTA).

[0074] In Example 6, the subject matter described in Example 5 may optionally include the isolation of the OTA from the input section of the front-end circuit during the AZ phase.

[0075] In Example 7, the subject matter described in any one of Examples 1 to 6 may optionally include an active feedback circuit comprising an AZ capacitor connected to the auxiliary input of the OTA during the AZ phase.

[0076] In Example 8, the subject matter described in Example 7 may optionally include the configuration in which the AZ capacitor compensates for OTA during the AZ phase.

[0077] In Example 9, the subject matter described in any one of Examples 7 to 8 may optionally include the configuration such that the OTA is configured such that the auxiliary input section modifies the current source load of the OTA so that the output section of the OTA is approximately at a desired baseline voltage.

[0078] In Example 10, the subject matter described in any one of Examples 1 to 9 may optionally include the active feedback circuit including a first reference voltage and the conditioning amplifier circuit including a second reference voltage.

[0079] In Example 11, the subject matter described in Examples 9 and 10 may optionally include the case where the first reference voltage and the baseline reference voltage are substantially the same.

[0080] In Example 12, the subject matter described in any one of Examples 10 to 11 may optionally include the case where the first reference voltage and the second reference voltage are substantially the same.

[0081] In Example 13, the subject matter described in any one of Examples 1 to 12 may optionally include the configuration in which the conditioning amplifier circuit replaces the active feedback circuit in the AZ phase.

[0082] In Example 14, the subject matter described in any one of Examples 4 to 13 may optionally further include a bypass circuit comprising a low-impedance output section that is connected to the input section of the signal amplifier and the feedback capacitor in the AZ phase and isolated from the input section of the signal amplifier and the feedback capacitor in the output phase.

[0083] In Example 15, the subject matter described in any one of Examples 1 to 14 may optionally include configuring the active feedback circuit for low current so as to implement a large effective feedback resistor in the MΩ range.

[0084] In Example 16, the subject matter described in any one of Examples 1 to 15 may optionally further include a buffer circuit that includes an auxiliary AZ capacitor having a capacitance greater than that of the AZ capacitor of the active feed capacitor. The auxiliary AZ capacitor is isolated from the AZ capacitor in the AZ phase and is connected in parallel with the AZ capacitor to the auxiliary input of the active feedback circuit in the output phase.

[0085] In Example 17, the subject matter described in Example 16 may optionally include the charging of the AZ auxiliary capacitor in parallel with the AZ capacitor.

[0086] In Example 18, the subject matter described in any one of Examples 16 to 17 may optionally include an amplifier in which the buffer circuit is offset compensated.

[0087] In Example 19, the subject matter described in Example 18 may optionally include the offset-compensated amplifier being a buffer AZ amplifier.

[0088] In Example 20, the subject matter described in any one of Examples 1 to 19 may optionally include the configuration in which the buffer circuit includes a buffer AZ amplifier, and the buffer AZ amplifier includes an AZ phase in the output phase of the AZ amplifier.

[0089] In Example 21, the subject matter described in any one of Examples 1 to 20 may optionally further include a current buffer circuit before the signal amplifier. The current buffer circuit is configured to isolate the input of the front-end circuit from a large input capacitance.

[0090] In Example 22, the subject matter described in Example 21 may optionally include the current buffer circuit including a charge-sensitive amplifier (CSA).

[0091] In Example 23, the subject matter described in Example 22 may optionally include being configured so that the active feedback compensates for the offset and low-frequency noise of the current buffer circuit and signal amplifier.

[0092] In Example 24, the subject matter described in any one of Examples 22 to 23 may optionally include a current buffer circuit that includes a feedback resistor in parallel with a feedback capacitor that is offset-compensated in the first phase.

[0093] Example 25 is a compensation circuit for a signal amplifier. The signal amplifier is configured to operate in a first phase and a second phase, in which the signal amplifier is not used, and in the second phase, the signal amplifier receives an input signal from the input and provides an output signal to the output. The compensation circuit comprises a feedback capacitor connected in parallel with the signal amplifier, and an active feedback circuit including an auto-zero (AZ) active feedback amplifier configured to be connected in parallel with the feedback capacitor in the first phase and isolated from the feedback capacitor in the second phase, wherein the active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase, wherein the active feedback circuit includes an AZ capacitor connected to the auxiliary input of the active feedback amplifier in the AZ phase, and the buffer circuit includes an AZ auxiliary capacitor having a capacitance greater than that of the AZ capacitor, the AZ auxiliary capacitor being isolated from the AZ capacitor in the AZ phase, and the AZ auxiliary capacitor being connected in parallel with the AZ capacitor to the auxiliary input of the active feedback amplifier in the output phase.

[0094] In Example 26, the subject matter described in Example 25 may optionally include the fact that the output signal is based on the input signal.

[0095] In Example 27, the subject matter described in Example 25 or 26 may optionally include the active feedback circuit comprising at least one switch for connecting the feedback capacitors in parallel during the output phase and for isolating the feedback capacitors during the AZ phase.

[0096] In Example 28, the subject matter described in any one of Examples 25 to 27 may optionally include the AZ capacitor being configured to compensate for the active feedback amplifier in the AZ phase.

[0097] In Example 29, the subject matter described in any one of Examples 25 to 28 may optionally include the configuration such that the active feedback amplifier is configured such that the auxiliary input section modifies the current source load of the active feedback amplifier so that the output section of the active feedback amplifier is approximately at a desired baseline voltage.

[0098] In Example 30, the subject matter described in any one of Examples 25 to 29 may optionally include configuring the active feedback circuit for low current so as to implement a large effective feedback resistance in the MΩ range.

[0099] In Example 31, the subject matter described in any one of Examples 25 to 30 may optionally include the charging of the AZ auxiliary capacitor in parallel with the AZ capacitor.

[0100] In Example 32, the subject matter described in any one of Examples 25 to 31 may optionally include an amplifier in which the buffer circuit is offset compensated.

[0101] In Example 33, the subject of Example 33 may optionally include the offset-compensated amplifier being a buffer AZ amplifier.

[0102] In Example 34, the subject matter described in any one of Examples 25 to 33 may optionally include the buffer circuit including a buffer AZ amplifier, and the buffer AZ amplifier being configured to include an AZ phase in the output phase of the AZ amplifier.

[0103] Example 35 is a medical imaging device that includes the front-end circuit described in any one of Examples 1 to 24.

[0104] Example 36 is a medical imaging device that includes the compensation circuit described in any one of Examples 25 to 34.

[0105] Example 37 is a spectroscopic apparatus that includes the front-end circuit described in any one of Examples 1 to 24.

[0106] Example 38 is a spectroscopic apparatus that includes the compensation circuit described in any one of Examples 25 to 34.

[0107] Example 39 is a security scanner device that includes the front-end circuit described in any one of Examples 1 to 24.

[0108] Example 40 is a security scanner device that includes the compensation circuit described in any one of Examples 25 to 34.

[0109] In this specification, the term “exemplary” is used to mean “example, case, or illustration.” An example or design described herein as “exemplary” should not necessarily be construed as being preferable or more advantageous than other examples or designs.

[0110] In this specification or in the claims, the terms “plurality” and “multiple” explicitly refer to a quantity greater than one. Terms such as “group,” “set,” “collection,” “series,” “sequence,” and “grouping” in this specification or in the claims refer to one or more quantities, i.e., one or more. Any term expressed in the plural form that does not explicitly refer to “plural” or “multiple” similarly refers to one or more quantities.

[0111] The term "connected" can be understood as meaning a direct or indirect connection and / or interaction (e.g., mechanical, optical, and / or electrical). For example, several elements can be mechanically connected so that they are physically held together (e.g., a plug connected to a socket), and can be electrically connected so that they have a conductive path (e.g., a signal path exists along a chain of communication).

[0112] While the above description and related diagrams may depict the components of an optical device as separate elements, those skilled in the art will understand the various possibilities for combining or integrating discrete optical functions into a single element. Such possibilities include combining two or more components from a single component. Conversely, those skilled in the art will recognize the possibility of separating a single element into two or more discrete elements, such as dividing a single component into two or more distinct components.

[0113] Implementations of the methods described in detail herein are by their nature illustrative and are therefore understandable to be implementable in corresponding devices. Similarly, embodiments of the devices described in detail herein are understandable to be implementable as corresponding methods. Thus, a device corresponding to a method described in detail herein may include one or more components configured to perform each aspect of the relevant method.

[0114] All acronyms defined in the above description apply further to all claims contained herein.

[0115] While this disclosure is shown and described with particular reference to specific embodiments, it should be understood by those skilled in the art that various modifications in form and detail can be made without departing from the spirit and scope of this disclosure as defined by the appended claims. Accordingly, the scope of this disclosure is indicated by the appended claims, and all modifications that fall within the meaning and scope of equivalents of the claims are intended to be incorporated into this disclosure. [Explanation of Symbols]

[0116]

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Claims

1. A front-end circuit (600) for a photon counting component, wherein the front-end circuit is Input section, output section, A signal amplifier (603) configured to operate in a first phase and a second phase, wherein in the first phase the signal amplifier is not used, and in the second phase the signal amplifier receives an input signal from the input section of the front-end circuit and provides an output signal to the output section of the front-end circuit, A feedback capacitor (604) connected in parallel with the signal amplifier, An active feedback circuit (605) including an auto-zero (AZ) active feedback amplifier (606) configured to be connected in parallel with the feedback capacitor in the second phase and isolated from the feedback capacitor in the first phase, Equipped with, The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase, and the active feedback circuit is configured to auto-zero the active feedback amplifier in the AZ phase. Front-end circuit (600).

2. The second phase includes a first period, and the AZ phase includes a second period, the second period being shorter than the first period. The front-end circuit according to claim 1.

3. The second phase of the signal amplifier includes a first output timing, and the output phase of the active feedback amplifier includes a second output timing, and the second output timing and the first output timing are substantially the same. The front-end circuit according to claim 1 or 2.

4. The conditioning amplifier circuit (608) further comprises an output section connected to the baseline control input section of the signal amplifier, and at least one input section connected to the output section of the front-end circuit during the AZ phase and isolated from the output section during the output phase. The front-end circuit according to any one of claims 1 to 3.

5. The active feedback amplifier includes an operational transconductance amplifier (OTA). The front-end circuit according to any one of claims 1 to 4.

6. In the AZ phase, the OTA is isolated from the input section of the front-end circuit. The front-end circuit according to claim 5.

7. The conditioning amplifier circuit is configured to replace the active feedback circuit in the AZ phase. The front-end circuit according to any one of claims 4 to 6.

8. The system further includes a low-impedance output section (614) which is connected to the input section of the signal amplifier and the feedback capacitor in the AZ phase, and isolated from the input section of the signal amplifier and the feedback capacitor in the output phase. The front-end circuit according to any one of claims 1 to 7.

9. The active feedback amplifier circuit further comprises a buffer circuit (610) including an auxiliary AZ capacitor (612) having a capacitance greater than that of the AZ capacitor of the active feedback amplifier circuit, wherein the auxiliary AZ capacitor is isolated from the AZ capacitor during the AZ phase and connected in parallel with the AZ capacitor to the auxiliary input of the active feedback circuit during the output phase. The front-end circuit according to claim 7 or 8.

10. The buffer circuit comprises a buffer AZ amplifier (611), and the buffer AZ amplifier is configured to have an AZ phase in the second phase of the signal amplifier. The front-end circuit according to claim 9.

11. The signal amplifier is further provided with a current buffer circuit (800) in the preceding stage, and the current buffer circuit is configured to isolate the input section of the front-end circuit from a large input capacitance. The front-end circuit according to any one of claims 1 to 10.

12. A compensation circuit for a signal amplifier, The signal amplifier is configured to operate in a first phase and a second phase, in which the signal amplifier is offset compensated, and in the second phase, the signal amplifier receives an input signal from the input section and provides an output signal to the output section based on the input signal, and the compensation circuit is A feedback capacitor connected in parallel with the signal amplifier, An active feedback circuit (905) including an auto-zero (AZ) active feedback amplifier (906) configured to be connected in parallel with the feedback capacitor in the first phase and isolated from the feedback capacitor in the second phase, It includes a buffer circuit (910), The active feedback amplifier is configured to operate in an output phase corresponding to the second phase and an auto-zero (AZ) phase corresponding to at least a portion of the first phase. The active feedback circuit includes an AZ capacitor connected to the auxiliary input of the active feedback amplifier during the AZ phase. The buffer circuit (910) includes an auxiliary AZ capacitor having a capacitance greater than that of the AZ capacitor, the auxiliary AZ capacitor is isolated from the AZ capacitor during the AZ phase, and the auxiliary AZ capacitor is connected in parallel with the AZ capacitor to the auxiliary input of the active feedback amplifier during the output phase. Compensation circuit.

13. The active feedback amplifier is configured such that the auxiliary input section modifies the current source load of the active feedback amplifier so that the output section of the active feedback amplifier becomes approximately a desired baseline voltage. The compensation circuit according to claim 12.

14. The active feedback circuit has a first reference voltage, and the first reference voltage and the baseline reference voltage are substantially the same. The compensation circuit according to claim 13.

15. The buffer circuit includes a buffer AZ amplifier, and the buffer AZ amplifier is configured to have an AZ phase in the second phase of the signal amplifier. The compensation circuit according to any one of claims 12 to 14.

16. A front-end circuit comprising the front-end circuit described in any one of claims 1 to 11, Medical imaging device.

17. A compensation circuit according to any one of claims 12 to 16, Spectroscopic device.

18. A compensation circuit according to any one of claims 12 to 16, Security scanner.

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