A germanium substrate-based indium gallium arsenide double-junction solar cell structure and a preparation method thereof

Abstract

The application discloses a germanium-based indium gallium arsenic double-junction solar cell structure based on a germanium substrate and a preparation method thereof. + a low-temperature superlattice filtering layer and a temperature gradient controlled graded buffer layer. The preparation method adopts MOCVD in-situ continuous epitaxy, and sequentially completes interface pretreatment, tunnel junction growth, buffer layer growth, top cell growth and post-processing. Through atomic-level interface engineering and composite buffer layer technology, the dislocation density is controlled to be 10 5 cm ‑2 The solar cell has the advantages of high photoelectric conversion efficiency, high thermal stability and easy industrialization promotion, and the cell filling factor is higher than 88%, the open circuit voltage is higher than 1.8V. The problems of poor interface quality, many crystal defects and poor coupling of sub-cells of the double-junction solar cell are solved.

Description

Technical Field

[0001] This invention relates to the field of solar cell technology, specifically to a germanium-based indium gallium arsenide double-junction solar cell structure and its fabrication method based on a germanium substrate. Background Technology

[0002] Germanium / indium gallium arsenide dual-junction solar cells have broad application prospects in space photovoltaics and ground-based concentrated photovoltaics due to their reasonable spectral matching and relatively low cost. However, traditional technologies still face the following technical bottlenecks: 1. Poor interface quality: At the interface where germanium (Ge) and III-V group materials (such as indium gallium arsenide (GaInAs)) are bonded, antiphase domains and interface states are easily formed. The core of solar cells is to generate "electron-hole pairs" and generate current. However, antiphase domains and interface states act like "traps", causing electrons and holes to meet and recombine prematurely. These recombinated charge carriers cannot form an effective current, which is equivalent to the battery "generating electricity in vain and leaking current", thus causing high recombination current and affecting the basic performance of photoelectric conversion. 2. Numerous Crystal Defects: The lattice constants of GaInAs and Ge are different, resulting in a mismatch in their atomic spacing. Direct growth of GaInAs and Ge leads to imperfect atomic alignment, generating numerous dislocations (lattice cracks / misalignments), resulting in high dislocation density. Minority carriers are the core carriers of current generation in a battery. These crystal defects, such as dislocations, continuously "capture" minority carriers, causing them to fail before they can be discharged by the electrodes. This significantly reduces minority carrier lifetime and weakens the battery's photoelectric response.

[0003] 3. Poor Sub-cell Coupling: Existing germanium / indium gallium arsenide dual-junction solar cells consist of a germanium bottom cell and an indium gallium arsenide top cell stacked together. A tunnel junction (acting as a "connector" between the two cells) is required for electrical connection. However, traditionally designed tunnel junctions have high resistance and significant light absorption loss. High resistance leads to large losses during current transmission, and high light absorption loss results in sunlight that should be absorbed by the cells being wasted by the tunnel junction. Furthermore, the current matching optimization between the two sub-cells in traditional designs is insufficient. Specifically, the overall output current of a dual-junction cell is determined by the sub-cell with the lower current output. Traditional processes do not properly match the current between the two sub-cells, resulting in one sub-cell producing more current than the other, ultimately forcing the lower sub-cell to be used, severely limiting overall efficiency and preventing efficient photovoltaic synergy.

[0004] Existing technologies often employ thick gradient buffer layers and high-temperature processes. For example, they attempt to alleviate defects caused by lattice mismatch by thickening the transition layer, or to improve crystal growth quality by allowing atoms to move more easily at high temperatures. However, these methods can only alleviate some of the problems individually and cannot fundamentally solve all the aforementioned bottlenecks. For instance, a thick buffer layer may slightly reduce lattice defects, but it increases light absorption loss and deteriorates interface quality; high-temperature processes may improve crystal quality, but they exacerbate the formation of antiphase domains at the interface. The end result is that the battery's fill factor (a core indicator of current transfer efficiency) and open-circuit voltage (a core indicator of battery power generation capacity) are far below the theoretically achievable maximum values, significantly reducing the actual efficiency of the battery.

[0005] Therefore, how to solve the three major technical bottlenecks of interface defects, lattice mismatch, and poor sub-cell matching, so as to make the actual performance of the battery closer to the theoretical level and improve the actual efficiency of the battery, has become an important issue that needs to be addressed by those skilled in the art. Summary of the Invention

[0006] This invention addresses the technical problems of poor interface quality, numerous crystal defects, and poor sub-cell coupling in existing Ge / GaInAs double-junction solar cells by providing a germanium-based indium gallium arsenide double-junction solar cell structure and its fabrication method. Through atomic-level interface engineering, composite strain buffer layer technology, and bandgap optimization design, this invention achieves an order-of-magnitude reduction in cell defect density and a fundamental improvement in interface performance. Simultaneously, it optimizes sub-cell coupling, ultimately obtaining a Ge / GaInAs double-junction solar cell with high photoelectric conversion efficiency and high stability. Furthermore, the fabrication process is compatible with existing equipment and is easily industrialized.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: The first aspect of this invention provides a germanium-based indium gallium arsenide double-junction solar cell structure based on a germanium substrate, comprising, from bottom to top: a p-type germanium substrate (1), an atomically passivated nucleation interface layer (2), a heavily doped tunnel junction (3), a composite strain buffer layer (4), a p-type GaInAs top cell base region (5), an n-type GaInAs top cell emitter region (6), and an AlInP window layer (7). +-GaInAs cap layer (8); the p-type germanium substrate (1) serves as the base region of the bottom cell; the atomic-level passivation nucleation interface layer (2) is formed on the p-type germanium substrate (1) through stepwise surface reaction; the composite strain buffer layer (4) includes a low-temperature superlattice filter layer (41) and a temperature gradient controlled gradient buffer layer (42); the p-type germanium substrate (1) and the composite strain buffer layer (4) are connected through the atomic-level passivation nucleation interface layer (2), and the heavily doped tunnel junction (3) is disposed between the atomic-level passivation nucleation interface layer (2) and the composite strain buffer layer (4); the heavily doped tunnel junction (3) is a p ++ -GaInAs / n ++ -GaInAs heterojunction or p ++ -AlGaAs / n ++ -GaInAs heterojunction.

[0008] Preferably, the atomic-level passivation nucleation interface layer (2) comprises a single-atom-layer arsenic passivation layer (21) and GaIn. 0.01 As stable layer (22); the GaIn 0.01 The As stabilizing layer (22) is formed by epitaxial growth of Group III atoms on the surface of a single-atom-layer arsenic passivation layer (21) followed by the formation of nucleation centers, and then by epitaxy under a Group V source atmosphere. 0.01 The thickness of the As stabilizing layer (22) is 2~5nm.

[0009] Preferably, the low-temperature superlattice filter layer (41) is a low-temperature AlAs / GaAs superlattice defect filter layer, and the gradient buffer layer (42) is an Al... 0.25 Ga 1-x In x As composition gradient layer; the number of periods of the low-temperature superlattice filter layer (41) is 10~20, the Al 0.25 Ga 1-x In x In the As-component graded layer, the indium component x gradually changes from 0 to the target value of 0.15~0.20.

[0010] Preferably, the doping concentration of the heavily doped tunnel junction (3) is ≥1×10⁻⁶. 19 cm -3 Total thickness ≤ 50nm.

[0011] Preferably, the base region of the p-type GaInAs top cell is p-type Ga. 1-y In y The As layer has a y=0.15~0.18 and a thickness of 2~4μm; the n-type GaInAs top-cell emitter region is an n-type Ga... 1-y In yAs layer, y=0.15~0.18, thickness is 0.1~0.3μm.

[0012] Preferably, the AlInP window layer (7) is an n-type Al 1-z In z The P layer has a z=0.6~0.7 and a thickness of 30~50nm; the n + -GaInAs cap layer is n + -Ga 1-y In y As layer, y=0.15~0.18, thickness is 100~200nm.

[0013] The second aspect of this case discloses a method for fabricating a germanium-based indium gallium arsenide double-junction solar cell structure on a germanium substrate, used to fabricate the solar cell structure described in the first aspect, comprising the following steps: S1. Perform atomic-level interface pretreatment on the p-type germanium substrate to form an atomic-level passivation nucleation interface layer, and grow a heavily doped tunnel junction on the atomic-level passivation nucleation interface layer. S2. A composite strain buffer layer is grown on the heavily doped tunnel junction; S3. A p-type GaInAs top cell base region, an n-type GaInAs top cell emitter region, an AlInP window layer, and an n-type GaInAs top cell emitter region are sequentially grown on the composite strain buffer layer. + -GaInAs cap layer to grow top cell structure; S4. Post-process the structure after epitaxial growth, prepare electrodes and deposit an anti-reflection film to obtain a germanium-based indium gallium arsenide double-junction solar cell.

[0014] Preferably, the specific steps of the atomic-level interface preprocessing in step S1 include: S11. A p-type germanium substrate is used, and the polished p-type germanium substrate is subjected to high-temperature deoxidation treatment. S12. Cool down to 500~600℃, and use atomic diffusion mode to pulse-feed the phosphorus source precursor to diffuse P atoms onto the p-type germanium substrate to form the n-doped Ge substrate emitter region. S13. Cool down to 400~450℃, and pulse the arsenic source precursor using atomic layer deposition mode to form a single-atom-layer arsenic passivation layer on the Ge surface. S14. Without a group V source, a group III source precursor is pulsed in, and the adsorption amount is controlled to be 0.2~0.5 monolayers to form group III atom nucleation centers. S15. GaIn growth under a V-type source atmosphere 0.01 As a stabilizing layer, the atomic-level passivation nucleation interface layer is prepared.

[0015] Preferably, the specific steps of the intelligent growth composite strain buffer layer in step S2 include: S21. Grow a low-temperature AlAs / GaAs superlattice defect filter layer at 500~550℃ with a period number of 10~20; S22, Al grown under temperature gradient control 0.25 Ga 1-x In x As a gradient layer, the indium composition x is gradually increased from 0 to 0.15~0.20, the growth temperature is linearly increased from 520℃ to 620℃, and an intermittent migration-enhanced epitaxial mode is adopted.

[0016] Preferably, the post-processing in step S4 is selective annealing using pulsed laser with a laser energy density of 0.4~0.7 J / cm². 2 The electrodes are a top electrode Ti / Pd / Ag and a back electrode Ni / Au, and the anti-reflection film is a MgF2 / ZnS double-layer anti-reflection film.

[0017] Compared with the prior art, the beneficial effects of the present invention are: 1. This design addresses two key aspects. First, by placing the heavily doped tunnel junction between an atomically passivated nucleation interface layer and a composite strain buffer layer, it achieves low-resistance electrical coupling between the bottom and top cells, avoiding lattice matching conflicts caused by direct contact with the top cell. Second, the atomically passivated nucleation interface layer eliminates antiphase domains and interface states at the Ge / III-V group interface, while the composite strain buffer layer enables smooth lattice transition and defect filtering, eliminating the need for complex interface modifications and thick buffer layer structures. This approach avoids the need for additional interface modification layers and defect suppression structures, fundamentally eliminating the technical pain points of high interface recombination, severe lattice mismatch, and poor sub-cell coupling in traditional structures. A simpler, integrated stacked structure achieves efficient photoelectric matching between the germanium substrate and the GaInAs top cell, while directly utilizing the synergistic effect of each functional layer to achieve a revolutionary efficiency improvement, solving the problems of low photoelectric conversion efficiency and high defect density in traditional germanium-based double-junction cells. The atomically passivated interface and low defect density structural design endow the device with excellent thermal stability, resulting in minimal performance degradation under high-temperature operating conditions, further ensuring the long-term reliability of the battery.

[0018] 2. In this case, the atomic-level passivation nucleation interface layer is designed as a single-atom-layer arsenic passivation layer, a group III atom nucleation center, and an ultrathin GaIn layer. 0.01The composite structure of the As stabilizing layer, combined with the ultra-thin heavily doped design of the heavily doped tunnel junction, and the composite strain buffer layer adopting a combination of a low-temperature superlattice filter layer and a composition gradient layer, eliminates the need for complex structural modification and multi-step modification processes. The synergistic effect of each functional layer gives the battery excellent electrical performance. Thanks to the extremely low defect density and perfect interface characteristics, the battery fill factor can exceed 88%, and the open-circuit voltage can exceed 1.8V, achieving a revolutionary efficiency improvement. At the same time, the overall structural design is simple, the layers are highly adaptable, and there is no need to add additional performance optimization structures. The volume is significantly simplified compared with traditional germanium-based dual-junction batteries, making it suitable for various application scenarios such as space photovoltaics and ground-based concentrated photovoltaics, balancing high performance and structural simplicity.

[0019] 3. The composite strain buffer layer in this case adopts a combination of a low-temperature superlattice filter layer and a temperature gradient-controlled compositional gradient layer, coupled with a precisely designed atomic-level passivation nucleation interface layer. With reasonable parameter constraints for each functional layer, a stable interlayer connection and crystal structure are formed. Even under complex working conditions such as high temperature and high radiation, the structure can maintain stability and avoid problems such as interlayer delamination and increased defects. Each functional layer has a clear division of labor and synergistic effect, which not only achieves high efficiency in light absorption and carrier separation and transport, but also suppresses interface recombination and filters crystal defects through multiple structural designs, eliminating problems such as low open-circuit voltage, poor fill factor and rapid performance degradation of the battery from the source. At the same time, the overall structure does not require complex auxiliary fixation and modification structures, and the preparation process does not require special processes. It is compatible with the existing industrial system and takes into account the stability, high performance and industrial applicability. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the double-junction solar cell structure in this case. Detailed Implementation

[0021] The following examples further illustrate the features and other related characteristics of the present invention in detail, to facilitate understanding by those skilled in the art: Example

[0022] like Figure 1 This embodiment is a germanium-based indium gallium arsenide double-junction solar cell structure based on a germanium substrate. From bottom to top, it consists of a p-type germanium substrate (1), an atomic-level passivation nucleation interface layer (2), a heavily doped tunnel junction (3), a composite strain buffer layer (4), a p-type GaInAs top cell base region (5), an n-type GaInAs top cell emitter region (6), an AlInP window layer (7), and an n-type GaInAs top cell emitter region (8). + -GaInAs cap layer (8); The specific implementation methods of each layer structure are as follows: p-type germanium substrate (1): A high-purity germanium substrate with p-type Ge(100) crystal orientation of 6° is selected. (100) is the Miller index of semiconductor single crystal and the resistivity is controlled to be 0.01Ω・cm. This substrate not only provides physical support for the entire cell, but also serves as the p-type base region of the bottom cell in a double-junction cell. Relying on the 0.66eV bandgap of germanium material, it can achieve light absorption in the long-wave near-infrared band (>900nm) of the solar spectrum, thus completing the photoelectric conversion basis of the bottom cell.

[0023] Atomic-scale passivation nucleation interface layer (2): It is formed in situ on the polished epitaxial surface of the p-type germanium substrate (1) through a stepwise surface reaction process. It is an atomic-scale functional interface layer that grows directly on the epitaxial surface of the germanium substrate. It is the core connection layer between the germanium substrate and the subsequent III-V semiconductor layer, realizing the passivation of the substrate surface and the nucleation preparation of the subsequent layer.

[0024] Heavily doped tunnel junction (3): using p ++ -GaInAs / n ++ -GaInAs heterojunction or p ++ -AlGaAs / n ++ The heavily doped heterojunction structure of GaInAs heterojunction is epitaxially grown on the atomic passivation nucleation interface layer (2) and located between the atomic passivation nucleation interface layer (2) and the composite strain buffer layer (4), serving as the electrical coupling core layer between the bottom cell and the top cell, thereby realizing efficient tunnel transport of charge carriers.

[0025] Composite strain buffer layer (4): grown on heavily doped tunnel junction (3), including two sub-layers: low temperature superlattice filter layer (41) and temperature gradient controlled gradient buffer layer (42). The two are continuously epitaxially grown to achieve a smooth transition of lattice constant and filter of crystal defects.

[0026] p-type GaInAs top cell base region (5): grown on the gradient buffer layer (42) of the composite strain buffer layer (4), is a p-type doped GaInAs semiconductor layer, which is the core light absorption layer of the top cell. Relying on its 0.7~0.9eV bandgap, it can absorb light in the mid-short wave near-infrared band (600~900nm) of the solar spectrum.

[0027] The emitter region (6) of the n-type GaInAs top cell is directly grown on the base region (5) of the p-type GaInAs top cell and forms a homogeneous pn junction with the base region. It serves as the carrier separation layer of the top cell and achieves efficient separation and transport of photogenerated electron-hole pairs through the built-in electric field.

[0028] AlInP window layer (7): grown directly on the emitter region (6) of the n-type GaInAs top cell, it is a wide bandgap n-type AlInP semiconductor layer that matches the GaInAs cell lattice and mainly achieves passivation and recombination suppression on the surface of the top cell.

[0029] n + -GaInAs cap layer (8): This is the top layer of the battery. It is grown directly on the AlInP window layer (7) and is a highly n-type doped GaInAs layer. It serves as the ohmic contact layer for the top electrode, enabling low-resistance connection between the metal electrode and the semiconductor layer.

[0030] In this structure, the p-type germanium substrate (1) and the composite strain buffer layer (4) are indirectly connected through an atomic passivation nucleation interface layer (2), and the heavily doped tunnel junction (3) is located between the atomic passivation nucleation interface layer (2) and the composite strain buffer layer (4), forming a complete double-junction photoelectric conversion structure of "germanium bottom cell - atomic passivation layer - heavily doped tunnel junction - composite buffer layer - GaInAs top cell".

[0031] As described above, the germanium-based indium gallium arsenide dual-junction solar cell structure in this case, through the integrated stacked structure from bottom to top and the precise layout design of each functional layer, on the one hand, places the heavily doped tunnel junction between the atomically passivated nucleation interface layer and the composite strain buffer layer, achieving low-resistance electrical coupling between the bottom and top cells, while avoiding lattice matching conflicts caused by direct contact with the top cell; on the other hand, the atomically passivated nucleation interface layer fundamentally eliminates the antiphase domains and interface states of the Ge / III-V group interface, and the composite strain buffer layer achieves a smooth transition of the lattice constant and efficient filtering of crystal defects, without the need for additional interface modification layers and defect suppression structures, thus completely solving the core technical pain points of traditional structures such as high interface recombination, severe lattice mismatch, and poor coupling of sub-cells. The synergistic effect of each functional layer not only achieves efficient photoelectric matching between the germanium substrate and the GaInAs top cell, but also brings about a revolutionary efficiency improvement, giving the germanium-based indium gallium arsenide double-junction solar cell structure of this invention excellent electrical performance. Furthermore, due to the extremely low defect density and perfect interface characteristics of the germanium-based indium gallium arsenide double-junction solar cell structure, the cell fill factor can exceed 88%, and the open-circuit voltage can exceed 1.8V. Simultaneously, the atomically passivated interface and low defect density structural advantages endow the device with excellent thermal stability, resulting in minimal performance degradation under high-temperature operating conditions. Thus, the solar cell structure of this invention integrates multiple functions such as light absorption, carrier separation and transport, interface passivation, and defect suppression. Precise tunnel junction layout achieves efficient coupling of sub-cells, and the synergistic effect of each functional layer completes comprehensive performance optimization, ultimately achieving a high degree of unity between structural design, photoelectric conversion efficiency, and operational stability.

[0032] like Figure 1As shown, in a preferred embodiment, the atomic-level passivation nucleation interface layer (2) comprises a single-atom-layer arsenic passivation layer (21) and GaIn. 0.01 As stable layer (22), the two are integrated interface layers formed continuously in situ, with no obvious interlayer interface, and the entire process is completed in situ in the MOCVD equipment; among them, GaIn 0.01 The As stable layer (22) is formed by first creating group III atom nucleation centers on the surface of the monolayer arsenic passivation layer (21), and then epitaxially growing them under a group V source atmosphere. The group III atom nucleation centers are atomic clusters composed of Ga and In atoms, specifically GaIn. 0.01 As the core precursor for the growth of the stable layer (22), it forms an inseparable growth association with the stable layer.

[0033] Among them, the single-atom-layer arsenic passivation layer (21) is a dense and continuous single-atom-layer As formed on the surface of the germanium substrate. The arsenic source precursor is pulsed in the atomic layer deposition mode so that the As atoms form covalent bonds with the dangling bonds on the surface of the germanium substrate, thereby achieving complete passivation of the substrate surface.

[0034] Gain 0.01 As stabilizing layer (22): Based on the nucleation centers of group III atoms, it is epitaxially grown under a group V source atmosphere. The indium composition is fixed at 0.01, and the thickness is strictly controlled at 2~5nm (optimal implementation is 5nm), which is an ultrathin crystalline semiconductor layer. The adsorption amount of the group III atom nucleation centers on the surface of the single-atom-layer arsenic passivation layer (21) is 0.2~0.5 single-atom layers, forming uniformly distributed nucleation sites, which ensures that GaIn 0.01 The atomically flat growth of the As stable layer (22) provides structural stability for the subsequent growth of heavily doped tunnel junctions, while avoiding the accumulation of interfacial stress due to excessive layer thickness.

[0035] As described above, this case utilizes a single-atom-layer arsenic passivation layer and a "Group III atom nucleation center + Group V source" to synergistically form GaIn. 0.01 The composite atomic-level structure design of the As stabilizing layer utilizes the dangling bonds between the single-atom-layer arsenic passivation layer and the germanium substrate to thoroughly passivate the substrate surface and minimize the interface recombination current. Furthermore, it forms uniform nucleation sites through group III atom nucleation centers, combined with an ultrathin GaIn layer of 2–5 nm. 0.01The arsenic stabilizing layer achieves an initial lattice transition, providing an atomically flat and stable substrate for subsequent layer growth. This eliminates the need for complex surface etching and multi-layer transition modification processes, fundamentally removing the problems of complex traditional interface layer fabrication processes, poor passivation effects, and uneven nucleation. The atomically-level structure formed through simpler stepwise surface reactions achieves perfect passivation of the germanium substrate surface and directly lays a high-quality nucleation foundation for subsequent III-V layer growth, solving the problems of poor connectivity and easy generation of interface states in traditional Ge / III-V interfaces. Furthermore, the in-situ continuous fabrication of the integrated structure simplifies the process steps, eliminating the need for intermediate wafer removal and ensuring high repeatability. Thus, the atomically passivated nucleation interface layer design in this case achieves surface passivation, uniform nucleation, and lattice transition. Single-atom-layer arsenic passivation suppresses interface recombination, III-atom nucleation centers working in conjunction with V-atom sources ensure smooth growth of the stabilizing layer, and the ultrathin stabilizing layer achieves structural transition and improved stability, resulting in dual optimization of interface quality and subsequent epitaxial quality.

[0036] As a preferred embodiment, the low-temperature superlattice filter layer (41) is specifically a low-temperature AlAs / GaAs superlattice defect filter layer, which is grown under low-temperature epitaxial conditions of 500~550℃ and adopts a periodic structure of "AlAs layer (5nm) + GaAs layer (5nm)". The number of periods is strictly controlled to be 10~20 (15 periods is the optimal implementation). Each periodic layer is an atomically flat epitaxial growth structure with clear interlayer interfaces.

[0037] The gradient buffer layer (42) is specifically Al 0.25 Ga 1-x In x As composition gradient layer is directly grown on low temperature superlattice filter layer (41). The aluminum composition is fixed at 0.25, and the indium composition x is linearly gradient from 0 to 0.15~0.20 (the optimal implementation is 0.20). Temperature gradient control is used simultaneously during the growth process to achieve a smooth transition of lattice constant from germanium substrate to GaInAs top cell.

[0038] The two sub-layers of the composite strain buffer layer (4) are continuous epitaxial growth structures. The low-temperature superlattice filter layer (41) is the defect filtering core, and the gradient buffer layer (42) is the lattice transition core. The two work together to achieve the dual function of "defect filtering-lattice transition".

[0039] As described above, the low-temperature AlAs / GaAs superlattice defect filtering layer in this case, through a periodic heterojunction interface, bends and annihilates dislocations generated during epitaxial growth within the superlattice layer, preventing them from extending to the subsequent top cell layer, thus controlling the dislocation density of the cell to 10. 5 cm -2The following significantly improves the crystal quality of the semiconductor layer, thereby efficiently filtering crystal defects and greatly reducing dislocation density. Al 0.25 Ga 1-x In x The As composition gradient layer achieves a continuous, abrupt transition of the lattice constant from the germanium substrate (5.658 Å) to the GaInAs top cell (5.7~5.8 Å) through a linear gradient of the indium composition. This precise and smooth transition of the lattice constant completely alleviates the lattice mismatch problem between GaInAs and the germanium substrate, avoiding stress defects and carrier recombination centers caused by lattice mismatch. The low-temperature superlattice filter layer is grown at 500~550℃ using low-temperature epitaxial growth, which significantly reduces thermal defects such as thermally induced dislocations and uneven atomic diffusion compared to high-temperature growth, ensuring the crystal quality and defect filtering efficiency of the superlattice layer. Moreover, the gradient buffer layer has a fixed aluminum composition of 0.25, and the lattice transition is achieved only by adjusting the indium composition, reducing process control parameters, improving the accuracy and repeatability of the gradient buffer layer growth, and reducing the difficulty of industrial production. In addition, the composite structure of the superlattice filter layer and the composition gradient layer solves both the lattice mismatch problem and the crystal defect problem, doubly improving the growth quality of the subsequent top cell layer and ensuring the structural and performance stability of the cell under high temperature and high irradiation conditions.

[0040] As a preferred implementation, in specific implementation, the heavily doped tunnel junction (3) regardless of the p ++ -GaInAs / n ++ -GaInAs heterojunction or p ++ -AlGaAs / n ++ -GaInAs heterojunction structure, p ++ Layer and n ++ The doping concentration of each layer is ≥1×10 19 cm -3 (Optimal implementation is 2×10) 19 cm -3 In-situ heavy doping is performed using high-efficiency doping sources such as Si and Be to ensure doping uniformity and activation rate. The heavily doped tunnel junction (3) is an ultrathin heterojunction structure, p ++ Layer and n ++ The total thickness of the layer is strictly controlled to be ≤50nm (optimal implementation is 40nm, where p ++ 20nm layer, n ++ Each layer is 20nm thick and grown epitaxially to ensure carrier tunneling efficiency. The doping process is carried out simultaneously with the epitaxial growth, using MOCVD in-situ doping technology to avoid crystal defects and interface contamination caused by subsequent doping.

[0041] As mentioned above, by precisely limiting the doping concentration and thickness of the heavily doped tunnel junction, on the one hand, p ++ Layer and n++ The doping concentration of each layer is controlled to be ≥1×10 19 cm -3 The high doping concentration creates a heavily doped degenerate semiconductor in the tunnel junction, significantly reducing the carrier tunneling barrier and ensuring rapid and efficient carrier tunneling between the bottom and top cells. This achieves low-resistance electrical coupling between sub-cells and effectively improves the cell's fill factor. Furthermore, controlling the total thickness of the tunnel junction to ≤50nm, the ultra-thin structure design ensures that the tunnel junction absorbs almost no effective wavelengths of the solar spectrum, avoiding light energy loss caused by the tunnel junction and guaranteeing the cell's short-circuit current density. Thus, it eliminates the need for complex multilayer tunnel junction structures and high-loss thick-layer designs, fundamentally eliminating the problems of high resistance, large light absorption loss, and low carrier tunneling efficiency inherent in traditional tunnel junctions. Through a simpler ultra-thin heavily doped heterojunction structure, it achieves both rapid and efficient carrier tunneling and directly avoids additional light energy loss, solving the problems of low fill factor and low short-circuit current caused by traditional sub-cell coupling structures. The in-situ heavy doping and dual heterojunction selection design makes the process highly adaptable and can be flexibly adjusted according to application scenarios.

[0042] As a preferred embodiment, in specific implementation, the p-type GaInAs top cell base region (5) is specifically a p-type Ga... 1-y In y The As layer is in-situ doped using a p-type doping source such as Zn, with the indium composition (y) strictly controlled at 0.15~0.18 (optimal implementation is 0.18), a thickness of 2~4 μm (optimal implementation is 3.0 μm), and a doping concentration of 1×10⁻⁶. 17 cm -3 The low doping of the n-type GaInAs top cell forms the core light-absorbing layer. Specifically, the emitter region (6) of the n-type GaInAs top cell is an n-type Ga... 1-y In y The As layer is an epitaxial structure with the same composition as the p-type base region. The indium composition γ is completely consistent with that of the base region, ranging from 0.15 to 0.18 (0.18 is the optimal implementation). In-situ doping is performed using an n-type doping source such as Si, with a thickness of 0.1 to 0.3 μm (0.2 μm is the optimal implementation) and a doping concentration of 5 × 10⁻⁶. 18 cm -3 The top cell has medium to high doping. The base and emitter regions of the top cell are homogeneous pn junctions grown continuously via epitaxial growth. During the growth process, only the doping source is switched, and there is no need to adjust the Ga / In source flux ratio, ensuring the atomic-level flatness of the pn junction interface.

[0043] As described above, by using a homogeneous pn junction design with the same composition in the base region of a p-type GaInAs top cell and the emitter region of an n-type GaInAs top cell, the indium composition of both is controlled to 0.15~0.18, achieving a homogeneous junction interface without lattice mismatch or bandgap abrupt changes, ensuring efficient separation and directional transport of photogenerated carriers. On the other hand, the 2~4μm low-doping design in the base region ensures sufficient light absorption and long carrier lifetime, while the 0.1~0.3μm medium-high doping design in the emitter region reduces contact resistance, achieving an optimal balance between light absorption and transport. Thus, the traditional heterojunction top cell structure and complex doping gradient design are not required, fundamentally eliminating the problems of high recombination, hindered carrier transport, and imbalance between light absorption and transport in traditional top cells. Through a simpler homogeneous pn junction structure, efficient carrier separation is achieved, and sufficient light absorption and efficient transport are directly considered, solving the problems of low photoelectric conversion efficiency and poor carrier collection rate in traditional GaInAs top cells. The process design of continuous epitaxy, which only switches the doping source, makes the preparation steps simple and highly repeatable.

[0044] As a preferred implementation, the AlInP window layer (7) is specifically an n-type Al 1-z In z The P layer is in-situ doped using n-type doping sources such as Si, with the indium composition z strictly controlled at 0.6~0.7 and a thickness of 30~50nm (optimal implementation is 40nm). It is a wide bandgap semiconductor layer and is directly epitaxially grown on the emitter region (6) of the n-type GaInAs top cell. + -GaInAs cap layer (8) specifically n + -Ga 1-y In y The As layer is an epitaxial structure with the same composition and molecular weight as the base and emitter regions of the top cell. The indium composition (γ) is completely consistent with that of the top cell, ranging from 0.15 to 0.18 (optimal implementation is 0.18). It is heavily doped using an n-type doping source such as Si, with a doping concentration of 1 × 10⁻⁶. 19 cm -3 The thickness is 100~200nm (150nm for optimal implementation), forming the top layer of the cell. The window layer and the cap layer are continuous epitaxial growth structures. The cap layer uses the same Ga / In source parameters as the top cell during growth, only increasing the doping concentration to ensure the continuity and controllability of the process.

[0045] Thus, this case uses the AlInP window layer and n + The synergistic design of the GaInAs cap layer, on the one hand, utilizes an n-type AlInP wide bandgap ultrathin window layer with z=0.6~0.7 to effectively block the diffusion of top-cell carriers to the surface and significantly suppress surface recombination; on the other hand, through the n-type AlInP cap layer with the same composition as the top cell... +The heavily doped GaInAs cap layer design achieves low-resistance ohmic contact with the top electrode, ensuring efficient photocurrent extraction. This eliminates the need for complex multilayer surface passivation structures and special electrode contact layer designs, fundamentally eliminating the problems of high surface recombination, high electrode contact resistance, and low photocurrent extraction efficiency in traditional top-cell batteries. The simpler window layer + cap layer dual-layer structure achieves both efficient passivation of the top cell surface and direct low-resistance electrode contact, solving the problems of low open-circuit voltage and high current collection loss in traditional top-cell batteries. The ultra-thin window layer and precisely thickened cap layer design eliminate additional light absorption loss, resulting in a high degree of structural and performance compatibility. Example

[0046] This embodiment describes a method for fabricating the germanium-based indium gallium arsenide double-junction solar cell structure described in Example 1. It utilizes MOCVD epitaxial growth technology combined with atomic-level interface control, intelligent growth of composite buffer layers, and device post-processing techniques. The entire process is completed in standardized semiconductor manufacturing equipment, and each step strictly matches the stacking sequence of the cell structure. The specific implementation steps are as follows: Step S1: Atomic-level interface pretreatment and growth of heavily doped tunnel junction: Take the p-type Ge(100) substrate with a 6° offset and perform in-situ atomic-level interface pretreatment in the MOCVD equipment. Atom-level passivation nucleation interface layer (2) is formed on the surface of the germanium substrate through a stepwise surface reaction process. After completion, a heavily doped tunnel junction is directly grown in-situ on the interface layer (3). There is no intermediate wafer removal throughout the process, which ensures the interface quality.

[0047] Step S2: Growth of composite strain buffer layer: On the surface of the heavily doped tunnel junction (3), a composite strain buffer layer (4) is continuously epitaxially grown using a smart growth process. First, a low-temperature superlattice filter layer (41) is grown, and then a temperature gradient controlled Al layer is grown. 0.25 Ga 1-x In x As composition gradient layers are used to achieve integrated fabrication of defect filtering and lattice transition.

[0048] Step S3: Growth of the top cell structure: On the surface of the composite strain buffer layer (4), the p-type GaInAs top cell base region (5) and the n-type GaInAs top cell emitter region (6) are continuously epitaxially grown from bottom to top, followed by the growth of the AlInP window layer (7) and the n-type GaInAs top cell emitter region (6). + -GaInAs cap layer (8) completes the integrated epitaxial growth of the entire top cell structure, forming a complete semiconductor epitaxial stack structure.

[0049] Step S4: Device post-processing and finished product preparation: The semiconductor stacked structure that has completed epitaxial growth is taken out from the MOCVD equipment and subjected to post-processing processes such as annealing repair, electrode preparation and anti-reflection film deposition in sequence to finally obtain the finished germanium-based indium gallium arsenide double junction solar cell.

[0050] In this method, all epitaxial growth steps are performed continuously in situ in an MOCVD device, with the substrate only removed during the post-processing stage, reducing external environmental contamination and ensuring the quality of device fabrication.

[0051] As described above, this project employs a step-by-step fabrication method perfectly matched to the battery structure. On one hand, it strictly adheres to a bottom-up stacking sequence, achieving in-situ continuous epitaxy of atomic-level interface pretreatment, tunnel junction growth, composite buffer layer growth, and top cell structure growth, reducing interface contamination and lattice damage. On the other hand, it integrates core technologies such as atomic-level interface control, intelligent buffer layer growth, and ultra-thin tunnel junction fabrication into the process, precisely addressing the three major technological bottlenecks of traditional fabrication processes. This eliminates the need for complex step-by-step etching, multiple furnace loading, and additional modification processes, fundamentally eliminating the problems of cumbersome steps, poor interface quality, numerous crystal defects, and low structural compatibility inherent in traditional fabrication processes. Through a simpler in-situ continuous epitaxy process, it achieves precise fabrication of the battery structure and directly leverages the synergistic effect of core technologies to improve the overall battery performance, solving the problems of low photoelectric conversion efficiency and poor batch stability in batteries fabricated using traditional methods. The entire process is designed based on mainstream MOCVD equipment, eliminating the need for special equipment and ensuring strong industrial adaptability. This enables atomic-level interface preparation, high-quality epitaxial growth, and integrated molding of functional layers. The in-situ continuous process ensures the quality of preparation, the matching of steps and structure achieves precise molding, and the integration of core technologies solves the industry's technical bottlenecks. Preparation efficiency and battery performance are improved simultaneously.

[0052] As a specific implementation method, the specific implementation steps in step S1 are as follows: S11. A p-type germanium substrate is used, and the polished p-type germanium substrate is subjected to high-temperature deoxidation treatment. S12. Cool down to 500~600℃, and use atomic diffusion mode to pulse-feed the phosphorus source precursor to diffuse P atoms onto the p-type germanium substrate to form the n-doped Ge substrate emitter region. S13. Cool down to 400~450℃, and pulse the arsenic source precursor using atomic layer deposition mode to form a single-atom-layer arsenic passivation layer on the Ge surface. S14. Without a group V source, a group III source precursor is pulsed in, and the adsorption amount is controlled to be 0.2~0.5 monolayers to form group III atom nucleation centers. S15. GaIn growth under a V-type source atmosphere 0.01 As a stabilizing layer, the atomic-level passivation nucleation interface layer is prepared.

[0053] After completing the above steps, a heavily doped tunnel junction (3) is directly grown in situ on the atomic passivation nucleation interface layer (2) without adjusting the core parameters of the reaction chamber.

[0054] As described above, this case utilizes a step-by-step, precise process design with atomic-level interface pretreatment. On one hand, it achieves atomic-level cleaning of the substrate surface through high-temperature deoxidation, forms a uniform bottom cell emission region and suppresses antiphase domains through phosphorus source pulse diffusion at 500-600℃, and achieves perfect surface passivation through atomic-layer deposition of an arsenic passivation layer at 400-450℃. On the other hand, it prepares GaIn through the nucleation of group III atoms without group V sources and... 0.01 As a stable layer is grown, it lays a high-quality nucleation foundation for subsequent layers. This eliminates the need for complex surface cleaning and multi-layer pre-modification processes, fundamentally eliminating the problems of low cleanliness, poor passivation, uneven nucleation, and easy generation of antiphase domains inherent in traditional interface pretreatment processes. Through a simpler stepwise temperature and power mode control process, it achieves comprehensive pretreatment of the germanium substrate surface and directly provides an atomically flat and stable interface for subsequent III-V layer growth, solving the problems of high interface recombination and poor subsequent epitaxial quality caused by traditional pretreatment processes. The in-situ continuous design of all steps results in high process efficiency and low contamination.

[0055] As a specific implementation method, the specific steps of the intelligent growth composite strain buffer layer in step S2 include: S21. Grow a low-temperature AlAs / GaAs superlattice defect filter layer at 500~550℃ with a period number of 10~20; S22, Al grown under temperature gradient control 0.25 Ga 1-x In x As a gradient layer, the indium composition x is gradually increased from 0 to 0.15~0.20, the growth temperature is linearly increased from 520℃ to 620℃, and an intermittent migration-enhanced epitaxial mode is adopted.

[0056] As described above, the low-temperature growth conditions of 500–550°C significantly reduce thermally induced defects and atomic diffusion inhomogeneity. The 10–20 period AlAs / GaAs superlattice structure effectively bends and annihilates dislocations at the periodic heterojunction interface, firmly filtering defects within the buffer layer and greatly improving the crystal quality of the subsequent top cell layer. By combining a linear gradient of the indium composition with a linear increase in growth temperature, a dual smooth transition of the lattice constant from the germanium substrate to the GaInAs top cell is achieved, completely alleviating the stress problems caused by lattice mismatch and avoiding stress-induced lattice defects, interface cracking, and carrier recombination center formation. Thus, the traditional high-temperature single-gradient buffer layer growth process and complex dislocation suppression methods are unnecessary, fundamentally eliminating the problems of poor defect filtering, abrupt lattice transitions, and uneven growth surfaces inherent in traditional buffer layer growth processes. Through a simpler low-temperature + dual-gradient + intermittent intelligent growth process, efficient defect filtering and precise lattice transition are achieved, while directly ensuring atomically flat growth of the buffer layer, solving the problems of poor top cell crystal quality and low carrier lifetime caused by traditional buffer layer growth. The design of continuous growth without the need to adjust equipment parameters makes the process highly controllable and repeatable.

[0057] In one specific implementation, the post-processing in step S4 is selective annealing using pulsed laser with a laser energy density of 0.4~0.7 J / cm²; the electrodes are a top electrode Ti / Pd / Ag and a back electrode Ni / Au, and the anti-reflection film is a MgF2 / ZnS double-layer anti-reflection film.

[0058] As mentioned above, 0.4~0.7 J / / cm 2 KrF excimer laser selective annealing uses the precise thermal effect of the laser to recrystallize residual lattice defects, dislocations, and irregularly arranged atomic regions generated during epitaxial growth, further reducing the defect density of the battery, improving carrier lifetime and transport efficiency, while avoiding thermal defects and substrate damage caused by traditional high-temperature annealing. The dedicated pairing of Ti / Pd / Ag top electrode and Ni / Au back electrode forms a low-resistance, high-stability ohmic contact with the semiconductor layer, ensuring efficient conduction of photocurrent, significantly reducing electrode contact resistance loss, and effectively improving the battery's fill factor; the comb-shaped top electrode design ensures current collection efficiency while minimizing sunlight shading, improving light absorption efficiency.

[0059] The MgF2 / ZnS double-layer anti-reflection film effectively counteracts light reflection from the semiconductor and electrode surfaces through optical interference, allowing more of the effective solar spectrum (400-1100nm) to enter the battery, significantly reducing light reflection loss and increasing the short-circuit current density, thereby greatly improving light absorption efficiency. Furthermore, a step-by-step post-processing procedure—laser annealing repair, specialized electrode fabrication, and double-layer anti-reflection film deposition—sequentially addresses three core issues: crystal defects, electrical extraction, and light absorption loss. This comprehensive and systematic improvement in the battery's photoelectric performance ensures the finished battery possesses high open-circuit voltage, high short-circuit current, and high fill factor. Example

[0060] Example 3 details the specific production steps for preparing a germanium-based indium gallium arsenide double-junction solar cell using the preparation method of Example 2, as follows: 1. A p-type Ge(100) substrate with a 6° offset and a resistivity of 0.01 Ω·cm was selected as the substrate; 2. Atomic-level interface pretreatment and tunnel junction growth: The substrate was deoxidized in H2 at 720℃ for 10 minutes; The temperature was lowered to 550℃, and PH3 was pulsed through (10 seconds) and purge (10 seconds) for 30 times to form the emitter region of the n-doped Ge bottom cell. The temperature was lowered to 420°C, and TBAs were pulsed in (1 second) and purged (10 seconds) 20 times to form a single-atom-layer arsenic passivation layer. TBAs are tert-butyl arsenic, which is an arsenic passivation source that can be used at low temperature (420°C) to replace the highly toxic AsH3 and to form a single-atom-layer arsenic passivation layer (21) to passivate the dangling bonds on the germanium surface.

[0061] Without AsH3, pulsed TMGa and TMIn (0.5 seconds) and purging (15 seconds) control the Ga / In coverage to about 0.3 monolayers, forming group III nucleation centers; 5nm GaIn was grown at 420℃ by introducing AsH3. 0.01 As a stable layer; growth n ++ -GaAs(20nm,2×10 19 cm -3 ) / p ++ -Al 0.3 GaAs (20nm, 2×10) 19 cm -3 Tunnel knot.

[0062] 3. Growth of composite strain buffer layer: AlAs (5nm) / GaAs (5nm) superlattice defect filtering layer grown at 500℃ for 15 cycles; Al growth 0.25 Ga 1-x In x As gradient buffer layer (1.5μm, x: 0→0.2), temperature linearly increased from 530℃ to 630℃, using an intermittent mode of "6 seconds of power-on, 24 seconds of interruption"; 4. Growth of the top cell structure: Growth of p-Ga 0.82 In 0.18 As base region (3.0 μm, 1 × 10⁻⁶) 17 cm -3 ); Growth of n-Ga 0.82 In 0.18 As emitter (0.2μm, 5×10⁻⁶) 18 cm -3 ); Growth of n-Al 0.3 In 0.7 P-window layer (40nm); growth n + -Ga 0.82 In 0.18 As cap layer (150nm, 1×10) 19 cm -3 ); 5. Post-processing and device fabrication: KrF excimer laser (0.55 J / cm) was used. 2 Surface scanning annealing was performed at 25 ns. Photolithography is used to fabricate the top gate line electrode (Ti / Pd / Ag), and evaporation is used to fabricate the back electrode (Ni / Au). The target battery was obtained by depositing a MgF2 / ZnS bilayer antireflective film.

[0063] The battery prepared in this embodiment was subjected to performance testing. The results showed that the battery fill factor was 89.2%, the open-circuit voltage was 1.85V, and the dislocation density was controlled at 8×10⁻⁶. 4 cm -2 The following results show that, under AM1.5G standard conditions, the photoelectric conversion efficiency is significantly better than that of Ge / GaInAs double-junction cells prepared by traditional processes, and the performance degradation is ≤3% after 1000h of high-temperature testing at 85℃. Example

[0064] Example 4 is a comparative example of Example 3. It uses a conventional process to prepare a Ge / GaInAs double-junction solar cell. After high-temperature arsenination of the Ge substrate, a 2.0 μm GaInAs gradient buffer layer is directly grown (at a fixed temperature of 630°C). The rest of the structure is the same as in Example 3.

[0065] Performance tests were conducted on the battery prepared in this comparative example, and the results showed that the battery had a high interface defect density, with a dislocation density of 5 × 10⁻⁶. 8 cm -2 The fill factor is only 75%, the open circuit voltage is 1.2V, the photoelectric conversion efficiency is much lower than that of Example 3, and the performance degradation exceeds 15% after high temperature testing.

[0066] The above embodiments demonstrate that the present invention effectively solves the core technical bottlenecks of existing Ge / GaInAs dual-junction solar cells through atomic-level interface control, intelligent growth of composite strain buffer layers, and optimized tunnel junction design, achieving a comprehensive improvement in cell performance and possessing significant technical advantages and industrialization value.

[0067] In summary, this invention discloses a germanium-based indium gallium arsenide (IGa / GaInAs) double-junction solar cell structure and its fabrication method based on a germanium substrate, relating to the field of solar cell technology. It aims to address the technical bottlenecks of existing Ge / GaInAs double-junction solar cells, such as poor interface quality, numerous crystal defects, and poor sub-cell coupling. The cell structure, from bottom to top, includes a p-type germanium substrate, an atomically passivated nucleation interface layer, a heavily doped tunnel junction, a composite strain buffer layer, a p-type GaInAs top cell base region, an n-type GaInAs top cell emitter region, an AlInP window layer, and an n... + -GaInAs cap layer; the composite strain buffer layer comprises a low-temperature superlattice filter layer and a temperature gradient-controlled gradient buffer layer. The fabrication method employs in-situ continuous epitaxy via MOCVD, sequentially completing interface pretreatment, tunnel junction growth, buffer layer growth, top cell growth, and post-processing. This invention controls the dislocation density to 10-1 through atomic-level interface engineering and composite buffer layer technology. 5 cm -2 The battery has a fill factor of over 88% and an open-circuit voltage of over 1.8V, exhibiting high photoelectric conversion efficiency and high thermal stability. Furthermore, the process is compatible with existing equipment, making it easy to promote industrialization.

Claims

1. A germanium-based indium gallium arsenide double-junction solar cell structure based on a germanium substrate, characterized in that, From bottom to top, the layers are: p-type germanium substrate (1), atomic-level passivation nucleation interface layer (2), heavily doped tunnel junction (3), composite strain buffer layer (4), p-type GaInAs top cell base region (5), n-type GaInAs top cell emitter region (6), AlInP window layer (7), n + -GaInAs cap layer (8); the p-type germanium substrate (1) serves as the base region of the bottom cell; the atomic-level passivation nucleation interface layer (2) is formed on the p-type germanium substrate (1) through stepwise surface reaction; the composite strain buffer layer (4) includes a low-temperature superlattice filter layer (41) and a temperature gradient controlled gradient buffer layer (42); the p-type germanium substrate (1) and the composite strain buffer layer (4) are connected through the atomic-level passivation nucleation interface layer (2), and the heavily doped tunnel junction (3) is disposed between the atomic-level passivation nucleation interface layer (2) and the composite strain buffer layer (4); the heavily doped tunnel junction (3) is a p ++ -GaInAs / n ++ -GaInAs heterojunction or p ++ -AlGaAs / n ++ -GaInAs heterojunction.

2. The solar cell structure according to claim 1, characterized in that, The atomic-level passivation nucleation interface layer (2) includes a single-atom-layer arsenic passivation layer (21) and GaIn. 0.01 As stabilizing layer (22); the GaIn 0.01 The As stabilizing layer (22) is formed by epitaxial growth of Group III atoms on the surface of a single-atom-layer arsenic passivation layer (21) followed by epitaxial growth under a Group V source atmosphere. 0.01 The thickness of the As stabilizing layer (22) is 2~5nm.

3. The solar cell structure according to claim 1, characterized in that, The low-temperature superlattice filter layer (41) is a low-temperature AlAs / GaAs superlattice defect filter layer, and the gradient buffer layer (42) is an Al... 0.25 Ga 1-x In x As composition gradient layer; the number of periods of the low-temperature superlattice filter layer (41) is 10~20, the Al 0.25 Ga 1-x In x In the As-component graded layer, the indium component x gradually changes from 0 to the target value of 0.15~0.

20.

4. The solar cell structure according to claim 1, characterized in that, The doping concentration of the heavily doped tunnel junction (3) is ≥1×10⁻⁶. 19 cm -3 Total thickness ≤ 50nm.

5. The solar cell structure according to claim 1, characterized in that, The p-type GaInAs top-cell base region is p-type Ga. 1-y In y The As layer has a y=0.15~0.18 and a thickness of 2~4μm; the n-type GaInAs top-cell emitter region is an n-type Ga... 1-y In y As layer, y=0.15~0.18, thickness is 0.1~0.3μm.

6. The solar cell structure according to claim 1, characterized in that, The AlInP window layer (7) is an n-type Al 1-z In z The P layer has a z=0.6~0.7 and a thickness of 30~50nm; the n + -GaInAs cap layer is n + -Ga 1-y In y As layer, y=0.15~0.18, thickness is 100~200nm.

7. A method for fabricating a germanium-based indium gallium arsenide double-junction solar cell structure on a germanium substrate, characterized in that, The method for preparing the solar cell structure according to any one of claims 1 to 6 includes the following steps: S1. Perform atomic-level interface pretreatment on the p-type germanium substrate to form an atomic-level passivation nucleation interface layer, and grow a heavily doped tunnel junction on the atomic-level passivation nucleation interface layer. S2. A composite strain buffer layer is grown on the heavily doped tunnel junction; S3. A p-type GaInAs top cell base region, an n-type GaInAs top cell emitter region, an AlInP window layer, and an n-type GaInAs top cell emitter region are sequentially grown on the composite strain buffer layer. + -GaInAs cap layer to grow top cell structure; S4. Post-process the structure after epitaxial growth, prepare electrodes and deposit an anti-reflection film to obtain a germanium-based indium gallium arsenide double-junction solar cell.

8. The preparation method according to claim 7, characterized in that, The specific steps of the atomic-level interface preprocessing described in step S1 include: S11. A p-type germanium substrate is used, and the polished p-type germanium substrate is subjected to high-temperature deoxidation treatment. S12. Cool down to 500~600℃, and use atomic diffusion mode to pulse-feed the phosphorus source precursor to diffuse P atoms onto the p-type germanium substrate to form the n-doped Ge substrate emitter region. S13. Cool down to 400~450℃, and pulse the arsenic source precursor using atomic layer deposition mode to form a single-atom-layer arsenic passivation layer on the Ge surface. S14. Without a group V source, a group III source precursor is pulsed in, and the adsorption amount is controlled to be 0.2~0.5 monolayers to form group III atom nucleation centers. S15. GaIn growth under a V-type source atmosphere 0.01 As a stabilizing layer, the atomic-level passivation nucleation interface layer is prepared.

9. The preparation method according to claim 7, characterized in that, The specific steps of the intelligent growth composite strain buffer layer in step S2 include: S21. Grow a low-temperature AlAs / GaAs superlattice defect filter layer at 500~550℃ with a period number of 10~20; S22, Al grown under temperature gradient control 0.25 Ga 1-x In x As a gradient layer, the indium composition x is gradually increased from 0 to 0.15~0.20, the growth temperature is linearly increased from 520℃ to 620℃, and an intermittent migration-enhanced epitaxial mode is adopted.

10. The preparation method according to claim 7, characterized in that, The post-processing described in step S4 involves selective annealing using a pulsed laser with a laser energy density of 0.4~0.7 J / cm². 2 The electrodes are a top electrode Ti / Pd / Ag and a back electrode Ni / Au, and the anti-reflection film is a MgF2 / ZnS double-layer anti-reflection film.

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