Solid-state imaging device, imaging apparatus, and imaging method

Abstract

The present disclosure relates to a solid-state imaging device, an imaging apparatus, and an imaging method. An overflow integration capacitor is shared by a pair of photodiodes. An overflow gate is provided between a corresponding photodiode and the overflow integration capacitor. Furthermore, in the overflow gate, a barrier is set lower than a corresponding one in a transfer gate in a charge accumulation period of the photodiode.

Description

[0001] Cross-reference of related applications

[0002] This application claims priority to Japanese Patent Application No. 2024-226579, filed on December 23, 2024, the entire contents of which, including the description, claims, drawings and abstract, are incorporated herein by reference. Technical Field

[0003] This disclosure relates to solid-state imaging elements, imaging devices, and imaging methods. Background Technology

[0004] As described in US2023 / 0156369 A, in a known imaging sensor circuit structure known as a shared pixel, multiple photodiodes (photoelectric conversion units) share a floating diffusion. For example, as described in "World smallest 200Mp CMOS Image Sensor with 0.56μm pixel equipped with novel Deep Trench Isolation structure for better sensitivity and higher CG" by Sunsoo Choi et al., International Image Sensor Symposium 2023, May 22, 2023, and US2023 / 0156369 A, a group of four photodiodes (subpixels) share a floating diffusion. Furthermore, in a shared pixel structure, the potential barrier between adjacent subpixels is intentionally set lower than the barrier surrounding the group of subpixels. With this configuration, when the charge of one subpixel becomes saturated, the charge overflows to neighboring subpixels. Therefore, the reduction in dynamic range caused by the shared pixel structure can be suppressed.

[0005] In US 2024 / 0259705 A, US 2020 / 0154066 A and US 8,184,191 B, a lateral overflow integrating capacitor (LOFIC) is incorporated into the image sensor circuit to form a receiving structure for saturated charge, replacing the charge overflow between subpixels.

[0006] US2016 / 0240570A and US2023 / 0143387A disclose a dual-pixel structure. In this structure, a pair of photodiodes (subpixels) share a floating diffuser. For example, in a pixel array in which multiple dual pixels are arranged in a two-dimensional manner, the charge for a predetermined row or column is read out individually from each subpixel. Phase detection autofocus (PDAF) is enabled using the readout charge. Furthermore, image generation is performed by simultaneously reading out the charge of the pair of subpixels or by adding the charges of the pair of subpixels. In other words, during image generation, the pair of subpixels is treated as integral pixels.

[0007] In a dual-pixel structure, dynamic range can be improved in both image generation and phase-detection autofocus by providing a lateral overflow integral capacitor in each sub-pixel. However, this functional extension may lead to an increase in pixel size. This disclosure presents a solid-state imaging element, imaging device, and imaging method that can improve the dynamic range of image generation, specifically, while suppressing the increase in pixel size. Summary of the Invention

[0008] According to one aspect of this disclosure, a solid-state imaging element is provided, comprising: a pair of photodiodes; a floating diffuser; a pair of transmission gates; an overflow integrating capacitor; and a pair of overflow gates. The floating diffuser is shared by the pair of photodiodes. The transmission gates are respectively disposed between the pair of photodiodes and the floating diffuser. The overflow integrating capacitor is shared by the pair of photodiodes. The overflow gates are respectively disposed between the pair of photodiodes and the overflow integrating capacitor. Furthermore, in the overflow gates, during the charge accumulation period of the photodiodes, the potential barrier is set lower than the potential barrier of the corresponding transmission gate.

[0009] According to the structure described above, the overflow integration capacitor is shared by the pair of photodiodes. Therefore, compared to the case where the overflow integration capacitor is provided individually for each photodiode, the increase in pixel size can be suppressed.

[0010] According to another aspect of this disclosure, an imaging apparatus is provided that includes the solid-state imaging element described above. The imaging apparatus includes a constant voltage source. The constant voltage source applies equal voltages to a pair of overflow gates.

[0011] Based on the structure described above, the saturation charge of the pair of photodiodes can be set to be equal to each other.

[0012] According to another aspect of this disclosure, an imaging apparatus is provided that includes the solid-state imaging element described above. The solid-state imaging element may include an overflow capacitor gate. The overflow capacitor gate is disposed between an overflow integrating capacitor and a floating diffuser. The imaging apparatus may include an analog-to-digital converter (A / D converter). The A / D converter reads the charge of the floating diffuser and converts the charge into a pixel value. A pair of transmission gates are simultaneously set to an ON state with respect to a pair of photodiodes designated for image generation pixels, and transfer charge to the floating diffuser. Furthermore, the overflow capacitor gate is set to an ON state with respect to the floating diffuser to which the charge is transferred from the pair of photodiodes. During the period during which the overflow capacitor gate is in the ON state, the A / D converter reads the charge of the floating diffuser.

[0013] According to the structure described above, the charge is read out when the capacity expands corresponding to the overflow integral capacitor, thereby improving the dynamic range during image generation.

[0014] According to another aspect of this disclosure, an imaging apparatus is provided that includes the solid-state imaging element described above. The imaging apparatus may include an exposure time control unit. The exposure time control unit controls the exposure time corresponding to a period of charge accumulation. In a pair of photodiodes designated for phase-detection autofocus, charge is transferred to the floating diffuser at different times. When at least one of the pair of photodiodes has reached saturation charge, the exposure time control unit shortens the exposure time.

[0015] Based on the structure described above, phase detection autofocus using a pair of photodiodes is achieved before saturation (or desaturation).

[0016] According to another aspect of this disclosure, an imaging device is provided that includes a solid-state imaging element described above. The solid-state imaging element may include an overflow capacitor gate. The overflow capacitor gate is disposed between an overflow integrating capacitor and a floating diffuser. Additionally, the imaging device may include an analog-to-digital converter (A / D converter). The A / D converter reads the charge of the floating diffuser and converts the charge into a pixel value. A pair of transmission gates are set to ON with respect to a pair of photodiodes designated for phase-detection autofocus pixels at different timings, and transfer charge to the floating diffuser. When the photodiode to which the charge is transferred has reached its saturation charge, the overflow capacitor gate is set to ON with respect to the floating diffuser from which the charge is transferred. The A / D converter calculates the pre-expansion pixel value before the overflow capacitor gate is set to ON and the post-expansion pixel value when the overflow capacitor gate is in the ON state.

[0017] Based on the structure described above, phase detection autofocus is achieved using the pixel values ​​before and after expansion.

[0018] In the structure described above, the imaging device may include an autofocus processing unit. The autofocus processing unit controls the lens position based on the phase detection autofocus. When one of the pair of photodiodes has reached the saturation charge and the other of the pair of photodiodes is below the saturation charge, the autofocus processing unit sets the sum of the pre-expansion pixel value and the post-expansion pixel value of the first photodiode as the pixel value of that first photodiode.

[0019] Based on the structure described above, the dynamic range of the phase detection autofocus can be improved.

[0020] In the structure described above, the imaging device may include an exposure time control unit. The exposure time control unit controls the exposure time corresponding to the charge accumulation period. When both of the pair of photodiodes have reached the saturation charge, the exposure time control unit shortens the exposure time.

[0021] When both of the pair of photodiodes have reached their saturation charge, charge flows from the photodiodes to the overflow integrating capacitor. By shortening the exposure time, the mixed flow of charge to the overflow integrating capacitor during phase-detection autofocus can be suppressed.

[0022] According to another aspect of this disclosure, an imaging method is provided. In this imaging method, a solid-state imaging element is used. The solid-state imaging element includes: a pair of photodiodes; a floating diffuser; a pair of transmission gates; an overflow integrating capacitor; and a pair of overflow gates. The floating diffuser is shared by the pair of photodiodes. The transmission gates are respectively disposed between the pair of photodiodes and the floating diffuser. The overflow integrating capacitor is shared by the pair of photodiodes. The overflow gates are respectively disposed between the pair of photodiodes and the overflow integrating capacitor. During a charge accumulation period of the photodiodes, the potential barrier of each of the pair of overflow gates is set lower than the potential barrier of the corresponding transmission gate.

[0023] In the structure described above, equal voltages can be applied to the pair of overflow gates.

[0024] In the structure described above, the solid-state imaging element may include an overflow capacitor gate. The overflow capacitor gate is disposed between the overflow integrating capacitor and the floating diffusion. An imaging device including the solid-state imaging element described above may include an overflow capacitor gate and an A / D converter. The A / D converter reads the charge of the floating diffusion and converts the charge into a pixel value. The pair of transmission gates are simultaneously set to an ON state with respect to a pair of photodiodes designated for image generation pixels, and transfer charge to the floating diffusion. Furthermore, the overflow capacitor gate is set to an ON state with respect to the floating diffusion from which the charge is transferred from the pair of photodiodes. During the period during which the overflow capacitor gate is in the ON state, the A / D converter reads the charge of the floating diffusion.

[0025] In the structure described above, the imaging device including the solid-state imaging element may include an exposure time control unit. The exposure time control unit controls the exposure time corresponding to a period of charge accumulation. Charge is transferred from a pair of photodiodes of a pixel designated for phase-detection autofocus to the floating diffuser at different times. When at least one of the pair of photodiodes has reached saturation charge, the exposure time control unit shortens the exposure time.

[0026] In the structure described above, the solid-state imaging element may include an overflow capacitor gate. The overflow capacitor gate is disposed between the overflow integrating capacitor and the floating diffusion. Additionally, an imaging device including the solid-state imaging element described above may include an overflow capacitor gate and an A / D converter. The A / D converter reads the charge of the floating diffusion and converts the charge into a pixel value. The pair of transmission gates are set to ON with respect to a pair of photodiodes designated for phase-detection autofocus pixels at different timings and transfer charge to the floating diffusion. When the photodiode to which the charge is to be transferred has reached the saturation charge, the overflow capacitor gate is set to ON with respect to the floating diffusion from which the charge is transferred. The A / D converter calculates the pre-expansion pixel value before the overflow capacitor gate is set to ON and the post-expansion pixel value when the overflow capacitor gate is ON.

[0027] In the structure described above, the imaging device may include an autofocus processing unit. The autofocus processing unit controls the lens position based on the phase-detection autofocus. When one of the pair of photodiodes has reached the saturation charge and the other of the pair of photodiodes is below the saturation charge, the autofocus processing unit sets the sum of the pre-expansion pixel value and the post-expansion pixel value of the photodiode as the pixel value of the photodiode.

[0028] In the structure described above, the imaging device may include an exposure time control unit. The exposure time control unit controls the exposure time corresponding to the charge accumulation period. When both of the pair of photodiodes have reached the saturation charge, the exposure time control unit shortens the exposure time.

[0029] The imaging apparatus and imaging method according to aspects of this disclosure can improve the dynamic range of image generation, in particular, while suppressing the increase in pixel size. Attached Figure Description

[0030] Embodiments of this disclosure will be described based on the following figures, wherein:

[0031] Figure 1 This is a diagram illustrating an imaging apparatus according to an embodiment of the present disclosure;

[0032] Figure 2 This is a diagram illustrating the hardware structure of the control device;

[0033] Figure 3 This is a diagram illustrating the circuit surface structure of a solid-state imaging device on the side opposite to the light-receiving surface;

[0034] Figure 4 This is a diagram illustrating the circuit structure of a solid-state imaging device;

[0035] Figure 5 It is a diagram used to explain the flow of overflowing charge;

[0036] Figure 6 This is a diagram used to explain the potential barriers of teleportation gate TX1 and overflow gate OFG1;

[0037] Figure 7 This is a diagram used to explain the potential barriers of teleportation gate TX2 and overflow gate OFG2;

[0038] Figure 8 This is a time-series diagram illustrating the period during image generation;

[0039] Figure 9 This is a timing diagram illustrating phase detection autofocus (pre-saturation transfer type);

[0040] Figure 10 This is a diagram used to explain the dynamic range of the imaging apparatus according to embodiments of the present disclosure during image generation and phase detection autofocus (transfer before saturation);

[0041] Figure 11 This is a diagram illustrating the processing of pixel values ​​for phase detection autofocus using an overflow integrating capacitor;

[0042] Figure 12 This is a timing diagram illustrating phase detection autofocus using an overflow integrating capacitor (only one pixel is saturated).

[0043] Figure 13 This is a timing diagram illustrating phase detection autofocus using an overflow integrating capacitor (both pixels are saturated);

[0044] Figure 14 This is a diagram used to explain the dynamic range of phase-detection autofocus using an overflow integrating capacitor; and

[0045] Figure 15 This is a circuit diagram illustrating the structure of a shared pixel of a solid-state imaging element according to an embodiment of the present disclosure. Detailed Implementation

[0046] Imaging apparatus and imaging method according to embodiments of the present disclosure will now be described with reference to the accompanying drawings. For purposes of explanation, the shapes, materials, numbers, and values ​​described below are merely illustrative. Shapes or similar elements may be appropriately modified depending on the specifications of the imaging apparatus. Furthermore, in the following drawings, similar elements will be assigned the same reference numerals.

[0047] 1. Structure of Imaging Equipment

[0048] refer to Figure 1 The imaging device 100 according to this embodiment includes a solid-state imaging device 10, a control device 30, a display device 40, and a lens mechanism 45. In the solid-state imaging device 10, photoelectric conversion and A / D conversion are performed. That is, the charge photoelectrically converted by the dual-pixel array 12 is converted into pixel values ​​by the CDS-ADC circuit 18, and the pixel values ​​are digital values. Detailed structure will be described later.

[0049] Based on Figure 8 The control device 30 performs image generation based on the pixel values ​​obtained from the timing diagram illustrated in the example. Additionally, based on the... Figure 9 or Figure 12 The pixel values ​​obtained from the timing diagram shown in the example are used by the control device 30 to perform phase detection autofocus. The detailed structure will be described later.

[0050] The display device 40 displays the image generated by the image generation unit 38. The lens mechanism 45 adjusts the position of the lens placed in front of the light receiving surface of the dual-pixel array 12 (i.e., on the upstream side along the incident direction).

[0051] 2. Structure of Solid-State Imaging Devices

[0052] The solid-state imaging device 10 includes a dual-pixel array 12, a color filter array 14, a vertical scanning circuit 15, a horizontal scanning circuit 16, and a CDS-ADC circuit 18.

[0053] A color filter array 14 is placed on the light-receiving surface of the dual-pixel array 12. For example, in the color filter array 14, the red (R), green (Gr, Gb) and blue (B) color filters are arranged in a two-dimensional configuration. The two-dimensional configuration is, for example, a Bayer configuration.

[0054] The horizontal scanning circuit 16 is the circuit that selects the readout rows of the dual-pixel array 12. The CDS-ADC circuit 18 holds and performs analog-to-digital conversion (A / D conversion) of the signal (voltage value) of each pixel of the dual-pixel array 12. Since the mechanism used by the CDS-ADC circuit 18 for holding and A / D converting signals is known, it will not be described herein.

[0055] In the CDS-ADC circuit 18, the ADC circuit section is also referred to as the A / D converter. The A / D converter reads the floating diffuse charge and converts the charge into a pixel value. The converted digital value is called the pixel value. For example, the pixel value ranges from a minimum of 0 to a maximum of 255. The vertical scan circuit 15 indicates to the CDS-ADC circuit 18 (A / D converter) which column of the dual pixel array 12 will be read.

[0056] Figure 3 and 4 An example is shown of a solid-state imaging element 20 as a component circuit of a dual-pixel array 12. The solid-state imaging element 20 is also referred to as a dual-pixel. In the dual-pixel array 12, the solid-state imaging element 20 is arranged in two dimensions along the row and column directions.

[0057] Solid-state imaging element 20 is, for example, a back-illuminated CMOS image sensor. Figure 3 An example is shown on the circuit surface opposite the light-receiving surface. Figure 4 The circuit of solid-state imaging element 20 is shown as an example.

[0058] The solid-state imaging element 20 has a dual-pixel structure. That is, in the solid-state imaging element 20, a pair of photodiodes PD1 and PD2 are paired. Specifically, the pair of photodiodes PD1 and PD2 share a floating diffusion FD. As will be described later, when the charge of the pair of photodiodes PD1 and PD2 is used for image generation, the pair of photodiodes PD1 and PD2 are considered as integrating pixels. On the other hand, when the charge of the pair of photodiodes PD1 and PD2 is used for phase-detection autofocus, the pair of photodiodes PD1 and PD2 are considered as independent sub-pixels.

[0059] A transmission gate TX1 is set between photodiode PD1 and floating diffuser FD. Similarly, a transmission gate TX2 is set between photodiode PD2 and floating diffuser FD.

[0060] The pair of photodiodes PD1 and PD2 share a capacitor. This capacitor is called an overflow integrating capacitor. An overflow integrating capacitor is, for example, a lateral overflow integrating capacitor (LOFIC). Because the overflow integrating capacitor LOFIC is shared by the pair of photodiodes PD1 and PD2, it is also called a shared LOFIC.

[0061] The pair of photodiodes PD1 and PD2 are conductive to the overflow integrating capacitor LOFIC. Furthermore, overflow gates OFG1 and OFG2 are disposed on this conductive path (wiring). Figure 5 As illustrated in the example, the potential barrier V exceeds the overflow gates OFG1 and OFG2. OFG (refer to Figure 6 and 7 The charge of both photodiodes PD1 and PD2 accumulates in the overflow integrating capacitor LOFIC.

[0062] Figure 3 An example of the circuit surface of a solid-state imaging element 20 is shown. The solid-state imaging element 20 includes a pixel portion 22 and a logic circuit portion 24. An overflow integrating capacitor LOFIC is placed in the logic circuit portion 24. For example, a contact C1 is formed on the wiring connecting overflow gates OFG1 and OFG2 to the gate LFG of the overflow capacitor. The contact C1 extends in a depth direction (layer direction) perpendicular to the circuit surface. The overflow integrating capacitor LOFIC is connected to the contact C1.

[0063] In the solid-state imaging element 20 according to this embodiment, the number of overflow integration capacitors (LOFICs) provided in the logic circuit section 24 can be one. Therefore, compared to the case where, for example, a pair of overflow integration capacitors (LOFICs) are provided, the expansion of the placement space can be suppressed.

[0064] Furthermore, compared to the case where a pair of overflow integrating capacitors (LOFIC) are provided, the number of nodes in the solid-state imaging element 20 according to this embodiment can be reduced. Figure 4 In the diagram, nodes are represented by black circles. Generally, each node is formed by an N+ region. It is well known that dark current is easily generated in N+ regions. The increase in dark current can be suppressed by inhibiting the increase in the number of nodes.

[0065] refer to Figure 3 and 4 In the circuit, overflow gate OFG1 is positioned between overflow integrating capacitor LOBIC and photodiode PD1. Similarly, in the circuit, overflow gate OFG2 is positioned between overflow integrating capacitor LOBIC and photodiode PD2.

[0066] Furthermore, in the circuit, the overflow capacitor gate LFG is positioned between the overflow integrating capacitor LOFIC and the floating diffusion FD. Along the path from the floating diffusion FD to the bit line, the reset gate RST, the source follower SF, and the row select gate RS are located.

[0067] In terms of circuit structure, the charge accumulated in photodiodes PD1 and PD2 can be transferred to the floating diffuser FD. Additionally, the charge overflowing from photodiodes PD1 and PD2 can accumulate in the overflow integrating capacitor LOFIC. Figure 6 This diagram illustrates the potential distribution of photodiode PD1, transmission gate TX1, and overflow gate OFG1 during the charge accumulation period (i.e., exposure time). When light is incident on photodiode PD1, charge accumulates in it through photoelectric conversion. During this accumulation period, the potential barrier V of overflow gate OFG1... OFG1 The barrier V is set below the portal TX1. TX1 The value (V) OFG1 <V TX1 ).

[0068] Figure 7 This example illustrates the potential distribution of photodiode PD2, transmission gate TX2, and overflow gate OFG2 during the charge accumulation period (i.e., exposure time). Similar to... Figure 6 When light is incident on photodiode PD2, charge accumulates in photodiode PD2 through photoelectric conversion. During this accumulation period, the potential barrier V of overflow gate OFG2... OFG2 The barrier V is set below that of portal TX2. TX2 The value (V) OFG2 <V TX2 Additionally, for example, the potential barrier V TX1 and V TX2 Equal to each other (V) TX1 =V TX2 In addition, the overflow potential VOFG1 and V OFG2 Equal to each other (V) OFG1 =V OFG2 ).

[0069] In other words, when the potentials of photodiodes PD1 and PD2 reach the overflow potential V during the charge accumulation period... OFG1 and V OFG2 At this time, charge moves across overflow gates OFG1 and OFG2 and accumulates in the overflow integrating capacitor LOFIC. Therefore, the saturation charge of photodiodes PD1 and PD2 is equal to the overflow potential V. OFG1 and V OFG2 By overflowing potential V OFG1 and V OFG2 Set to be equal to each other (V) OFG1 =V OFG2 Photodiodes PD1 and PD2 can be configured to have equal saturation charges. For example, when the imaging device 100 is in the ON state, the constant voltage source 17 (reference) is always supplied. Figure 1 An overflow potential V is applied to overflow gates OFG1 and OFG2. OFG1 and V OFG2 .

[0070] 3. Structure of the control device

[0071] Control device 30 is, for example, Figure 2 The computer configuration illustrated herein. That is, the control device 30 includes a CPU 30A, RAM 30B, ROM 30C, memory 30D, and input / output controller 30E.

[0072] CPU 30A is the central processing unit, also known as a processor. RAM 30B is a volatile or non-volatile storage device that temporarily stores data during operation. ROM 30C is a storage device from which data can be read. Memory 30D is a storage device to which data can be written and read. Memory 30D is formed, for example, by an HDD (hard disk drive) or an SSD (solid-state drive).

[0073] The CPU 30A executes the program stored in the memory 30D or ROM 30C, forming a sequence in the control device 30 such as... Figure 1 The functional units illustrated herein. That is, the control device 30 includes an imaging signal acquisition unit 31, a pixel value determination unit 32, an autofocus processing unit 34, an exposure time control unit 36, and an image generation unit 38. Details of these functional units will be described later.

[0074] Figure 8The operation of a solid-state imaging device 10 for acquiring pixel values ​​for image generation is illustrated. The pixel values ​​acquired through this operation are sent to an image generation unit 38 via an imaging signal acquisition unit 31. The image generation unit 38 generates an image based on the acquired pixel values. The generated image is displayed on a display device 40. This will be described later. Figure 8 Details of the timing diagram.

[0075] Figure 9 This section illustrates the operation of a solid-state imaging device 10 for acquiring pixel values ​​for phase-detection autofocus. The pixel values ​​acquired through this operation are sent via an imaging signal acquisition unit 31 to a pixel value determination unit 32 and an autofocus processing unit 34. Since phase-detection autofocus technology is known, it will not be described herein. Furthermore, it will be described later. Figure 9 Details of the timing diagram.

[0076] For example, to perform phase-detection autofocus, the solid-state imaging element 20 of the dual-pixel array 12 is specified row by row or column by column. Based on the pixel values ​​of each of the photodiodes PD1 and PD2 obtained from the respective solid-state imaging element 20, it is calculated which of the focal points, the front focal point, and the rear focal point the focal position corresponds to with respect to the subject. Furthermore, based on the calculation results, the amount of lens movement is determined. The determined amount of movement is sent to the lens mechanism 45.

[0077] 4. Operations during image generation

[0078] Figure 8 This is an example of a timing diagram for a solid-state imaging device 10 used to acquire pixel values ​​for image generation. Figure 8 , 9 In 12 and 13, because the overflow gates OFG1 and OFG2 are set to constant voltage, the overflow gates OFG1 and OFG2 will not be shown in the figure.

[0079] Between times t1 and t3, charge accumulates in photodiodes PD1 and PD2. Here, in many cases, the angles of incidence for photodiodes PD1 and PD2 are different. Therefore, the forms of charge accumulation between photodiodes PD1 and PD2 are different. Figure 8 , 9 In example 12, an instance is shown where the amount of light incident on photodiode PD1 is greater than the amount of light incident on photodiode PD2.

[0080] refer to Figure 8 When the charge of photodiode PD1 is saturated at time t2 (when the saturation charge is reached), the charge overflowing from photodiode PD1 accumulates in the overflow integrating capacitor LOFIC.

[0081] When the reset gate RST is set to ON at time t3 and the voltage of the floating diffusion FD is set to the reference voltage, transmission gates TX1 and TX2 are simultaneously set to ON at time t4. The charge accumulated in photodiodes PD1 and PD2 is transferred to the floating diffusion FD. In other words, at the floating diffusion FD, the charges of photodiodes PD1 and PD2 are added together.

[0082] At time t5, the overflow capacitor gate LFG is set to the ON state. For example, the ON state of the overflow capacitor gate LFG lasts until time t8.

[0083] When the overflow capacitor gate LFG is in the ON state, the overflow integrating capacitor LOFIC and the floating diffuser are set to equal potentials. Because the overflow integrating capacitor LOFIC has a larger capacitance than the floating diffuser, the potential of the floating diffuser FD is reduced (pulled down) to the potential of the overflow integrating capacitor LOFIC. That is, the capacity for accepting charge is temporarily expanded by the overflow integrating capacitor LOFIC.

[0084] Therefore, even when high-brightness light, which would saturate photodiodes PD1 and PD2, is incident, the pixel values ​​after capacitance expansion are not saturated. In other words, for the overflow integrating capacitor LOFIC, the dynamic range during image generation is expanded. The dynamic range of image generation refers to the range from the minimum signal strength where so-called black crushing occurs to the maximum signal strength where so-called whiteout occurs.

[0085] CDS-ADC Circuit 18 (Reference) Figure 1 The A / D conversion is performed in association with the overflow capacitor gate LFG. For example, the A / D conversion begins at time t6, which is a predetermined time delay from the time (time t5) when the overflow capacitor gate LFG switches from the OFF state (off) to the ON state (on). The period from time t6 to, for example, time t7 when the reset gate is set to the ON state (on) is the A / D conversion period. During the A / D conversion period, the CDS-ADC circuit 18 reads the charge of the floating diffused FD. The process described above is then repeated.

[0086] 5. Phase detection autofocus of the pre-saturation transmission type

[0087] Figure 9 This example illustrates a timing diagram used to acquire pixel values ​​for phase-detection autofocus. Figure 9 The diagram shows a timing diagram for phase detection autofocus in the case of transmission type before saturation. That is, in... Figure 9 In this process, both photodiodes PD1 and PD2 are controlled, resulting in accumulated charge being less than the saturation charge.

[0088] Furthermore, in phase-detection autofocus of the pre-saturation transfer type, when at least one of photodiodes PD1 and PD2 has reached its saturation charge, the exposure time control unit 36 ​​(reference) Figure 1 Shorten the exposure time.

[0089] In phase detection autofocus, in the dual-pixel array 12 (reference) Figure 1 Solid-state imaging element 20 (refer to) specifies a predetermined row or column. Figure 3 The charge of the unspecified solid-state imaging element 20 is based on... Figure 8 The process is read out and will therefore be used for image generation.

[0090] In phase-detection autofocus, the charges of photodiodes PD1 and PD2 are independently acquired. That is, transmission gates TX1 and TX2 are set to the ON state (open) at different timing points. For example, in... Figure 9 In this process, the portal TX1 is set to the ON state (open) at times t25, t29, t33, and t37. The charge of photodiode PD1 is transferred to the floating diffusion FD and read out during the periods from t25 to t26, t29 to t30, t33 to t34, and t37 to t38.

[0091] On the other hand, the transmission gate TX2 is set to the ON state (open) at times t22, t27, t31, and t35. In addition, the periods during which the charge of the photodiode PD2 is transferred to the floating diffusion FD and read out are the periods from t22 to t24, t27 to t28, t31 to t32, and t35 to t36.

[0092] At time t23, the accumulated charge of photodiode PD1 becomes saturated. The saturated charge flows into the overflow integrating capacitor LOFIC. Because the accumulated charge of photodiode PD1 is saturated, if charge is transferred from photodiode PD1 to the floating diffuser FD at time t25, then the potential of the floating diffuser FD is set to the saturated charge amount Vth.

[0093] When the saturated charge Vth is converted by the CDS-ADC circuit 18, the pixel value is at its maximum value of 255. When the pixel value determination unit 32 (reference) Figure 1When the pixel value is determined to be the maximum value, the pixel value determination unit 32 sends a shortening command for the exposure time to the exposure time control unit 36. The exposure time control unit 36 ​​adjusts the timing diagram for the dual-pixel array 12. For example, the exposure time control unit 36 ​​shortens the charge accumulation period from when the reset gate RST is set to ON (open) to when the transmission gates TX1 and TX2 are set to ON (open); that is, the exposure time.

[0094] After adjusting the exposure time, during reference times t27 to T28 and t29 to t30, the accumulated charge of both photodiodes PD1 and PD2 is less than the saturation charge Vth. When the accumulated charge of photodiodes PD1 and PD2 is converted by A / D converters, the pixel value determination unit 32 transmits the obtained pixel value to the autofocus processing unit 34.

[0095] The autofocus processing unit 34 adjusts the lens position based on phase detection autofocus. The autofocus processing unit 34 calculates phase detection autofocus based on a pair of pixel values ​​(more specifically, a pair of pixels in any row or column of the dual-pixel array 12). As a result of the calculation, the amount of lens movement is determined. The determined amount of lens movement is sent to the lens mechanism 45.

[0096] Figure 10 Example of dynamic range (DR) during image generation IMG Dynamic range (DR) during phase detection autofocus AF Dynamic Range (DR) IMG Based on Figure 8 The timing diagram illustrated in the example is based on the pixel values ​​obtained, and the dynamic range DR is determined. AF Based on Figure 9 The timing diagram shown in the example is based on the pixel values ​​obtained to determine the sequence.

[0097] exist Figure 10 In the graph, the horizontal axis represents brightness, and the vertical axis represents the signal-to-noise ratio (S / N). As described above, due to the difference in the incident angles of photodiodes PD1 and PD2, the form of charge accumulation differs between photodiodes PD1 and PD2. Figure 10 In the process, the amount of light incident on photodiode PD1 is greater than the amount of light incident on photodiode PD2.

[0098] refer to Figure 10 The brightness L1 that reaches the saturation charge of one of the photodiodes PD1 and PD2 is the dynamic range DR of the phase detection autofocus. AF The upper limit. On the other hand, regarding the dynamic range (DR) of image generation. IMGEven when either photodiode PD1 or photodiode PD2 is saturated with accumulated charge, the dynamic range extends to the maximum capacity of the overflow integrating capacitor LOFIC. In this way, the dynamic range can be extended, specifically during image generation, in the imaging device of this embodiment.

[0099] 6. Automatic focusing using phase detection from an overflow integrating capacitor.

[0100] In phase-detection autofocus, the charges of photodiodes PD1 and PD2 need to be extracted as independent pixel values ​​(i.e., not mixed). On the other hand, as... Figure 4 As illustrated in the circuit diagram, the overflow integrating capacitor LOFIC is shared by photodiodes PD1 and PD2. That is, charge can be sent to the overflow integrating capacitor LOFIC from either photodiode PD1 or photodiode PD2.

[0101] In view of this, Figure 9 In the timing diagram, at the point where the charge has flowed into the overflow integrating capacitor LOFIC, the pixel values ​​obtained from photodiodes PD1 and PD2 are eliminated and not used for phase detection autofocus.

[0102] However, as described above, due to differences in incident angle or similar factors, the form of charge accumulation differs between photodiodes PD1 and PD2. Therefore, it is possible that, for example, the charge flowing into the overflow integrating capacitor LOFIC originates from only one of photodiodes PD1 and PD2. In this case, there is no mixing of charges from photodiodes PD1 and PD2 at the overflow integrating capacitor LOFIC. When there is no charge mixing, it becomes possible to use the charge accumulated in the overflow integrating capacitor LOFIC for phase detection autofocus.

[0103] Figure 11 This example illustrates the control flow for phase detection autofocus using the charge of the overflow integrating capacitor LOFIC. Pixel value determination unit 32 (reference) Figure 1 Determine whether the pixel value P_PD1 obtained from photodiode PD1 is less than the upper limit threshold Pth1 (S10).

[0104] Here, the pixel value P_PD1 obtained from the photodiode PD1 is also referred to as the pixel value before expansion. When the charge of the photodiode PD1 is transferred to the floating diffusion FD and the overflow capacitor gate LFG is in the OFF state (closed state), the pixel value read from the floating diffusion FD is the pixel value before expansion. At the timing after the charge is transferred from one of the photodiodes PD1 and PD2 to the floating diffusion FD and before the overflow gate capacitor gate is set to the ON state, the CDS-ADC circuit 18 calculates (A / D converts) the pixel value before expansion.

[0105] When P_PD1 < Pth1, no charge flows from the photodiode PD1 to the overflow integration capacitor LOFIC. Next, the pixel value determination unit 32 determines whether the pixel value P_PD2 obtained from the photodiode PD2 is less than the upper threshold Pth2 (S12). Here, both the upper threshold Pth1 and the upper threshold Pth2 can be equal to the maximum value of the pixel value (Pth1 = Pth2 = pixel value 255).

[0106] When P_PD2 < Pth2, no charge flows from the photodiodes PD1 and PD2 to the overflow integration capacitor LOFIC. Based on this, the autofocus processing unit performs the calculation of phase detection autofocus using the pixel value P_PD1 and the pixel value P_PD2 (S22).

[0107] Returning to step S10, when P_PD1 ≥ Pth1, this means that the photodiode PD1 is saturated, and the charge of the photodiode PD1 accumulates in the overflow integration capacitor LOFIC. Next, the pixel value determination unit 32 determines whether the pixel value P_PD2 obtained from the photodiode PD2 is less than the upper threshold Pth2 (S16).

[0108] When P_PD2 ≥ Pth2, this means that charge flows from both the photodiodes PD1 and PD2 to the overflow integration capacitor LOFIC. In this case, the exposure time control unit 36 applies control to shorten the exposure time on the dual pixel array 12 (S20).

[0109] When P_PD2 < Pth2 in step S16, this means that the charge accumulated in the overflow integration capacitor LOFIC is only the charge from the photodiode PD1. The autofocus processing unit 34 sets the value obtained by adding the pixel value P_LOFIC obtained from the overflow integration capacitor LOFIC to the pixel value P_PD1 obtained from the photodiode PD1 as the new pixel value P_PD1 (S18).

[0110] The pixel value P_LOFIC obtained from the overflow integrating capacitor LOFIC refers to the pixel value read from the floating diffusion FD when the overflow capacitor gate LFG is in the ON state. The pixel value P_LOFIC is also called the expanded pixel value. That is, when the overflow gate capacitor gate is in the ON state, the CDS-ADC circuit 18 (reference) Figure 1 Calculate the expanded pixel value (A / D conversion). For example, the new pixel value P_PD1 can be greater than or equal to 255.

[0111] Furthermore, using the new pixel values ​​P_PD1 and P_PD2 obtained from the photodiode PD2, the autofocus processing unit 34 performs phase detection autofocus calculations (S22).

[0112] Returning to step S12, when P_PD2 ≥ Pth2, this means that the charge accumulated in the overflow integrating capacitor LOFIC is only the charge from photodiode PD2. The autofocus processing unit 34 sets the new pixel value P_PD2 as the value obtained by adding the pixel value P_LOFIC obtained from the overflow integrating capacitor LOFIC to the pixel value P_PD2 obtained from photodiode PD2 (S14). Furthermore, the autofocus processing unit 34 uses the new pixel value P_PD2 obtained from photodiode PD1 and the pixel value P_PD1 to perform phase detection autofocus calculations (S22).

[0113] Figure 12 Example corresponding to Figure 11 The timing diagram for step S18. Corresponding to... Figure 11 The flowchart determines the A / D conversion period. Specifically, when the photodiode PD1 is saturated with charge (when the pixel value is at its maximum), the overflow capacitor gate LFG is set to the ON state. Subsequently, the charge during the ON period (on period) of the overflow capacitor gate LFG is read from the floating diffusion FD.

[0114] Similarly, when the photodiode PD2 is saturated with charge, the overflow capacitor gate LFG is set to the ON state (on). Subsequently, the charge during the ON period of the overflow capacitor gate LFG is read out from the floating diffusion FD.

[0115] For example, from the reference time t44 to t45, the time when the transmission gate TX1 is set to ON, charge readout (A / D conversion) is performed with respect to the floating diffusion FD. During this period, photodiode PD1 is set as the charge transfer target. That is, the calculation of the pixel value before expansion is performed by CDS-ADC circuit 18.

[0116] When the charge amount of the floating diffusion FD (i.e., the charge amount accumulated in the photodiode) has reached the saturation charge amount Vth, the calculation of the pixel value (pixel value before expansion) based on the photodiode PD1 is completed at time t45.

[0117] Because the charge of the floating diffusion FD has reached the saturation charge Vth, the overflow capacitor gate LFG is set to the ON state at time t45. The potential of the floating diffusion FD is reduced by the overflow integrating capacitor LOFIC. During the time period t46 to t47, the charge in the floating diffusion FD is read out. That is, the calculation of the expanded pixel value is performed by the CDS-ADC circuit 18.

[0118] During times t48 to t49 and t56 to t57, the pixel value (before expansion) based on photodiode PD2 is read out. In this example, the amount of charge accumulated in photodiode PD2, which is the charge transfer target, is less than the saturation charge. In this case, the overflow capacitor gate LFG is not turned on. That is, the expanded pixel value is not read out.

[0119] For the timing diagram described above, the pixel values ​​of photodiode PD1 (before expansion), the overflow integrating capacitor LOFIC (after expansion), and the photodiode PD2 (in a non-saturated state) are obtained. In this case, only the charge of photodiode PD1 accumulates in the overflow integrating capacitor LOFIC.

[0120] The autofocus processing unit 34 sets the sum of the pixel value of the photodiode PD1 (which is in a saturated state) and the pixel value of the overflow integrating capacitor LOFIC as the new pixel value of the photodiode PD1. Subsequently, the autofocus processing unit 34 performs phase detection autofocus calculations based on the new pixel value of the photodiode PD1 and the pixel value obtained from the photodiode PD2.

[0121] Figure 13 The display achieves Figure 11 An example of step S20. In this example, specifically, at times t63 and t73 and times t64 and t74, both photodiodes PD1 and PD2 are saturated. In this case, the charge from both photodiodes PD1 and PD2 flows into the overflow integrating capacitor LOFIC. In this case, neither the pixel values ​​obtained from photodiodes PD1 and PD2 (pixel values ​​before expansion) nor the pixel values ​​obtained from the overflow integrating capacitor LOFIC (pixel values ​​after expansion) are used for phase detection autofocus (pixel values ​​are discarded). Then, as described above, the exposure time is shortened.

[0122] In this way, Figure 11In the phase detection autofocus illustrated in the flowchart, the dynamic range of phase detection autofocus is expanded in addition to the dynamic range generated by the image. This expanded dynamic range means that the maximum value of the pixel for which phase detection autofocus can be performed increases.

[0123] Figure 14 Example of dynamic range (DR) during image generation IMG Dynamic range (DR) during phase detection autofocus AF Dynamic Range (DR) AF Based on Figure 11 The dynamic range (DR) is determined by the pixel values ​​obtained from the flowchart illustrated in the example. IMG and Figure 10 The dynamic range DR shown in the example IMG same.

[0124] Similar to Figure 10 ,exist Figure 14 In the graph, the horizontal axis represents brightness, and the vertical axis represents the S / N ratio. As shown in this graph, the dynamic range (DR) of phase-detection autofocus... AF The dynamic range (DR) extends further from the saturation point (L1, A1) of one of the photodiodes PD1 and PD2. AF It is extended until another photodiode PD2 is saturated.

[0125] 7. Alternative configurations for this embodiment

[0126] Figure 15 An alternative configuration of the solid-state imaging element 20 according to this embodiment is shown. For example, the solid-state imaging element 20 has a so-called shared pixel structure.

[0127] The solid-state imaging element 20 includes two pairs of dual-pixel circuits 20A and 20B. Specifically, the solid-state imaging element 20 includes four photodiodes PD1-1, PD1-2, PD2-1, and PD2-2. Photodiodes PD1-1, PD1-2, PD2-1, and PD2-2 share a floating diffusion FD. Furthermore, photodiodes PD1-1, PD1-2, PD2-1, and PD2-2 share a logic circuit downstream of the floating diffusion FD. An overflow integration capacitor LOFIC1 is provided in the dual-pixel circuit 20A. An overflow integration capacitor LOFCI2 is provided in the dual-pixel circuit 20B.

[0128] For example, when performing a 2×2 merging process, the transmission gates TX1-1, TX1-2, TX2-1, and TX2-2 are simultaneously set to the ON state. Additionally, the overflow capacitor gates LFG1 and LFG2 are set to the ON state. In this case, the potential of the floating diffusion FD is determined by the charge accumulated in photodiodes PD1-1, PD1-2, PD2-1, and PD2-2, and the charge accumulated in overflow integrating capacitors LOFIC1 and LOFIC2.

[0129] This disclosure is not limited to the embodiments described above, but includes all changes and modifications without departing from the technical scope or essence of this disclosure as defined by the claims.

Claims

1. A solid-state imaging element, comprising: A pair of photodiodes; Floating diffusion, which is shared by the pair of photodiodes; A pair of portals are disposed between the corresponding one of the pair of photodiodes and the floating diffuser; An overflow integrating capacitor, which is shared by the pair of photodiodes; and A pair of overflow gates are disposed between a corresponding one of the pair of photodiodes and the overflow integrating capacitor, and during the charge accumulation period of a corresponding one of the pair of photodiodes, the barrier in each of the pair of overflow gates is set to be lower than the barrier of the corresponding one of the pair of transmission gates.

2. An imaging device comprising a solid-state imaging element according to claim 1, further comprising: A constant voltage source applies equal voltages to the pair of overflow gates.

3. An imaging device comprising a solid-state imaging element according to claim 1, further comprising: An analog-to-digital converter reads the floating diffused charge and converts the charge into a pixel value, wherein... The solid-state imaging element includes an overflow capacitor gate disposed between the overflow integrating capacitor and the floating diffusion. Regarding the pair of photodiodes designated for the pixel used in image generation, the pair of transmission gates are simultaneously set to the ON state and transfer charge to the floating diffuser. Furthermore, regarding the floating diffusion of charge from the pair of photodiodes, the gate of the overflow capacitor is set to the ON state, and The analog-to-digital converter reads out the floating diffused charge during the period when the gate of the overflow capacitor is in the ON state.

4. An imaging device comprising a solid-state imaging element according to claim 1, further comprising: An exposure time control unit controls the exposure time corresponding to the charge accumulation period, wherein... For a pair of photodiodes designated as pixels for phase-detection autofocus, charge is transferred to the floating diffuser at different timings, and When at least one of the pair of photodiodes has reached saturation charge, the exposure time control unit shortens the exposure time.

5. An imaging device comprising a solid-state imaging element according to claim 1, further comprising: An analog-to-digital converter reads the floating diffused charge and converts the charge into a pixel value, wherein... The solid-state imaging element includes an overflow capacitor gate disposed between the overflow integrating capacitor and the floating diffusion. Regarding the pair of photodiodes designated for use in phase-detection autofocus, the pair of transmission gates are set to the ON state at different timings and transfer charge to the floating diffuser. When the photodiode for which charge is transferred has reached its saturation charge, the gate of the overflow capacitor is set to the ON state with respect to the floating diffusion of charge from the photodiode that has reached the saturation charge. The analog-to-digital converter calculates the pre-expansion pixel value before the overflow capacitor gate is set to the ON state and the post-expansion pixel value when the overflow capacitor gate is in the ON state.

6. The imaging device according to claim 5, further comprising: An autofocus processing unit controls the lens position based on the phase detection autofocus, wherein... When one of the pair of photodiodes has reached the saturation charge and the other of the pair of photodiodes is below the saturation charge, the autofocus processing unit sets the sum of the pre-expansion pixel value and the post-expansion pixel value of the one of the pair of photodiodes as the pixel value of the one of the pair of photodiodes.

7. The imaging device according to claim 5, further comprising: An exposure time control unit controls the exposure time corresponding to the charge accumulation period, wherein... When both of the pair of photodiodes have reached the saturation charge, the exposure time control unit shortens the exposure time.

8. An imaging method using a solid-state imaging element, comprising: A pair of photodiodes; Floating diffusion, which is shared by the pair of photodiodes; A pair of portals are disposed between the corresponding one of the pair of photodiodes and the floating diffuser; An overflow integrating capacitor, which is shared by the pair of photodiodes; and A pair of overflow gates are disposed between the corresponding one of the pair of photodiodes and the overflow integrating capacitor, wherein... During the charge accumulation period of a corresponding one of the pair of photodiodes, the barrier in each of the pair of overflow gates is set to be lower than the barrier of a corresponding one of the pair of transmission gates.

9. The imaging method according to claim 8, wherein Equal voltages are applied to the pair of overflow gates.

10. The imaging method according to claim 8, wherein The solid-state imaging element includes an overflow capacitor gate disposed between the overflow integrating capacitor and the floating diffusion. An imaging device including the solid-state imaging element includes an analog-to-digital converter that reads out the floating diffused charge and converts the charge into pixel values. Regarding the pair of photodiodes designated for the pixel used in image generation, the pair of transmission gates are simultaneously set to the ON state and transfer charge to the floating diffuser. Furthermore, regarding the floating diffusion of charge from the pair of photodiodes, the gate of the overflow capacitor is set to the ON state, and The analog-to-digital converter reads out the floating diffused charge during the period when the gate of the overflow capacitor is in the ON state.

11. The imaging method according to claim 8, wherein The imaging device including the solid-state imaging element includes an exposure time control unit, which controls the exposure time corresponding to the charge accumulation period. Charge is transferred from a pair of photodiodes designated for phase-detection autofocus to the floating diffuser at different times, and When at least one of the pair of photodiodes has reached saturation charge, the exposure time control unit shortens the exposure time.

12. The imaging method according to claim 8, wherein The solid-state imaging element includes an overflow capacitor gate disposed between the overflow integrating capacitor and the floating diffusion. An imaging device including the solid-state imaging element includes an analog-to-digital converter that reads out the floating diffused charge and converts the charge into pixel values. Regarding the pair of photodiodes designated for use in phase-detection autofocus, the pair of transmission gates are set to the ON state at different timings and transfer charge to the floating diffuser. When the photodiode for which charge is transferred has reached its saturation charge, the gate of the overflow capacitor is set to the ON state with respect to the floating diffusion of charge from the photodiode that has reached the saturation charge. The analog-to-digital converter calculates the pre-expansion pixel value before the overflow capacitor gate is set to the ON state and the post-expansion pixel value when the overflow capacitor gate is in the ON state.

13. The imaging method according to claim 12, wherein The imaging device includes an autofocus processing unit, which controls the lens position based on the phase detection autofocus. When one of the pair of photodiodes has reached the saturation charge and the other of the pair of photodiodes is below the saturation charge, the autofocus processing unit sets the sum of the pre-expansion pixel value and the post-expansion pixel value of the one of the pair of photodiodes as the pixel value of the one of the pair of photodiodes.

14. The imaging method according to claim 12, wherein The imaging device includes an exposure time control unit, which controls the exposure time corresponding to the charge accumulation period, and When both of the pair of photodiodes have reached the saturation charge, the exposure time control unit shortens the exposure time.

Images