In-situ cleaning method and apparatus for substrate surface pretreatment for epitaxial growth

Abstract

The application relates to a method and equipment for in-situ cleaning of a substrate surface for epitaxial growth pretreatment, which continuously performs the following steps in a single process chamber: an etchant generation step of generating an etchant containing NH4F and NH4F.HF by reacting NF3 gas with NH3 gas in a plasma environment; an etching step of reacting the etchant with a silicon oxide layer on the substrate surface to generate solid ammonium fluorosilicate at a temperature of 25 DEG C to 40 DEG C; a sublimation removal step of heating the substrate to 150 DEG C to 200 DEG C to sublimate and decompose the solid ammonium fluorosilicate into gaseous products, and removing the gaseous products from the process chamber; wherein the duration of the sublimation removal step is 1.5 to 3 times the duration required for a single sublimation annealing. By synergistically optimizing the temperature of the etching step and the sublimation volatilization temperature and time of the sublimation removal step, an atomically clean substrate surface with extremely low impurity residue can be stably obtained.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to an in-situ cleaning method and apparatus for substrate surface cleaning before epitaxial growth. Background Technology

[0002] Source-drain embedded silicon-germanium (SiGe) epitaxy is a core strain engineering technology in semiconductor manufacturing to improve the performance of PMOS devices. It mainly involves selectively growing silicon-germanium layers in the source-drain regions. Lattice mismatch generates uniaxial compressive stress in the lateral channel, causing the valence band to split. The light hole band occupies the top of the valence band, reducing the effective hole mass and thus improving hole mobility (driving current can be increased by 40-60%), significantly improving PMOS switching speed and power consumption.

[0003] The core objective of pretreatment before embedded SiGe epitaxial growth is to provide an atomically clean, stoichiometrically correct (i.e., extremely low concentration of critical impurities) crystal surface suitable for epitaxial deposition, ensuring the subsequent growth of high-quality epitaxial layers with uniform thickness and concentration and few defects (such as dislocations). Simultaneously, to maximize the advantages of SiGe strain engineering, the industry has introduced specific "Σ" groove (or similar groove) structures. By increasing the contact area between the source / drain region and the channel, and enhancing stress transfer efficiency, these structures effectively reduce the equivalent channel length, further improving device performance.

[0004] However, achieving this goal faces significant challenges. Firstly, after the etching process forming the "Σ" groove is completed, a layer of natural silicon oxide 100 will inevitably and rapidly form on the exposed substrate surface in the atmospheric environment. Figure 1 The yellow portion is shown. This native silicon oxide layer 100 disrupts the lattice continuity of single-crystal silicon, and if not removed, it will severely degrade the quality of the SiGe epitaxial layer grown on it. Therefore, a special pre-EPIclean treatment must be performed on the interface before epitaxial growth to restore an ideal crystal interface.

[0005] Traditional surface pretreatment often employs offline wet cleaning (such as immersion in dilute hydrofluoric acid), which has many inherent drawbacks: after cleaning and before entering the epitaxial reaction chamber, the wafer needs to be exposed to the atmosphere and transported, leading to the risk of re-oxidation and secondary contamination of the surface; in addition, to thoroughly remove any trace oxide layers and impurities that may remain, long-term hydrogen baking at high temperatures is usually required, which introduces a huge thermal budget, may damage the formed shallow junctions, cause impurity redistribution, and affect the performance and reliability of the device.

[0006] To address the aforementioned issues, dry chemical cleaning techniques capable of in-situ processing within the epitaxial equipment cavity (such as the SiCoNi process) have been proposed and applied. This process aims to remove the natural oxide layer in situ through gaseous reaction, avoiding re-polluting the atmosphere. However, research has revealed that even with such advanced dry cleaning processes, trace amounts of impurities such as carbon, fluorine, and oxygen may still remain at the interface after cleaning. Figure 2 The red portion is shown. These residual impurity atoms, especially fluorine, can embed themselves in the crystal lattice, becoming defect nucleation centers, reducing the crystal quality of the epitaxial layer, and consequently leading to electrical failures in the device. Summary of the Invention

[0007] The purpose of this invention is to provide a method and apparatus for in-situ cleaning of substrate surface for pretreatment before epitaxial growth, so as to solve the problem of residual interface impurities after substrate surface cleaning in the prior art, thereby providing an ideal substrate surface for high-quality epitaxial growth.

[0008] To achieve the above objectives, the present invention provides an in-situ substrate surface cleaning method for epitaxial growth pretreatment, wherein the following steps are continuously performed within a single process chamber:

[0009] Etching agent generation steps: In a plasma environment, NF3 gas reacts with NH3 gas to generate an etchant containing NH4F and NH4F·HF;

[0010] Etching step: The substrate is heated to 25℃-40℃, so that the etchant reacts with the silicon oxide layer on the substrate surface to generate solid ammonium fluorosilicate;

[0011] Sublimation removal step: The substrate is heated to 150°C-200°C to sublimate and decompose the solid ammonium fluorosilicate into gaseous products, and the gaseous products are removed from the process chamber; wherein the duration of the sublimation removal step is 1.5 to 3 times the duration required for a single sublimation annealing.

[0012] Optionally, during the etching step, the substrate is heated to 35°C.

[0013] Optionally, in the sublimation removal step, the substrate is heated to 180°C.

[0014] Optionally, the duration of the sublimation removal step is twice the duration required for a single sublimation annealing.

[0015] Optionally, the gaseous products include SiF4, NH3, and HF gas.

[0016] Optionally, the solid ammonium fluorosilicate is (NH4)2SiF6.

[0017] Optionally, the silicon oxide layer is a natural silicon oxide layer formed on the substrate surface by exposure to the atmosphere.

[0018] Based on the same inventive concept, the present invention also provides an in-situ cleaning apparatus for performing the in-situ substrate surface cleaning method for epitaxial growth pretreatment as described above, comprising:

[0019] Process chambers are used to house the substrate;

[0020] A plasma generation device, connected to the process chamber, is used to generate a plasma environment within the process chamber.

[0021] A temperature control device is connected to the process chamber. The temperature control device is used to heat the substrate to 25°C-40°C in the etching step and to 150°C-200°C in the sublimation removal step.

[0022] A gas delivery system for delivering NF3 gas and NH3 gas to the process chamber;

[0023] An exhaust system is used to discharge gaseous products from the process chamber.

[0024] Based on the same inventive concept, the present invention also provides a method for manufacturing a semiconductor device, which involves cleaning the source and drain regions of a PMOS device on a substrate using an in-situ substrate surface cleaning method for epitaxial growth pretreatment as described above; and selectively epitaxially growing an embedded silicon-germanium epitaxial layer on the cleaned source and drain regions of the PMOS device.

[0025] Based on the same inventive concept, the present invention also provides a semiconductor device in which the source and drain regions of the PMOS device include an embedded silicon-germanium epitaxial layer formed by the semiconductor device manufacturing method described above.

[0026] In the in-situ substrate surface cleaning method and equipment for epitaxial growth pretreatment provided by this invention, by synergistically optimizing the temperature of the etching step (25-40℃) and the sublimation evaporation temperature (150-200℃) and sublimation evaporation time (1.5-3 times the reference time) of the sublimation removal step, an atomically clean substrate surface with extremely low impurity residue can be stably obtained. This lays a solid foundation for subsequent high-quality epitaxial growth, thereby significantly improving the carrier mobility and drive current of PMOS devices and improving the performance of epitaxial layer devices with excessive leakage current. This method is performed entirely in-situ, avoiding the negative impacts of atmospheric pollution and high-temperature hydrogen baking, and has a wide process window and good stability. Attached Figure Description

[0027] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0028] Figure 1 This is a schematic diagram of the structure of a natural silicon oxide layer formed after etching grooves in the prior art;

[0029] Figure 2 This is a schematic diagram showing the residual trace impurities at the interface after cleaning using the SiCoNi process in the prior art.

[0030] Figure 3 This is a flowchart of an in-situ cleaning method for substrate surface pretreatment before epitaxial growth, provided by an embodiment of the present invention.

[0031] The attached figures are labeled as follows:

[0032] 100 - Natural silicon oxide layer; 200 - Impurities such as carbon, fluorine, and oxygen. Detailed Implementation

[0033] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0035] In the description of this invention, it should be understood that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use, or the orientation or positional relationship commonly understood by those skilled in the art. They are only used to facilitate the description of this invention and to simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0036] Furthermore, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes that element. Those skilled in the art will understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0037] In actual process development, it was found that even when conventional SiCoNi processes (e.g., under standard parameters) were used to remove [the harmful substances], [the problem persisted]. Figure 1 The study depicted a natural silicon oxide layer and obtained an embedded silicon-germanium epitaxial structure that was defect-free under transmission electron microscopy (TEM) with thickness and germanium concentration meeting design targets. However, abnormal longitudinal current leakage (e.g., approximately 8 times higher than the baseline device) was still observed during electrical testing (WAT). Analysis of other electrical parameters indicated that this leakage was not caused by significant crystal growth defects in the epitaxial layer itself. Therefore, the quality of the interface pretreatment before epitaxial growth is considered, specifically, the abnormal fluctuations in the concentration of residual carbon, fluorine, and oxygen impurities at the interface after SiCoNi cleaning. These residual impurity atoms became a potential cause of device electrical failure.

[0038] Based on in-depth analysis and deduction of the SiCoNi process principle, it is inferred that easily sublimable solid ammonium fluorosilicate generated under different process conditions (especially temperature) may exhibit differences in efficiency during its subsequent sublimation and volatilization, resulting in varying levels of C / F / O residue at the interface. The root cause of the problem likely points precisely to two core steps: the etching reaction of silicon oxide and the sublimation and volatilization of solid ammonium fluorosilicate. Therefore, this invention provides an in-situ substrate surface cleaning method for epitaxial growth pretreatment. By optimizing key parameters of the pretreatment steps, such as the temperature of the etching step and the temperature and time of the sublimation removal step, the residual amount of C / F / O at the growth interface is reduced. This method can stably obtain an atomically clean substrate surface with extremely low impurity residue, improving the performance of epitaxial layer devices with excessive leakage current.

[0039] For details, please refer to Figure 3 This invention provides an in-situ substrate surface cleaning method for epitaxial growth pretreatment, which continuously and in-situ performs the following steps within a single process chamber:

[0040] S100, Etching agent generation step: In a plasma environment, NF3 gas reacts with NH3 gas to generate an etchant containing NH4F and NH4F·HF.

[0041] S200, Etching Step: The substrate is heated to 25℃-40℃ to allow the etchant to react with the silicon oxide layer on the substrate surface to generate solid ammonium fluorosilicate;

[0042] S300, Sublimation Removal Step: The substrate is heated to 150℃-200℃ to sublimate and decompose solid ammonium fluorosilicate into gaseous products, and the gaseous products are removed from the process chamber; wherein, the duration of the sublimation removal step is 1.5 to 3 times the duration required for a single sublimation annealing.

[0043] The silicon substrate to be processed, such as a substrate that has completed shallow trench isolation and gate structure formation, with the substrate surface of the PMOS region source-drain window exposed, is transferred to a vacuum-sealed process chamber.

[0044] First, step S100 is executed to generate the etchant. Under plasma conditions, NF3 gas reacts with NH3. This reaction occurs under the ionization of the plasma, generating an etchant containing ammonium fluoride and ammonium hydrogen fluoride. The chemical reaction formula is as follows:

[0045] NF3 + NH3 → NH4F + NH4F . HF

[0046] The flow rates of NF3 gas and NH3 can be adjusted according to process requirements, and this invention does not impose any limitations on this. Simultaneously, the plasma environment can be maintained by excitation using radio frequency or microwave methods. For example, by activating the plasma generation device and applying a suitable power radio frequency source, a stable plasma can be generated within the process chamber. In the plasma environment, NF3 gas and NH3 are ionized and react to primarily generate a mixed etchant of ammonium fluoride and ammonium hydrogen fluoride. This step provides highly reactive reactants for subsequent etching.

[0047] The S200 etching step is then performed. This step is carried out at a controlled temperature, allowing the etchant generated in the previous step to chemically react with the silicon oxide layer on the substrate surface. Preferably, the reaction temperature is controlled between 25°C and 40°C. Under these mild conditions, the etchant reacts with silicon dioxide to generate a solid ammonium fluorosilicate byproduct, as shown in the following reaction formula:

[0048] NH4F+NH4F . HF + SiO2 → (NH4)2SiF6(S) + H2O

[0049] The silicon oxide layer mentioned here mainly refers to the natural oxide layer formed on the substrate surface due to exposure to the atmosphere in the preceding process. One of the core aspects of this invention is the precise control of the substrate temperature in this step. When the temperature is below 25°C, the reaction may not be sufficient; while above 40°C, unnecessary side reactions may occur or the already formed structure may be affected. Extensive experiments have shown that setting the etching temperature within this range, compared to traditionally lower temperatures, significantly promotes the thoroughness and uniformity of the reaction, reducing the entrainment and residue of fluorine at the interface from the source. Experimental data shows that increasing the etching temperature from 25°C to 35°C can reduce the fluorine concentration at the interface after cleaning by approximately three times. This proves that at this preferred temperature, the reaction between the etchant and silicon oxide is more thorough and uniform, and the generated ammonium fluorosilicate byproduct has a better morphology, minimizing fluorine residue from the source. In this embodiment, the solid byproduct generated by the reaction is ammonium fluorosilicate, with the chemical formula (NH4)2SiF6.

[0050] Finally, step S300 is performed for sublimation removal. This step involves heating to sublimate and decompose the solid ammonium fluorosilicate generated in the previous step. Specifically, the substrate is heated to a high temperature of 150°C-200°C. At this temperature, the solid ammonium fluorosilicate first sublimates and then decomposes into various gaseous products. To ensure better removal of these byproducts, the present invention limits the duration of this step. The duration is not a fixed value but is defined as "1.5 to 3 times the time required for a single sublimation annealing." The "time required for a single sublimation annealing" mentioned here is a baseline time, which can be understood as the time required for the generated solid ammonium fluorosilicate to essentially complete its sublimation and decomposition under specific, unoptimized basic process conditions (e.g., an etching temperature of 25°C). By extending the actual execution time of this step to 1.5 to 3 times this baseline time, it can be ensured that even with uneven reaction or localized adsorption, all solid byproducts and any oxygen-containing impurities that may remain through physical adsorption can be completely removed.

[0051] Preferably, in the sublimation removal step, the substrate is heated to 180°C, at which temperature the sublimation decomposition efficiency is high and the thermal budget is moderate.

[0052] Preferably, the sublimation removal step takes twice as long as a single sublimation annealing step, which can very effectively ensure that all solid byproducts and any adsorbed oxygen-containing impurities are completely removed.

[0053] In this embodiment, the gaseous products include SiF4, NH3 and HF gases, which are continuously discharged from the process chamber through the exhaust system, thereby obtaining an atomically clean substrate surface.

[0054] After the cleaning process is completed, the silicon substrate can be used for subsequent epitaxial growth steps. An embedded silicon-germanium layer is deposited on the substrate surface of the source and drain regions of the cleaned PMOS device using a selective epitaxial growth process. Due to the near-perfect growth interface, the resulting epitaxial layer has high crystal quality and few defects, and can fully exert its role in introducing compressive stress and improving hole mobility.

[0055] To investigate the influence of SiCoNi process parameters on the interface quality after cleaning, this invention designed a systematic experiment comprising a control group and four experimental groups, and verified the results using the controlled variable method:

[0056] A. Control group - using baseline process conditions: silicon oxide etching reaction temperature 25℃, sublimation and volatilization time fixed.

[0057] B. Experimental Group 1 - The silicon oxide etching reaction temperature was increased to 35℃, and the sublimation and volatilization time was the same as that of the control group.

[0058] C. Experimental Group 2 - The etching reaction temperature was kept at 25℃, but the sublimation and volatilization time was extended to twice the original time, while the silicon oxide etching reaction time was kept constant.

[0059] D. Experimental Group 3 - The etching reaction temperature was kept at 25℃, and the sublimation and volatilization time was the same, but the amount of silicon oxide etched was increased by 1.4 times.

[0060] E. Experimental Group 4 - The etching reaction temperature was maintained at 25℃, while the sublimation and volatilization time was doubled and the amount of silicon oxide etched was increased by 1.4 times.

[0061] The substrate interfaces after the above-mentioned processes were analyzed in depth by secondary ion mass spectrometry, and the measured concentrations of oxygen (O) and fluorine (F) are shown in Table 1 below.

[0062] Table 1

[0063] concentration control group Experimental group 1 Experimental group 2 Experimental group 3 Experimental group 4 oxygen 4.91E+19 2.77E+19 1.71E+19 3.37E+19 8.52E+18 fluorine 1.93E+17 6.18E+16 8.00E+16 2.01E+17 7.38E+16

[0064] Based on the data in Table 1 above, the following conclusions can be drawn:

[0065] 1) No obvious carbon (C) peaks were detected at the interface of all five groups of experiments (no abnormal concentration).

[0066] 2) Results from Experimental Group 1 showed that simply increasing the etching reaction temperature from 25℃ to 35℃ significantly reduced the interfacial F concentration by approximately 3 times and the O concentration by approximately 1.8 times. This indicates that increasing the etching temperature is the most effective single method to reduce interfacial F residue.

[0067] 3) Results from Experiment 2 showed that simply doubling the sublimation time at the baseline temperature reduced the interfacial F concentration by approximately 2.4 times and the O concentration by a significant 2.87 times. This confirms that sufficient sublimation time is crucial for removing oxygen-containing impurities.

[0068] 4) Results from Experiment 3 showed that simply increasing the amount of silicon oxide etching had a negligible effect on reducing the O / F concentration at the interface, and the F concentration even increased slightly. This indicates that without optimizing the core reaction conditions, simply using "excessive" operation cannot solve the problem of impurity residue.

[0069] 5) The results of Experiment 4 show that combining increased etching amount and doubled sublimation time can achieve a more balanced and significant reduction in O / F concentration (O reduced by about 5.8 times and F reduced by about 2.6 times), demonstrating the potential of parameter synergistic optimization.

[0070] The above experimental conclusions were verified through the following engineering practices:

[0071] In the initial process, the junction leakage and sidewall isolation leakage (LK_SIW) of the devices processed by the issue tool were approximately 8 times higher than those of the reference tool (BSL tool). Based on electrical analysis, this leakage was determined to be highly correlated with the surface treatment quality before epitaxial growth.

[0072] Based on the experimental data in Table 1 above, analysis confirmed that abnormal F element concentration at the interface is a key factor affecting the quality of the epitaxial layer and causing device leakage. Therefore, the optimal experimental group 1 process (silicon oxide etching reaction temperature 35°C, fixed sublimation and volatilization time) was implemented in an engineering batch for verification.

[0073] With the optimized process conditions, the device leakage problem caused by the epitaxial layer interface quality was fundamentally improved, and the leakage level was reduced by approximately 10 times. This strongly demonstrates that by precisely controlling the etching temperature to, for example, 35°C, the residual F at the growth interface can be reduced to an extremely low level, thereby obtaining a high-quality epitaxial interface and ultimately achieving excellent device performance.

[0074] Based on the same inventive concept, this invention also proposes an in-situ cleaning apparatus for performing an in-situ substrate surface cleaning method for epitaxial growth pretreatment as described above, including:

[0075] Process chambers are used to house the substrate;

[0076] A plasma generation device, connected to the process chamber, is used to generate a plasma environment within the process chamber.

[0077] A temperature control device is connected to the process chamber. The temperature control device is used to heat the substrate to 25°C-40°C in the etching step and to 150°C-200°C in the sublimation removal step.

[0078] A gas delivery system for delivering NF3 gas and NH3 gas to the process chamber;

[0079] An exhaust system is used to discharge gaseous products from the process chamber.

[0080] Since the in-situ cleaning equipment provided by this invention belongs to the same inventive concept as the in-situ substrate surface cleaning method for epitaxial growth pretreatment described above, the in-situ cleaning equipment provided by this invention has all the advantages of the in-situ substrate surface cleaning method for epitaxial growth pretreatment described above. Therefore, the beneficial effects of the in-situ cleaning equipment provided by this invention will not be described in detail here.

[0081] Based on the same inventive concept, this invention also proposes a method for manufacturing a semiconductor device, which involves cleaning the source and drain regions of a PMOS device on a substrate using the in-situ substrate surface cleaning method described above for epitaxial growth pretreatment; and selectively epitaxially growing an embedded silicon-germanium epitaxial layer on the cleaned source and drain regions of the PMOS device.

[0082] Since the semiconductor device manufacturing method provided by this invention belongs to the same inventive concept as the in-situ substrate surface cleaning method for epitaxial growth pretreatment described above, the semiconductor device manufacturing method provided by this invention has all the advantages of the in-situ substrate surface cleaning method for epitaxial growth pretreatment described above. Therefore, the beneficial effects of the semiconductor device manufacturing method provided by this invention will not be described in detail here.

[0083] Based on the same inventive concept, embodiments of the present invention also propose a semiconductor device in which the source and drain regions of the PMOS device include an embedded silicon-germanium epitaxial layer formed according to the semiconductor device manufacturing method described above.

[0084] Since the semiconductor device provided by this invention and the manufacturing method of the semiconductor device described above belong to the same inventive concept, the semiconductor device provided by this invention has all the advantages of the manufacturing method of the semiconductor device described above. Therefore, the beneficial effects of the semiconductor device provided by this invention will not be described in detail here.

[0085] In summary, this invention provides a method and apparatus for manufacturing semiconductor devices. By synergistically optimizing the temperature (25-40°C) of the etching step and the sublimation evaporation temperature (150-200°C) and sublimation evaporation time (1.5-3 times the reference time) of the sublimation removal step, an atomically clean substrate surface with extremely low impurity residue can be stably obtained. This lays a solid foundation for subsequent high-quality epitaxial growth, thereby significantly improving the carrier mobility and drive current of PMOS devices and mitigating excessive leakage current in epitaxial layer devices. This method is performed entirely in-situ, avoiding the negative impacts of atmospheric pollution and high-temperature hydrogen baking, and offers a wide process window and good stability.

[0086] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure are within the protection scope of the present invention. Obviously, those skilled in the art can make various modifications and variations to the present invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the present invention and its equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A method for in-situ cleaning of substrate surface for pretreatment before epitaxial growth, characterized in that, The following steps are performed continuously within a single process chamber: Etching agent generation steps: In a plasma environment, NF3 gas reacts with NH3 gas to generate an etchant containing NH4F and NH4F·HF; Etching step: The substrate is heated to 25℃-40℃, so that the etchant reacts with the silicon oxide layer on the substrate surface to generate solid ammonium fluorosilicate; Sublimation removal step: The substrate is heated to 150°C-200°C to sublimate and decompose the solid ammonium fluorosilicate into gaseous products, and the gaseous products are removed from the process chamber; wherein the duration of the sublimation removal step is 1.5 to 3 times the duration required for a single sublimation annealing.

2. The in-situ substrate surface cleaning method for epitaxial growth pretreatment according to claim 1, characterized in that, In the etching step, the substrate is heated to 35°C.

3. The in-situ substrate surface cleaning method for epitaxial growth pretreatment according to claim 1, characterized in that, In the sublimation removal step, the substrate is heated to 180°C.

4. The in-situ substrate surface cleaning method for epitaxial growth pretreatment according to claim 1, characterized in that, The duration of the sublimation removal step is twice the duration required for a single sublimation annealing.

5. The in-situ substrate surface cleaning method for epitaxial growth pretreatment according to claim 1, characterized in that, The gaseous products include SiF4, NH3 and HF gas.

6. The in-situ cleaning method for substrate surface pretreatment before epitaxial growth according to claim 1, characterized in that, The solid ammonium fluorosilicate is (NH4)2SiF6.

7. The in-situ substrate surface cleaning method for epitaxial growth pretreatment according to claim 1, characterized in that, The silicon oxide layer is a natural silicon oxide layer formed on the surface of the substrate by exposure to the atmosphere.

8. An in-situ cleaning apparatus for performing the in-situ cleaning method for substrate surface pretreatment for epitaxial growth according to any one of claims 1-7, characterized in that, include: Process chambers are used to house the substrate; A plasma generation device, connected to the process chamber, is used to generate a plasma environment within the process chamber. A temperature control device is connected to the process chamber. The temperature control device is used to heat the substrate to 25°C-40°C in the etching step and to 150°C-200°C in the sublimation removal step. A gas delivery system for delivering NF3 gas and NH3 gas to the process chamber; An exhaust system is used to discharge gaseous products from the process chamber.

9. A method for manufacturing a semiconductor device, characterized in that, The surface of the PMOS device source / drain region on the substrate is cleaned using the in-situ substrate surface cleaning method for pre-epitaxial growth treatment according to any one of claims 1-7; and an embedded silicon-germanium epitaxial layer is selectively grown on the cleaned PMOS device source / drain region.

10. A semiconductor device, characterized in that, The source and drain regions of its PMOS device include an embedded silicon-germanium epitaxial layer formed by the semiconductor device manufacturing method according to claim 9.

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