A replacement method and device based on fine-grained path under multi-body last-level cache

Abstract

This paper relates to a fine-grained path replacement method and apparatus based on a multi-level last-level cache. The method includes: responding to a judgment result indicating that no data identical to the current cache write request exists in the cache; determining the index corresponding to the address of the cache write request in the cache; executing a first replacement strategy based on the historical failure information of each path corresponding to the index in the cache to obtain candidate paths; searching the failure path table based on the index to obtain a subset of failure paths corresponding to the index; validating the candidate paths based on the subset of failure paths; if the verification passes, using the candidate path as the replacement path; and writing the data of the cache write request into the replacement path. This method is independent of technological means and manages effective paths in a fine-grained manner based on different index intervals for different last-level cache storage areas, selecting paths with no bad points as storage space, thereby improving the yield and capacity effectiveness of the last-level cache under large capacity.

Description

Technical Field

[0001] The embodiments in this specification relate to the field of chip design and implementation, and in particular to a method and apparatus for replacing fine-grained paths based on a multi-body final-level cache. Background Technology

[0002] With the increasing demands of artificial intelligence and big data processing, the required cache capacity is also growing. However, larger cache capacity means a larger chip area, indirectly leading to yield issues. Therefore, how to improve the yield of larger cache chip capacities while simultaneously enhancing capacity effectiveness is a pressing technical problem that needs to be solved. Summary of the Invention

[0003] To address the problems existing in the prior art, this specification provides a method and apparatus for fine-grained path replacement based on multi-bank final cache. This method does not rely on process technology and manages effective paths in a fine-grained manner based on different index ranges for different final cache storage bank (LLC) areas. It selects the currently dead-free path as the storage space, thereby improving the yield and capacity effectiveness of the final cache (LLC) under large capacity.

[0004] The specific technical solutions of the embodiments in this specification are as follows: On the one hand, embodiments of this specification provide a method for replacing fine-grained paths based on multi-body final-level caches, the method comprising: In response to the determination that there is no data in the cache that is the same as the current cache write request, the index corresponding to the address of the cache write request in the cache is determined, and the first replacement strategy is executed according to the historical failure information of each path corresponding to the index in the cache to obtain candidate paths. The historical failure information is updated by the index when writing to the cache in the past. The failure path table is searched according to the index to obtain the failure path subset corresponding to the index. The failure path table stores the information of the failure path and the correspondence between the index and the index. The candidate paths are validated based on the subset of failed paths. If the validation passes, the candidate path is used as the replacement path. Write the data of the cache write request into the replacement path.

[0005] Furthermore, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The paths controlled by the first replacement strategy output do not include those marked as failed by the historical failure information.

[0006] Furthermore, after obtaining the subset of failed paths corresponding to the index, the method further includes: Update the historical failure information of the failed paths in the subset of failed paths.

[0007] Furthermore, updating the historical failure information of the failed paths in the subset of failed paths further includes: Set the age of the failed path to a predetermined value.

[0008] Furthermore, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The replacement path is determined from each path based on the age of each path corresponding to the index in the cache.

[0009] Furthermore, the first replacement strategy is a least recently used strategy, a rereference interval prediction strategy, or a static rereference interval prediction strategy.

[0010] Furthermore, validating the candidate paths based on the subset of failed paths further includes: Determine whether the candidate path exists in the subset of failed paths; If so, the validity verification result is "failed". If not, then the validity verification result is passed.

[0011] Furthermore, if the validity verification result is a failure, the method further includes: The second replacement strategy is executed based on the non-failed paths in the corresponding paths in the cache according to the index, to obtain the replacement path.

[0012] Furthermore, the second replacement strategy is a random replacement strategy.

[0013] Furthermore, the step of constructing the failure path table includes: Scan the storage space of all paths in the cache, and identify the paths with bad points in the storage space as paths to be repaired; The bad points in the storage space of the path to be repaired are repaired using a predetermined repair tool to obtain the repair result; If the repair result is a failure, the path to be repaired is designated as a failed path, and the correspondence between the failed path and its corresponding index is recorded in the failed path table.

[0014] Furthermore, the method also includes: Determine whether the available capacity of the cache meets the capacity threshold; If the condition is not met, the cache will be marked as an exception.

[0015] On the other hand, embodiments of this specification also provide a fine-grained path replacement device based on a multi-body final-level cache, the device comprising: The first strategy execution unit is used to determine the index corresponding to the address of the cache write request in the cache in response to the judgment result that there is no data in the cache that is the same as the current cache write request, and to execute the first replacement strategy according to the historical failure information of each path corresponding to the index in the cache to obtain candidate paths. The historical failure information is updated by the index when writing to the cache in the past. The failure route table lookup unit is used to look up the failure route table according to the index to obtain the failure route subset corresponding to the index. The failure route table stores the information of the failure routes and the correspondence between the indexes. The candidate path validity verification unit is used to verify the validity of the candidate path based on the subset of failed paths. If the verification passes, the candidate path is used as the replacement path. The data writing unit is used to write the data of the cache write request into the replacement path.

[0016] Furthermore, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The paths controlled by the first replacement strategy output do not include those marked as failed by the historical failure information.

[0017] Furthermore, the device also includes a failure information update unit, which is used to update the historical failure information of the failure paths in the failure path subset after obtaining the failure path subset corresponding to the index.

[0018] Furthermore, updating the historical failure information of the failed paths in the subset of failed paths further includes: Set the age of the failed path to a predetermined value.

[0019] Furthermore, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The replacement path is determined from each path based on the age of each path corresponding to the index in the cache.

[0020] Furthermore, the first replacement strategy is a least recently used strategy, a rereference interval prediction strategy, or a static rereference interval prediction strategy.

[0021] Furthermore, validating the candidate paths based on the subset of failed paths further includes: Determine whether the candidate path exists in the subset of failed paths; If so, the validity verification result is "failed". If not, then the validity verification result is passed.

[0022] Furthermore, the device also includes a second policy execution unit, which, when the validity verification result is unsuccessful, executes a second replacement policy on the non-failed paths in the corresponding paths in the cache according to the index, to obtain the replacement path.

[0023] Furthermore, the second replacement strategy is a random replacement strategy.

[0024] Furthermore, the apparatus further includes a failed route table construction unit for constructing the failed route table; wherein the step of constructing the failed route table includes: Scan the storage space of all paths in the cache, and identify the paths with bad points in the storage space as paths to be repaired; The bad points in the storage space of the path to be repaired are repaired using a predetermined repair tool to obtain the repair result; If the repair result is a failure, the path to be repaired is designated as a failed path, and the correspondence between the failed path and its corresponding index is recorded in the failed path table.

[0025] Furthermore, the device also includes a cache anomaly determination unit, used to determine whether the available capacity of the cache meets the capacity threshold; if not, the cache is marked as an anomaly.

[0026] On the other hand, embodiments of this specification also provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0027] On the other hand, embodiments of this specification also provide a computer program product, which includes a computer program that, when executed by a processor, implements the above-described method.

[0028] In this embodiment, when the cache does not contain data identical to the current cache write request (i.e., the write request misses), a first replacement strategy and a lookup of the defective path table (CAM table) are executed simultaneously. First, the index corresponding to the cache write request address is determined in the cache. Then, based on the historical failure information of each way corresponding to the index in the cache, the first replacement strategy is executed to obtain candidate ways. Simultaneously, the CAM table is searched based on the index to obtain a subset of defective paths corresponding to the index. The candidate paths are then validated based on the subset of defective paths. If the validation passes, the candidate path is used as the replacement path, and the data from the cache write request is written into the replacement path. This embodiment does not rely on the manufacturing process but implements the replacement way through logic design, thereby improving the yield and capacity effectiveness of the cache chip. Based on pure logic design, it can increase flexibility. Using the CAM table recording method for defective path lookup allows for human intervention in storage information, such as ensuring consistent capacity across banks to guarantee performance. It also allows for increasing product capacity options, further enhancing flexibility.

[0029] Furthermore, the first replacement strategy and the CAM table lookup in the embodiments of this specification are executed in parallel, so that the execution of the first replacement strategy does not depend on the lookup result of the CAM table, thereby reducing the logic depth and improving the speed of replacement path generation. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this specification or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the embodiments of this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 The diagram shown is a flowchart illustrating a fine-grained path replacement method based on a multi-body final-level cache in an embodiment of this specification. Figure 2 The diagram shown is a schematic representation of the process for constructing the failure path table in an embodiment of this specification. Figure 3 The diagram shows a flowchart of the process for validating the candidate paths based on the subset of failed paths. Figure 4 The diagram shown is a structural schematic of the fine-grained path replacement device based on multi-body final-level cache in an embodiment of this specification. Figure 5 The diagram shown is a structural schematic of the computer device in an embodiment of this specification.

[0032] [Explanation of Figure Markers]: 401. First Strategy Execution Unit; 402. Failure route table lookup unit; 403. Candidate Path Validity Verification Unit; 404. Data writing unit; 502. Computer equipment; 504, Processor; 506. Memory; 508. Drive mechanism; 510. Input / output module; 512. Input devices; 514. Output devices; 516. Presentation equipment; 518. Graphical User Interface; 520. Network interface; 522. Communication link; 524. Communication bus. Detailed Implementation

[0033] The technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the embodiments of this specification, and not all embodiments. Based on the embodiments of this specification, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the embodiments of this specification.

[0034] It should be noted that the terms "first," "second," etc., in the description, claims, and accompanying drawings of the embodiments herein are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, apparatus, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices.

[0035] It should be noted that the acquisition, storage, use, and processing of data in the technical solutions of the embodiments of this specification all comply with the relevant provisions of national laws and regulations.

[0036] It should be noted that in the embodiments of this specification, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, they do not mean that the applicant has used or necessarily used the solution.

[0037] The main technical solution of the embodiments in this specification is to manage effective ways in a fine-grained manner for different LLC bank areas based on different index intervals, selecting the currently dead-point-free way as the storage space, thereby improving the yield and capacity effectiveness of LLC under large capacity. Specifically, the embodiments in this specification propose a fine-grained way replacement method based on multi-bank last-level cache. Figure 1 The diagram shown is a flowchart illustrating a fine-grained path replacement method based on a multi-body final-level cache according to an embodiment of this specification. The order of steps listed in the embodiment is merely one possible execution order among many and does not represent the only possible execution order. In actual system or device products, the method can be executed sequentially or in parallel according to the embodiment or the accompanying drawings. Specifically, as shown... Figure 1 As shown, the method may include: Step 101: In response to the judgment result that there is no data in the cache that is the same as the current cache write request, determine the index corresponding to the address of the cache write request in the cache, and execute the first replacement strategy according to the historical failure information of each path corresponding to the index in the cache to obtain candidate paths. The historical failure information is updated by the index when writing to the cache in the past. Step 102: Search the failure path table according to the index to obtain the failure path subset corresponding to the index. The failure path table stores the information of failure paths and the correspondence between the indexes. Step 103: Verify the validity of the candidate path based on the subset of failed paths. If the verification passes, the candidate path is used as the replacement path. Step 104: Write the data of the cache write request into the replacement path.

[0038] In the embodiments of this specification, when a write request to a cached address misses in the corresponding LLC bank storage space, a sacrifice way needs to be found as a replacement way. The data originally stored in the sacrifice way is written back to DDR, and the data of the write request is written to this replacement way.

[0039] During the selection of the replacement way, the index corresponding to the address of the write request in the cache is first determined. For example, the index in the cache can be obtained by hashing the address of the write request, or by converting a specified part of the information in the address of the write request into the index in the cache. This specification does not impose any limitations on this method. It should be noted that multiple different write requests may correspond to the same index, and the index in the cache may correspond to multiple ways. The method in this specification is to select a sacrifice way as the replacement way from the multiple ways corresponding to the index in the cache for the write request, and write the data of the write request into the replacement way.

[0040] In the embodiments described in this specification, MBIST is started upon system startup. MBIST is used to determine whether bad points exist in the cache, thereby constructing a failed path table (CAM table). Specifically, as shown... Figure 2 The diagram shown illustrates the process of constructing the failure path table in an embodiment of this specification, including the following steps: Step 201: Scan the storage space of all paths in the cache, and identify the paths with bad points in the storage space as paths to be repaired; Step 202: Repair the bad points in the storage space of the path to be repaired using a predetermined repair tool to obtain the repair result; Step 203: If the repair result is a repair failure, then the path to be repaired is regarded as a failed path, and the correspondence between the failed path and the corresponding index is recorded in the failed path table.

[0041] In the embodiments of this specification, the storage space of multiple ways corresponding to each index in the MBIST scan cache is checked for bad pixels. If bad pixels are detected, the general row / column repair mechanism is first enabled to repair the bad pixels. If the repair is successful, the way is valid. If the repair fails, the way is regarded as a defect way, and the correspondence between the defect way and the corresponding index is recorded in the CAM table.

[0042] In some other embodiments of this specification, in order to save space in the CAM table, records can be made at a certain granularity. For example, a portion of the index range may record the same defect way information, or a portion of the index information may be recorded based on the defect way. This embodiment of the specification does not impose any limitations, thereby improving the flexibility of recording.

[0043] In the embodiments of this specification, since unrepairable bad points are difficult to restore to normal without manual repair, and since one index corresponds to multiple ways, and multiple different write request addresses may correspond to one index, the embodiments of this specification may have already looked up the failure information of each way corresponding to the index in the CAM table when processing other write requests (converted to the same index) before processing the current write request. This failure information can be reused when processing the current write request. Therefore, the embodiments of this specification propose to execute a first replacement strategy based on the historical failure information of each way corresponding to the index in the cache to obtain candidate paths, and to execute the step of searching the CAM table according to the same index corresponding to the current write request address in parallel to obtain the failed paths corresponding to the index, forming a subset of failed paths. This makes the execution of the first replacement strategy independent of the CAM table lookup results, reduces the logic depth, and improves the speed of generating replacement ways.

[0044] In this embodiment of the specification, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The paths controlled by the first replacement strategy output do not include those marked as failed by the historical failure information.

[0045] This can be understood as follows: since the defective way contains bad points, it should not be used as a replacement way. Therefore, the way output by the first replacement strategy in this embodiment does not include the defective way. For example, the first replacement strategy selects a non-defective way from among the multiple ways corresponding to the index.

[0046] In the embodiments of this specification, the first replacement strategy is to determine the replacement way from each way based on the age of each way corresponding to the index in the cache. For example, the larger the age, the older the data stored in the way or the longer it has not been accessed, and the more likely it should be selected as the sacrifice way. If the age is smaller, the younger the data stored in the way or the more frequently it is accessed, and it should not be selected as the sacrifice way.

[0047] Preferably, the first replacement strategy in the embodiments of this specification is a Least Recently Used (LRU) strategy, a Reference Interval Prediction (RRIP) strategy, or a Static Reference Interval Prediction (SRRIP) strategy, etc. In some other embodiments, other replacement strategies may also be used as the first replacement strategy, and the embodiments of this specification do not impose any limitations.

[0048] In the embodiments of this specification, since the execution of the first replacement strategy is based on the historical failure information of each way corresponding to the same index, the accuracy of the historical failure information may decrease to a certain extent as the system is executed. Therefore, in order to ensure that the selected replacement way is not a defective way, the embodiments of this specification verify the validity of the candidate way based on the subset of failed ways obtained by querying the CAM table. If the verification is successful, the candidate way is used as the replacement way.

[0049] In the embodiments described in this specification, such as Figure 3 The diagram shows a flowchart of the validity verification of the candidate paths based on the subset of failed paths, including the following steps: Step 301: Determine whether the candidate path exists in the subset of failed paths; Step 302: If yes, then the validity verification result is failure; Step 303: If not, the validity verification result is passed.

[0050] In some other embodiments of this specification, a bitwise AND operation can be performed between the candidate path and the subset of failed paths. If the result is empty, it indicates that the candidate path is a non-defect way; otherwise, the candidate path is a defect way.

[0051] In the embodiments of this specification, the subset of failed paths obtained by querying the CAM table can be empty or not empty. This can be understood as follows: if the subset of failed paths obtained by querying the CAM table is empty, it means that all ways corresponding to the index in the cache are valid. Therefore, the way selected by the first replacement strategy must be valid, and the validity verification step can be skipped, using the way output by the first replacement strategy as the replacement way. If the subset of failed paths obtained by querying the CAM table is not empty, it means that at least one way in the cache corresponding to the index is a defective way.

[0052] In the embodiments of this specification, after obtaining the subset of failed paths corresponding to the index, the historical failure information of the failed paths in the subset of failed paths is updated so that the first replacement strategy can be executed when other cache write requests with the same index are received subsequently.

[0053] In the embodiments of this specification, updating the historical failure information of the failed paths in the subset of failed paths further includes setting the age of the failed paths to a predetermined value. For example, if the first replacement strategy preferentially selects the way with the larger age as the sacrifice way, the age of the failed way can be updated to 0 to ensure that the failed way is not selected as the sacrifice way.

[0054] In the embodiments of this specification, a first replacement strategy based on historical failure information is preferentially used, taking into account both the temporal and spatial locality characteristics of the program, which can improve the cache hit rate. However, in some special cases, the first replacement strategy has certain hardware resource requirements, and it cannot guarantee that the selected way will always be a non-defect way, with a small probability of selecting a defective way. To address this situation, the embodiments of this specification introduce a second replacement strategy.

[0055] Specifically, according to one embodiment of this specification, if the validity verification result of the way selected by the first replacement strategy fails, the embodiment of this specification executes the second replacement strategy according to the non-failed way in each way corresponding to the index in the cache to obtain the replacement way, thereby ensuring that the data of the cache write request can be successfully written into the cache.

[0056] In the embodiments of this specification, the second replacement strategy is a random replacement strategy. This can be understood as randomly selecting a way from the non-defective ways corresponding to the index as the replacement way. In actual implementation, any random replacement strategy can be used, such as a pseudo-random algorithm, pseudo-LRU, etc., and this specification does not impose any limitations on the embodiments.

[0057] The second replacement strategy in the embodiments of this specification does not require additional hardware resources to maintain historical failure information, but the cost is that the second replacement strategy has a certain degree of arbitrariness and cannot take into account the characteristics of temporal locality and spatial locality of the program. However, it can ensure that a non-defect way can be selected, thereby ensuring that the data of the cache write request can be successfully written into the cache and ensuring the normal execution of the business.

[0058] The method described in this specification uses the way selected by the first replacement strategy and the second replacement strategy as the replacement way. This allows for fine-grained management of different bank areas, rather than uniformly shutting down defective ways in all banks, which would lead to decreased capacity effectiveness. Furthermore, each bank independently uses an index-defective way mapping relationship for recording and searching, which can further improve yield and capacity effectiveness, thereby enhancing product performance.

[0059] Generally, after BIST testing, chips with a high number of dead pixels are discarded. The method described in this specification identifies areas of high dead pixel density and, through the organization of the cache and a replacement strategy, bypasses these areas, ensuring the cache storage space remains usable and improving chip yield.

[0060] In some other embodiments of this specification, the presence of dead pixels reduces the usable capacity of the chip; if the usable capacity of the chip is too low, the chip will be marked as faulty. Specifically, the method further includes: Determine whether the available capacity of the cache meets the capacity threshold; If the condition is not met, the cache will be marked as an exception.

[0061] Staff can process caches marked as abnormal according to actual business needs, such as determining them as invalid or losing product competitiveness, etc. The embodiments in this specification do not impose any restrictions.

[0062] According to one embodiment of this specification, in order to improve the effectiveness of the way output by the first replacement strategy, the query of the CAM table and the first replacement strategy can be executed sequentially. That is, the query of the CAM table is executed first, the failure information of each way corresponding to the index in the cache is updated according to the query result of the CAM table, and then the first replacement strategy is executed based on the updated failure information, thereby ensuring that the way output by the first replacement strategy is a non-defect way.

[0063] Based on the same inventive concept, embodiments of this specification also provide a fine-grained path replacement device based on a multi-body final-level cache, such as... Figure 4 The diagram shown is a structural schematic of a fine-grained path replacement device based on a multi-body final-level cache in an embodiment of this specification, including: The first strategy execution unit 401 is used to determine the index corresponding to the address of the cache write request in the cache in response to the judgment result that there is no data in the cache that is the same as the current cache write request, and to execute the first replacement strategy according to the historical failure information of each path corresponding to the index in the cache to obtain candidate paths. The historical failure information is updated by the index when writing to the cache in the past. The failure route table lookup unit 402 is used to look up the failure route table according to the index to obtain the failure route subset corresponding to the index. The failure route table stores the information of the failure routes and the correspondence between the indexes. The candidate path validity verification unit 403 is used to verify the validity of the candidate path based on the subset of failed paths. If the verification is successful, the candidate path is used as a replacement path. The data writing unit 404 is used to write the data of the cache write request into the replacement path.

[0064] Furthermore, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The paths controlled by the first replacement strategy output do not include those marked as failed by the historical failure information.

[0065] Furthermore, the device also includes a failure information update unit, which is used to update the historical failure information of the failure paths in the failure path subset after obtaining the failure path subset corresponding to the index.

[0066] Furthermore, updating the historical failure information of the failed paths in the subset of failed paths further includes: Set the age of the failed path to a predetermined value.

[0067] Furthermore, executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The replacement path is determined from each path based on the age of each path corresponding to the index in the cache.

[0068] Furthermore, the first replacement strategy is a least recently used strategy, a rereference interval prediction strategy, or a static rereference interval prediction strategy.

[0069] Furthermore, validating the candidate paths based on the subset of failed paths further includes: Determine whether the candidate path exists in the subset of failed paths; If so, the validity verification result is "failed". If not, then the validity verification result is passed.

[0070] Furthermore, the device also includes a second policy execution unit, which, when the validity verification result is unsuccessful, executes a second replacement policy on the non-failed paths in the corresponding paths in the cache according to the index, to obtain the replacement path.

[0071] Furthermore, the second replacement strategy is a random replacement strategy.

[0072] Furthermore, the apparatus further includes a failed route table construction unit for constructing the failed route table; wherein the step of constructing the failed route table includes: Scan the storage space of all paths in the cache, and identify the paths with bad points in the storage space as paths to be repaired; The bad points in the storage space of the path to be repaired are repaired using a predetermined repair tool to obtain the repair result; If the repair result is a failure, the path to be repaired is designated as a failed path, and the correspondence between the failed path and its corresponding index is recorded in the failed path table.

[0073] Furthermore, the device also includes a cache anomaly determination unit, used to determine whether the available capacity of the cache meets the capacity threshold; if not, the cache is marked as an anomaly.

[0074] The beneficial effects obtained by the above-described device are the same as those obtained by the above-described method, and will not be described in detail in the embodiments of this specification.

[0075] like Figure 5 As shown, a computer device provided in this embodiment can be used to execute the methods described herein. The computer device 502 may include one or more processors 504, such as one or more central processing units (CPUs), each of which may implement one or more hardware threads. The computer device 502 may also include any memory 506 for storing information of any kind, such as code, settings, data, etc. Without limitation, for example, memory 506 may include any type of RAM, any type of ROM, flash memory, hard disk, optical disk, etc. More generally, any memory can use any technology to store information. Further, any memory may provide volatile or non-volatile retention of information. Further, any memory may represent a fixed or removable component of the computer device 502. In one case, when processor 504 executes associated instructions stored in any memory or combination of memories, the computer device 502 may perform any operation of the associated instructions. The computer device 502 also includes one or more drive mechanisms 508 for interacting with any memory, such as hard disk drive mechanisms, optical disk drive mechanisms, etc.

[0076] Computer device 502 may also include an input / output module 510 (I / O) for receiving various inputs (via input device 512) and providing various outputs (via output device 514). A specific output mechanism may include a presentation device 516 and an associated graphical user interface (GUI) 518. In other embodiments, the input / output module 510 (I / O), input device 512, and output device 514 may be omitted, and the device may function solely as a computer device within a network. Computer device 502 may also include one or more network interfaces 520 for exchanging data with other devices via one or more communication links 522. One or more communication buses 524 couple the components described above together.

[0077] Communication link 522 can be implemented in any way, such as via a local area network, a wide area network (e.g., the Internet), a point-to-point connection, or any combination thereof. Communication link 522 may include any combination of hardwired links, wireless links, routers, gateway functions, name servers, etc., governed by any protocol or combination of protocols.

[0078] This specification also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0079] This specification also provides computer-readable instructions, wherein when a processor executes the instructions, the program therein causes the processor to perform the above-described method.

[0080] It should be understood that in the various embodiments of this specification, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this specification.

[0081] It should also be understood that, in the embodiments of this specification, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the embodiments of this specification, the character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0082] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed in this specification can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of the embodiments in this specification.

[0083] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0084] In the embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the couplings or direct couplings or communication connections shown or discussed may be indirect couplings or communication connections through some interfaces, devices, or units, or they may be electrical, mechanical, or other forms of connection.

[0085] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments described in this specification, depending on actual needs.

[0086] Furthermore, the functional units in the various embodiments of this specification can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0087] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this specification, in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0088] This specification describes the principles and implementation methods of the embodiments using specific examples. The above descriptions of the embodiments are only for the purpose of helping to understand the methods and core ideas of the embodiments in this specification. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the embodiments in this specification. Therefore, the content of this specification should not be construed as a limitation on the embodiments in this specification.

Claims

1. A method for replacing fine-grained paths based on multi-body last-level cache, characterized in that, The method includes: In response to the determination that there is no data in the cache that is the same as the current cache write request, the index corresponding to the address of the cache write request in the cache is determined, and the first replacement strategy is executed according to the historical failure information of each path corresponding to the index in the cache to obtain candidate paths. The historical failure information is updated by the index when writing to the cache in the past. The failure path table is searched according to the index to obtain the failure path subset corresponding to the index. The failure path table stores the information of the failure path and the correspondence between the index and the index. The candidate paths are validated based on the subset of failed paths. If the validation passes, the candidate path is used as the replacement path. Write the data of the cache write request into the replacement path.

2. The method according to claim 1, characterized in that, Executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The paths controlled by the first replacement strategy output do not include those marked as failed by the historical failure information.

3. The method according to claim 1, characterized in that, After obtaining the subset of failed paths corresponding to the index, the method further includes: Update the historical failure information of the failed paths in the subset of failed paths.

4. The method according to claim 3, characterized in that, Updating the historical failure information of the failed paths in the subset of failed paths further includes: Set the age of the failed path to a predetermined value.

5. The method according to claim 4, characterized in that, Executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The replacement path is determined from each path based on the age of each path corresponding to the index in the cache.

6. The method according to claim 5, characterized in that, The first replacement strategy is the least recently used strategy, the rereference interval prediction strategy, or the static rereference interval prediction strategy.

7. The method according to claim 1, characterized in that, The validity verification of the candidate paths based on the subset of failed paths further includes: Determine whether the candidate path exists in the subset of failed paths; If so, the validity verification result is "failed". If not, then the validity verification result is passed.

8. The method according to claim 7, characterized in that, If the validity verification result is unsuccessful, the method further includes: The second replacement strategy is executed based on the non-failed paths in the corresponding paths in the cache according to the index, to obtain the replacement path.

9. The method according to claim 8, characterized in that, The second replacement strategy is a random replacement strategy.

10. The method according to claim 1, characterized in that, The steps for constructing the failure path table include: Scan the storage space of all paths in the cache, and identify the paths with bad points in the storage space as paths to be repaired; The bad points in the storage space of the path to be repaired are repaired using a predetermined repair tool to obtain the repair result; If the repair result is a failure, the path to be repaired is designated as a failed path, and the correspondence between the failed path and its corresponding index is recorded in the failed path table.

11. The method according to claim 1, characterized in that, The method further includes: Determine whether the available capacity of the cache meets the capacity threshold; If the condition is not met, the cache will be marked as an exception.

12. A replacement device for fine-grained paths based on multi-body final-level cache, characterized in that, The device includes: The first strategy execution unit is used to determine the index corresponding to the address of the cache write request in the cache in response to the judgment result that there is no data in the cache that is the same as the current cache write request, and to execute the first replacement strategy according to the historical failure information of each path corresponding to the index in the cache to obtain candidate paths. The historical failure information is updated by the index when writing to the cache in the past. The failure route table lookup unit is used to look up the failure route table according to the index to obtain the failure route subset corresponding to the index. The failure route table stores the information of the failure routes and the correspondence between the indexes. The candidate path validity verification unit is used to verify the validity of the candidate path based on the subset of failed paths. If the verification passes, the candidate path is used as the replacement path. The data writing unit is used to write the data of the cache write request into the replacement path.

13. The apparatus according to claim 12, characterized in that, Executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The paths controlled by the first replacement strategy output do not include those marked as failed by the historical failure information.

14. The apparatus according to claim 12, characterized in that, The device further includes a failure information update unit, which is used to update the historical failure information of the failure paths in the failure path subset after obtaining the failure path subset corresponding to the index.

15. The apparatus according to claim 14, characterized in that, Updating the historical failure information of the failed paths in the subset of failed paths further includes: Set the age of the failed path to a predetermined value.

16. The apparatus according to claim 15, characterized in that, Executing the first replacement strategy based on the historical failure information of each path corresponding to the index in the cache further includes: The replacement path is determined from each path based on the age of each path corresponding to the index in the cache.

17. The apparatus according to claim 16, characterized in that, The first replacement strategy is the least recently used strategy, the rereference interval prediction strategy, or the static rereference interval prediction strategy.

18. The apparatus according to claim 12, characterized in that, The validity verification of the candidate paths based on the subset of failed paths further includes: Determine whether the candidate path exists in the subset of failed paths; If so, the validity verification result is "failed". If not, then the validity verification result is passed.

19. The apparatus according to claim 18, characterized in that, The device further includes a second policy execution unit, which, when the validity verification result is unsuccessful, executes a second replacement policy on the non-failed paths in the corresponding paths in the cache according to the index, to obtain the replacement path.

20. The apparatus according to claim 19, characterized in that, The second replacement strategy is a random replacement strategy.

21. The apparatus according to claim 12, characterized in that, The apparatus further includes a failed route table construction unit for constructing the failed route table; wherein, the step of constructing the failed route table includes: Scan the storage space of all paths in the cache, and identify the paths with bad points in the storage space as paths to be repaired; The bad points in the storage space of the path to be repaired are repaired using a predetermined repair tool to obtain the repair result; If the repair result is a failure, the path to be repaired is designated as a failed path, and the correspondence between the failed path and its corresponding index is recorded in the failed path table.

22. The apparatus according to claim 12, characterized in that, The device further includes a cache anomaly determination unit, used to determine whether the available capacity of the cache meets the capacity threshold; if not, the cache is marked as an anomaly.

23. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the method of any one of claims 1 to 11.

24. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the method of any one of claims 1 to 11.

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