FPGA-based ai algorithm programmable deployment architecture optimization method

By normalizing the target operator of the FPGA's artificial intelligence model into a product summation form, extracting the features of the computation segment and performing restricted rearrangement, the problem of the difficulty in dynamically adjusting the deployment scheme in the existing technology is solved, and more efficient resource utilization and operational stability are achieved.

CN122285597APending Publication Date: 2026-06-26SHANGHAI LOVE VALLEY TECHNOLOGY CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI LOVE VALLEY TECHNOLOGY CO LTD
Filing Date
2026-03-30
Publication Date
2026-06-26

AI Technical Summary

Technical Problem

Existing FPGA-based AI model deployment solutions struggle to maintain intermediate computational continuity while enabling low-overhead, targeted dynamic adjustments, impacting deployment flexibility and operational efficiency.

Method used

By normalizing the target operator in the artificial intelligence model into a product summation form, the characteristics of the computation segment are extracted, a segment stability index is generated, and under the condition of keeping the numerical equivalence relationship and cumulative dependency relationship unchanged, the product terms are subjected to restricted rearrangement and mapped to the static computation area or local reconstruction area, generating arithmetic-level and deployment-level description files. At runtime, execution statistics are collected for dynamic adjustment.

Benefits of technology

It improves the utilization efficiency of on-chip computing resources, enhances on-chip storage reuse capabilities, improves bus bandwidth allocation, enhances deployment process consistency, and improves operational stability and adaptability.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122285597A_ABST
    Figure CN122285597A_ABST
Patent Text Reader

Abstract

This invention relates to the field of artificial intelligence model deployment and discloses an optimization method for programmable deployment architecture of AI algorithms based on FPGA. The method includes: acquiring the artificial intelligence model to be deployed and parsing it to obtain a computation graph; extracting target operators that can be normalized to the form of product summation; constructing a segment feature set for the product summation computation segment for the target operator and generating a segment stability index; performing restricted rearrangement on product terms within the same equivalent accumulation domain while maintaining numerical equivalence and cumulative dependency relationships to form splicable product summation computation segments; mapping each splicable product summation computation segment to the static computation area or local reconstruction area of ​​the FPGA according to the segment stability index and resource usage; generating corresponding arithmetic-level description files, deployment-level description files, main configuration streams, and local reconstruction configuration streams; collecting execution statistics during runtime and loading the target local reconstruction configuration stream when switching conditions are met.
Need to check novelty before this filing date? Find Prior Art