Bias power regulator circuit for isolated converter with wide output voltage range

Abstract

This application relates to a bias power regulator circuit for an isolation converter with a wide output voltage range. The invention discloses a system (400) comprising an isolation converter (401) having a primary winding (N... P1 ), secondary winding (N) S1 ) and auxiliary winding (N AUX1 The system (400) also includes: (a) a first switch (Q) and a power transformer (405). L1 (a) a primary winding coupled to the primary winding; (b) a switch controller (410) coupled to the first switch; and (c) a bias power regulator circuit (422) coupled to the auxiliary winding (N). AUX1 The bias power regulator circuit (422) includes a second switch (Q1). The bias power regulator circuit (422) is configured to bias the output voltage (V) based on a first set of modes based on the switching frequency of the second switch (Q1) and a second mode based on the second switch (Q1) remaining off. VDD ) is provided to the switch controller (410).

Description

[0001] Information related to divisional application This application is a divisional application of the invention patent application filed on October 17, 2019, with application number 201980067475.3 and invention title "Bias Power Regulator Circuit for an Isolation Converter with Wide Output Voltage Range". Technical Field

[0002] This application relates to a bias power regulator circuit for an isolated converter with a wide output voltage range. Background Technology

[0003] An isolated converter is a converter that uses a power transformer with primary and secondary windings to provide complete current isolation between the input and output circuits. Some isolated converters use a power transformer with an auxiliary winding separate from the secondary winding to supply power (bias supply voltage) to the control circuitry (e.g., a pulse width modulation controller) of one or more isolated converter switches. For isolated converters with a wide output voltage range (e.g., USB power delivery adapters or LED drivers), providing the available bias supply voltage directly from the auxiliary winding of the power transformer to the control circuitry is challenging. This is because some regulation circuitry is required to provide the available bias supply voltage in wide output voltage range cases, which undesirably increases the converter's cost, size, and power consumption. Previous regulation circuitry systems that used the auxiliary winding of the power transformer to supply power to the control circuitry of the isolated converter were lossy and increased controller cost at higher rated voltages to handle higher rectified positive auxiliary winding voltages under high output voltage conditions. Summary of the Invention

[0004] According to at least one example, a system includes an isolation converter having a power transformer comprising a primary winding, a secondary winding, and an auxiliary winding. The isolation converter further includes a first switch coupled to the primary winding and a switch controller coupled to the first switch. The isolation converter also includes a bias power regulator circuit coupled to the auxiliary winding and the switch controller, wherein the bias power regulator circuit includes a second switch. The bias power regulator circuit is configured to provide a bias supply output voltage to the switch controller based on a first set of modes modulating the switching frequency of the second switch and a second mode based on wherein the second switch remains off.

[0005] According to at least one example, a control circuit for an isolation converter with a power transformer has an auxiliary winding. The control circuit includes a bias supply input node and a bias supply output node. The control circuit also includes a pulse width modulation (PWM) controller coupled to the bias supply output node. The control circuit further includes a bias power regulator circuit between the bias supply input node and the bias supply output node. The bias power regulator circuit includes a forward path between the bias supply input node and the bias supply output node. The bias power regulator circuit also includes a switch coupled between the forward path and a ground node. The bias power regulator circuit further includes a modulation circuit system coupled to a control terminal of the switch. The bias power regulator circuit also includes a mode controller coupled to the modulation circuit system.

[0006] According to at least one embodiment, an integrated circuit includes an isolation converter switch control node, an auxiliary winding node, and a bias supply voltage node. The integrated circuit further includes an isolation converter switch controller coupled to the bias supply voltage node and the isolation converter switch control node. The integrated circuit also includes a bias power regulator circuit coupled to the auxiliary winding node and the bias supply voltage node, wherein the bias power regulator circuit includes a switch. The bias power regulator circuit is configured to provide a bias supply voltage to the isolation converter switch controller based on a plurality of modulation modes modulating the switching frequency of the switch and a positive mode based on wherein the switch remains off.

[0007] According to at least one example, an integrated circuit includes a bias supply input node and a bias supply output node. The integrated circuit further includes a bias power regulator circuit between the bias supply input node and the bias supply output node. The bias power regulator circuit includes a switch. Furthermore, the bias power regulator circuit is configured to provide a bias supply output voltage to the bias supply output node based on modulating the switching frequency of the switch when the voltage level at the bias supply input node is greater than a bias supply input threshold, and based on a forward path using the switch being turned off when the voltage level at the bias supply input node is not greater than the bias supply input threshold. Attached Figure Description

[0009] Figure 1 This is a diagram illustrating isolation converters based on some examples.

[0010] Figure 2 This is a schematic diagram illustrating a bias power regulator circuit based on some examples.

[0011] Figure 3This is a schematic diagram illustrating another bias power regulator circuit based on some examples.

[0012] Figure 4 It is a diagram that illustrates a system based on some examples.

[0013] Figure 5 This is a diagram illustrating bias power regulator circuits and isolation converter components based on some examples.

[0014] Figure 6 It is a set of graphs showing the characteristics of a constant peak current modulation mode for a bias power regulator circuit based on some examples.

[0015] Figure 7 It is a timing diagram showing waveforms associated with constant peak current modulation modes based on some examples.

[0016] Figure 8 This is a timing diagram showing waveforms related to the survival mode operation of a bias power regulator circuit based on some examples.

[0017] Figure 9 It is a timing diagram showing waveforms related to the constant cutoff time modulation mode of a bias power regulator circuit based on some examples. Detailed Implementation

[0018] This document describes bias power regulator options for isolation converters with power transformers including auxiliary windings. In the described examples, a bias power regulator circuit with switches is positioned between the auxiliary winding and the isolation converter switch controller (to control one or more isolation converter switches), wherein the bias power regulator circuit is based on a bias supply input voltage (referred to herein as V) obtained from the auxiliary winding. BIN The bias supply voltage (referred to as V in this article) will be used to bias the supply voltage. VDD The power is supplied to the isolation converter switch controller. In some instances, the bias power regulator circuitry is based on its operating conditions (e.g., V). BIN and V VDD Use different modes or options to V VDD Provided to the isolation converter switch controller. In some instances, mode changes are made by the primary controller based on its operating conditions (e.g., load, survival mode, startup, etc.).

[0019] The first mode or option of the bias power regulator circuit is referred to herein as the forward mode. In the forward mode, the switch of the bias power regulator circuit remains off and the forward path between the auxiliary winding and the isolation converter switch controller is used. When V BIN Use positive mode when the input is greater than the bias supply input threshold (VBIN_TH).

[0020] The second mode or option for the bias power regulator circuit is referred to herein as constant cutoff time modulation mode. In constant cutoff time modulation mode, the switching of the bias power regulator circuit uses a constant cutoff time (e.g., 250 ns) to turn the modulation on / off. In some instances, when V BIN When V is less than or equal to VBIN_TH and when the isolation converter is under light load conditions, constant cutoff time modulation mode is used. In constant cutoff time modulation mode (a type of continuous conduction mode), V... VDD Power delivery is fast to avoid V VDD The voltage drops below the undervoltage lockout (UVLO) threshold of the isolation converter's switch controller. This is to maintain the constant off-time modulation. VDD Above the UVLO cutoff threshold, some V at the auxiliary winding is required. BIN (For example, greater than the minimum V) BIN The voltage level is less than VBIN_TH. Therefore, in some instances, the isolation converter switch controller is configured to periodically operate the isolation converter switch to provide energy pulses to the auxiliary winding when the isolation converter is under light load conditions. In this way, the bias power regulator circuit in constant off-time modulation mode can maintain V when the isolation converter is under light load conditions. VDD It is higher than the UVLO cutoff threshold.

[0021] The operation of the isolation converter switching controller and / or bias power regulator circuitry during the light-load conditions of the isolation converter is referred to herein as survival mode operation (to ensure V...). VDD (Maintaining above the UVLO cutoff threshold to prevent the isolation converter switch controller from shutting down). In one example, survival mode operation involves the isolation converter switch controller receiving signals from the bias power regulator circuitry to control the timing and / or duration of energy pulses during light-load conditions of the isolation converter. In another example, survival mode operation involves programming or otherwise adjusting the isolation converter switch controller to control the timing and / or duration of energy pulses during light-load conditions of the isolation converter without communication from the bias power regulator circuitry.

[0022] The third mode or option of the bias power regulator circuit is referred to herein as the constant peak current modulation mode. In the constant peak current modulation mode, the switch of the bias power regulator circuit is modulated by on / off switching to make V VDD Maintain at the target reference voltage. In some instances, when V at the auxiliary winding... BINWhen the peak current modulation mode is less than or equal to VBIN_TH and when the isolated converter is not under light load conditions, a constant peak current modulation mode is used. In constant peak current modulation mode, the peak magnetic excitation current of the inductor included with the bias power regulator circuit is constant. Therefore, the switching frequency of the bias power regulator circuit is V during constant peak current modulation mode operation. BIN Or the output voltage (VOUT) of the isolation converter is a function, because V BIN Proportional to VOUT. The bias power regulator circuit switches between first, second, and third modes as needed to adjust VOUT. VDD Provided to the isolation converter switch controller. The following diagrams describe various isolation converter and bias power regulator circuit options and related waveforms.

[0023] Figure 1 This is a diagram illustrating an isolation converter 100 according to some examples. As shown, the isolation converter 100 includes a power transformer 105 and a switch (Q) having a first current terminal, a second current terminal, and a control terminal. L To be more specific, Q L The first current terminal is coupled to the primary winding (N) of the power transformer 105. P ), and Q L The second current terminal is coupled to ground node 118. Furthermore, Q L The control terminals are coupled to a pulse width modulation (PWM) controller 110 (an example of an isolated converter switching controller). Furthermore, Figure 1 The diagram illustrates the input supply voltage (VIN) node 114, the switching node 112, and a clamping circuit 108 between the VIN node 114 and the switching node 112, wherein the clamping circuit 108 limits the voltage difference between the VIN node 114 and the switching node 112. Furthermore, a feedback loop 106 is provided between the output node 104 of the isolation converter 100 and the PWM controller 110, wherein the output node 104 is coupled via a diode (D1) to the secondary winding (N) of the power transformer 105. S At output node 104, the output capacitor (COUT) stores the output voltage (VOUT) used by the load (not shown).

[0024] exist Figure 1 In one example, the power transformer 105 also includes an auxiliary winding (N) as part of the bias supply circuit 102 having a bias supply node 116. AUX As shown, the bias supply circuit 102 also includes a diode coupled to the bias supply node 116 and coupled to N via a diode (D2). AUX The capacitor (C) of the first (e.g., the upper) plate VDD C VDDThe second (e.g., below) electrode is coupled to the primary ground node. In operation, the bias supply circuit 102 applies a bias supply voltage (V... VDD The bias supply circuit 102 provides power to the PWM controller 110. The topology of the isolation converter 100 allows the PWM controller 110 to be powered by the bias supply circuit 102. However, for cases with varying VOUT, the bias supply circuit 102 may not be able to supply the appropriate VOUT. VDD .

[0025] As an example, if the PWM controller 110 has a UVLO cutoff threshold of 10 V, N AUX =N s And V VDD = VOUT = 3.3 V to 21 V, then V VDD The value may be too low, causing the isolation converter 100 to fail to start (the PWM controller 110 will shut down). In another example, if N... AUX =4 N s And for VOUT=3.3 V to 21 V, V VDD =13.2 V to 84 V, then V VDD It may be too high, which could damage the backup power supply and increase the cost of the isolation converter switch controller with a higher rated voltage.

[0026] Figure 2 This is a schematic diagram illustrating a bias supply circuit 200 according to some examples. The bias supply circuit 200 is for... Figure 1 The discussed VOUT variation problem provides a linear regulator solution. As shown, the bias supply circuit 200 includes a winding coupled to the auxiliary winding (N... AUX1 The resistor (R1) and diode (D3) are used. The capacitor (C1) stores the energy from N. AUX1 The received charge, and the charge is transferred using a transfer element (Q). LDO Adjustments are made to provide V at node 202. VDD As shown, the bias supply circuit 200 also includes components coupled to Q. LDO The second resistor (R2) is connected between the first current terminal and the control terminal. Furthermore, the Zener diode (ZD1) is coupled to Q. LDO The control terminal is connected to the grounding node. At node 202, the capacitor (C) VDD ) used to store V used by the isolation converter switch controller VDD If bias supply circuit 200 is used instead of bias supply circuit 102 in an isolation converter, such as isolation converter 100, then the VOUT variation becomes tolerable. However, the power loss of the linear regulator solution significantly degrades system efficiency. Furthermore, a large Q-size is required. LDOSolving the heat problem would increase costs and require more space.

[0027] Figure 3 This is a schematic diagram illustrating another bias supply circuit 300 according to some examples. As shown, the bias supply circuit 300 includes two auxiliary windings (N... aux1 and N aux2 The first adjustment path 304 includes components described in the linear regulator solution for the bias supply circuit 200. The second adjustment path 306 includes a third resistor (R3) and a diode (D4). At node 302, V VDD It can be used by an isolated converter switching controller. With the bias supply circuit 300, regulator losses are reduced under high output voltage conditions, but maintained under low output voltage conditions. Furthermore, it forms N... aux1 and N aux2 The transformer winding structure increases complexity.

[0028] Figure 4 This is a diagram illustrating System 400 based on some examples. Figure 4 In one example, system 400 includes isolation converter 401, which has similar characteristics to those for... Figure 1 The isolation converter 100 represents the topology of the topology. As shown, the isolation converter 401 includes a power transformer 405 and a switch (Q) having a first current terminal, a second current terminal, and a control terminal. L1 To be more specific, Q L1 The first current terminal is coupled to the primary winding (N) of the power transformer 405. P1 ), and Q L1 The second current terminal is coupled to ground node 418. Furthermore, Q... L1 The control terminals are coupled to the PWM controller 410 (an example of an isolated converter switch controller). In Figure 4 In this example, the PWM controller 410 is included in V VDD When the voltage drops below the UVLO cutoff threshold, the UVLO circuit 413 of the PWM controller 410 is turned off. Furthermore, Figure 4 The diagram illustrates VIN node 414, switch node 412, and clamping circuit 408 between VIN node 414 and switch node 412, wherein clamping circuit 408 limits the voltage difference between VIN node 414 and switch node 412. Furthermore, feedback loop 406 is located between output node 404 of isolation converter 401 and PWM controller 410, wherein output node 404 is coupled via diode (D5) to the secondary winding (N) of power transformer 405. S1At output node 404, the output capacitor (COUT) stores the output voltage (VOUT) used by the load (RLOAD). In different instances, RLOAD corresponds to a USB PD adapter, an LED driver, or another load.

[0029] exist Figure 4 In this example, power transformer 405 also includes an auxiliary winding (N... AUX1 As shown, N AUX1 Coupled to the bias supply input (V) via diode (D6) BIN ) Node 416, where in V BIN Node 416 is stored by a capacitor (CBIN). In system 400, a bias power regulator circuit 422 with a switch (Q1) is coupled to V. BIN Between node 416 and PWM controller 410. In operation, bias power regulator circuit 422 is configured to be based on V... BIN and various operating modes will V VDD It is supplied to the PWM controller 410.

[0030] In some instances, the operating mode of the bias power regulator circuit 422 is included in V BIN When the value is greater than the threshold (VBIN_TH), the forward mode of the forward path 428 of the bias power regulator circuit 422 is used. In the forward mode, Q1 remains off and V... VDD Follow V BIN Another operating mode of the bias power regulator circuit 422 is in V BIN A constant cutoff time modulation mode used when VBIN_TH is less than or equal to VBIN_TH and the isolation converter 401 is under light load conditions. In the constant cutoff time modulation mode, Q1 is based on a selection to maintain V VDD A constant off-time (e.g., 250 ns) above the UVLO off-threshold of the PWM controller 410 is used to turn on / off modulation. Constant off-time modulation is used to quickly transfer energy to the Vo of the bias power regulator circuit 422. VDD Node 430 enables V VDD Maintaining a continuous conduction mode (CCM) above the UVLO cutoff threshold. When using constant cutoff time modulation mode, the PWM controller 410 of the isolation converter 401 provides periodic control pulses to Q. L1 , making N AUX1 Receive energy and V BINSufficiently high. These operations of the PWM controller 410 are separate from VOUT regulation and are referred to herein as survival mode operation. In some instances, survival mode operation of the PWM controller 410 involves communication from the bias power regulator circuit 422 (e.g., to guide the timing and / or duration of control pulses provided by the PWM controller 410 during survival mode operation). In other instances, the operation of the PWM controller 410 is programmed or adjusted such that the timing and / or duration of the control pulses provided by the PWM controller during survival mode makes VOUT sufficiently high. VDD Keep it above the UVLO cutoff threshold.

[0031] The third operating mode of the bias power regulator circuit 422 is in V BIN The constant peak current modulation mode is used when VBIN_TH is less than or equal to VBIN_TH and the isolation converter 401 is not under light load conditions. In the constant peak current modulation mode, V VDD The voltage is adjusted to the target reference voltage. This third operating mode (constant peak current modulation mode) is a type of discontinuous conduction mode (DCM).

[0032] exist Figure 4 In the example, the forward path 428 for the forward mode includes paths coupled to V. BIN The first end of node 416 and coupled to diode (D) B The inductor (L) at the second end of the anode B D B The cathode is coupled to the V of the bias power regulator circuit 422. VDD Node 430, where capacitor (C) VDD In V VDD V is stored at node 430 VDD It can be used by the PWM controller 410. When V BIN When the value is higher than VBIN_TH, the forward path 428 is used, Q1 remains off, and V... VDD Under diode voltage drop, follow V BIN .

[0033] To support forward mode and other modes (such as constant off-time modulation mode and constant peak current modulation mode), the bias power regulator circuit 422 includes control circuitry 423. Figure 4 In this example, the control circuit 423 includes a modulation circuit system 424 and a mode controller 426. As shown, the modulation circuit system 424 is coupled to the control terminal of Q1. Simultaneously, the first current terminal of Q1 is coupled to D. B anode and L B The second terminal of Q1. Furthermore, the second current terminal of Q1 is coupled to the ground node via resistor (R4).

[0034] exist Figure 4 In this example, control circuit 423 is configured to control Q1 using support modes (positive mode, constant off-time modulation mode, and constant peak current modulation mode), wherein the selection of different support modes depends on V. BIN V VDD and the load conditions of the isolation converter 401. As described herein, when V BIN Use forward mode when the value is greater than VBIN_TH. Furthermore, when V... BIN When V is less than or equal to VBIN_TH and when the isolation converter 401 is under light load conditions, a constant cutoff time modulation mode is used. Furthermore, when V... BIN When the current is less than or equal to VBIN_TH and when the isolation converter 401 is not under light load conditions, the constant peak current modulation mode is used.

[0035] exist Figure 4 In this example, the mode controller 426 performs various operations during the constant peak current modulation mode, including receiving a light load signal from the PWM controller 410 and sending a pulse request signal to the PWM controller 410. This is because the constant peak current modulation mode is used to enable V... VDD Maintaining an operating level above the UVLO cutoff threshold of the PWM controller 410, the operation of the mode controller 426 and / or the PWM controller 410 during the constant off-time modulation mode is referred to as survival mode operation (the PWM controller 410 will be turned off without survival mode operation). In other instances, the PWM controller 410 may be programmed to provide survival mode operation without requiring a pulse request signal from the mode controller 426.

[0036] exist Figure 4 In the example, constant peak current modulation mode operation is V VDD And a function of the current sensed at the second current terminal of Q1. In some instances, the current sensing circuit 432 is positioned between the second current terminal of Q1 and R4 to provide a current sensing voltage value (V) used by the modulation circuit system 424 during constant peak current modulation mode operation. BCS ).

[0037] In some instances, the PWM controller 410 and the bias power regulator circuit 422 are packaged or otherwise combined as commercial products (e.g., integrated circuit dies or packaged chips). In other instances, the PWM controller 410 and the bias power regulator circuit 422 are separate commercial products (e.g., integrated circuit dies or packaged chips).

[0038] Figure 5 This demonstrates a bias power regulator circuit 500 based on some examples. Figure 4A diagram showing an example of the bias power regulator circuit 422. As shown, the bias power regulator circuit 500 includes L... B and D B To provide Figure 4 The forward path 428 is discussed in the text. The bias power regulator circuit 500 also includes Q1, which is coupled to L. B With D B The switching node 540 between them. The bias power regulator circuit 500 also includes a control circuit 423A ( Figure 4 Example of control circuit 423) to control Q1. Control circuit 423A is configured to select a positive mode (Q1 off), a constant off-time modulation mode (Q1 uses a constant off-time to turn on / off modulation), or a constant peak current modulation mode (Q1 uses a target reference and current sensing value to turn on / off modulation), wherein the selection of different modes is based on V relative to a threshold (VBIN_TH). BIN And based on the load conditions of the associated isolation converter.

[0039] As shown, Figure 5 The control circuit 423A includes a coupling to V BIN Node 538 (V BIN The modulation on / off controller 534 (an instance of node 416). When V BIN When the value is higher than VBIN_TH, the enable signal 544 output from the modulation on / off controller 534 is de-asserted, causing Q1 to be turned off. When Q1 remains off and V... BIN When the value is above VBIN_TH, the positive mode of the bias power regulator circuit 500 is used.

[0040] The control circuit 423A also includes V BIN A constant cutoff time modulation circuit 502 and a constant peak current modulation circuit 512 are used when the current is not higher than VBIN_TH. In this case, the modulation on / off controller 534 outputs an assertion-enabled signal 544. Figure 5 and Figure 4 The constant cutoff time modulation circuit 502, the constant peak current modulation circuit 512, and the modulation on / off controller 534 correspond to Figure 4 The modulation circuit system 424. Furthermore, in Figure 5 Other components represented in the control circuit 423A (such as AND gate 532, driver 536, SR latch 530, and OR gate 514) can also be considered as Figure 4 The modulation circuit system 424 is part of it.

[0041] exist Figure 5In this example, the enable signal 544 output from the modulation on / off controller 534 is input to the AND gate 532. Another input to the AND gate 532 is a control signal 542 from either the constant off-time modulation circuit 502 or the constant peak current modulation circuit 512. When both the enable signal 544 and the control signal 542 are high, the output of the AND gate 532 is high and corresponds to a bias PWM (BPWM) signal, which is fed into the driver 536. Figure 5 In the middle, the driver 536 is based on the reference voltage (V REF The drive signal is provided to Q1, and the timing of the drive signal is based on BPWM.

[0042] exist Figure 5 In this example, control signal 542 is a latched control signal provided by SR latch 530. As shown, the R input of SR latch 530 is provided by the first output 550 of constant peak current modulation circuit 512 (indicating sufficient current is available), while the S input of SR latch 530 is provided by OR gate 514, which has a first input coupled to the second output 552 of constant peak current modulation circuit 512 and a second input coupled to the output 554 of constant off-time modulation circuit 502.

[0043] As shown, the first output 550 of the constant peak current modulated current 512 is generated by comparator 522 and AND gate 520. More specifically, comparator 522 compares the sensed current value (V... BCS (Indicating the current through Q1) and sensing current threshold (V) BCST ), wherein V is provided by current sensing circuit 537. BCS When V BCS Greater than V BCST When the signal is high, the output of comparator 522 is high. Otherwise, the output of comparator 522 is low. As shown, the output of comparator 522 is one of the inputs to AND gate 520. The other input to AND gate 520 is the control signal (t). BLEB ), where t BLEB From t BLEB The duration of the pulse is used to generate a single pulse derived from the BPWM pulse interval of comparator 522. The output of AND gate 520 is the first output 550 of constant peak current modulation circuit 512.

[0044] The second output 552 of the constant peak current modulated current 512 is generated by the VDD feedback circuit 518 and the voltage controlled oscillator (VCO) 516. As shown, the input to the VDD feedback circuit 518 includes V VDD (V from bias power regulator circuit 500) VDDNode 560) and reference voltage (kx V) REF (where k is the scaling factor). The output of the VDD feedback circuit 518 is the comparison result (V COMP ), which is used to adjust the frequency of the second output 552 provided by VCO 516.

[0045] exist Figure 5 In this example, the output of the constant cutoff time modulation circuit 502 uses an inverter 508 and a cutoff time (T) OFF The delay circuit 506 and the AND gate 504 are provided. As shown, the input to the inverter 508 is the BPWM signal. OFF Delay circuit 506 receives the output of inverter 508 and based on a predetermined T OFF The value provides the output. T OFF The output of delay circuit 506 is one of the inputs to AND gate 504. The other input to AND gate 504 is provided by mode controller 426A. More specifically, in Figure 5 In this example, the mode controller 426A includes an AND gate 562 and a comparator 564. As shown, the input to the comparator 564 includes inputs from V... VDD V of node 560 VDD and V VDD Threshold (V) VDD(TH) The output signal (INT_STOP) of comparator 564 indicates V. VDD When will it drop below V? VDD(TH) And therefore, a pulse is needed to make V VDD Maintain a position above the UVLO cutoff threshold, as described herein. The output signal 566 of AND gate 562 is high when INT_STOP is high and the isolation converter is under light load. As shown, the output signal 566 of AND gate 562 is provided to AND gate 504, which controls when the output of the constant cutoff time modulation circuit 502 is high. At the output of AND gate 504, marked "V". X "node, and corresponding to V X Representative V of the node X The signal is Figure 9 The explanation is as follows.

[0046] exist Figure 5 In the example, when the isolation converter is under light load conditions and V BIN When the value is equal to or less than VBIN_TH, the constant cutoff time modulation circuit 502 controls the modulation of Q1. For example, if the light-load signal input to the AND gate 562 of the mode controller 426A is high and V... BINIf the constant cutoff time modulation circuit 502 is equal to or less than VBIN_TH, then it is an active modulation controller for Q1. Otherwise, if the lightly loaded signal input to the AND gate 562 of the mode controller 426A is low and V... BIN If the value is equal to or less than VBIN_TH, then the constant peak current modulation circuit 512 is the active modulation controller of Q1.

[0047] exist Figure 5 In one example, the mode controller 426A is compared with the PWM controller of the isolation converter (e.g. Figure 4 The PWM controller 410 communicates with the PWM controller to perform survival mode operation. As shown, such survival mode operation may involve receiving a light load signal from the PWM controller and submitting a pulse request signal to the PWM controller.

[0048] Figure 6 This demonstrates bias power regulator circuits based on some examples (e.g.) Figure 4 The bias power regulator circuit 422 or Figure 5 A set of curves 600A to 600C and 610A to 610C show the characteristics of the constant peak current modulation mode of the bias power regulator circuit 500 in the circuit. In curve 600A, I represents BCST Compared to V BIN The value of Ibcst. As used in this article, Ibcst is the peak current of the boost converter, that is, the peak current reached in the boost switch when the switch is turned off—describing the characteristics of both constant peak current and constant off-time modulation mode.

[0049] As shown, I BCST Maintain a first constant value (e.g., 0.3 A) during constant peak current modulation mode and at V BIN After exceeding VBIN_TH (after the start of positive mode), it drops to zero. In graph 600B, this represents the switching frequency (f) of Q1. BSW (relative to V) BIN The value of f. As shown, f BSW With V BIN It increases and decreases linearly. In V BIN After f is greater than VBIN_TH (after the start of forward mode), BSW It drops to zero. In graph 600C, this represents V. VDD Compared to V BIN The value of V. As shown, V VDD With V BIN It increases and stabilizes. In V BIN After V is greater than VBIN_TH (after the start of forward mode), VDD Linear increase. In the example of curves 600A to 600C, V... BINThis is represented as a variation between 3 V and 21 V. In other instances, V... BIN The range can be changed.

[0050] In curve graph 610A, I represents BCST Compared to I VDD The value of I. As shown, I BCST With I VDD Increase while maintaining a constant value (e.g., 0.3 A). In graph 610B, this represents f. BSW Compared to I VDD The value of f. As shown, f BSW With I VDD It increases linearly (e.g., from minimum to maximum). In graph 610C, this is represented by V. VDD Compared to I VDD The value of V. As shown, V VDD With I VDD Increase while maintaining stability (e.g., in this example, maintain at 15 V). In the examples of graphs 610A to 610C, I... VDD This is represented as a variation between the minimum and maximum values. In different instances, I VDD The range can be changed.

[0051] Figure 7 This is timing diagram 700 showing waveforms associated with a constant peak current modulation mode based on some examples. The waveforms shown are for V. BPWM V BSW I BCST and V BCS As shown in timing diagram 700, V BPWM The waveform representation has f-based BSW A periodic pulse width modulated signal. Furthermore, V BSW (For example Figure 5 The voltage at switch node 540 in V BPWM When it is in a high state, it is in a low state and in V BPWM It oscillates when it is in a low state. When V BPWM As the voltage drops, the current in the boost inductor shifts from the boost switch to the boost diode, the current in the boost switch turns off, and V... BSW Rise above V VDD The small voltage. The inductor current depends on V. VDD With V BIN The voltage difference between them decays to zero. After the current decays to zero, V BSW The voltage on it will begin to resonate.

[0052] Moreover, I BCST This indicates that stability is maintained. Finally, V BCS In VBPWM When in a high state, it is represented by a linear increase and at V BPWM A low state indicates that the state remains low. Furthermore, in V... BPWM Each low to high transition represents V BCS The small pulse in the circuit. In constant peak current modulation mode, the peak magnetic excitation current of the inductor is constant; therefore, given the regulator input voltage (V... BIN The connection time of f is constant. BSW This will vary depending on the output load of the isolation converter.

[0053] Figure 8 This demonstrates bias power regulator circuits based on some examples (e.g.) Figure 4 The bias power regulator circuit 422 or Figure 5 The timing diagram 800 shows the waveforms related to the survival mode operation of the bias power regulator circuit 500 in the circuit. In the timing diagram 800, the output current (IOUT) of the isolation converter is represented as switching from high (heavy load) to low (light load), which corresponds to the light load condition. In response to the light load condition, the VOUT of the isolation converter begins to increase. Moreover, V... FB The level decreases linearly from high to low, dropping below the threshold of 802. In V FB Once the value falls below the threshold of 802, a light load signal is asserted.

[0054] Furthermore, timing diagram 800 illustrates the interval PWM signal. First, the timing of the PWM signal is based on a feedback loop (e.g., feedback loop 406). After the light load condition is reached, the PWM signal stops based on the feedback loop until the light load condition ends. During the light load condition, as part of the survival mode operation described herein, the PWM signal is periodically asserted (e.g., to transfer energy to N). AUX1 It is then regulated by the bias power regulator circuit to keep the PWM controller 410 on. Furthermore, timing diagram 800 shows V BIN The waveform remains low throughout the entire duration it represents. Furthermore, V VDD During light load conditions, a high state is initiated before descent. During survival mode operation, V is forced... VDD Keep above V VDD(TH) It is set to be higher than the UVLO cutoff threshold. Furthermore, timing diagram 800 represents the pulse request signal (INT_STOP) associated with the survival mode. The INT_STOP pulse is generated, for example, by the mode controller (e.g., Figure 4 The PWM controller 410 or Figure 5 The mode controller 426A in the middle) provides to the PWM controller (e.g. Figure 4 The PWM controller 410 in the middle) guides the PWM controller to temporarily turn on the switch (e.g., Q). L1It provides energy pulses for survival mode operation, even under light load conditions in the isolation converter.

[0055] Figure 9 This demonstrates bias power regulator circuits based on some examples (e.g.) Figure 4 The bias power regulator circuit 422 or Figure 5 Timing diagram 900 shows the waveforms related to the constant off-time modulation mode (CCM) of the bias power regulator circuit 500 in the circuit. Timing diagram 900 illustrates a forced CCM case under constant off-time modulation mode. More specifically, it shows the PWM waveform and INT_STOP waveform of the isolated converter, V... X Waveform, V BSW Waveform, V VDD Waveform, UVLO cutoff threshold, V BIN Waveform and I LB Waveform.

[0056] As shown, timing diagram 900 represents three PWM pulses that occur during the assertion INT_STOP. In diagram 900, V X Corresponding to Figure 5 The output of the AND gate 504 in the circuit. Meanwhile, V... BSW This corresponds to the voltage at the switching node (e.g., switching node 540) of the bias supply modulation circuit. In timing diagram 900, V... VDD This indicates a drop below V. VDD(TH) However, it should not be lower than the UVLO cutoff threshold. (Response to V) VDD Drop below V VDD(TH) Using constant cutoff time modulation mode operation makes V VDD Maintain above the UVLO cutoff threshold. Over time, V BIN Increased due to PWM pulses. Furthermore, I LB This represents the forward path inductor (e.g., L) of the bias power regulator circuit. B )(For example Figure 4 and 5 L in B The current in ). As shown, I LB During constant cutoff time modulation mode, it remains high on average to rapidly provide energy to sustain V. VDD It is higher than the UVLO cutoff threshold.

[0057] In some instances, the system (e.g., system 400) contains load (e.g. Figure 4 RLOAD in the middle) and isolated converters coupled to the load (e.g. Figure 4 The isolation converter 401 in the middle). The isolation converter includes a primary winding (e.g., Figure 4 N in P1), secondary winding (e.g. Figure 4 N in S1 ) and auxiliary windings (e.g. Figure 4 N in AUX1 Power transformers (e.g.) Figure 4 The system also includes a first switch coupled to the primary winding (e.g., power transformer 405). Figure 4 Q in L1 ) and the switch controller coupled to the first switch (e.g. Figure 4 The system also includes a bias power regulator circuit (e.g., the PWM controller 410) coupled to the auxiliary winding and the switching controller. Figure 4 The bias power regulator circuit 422 or Figure 5 The bias power regulator circuit 500 includes a second switch (e.g., ...). Figure 4 and 5 (Q1 in the example). The bias power regulator circuit is configured to supply bias to the output voltage (e.g., based on a first set of modes based on the switching frequency of the modulated second switch and a positive mode based on the second switch remaining off). Figure 4 V in VDD It is provided to the switch controller.

[0058] In some instances, the bias power regulator circuit includes an input voltage configured to supply a bias provided by an auxiliary winding (e.g., ...). Figure 4 V in BIN When the value is less than a threshold (e.g., VBIN_TH), the mode controller selects one of the first group of modes (e.g., ...). Figure 4 The mode controller 426 in the middle. In some instances, the mode controller is configured to select a constant off-time modulation option for the first set of modes and to instruct the switching controller (e.g., when the isolation converter is under light load conditions). Figure 4 The PWM controller 410 in the middle provides pulses. In some instances, a constant off-time modulation option is used to make the bias supply output voltage (e.g., Figure 4 V in VDD Maintain above the UVLO cutoff threshold of the switch controller. In some instances, the switch controller is configured to provide a light load signal to the mode controller, and the mode controller is configured to request a periodic pulse (e.g., when asserting the light load signal) Figure 4 The pulse request signal or Figure 5 , 8 The INT_STOP parameter (as described in 9) is provided to the switching controller. In some instances, the mode controller is configured to select the constant peak current modulation option for the first set of modes when the isolation converter is not under light load conditions. In some instances, the bias power regulator circuit is configured to adjust the second switch (e.g., ...). Figure 4 and5 The switching frequency of Q1 in the middle, while using the constant peak current modulation option to keep the bias supply output voltage at the target reference (e.g., Q1). Figure 5 V in REF In different instances, the load is a USB PD adapter, an LED driver, or another load.

[0059] In some instances, isolation converters with power transformers containing auxiliary windings (e.g.) Figure 4 The control circuit of the isolation converter 401 (with power transformer 405) includes a bias supply input node (e.g., Figure 4 V in BIN Node 416 or Figure 5 V in BIN Node 538). The control circuit also includes a bias supply output node (e.g., Node 538). Figure 4 V in VDD Node 430 or Figure 5 V in VDD Node 560). The control circuitry also includes a PWM controller (e.g., PWM controller) coupled to the bias supply output node. Figure 4 The PWM controller 410 in the circuit. The control circuit also includes a bias power regulator circuit between the bias supply input node and the bias supply output node (e.g., the bias power regulator circuit). Figure 4 The bias power regulator circuit 422 or Figure 5 The bias power regulator circuit 500 in the circuit includes a forward path between the bias supply input node and the bias supply output node (e.g., ...). Figure 4 and 5 The forward path 428 in the circuit. The bias power regulator circuit also includes a switch coupled between the forward path and the ground node (e.g., ...). Figure 4 and 5 The bias power regulator circuit also includes a modulation circuit system (e.g., Q1) coupled to the control terminals of the switch. Figure 4 Modulation circuit system 424 in Figure 5 The constant peak current modulation circuit 512 and Figure 5 The constant cutoff time modulation circuit in the circuit. The bias power regulator circuit also includes a mode controller (e.g., a mode controller coupled to the modulation circuit). Figure 4 The mode controller 426 or Figure 5 (Mode controller 426A in the middle).

[0060] In some instances, the mode controller is coupled to and configured to receive a light load signal from the PWM controller. In some instances, the mode controller is configured to send a pulse request to the PWM controller when an assertion of a light load signal occurs. In some instances, the mode controller is configured to select a constant off-time modulation mode for the modulation circuitry when an assertion of a light load signal occurs and the voltage level at the bias supply input node is less than a threshold. In some instances, the constant off-time used in the constant off-time modulation mode keeps the bias supply output voltage at the bias supply output node greater than the UVLO off-threshold of the PWM controller. In some instances, the mode controller is configured to select a constant peak current modulation mode for the modulation circuitry system when no light load signal is asserted and the voltage level at the bias supply input node is less than a threshold. In some instances, the bias power regulator circuitry is configured to maintain the bias supply output voltage at the bias supply output node at a target reference (e.g., using the constant peak current modulation mode). Figure 5 V in REF The switching frequency of the switch is adjusted accordingly. In some instances, the bias power regulator circuit is configured to use the forward path when the switch is off, provided the voltage level at the bias supply input node is greater than a threshold.

[0061] In some instances, the integrated circuit includes a bias supply input node (e.g. Figure 4 V in BIN Node 416 or Figure 5 V in BIN Node 538) and bias supply output node (e.g. Figure 4 V in VDD Node 430 or Figure 5 V in VDD Node 560). The integrated circuit also includes a bias supply input node (e.g., Figure 4 V in BIN Node 416 or Figure 5 V in BIN Node 538) and bias supply output node (e.g. Figure 4 V in VDD Node 430 or Figure 5 V in VDD The bias power regulator circuit between nodes 560 (e.g.) Figure 4 The bias power regulator circuit or Figure 5 The bias power regulator circuit 500 includes a switch (e.g., ...). Figure 4 and 5 Q1 in the diagram). The bias power regulator circuit is configured to supply the voltage level (e.g., V) at the bias supply input node. BINWhen the voltage level is greater than the bias supply input threshold (e.g., VBIN_TH), it is based on the switching frequency of the modulation switch and the voltage level at the bias supply input node. When the voltage level is greater than the bias supply input threshold, it is based on using the forward path to provide the bias supply output voltage to the bias supply output node when the switch is off.

[0062] In some instances, the bias power regulator circuit includes a modulation circuit system (e.g., modulation circuit system 424) configured to provide multiple modulation modes to modulate the switching frequency of the switch. Figure 5 Constant cutoff time modulation circuit 502 Figure 5 The constant peak time modulation circuit 512 and / or Figure 5 Other components of the control circuit 423A in the circuit). The bias power regulator circuit also includes a mode controller configured to select one of a plurality of modulation modes (e.g., Figure 4 The mode controller 426 or Figure 5 (Mode controller 426A in the middle).

[0063] In some instances, one of the modulation modes is a constant off-time modulation mode, wherein the mode controller is configured to select the constant off-time modulation mode when the isolation converter load condition is lighter than the load threshold and the bias supply input voltage from the bias supply input node is less than the bias supply input threshold. In some instances, one of the modulation modes is a constant peak current modulation mode, wherein the mode controller is configured to select the constant peak current modulation mode when the isolation converter load condition is not lighter than the load threshold and the bias supply input voltage at the bias supply input node is equal to or less than the bias supply input threshold. In some instances, the isolation converter switching controller is configured to provide a light load signal to the mode controller, wherein the mode controller is configured to provide a periodic pulse request to the isolation converter switching controller when asserting the light load signal.

[0064] The described bias power regulator circuit example differs from previous bias power regulators because the modulation circuit system and associated control scheme utilize the wide auxiliary winding voltage (used to obtain V) of the isolated converter with a wide output voltage. BIN The available bias of the PWM controller is converted into the output power (V). VDD In contrast, other bias power regulators involve lossy linear regulators and / or multiple auxiliary windings.

[0065] As described herein, bias power regulator circuits with the modes described herein (e.g., forward mode, constant off-time modulation mode, and constant peak current modulation mode) are more energy-efficient than other bias power regulators. Furthermore, the described bias power regulator circuits offer a smaller footprint (lower cost and smaller solution) for isolated converters with a wide output voltage range, supporting devices such as USB PD adapters or LED drivers. As described herein, modulation circuitry supporting constant peak current modulation and constant off-time modulation helps maintain a wide output voltage range. VDD It regulates and provides rapid power delivery during transient events. In this way, the main PWM controller of the isolation converter obtains a reliable bias power supply. Moreover, as described herein, survival mode operation can be used to automatically generate energy delivery to the bias supply input node (forcing the bias regulator to transfer energy simultaneously), which prevents the bias supply output power from dropping below the UVLO cutoff threshold when the isolation converter enters light-load operation.

[0066] The bias power regulator circuit options described herein reduce power losses and improve system efficiency during bias power regulator operation. Furthermore, they reduce the regulator component size (smaller PCB footprint) compared to other bias power regulators. They also simplify the auxiliary winding structure of the power transformer. Moreover, the bias power regulator circuit described herein enables a wider operating range and faster transient response.

[0067] In this description, the term "coupling" may encompass a connection, communication, or signaling path that achieves a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action, then in a first instance, device A is coupled to device B, or in a second instance, if the intermediary component C substantially does not alter the functional relationship between device A and device B, then device A is coupled to device B via the intermediary component C such that device B is controlled by the control signal generated by device A.

[0068] Within the scope of the claims, modifications to the described embodiments are possible, and other embodiments are also possible.

Claims

1. An isolation converter that can be coupled to a load, wherein the isolation converter comprises: A power transformer has a primary winding, a secondary winding, and an auxiliary winding; A first switch, which is coupled to the primary winding; A switch controller, coupled to the first switch; and A bias power regulator circuit coupled to the auxiliary winding and the switch controller, wherein the bias power regulator circuit is configured to provide a bias supply output voltage to the switch controller, and wherein the bias power regulator circuit includes a mode controller, wherein the switch controller is configured to provide a light load signal to the mode controller, and wherein the mode controller is configured to provide a periodic pulse request to the switch controller when asserting the light load signal.

2. The isolation converter of claim 1, wherein the bias power regulator circuit includes a second switch, and the bias power regulator circuit is configured to provide the bias supply output voltage to the switch controller based on a first set of modes based on a switching frequency of the second switch and a positive mode based on the second switch remaining off.

3. The isolation converter of claim 2, wherein the mode controller is configured to select one of the first set of modes when the bias supply input voltage provided by the auxiliary winding is less than a threshold.

4. The isolation converter of claim 3, wherein the mode controller is configured to select a constant off-time modulation option for the first set of modes and to instruct the switch controller to provide pulses when the isolation converter is under light load conditions, wherein the constant off-time modulation option is used to keep the bias supply output voltage above the undervoltage lockout (UVLO) cutoff threshold of the switch controller.

5. The isolation converter of claim 3, wherein the mode controller is configured to select a constant peak current modulation option of the first set of modes when the isolation converter is not under light load conditions, wherein the bias power regulator circuit is configured to adjust the switching frequency of the second switch when the bias supply output voltage is maintained at a target reference using the constant peak current modulation option.

6. The isolation converter of claim 1, further comprising a load, wherein the load is a USB power delivery adapter.

7. The isolation converter of claim 1, further comprising a load, wherein the load is a light-emitting diode driver.

8. The isolation converter of claim 2, wherein the bias power regulator circuit includes a constant off-time modulation circuit comprising: A cutoff time delay circuit, configured to receive a signal for controlling the second switch and to output an output signal at the output terminal of the cutoff time delay circuit based on a specific cutoff time value; and A first logic gate has a first input terminal coupled to the output terminal of the cutoff time delay circuit, a second input terminal coupled to the output terminal of the mode controller, and an output terminal.

9. The isolation converter of claim 8, wherein the bias power regulator circuit includes a constant peak current modulation circuit comprising: A voltage feedback circuit, configured to generate a comparison result signal based on the difference between the bias supply output voltage and a reference voltage; and A voltage-controlled oscillator coupled to the output terminal of the voltage feedback circuit.

10. The isolation converter of claim 9, wherein the bias power regulator circuit comprises: The second logic gate has a first input terminal coupled to the output terminal of the first logic gate, a second input terminal coupled to the output terminal of the voltage-controlled oscillator, and an output terminal; A logic circuit having a first input terminal coupled to the output terminal of the second logic gate; A comparator configured to output a comparison signal based on the difference between a voltage signal representing the current flowing through the second switch and a threshold signal, and having an output terminal coupled to a second input terminal of the logic circuit. The logic circuit is configured to turn on the second switch in response to a signal at the output terminal of the second logic gate, and to turn off the second switch based on a comparison signal provided by the comparator.

11. A control circuit for an isolation converter, the isolation converter having a power transformer including an auxiliary winding, the control circuit comprising: Bias supply input node; Bias supply output node; A switching controller having a voltage input terminal coupled to the bias supply output node and a controller output terminal; and A bias power regulator circuit coupled between the bias supply input node and the bias supply output node, wherein the bias power regulator circuit comprises: The positive path between the bias supply input node and the bias supply output node; A switch coupled between the forward path and the ground terminal; A modulation circuit system coupled to the control terminal of the switch; and A mode controller coupled to the modulation circuit system.

12. The control circuit of claim 11, wherein the mode controller is coupled to the switch controller and configured to receive a light-load signal from the switch controller.

13. The control circuit of claim 12, wherein the mode controller is configured to send a pulse request to the switch controller when asserting the light load signal.

14. The control circuit of claim 12, wherein the mode controller is configured to select a constant off-time modulation mode of the modulation circuit system when asserting the light load signal and the voltage level at the bias supply input node is less than a threshold.

15. The control circuit of claim 14, wherein the constant cutoff time in the constant cutoff time modulation mode keeps the bias supply output voltage at the bias supply output node greater than the undervoltage lockout (UVLO) cutoff threshold of the switch controller.

16. The control circuit of claim 12, wherein the mode controller is configured to select a constant peak current modulation mode of the modulation circuit system when the light load signal is not asserted and the voltage level at the bias supply input node is less than a threshold.

17. The control circuit of claim 16, wherein the bias power regulator circuit is configured to adjust the switching frequency of the switch when the bias supply output voltage at the bias supply output node is maintained at the target reference using the constant peak current modulation mode.

18. The control circuit of claim 11, wherein the bias power regulator circuit is configured to use the forward path when the switch is off, provided that the voltage level at the bias supply input node is greater than a threshold.

19. The control circuit of claim 11, wherein the bias power regulator circuit includes a constant off-time modulation circuit, comprising: A cutoff time delay circuit is configured to receive a signal for controlling the switch and to output an output signal at the output terminal of the cutoff time delay circuit based on a specific cutoff time value; and A first logic gate has a first input terminal coupled to the output terminal of the cutoff time delay circuit, a second input terminal coupled to the output terminal of the mode controller, and an output terminal.

20. The control circuit of claim 19, wherein the bias power regulator circuit includes a constant peak current modulation circuit, comprising: A voltage feedback circuit, configured to generate a comparison result signal based on the difference between the bias supply output voltage and a reference voltage; and A voltage-controlled oscillator coupled to the output terminal of the voltage feedback circuit.

21. The control circuit of claim 20, wherein the bias power regulator circuit comprises: The second logic gate has a first input terminal coupled to the output terminal of the first logic gate, a second input terminal coupled to the output terminal of the voltage-controlled oscillator, and an output terminal; A logic circuit having a first input terminal coupled to the output terminal of the second logic gate; A comparator configured to output a comparison signal based on the difference between a voltage signal representing the current flowing through the switch and a threshold signal, and having an output terminal coupled to a second input terminal of the logic circuit. The logic circuit is configured to turn on the switch in response to a signal at the output terminal of the second logic gate, and to turn off the switch based on a comparison signal provided by the comparator.

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