Semiconductor device

Abstract

A semiconductor device is provided that can contribute to Targets 7, 8, 9, 11, and 12 of the Sustainable Development Goals (SDGs). The semiconductor device includes a package and an integrated circuit chip mounted on an internal substrate of the package. The integrated circuit chip has a control unit, multiple terminals, and multiple functional circuits. A first wiring and a second wiring are provided on the internal substrate. The first wiring is connected to a first terminal of the multiple terminals, and the second wiring is connected to a second terminal of the multiple terminals. The control unit determines the type of the package based on the potential of the first terminal and the potential of the second terminal, and controls the operation of the multiple functional circuits according to the type of the package.

Description

Technical Field

[0001] This invention relates to semiconductor devices. Background Technology

[0002] Semiconductor devices are now used in almost all electronic products. Given their widespread application in countless electronic products, the demands for miniaturization, multifunctionality, and cost reduction in semiconductor devices are increasing. Furthermore, in recent years, in order for humanity to live stably and sustainably on Earth, electronic products are also required to consider social and environmental factors. On September 25, 2015, at the United Nations Summit held at the United Nations Headquarters in New York, the 2030 Agenda for Sustainable Development, with the Sustainable Development Goals (SDGs) at its core, was adopted. Since then, governments and businesses around the world have undertaken various efforts to achieve these goals.

[0003] For example, Patent Document 1 describes a semiconductor device on which semiconductor elements are mounted on a substrate for a semiconductor device. This device simplifies the structure of the mounting pad body and the external electrode body, and provides a lower-cost substrate for a semiconductor device equipped with a mounting pad body and an external electrode body that do not respond to magnetic induction. It is expected to contribute to achieving goals 9 and 12 of the Sustainable Development Goals (SDGs) advocated by the United Nations.

[0004] Patent Document 1: Japanese Patent Application Publication No. 2023-45901 Summary of the Invention

[0005] The structural design and manufacturing of semiconductor devices are related to objectives 7, 8, 9, 11, and 12 of the SDGs. Specifically, they are related to the following objectives.

[0006] Goal 7: Make stable and modern energy affordable for all.

[0007] • Goal 8: Enable the world to use resources more efficiently in both consumption and production.

[0008] • Goal 9: Improve resource utilization, reduce waste, adopt more environmentally friendly technologies and production methods, and make infrastructure and industries sustainable.

[0009] Objective 11: Pay particular attention to issues such as air quality and waste disposal, and reduce the environmental impact of urban residents (per capita).

[0010] • Goal 12: Ensure the sustainable management and efficient use of natural resources.

[0011] Therefore, in recent years, semiconductor devices have not only required miniaturization, multifunctionality, and low cost, but also have been required to contribute to the achievement of SDGs goals in terms of semiconductor device structural design and manufacturing methods. People are looking forward to semiconductor devices that can solve the above-mentioned technical problems.

[0012] One aspect of the semiconductor device according to the present invention comprises: Packaging; and The integrated circuit chip is mounted on the internal substrate of the package. The integrated circuit chip has: multiple terminals, a control unit, and multiple functional circuits. The internal substrate is provided with a first wiring and a second wiring. The first wiring is connected to a first terminal among a plurality of terminals, and the second wiring is connected to a second terminal among a plurality of terminals. The control unit determines the type of package based on the potential of the first terminal and the potential of the second terminal, and controls the operation of multiple functional circuits according to the type of package. Attached Figure Description

[0013] Figure 1 It is a 3D view of the electronic device.

[0014] Figure 2 This is a diagram illustrating an example of the functional configuration of an electronic device.

[0015] Figure 3 It is a cross-sectional view showing the structure of a semiconductor device.

[0016] Figure 4 This is a diagram of the terminal mounting surface of the 330a transparent package.

[0017] Figure 5 This is a diagram of the terminal mounting surface of the 330b transparent package.

[0018] Figure 6 This is a functional block diagram of an integrated circuit chip.

[0019] Figure 7 This is a diagram illustrating an example of the correspondence between the terminal potentials of an integrated circuit chip and its package.

[0020] Figure 8 This is a top view of a portion of the 400A printed circuit board.

[0021] Figure 9 This is a top view of a portion of the 400B printed circuit board.

[0022] Figure 10 This is a diagram showing a semiconductor device mounted on a printed circuit board 400A.

[0023] Figure 11 This is a diagram showing a semiconductor device mounted on a printed circuit board 400B.

[0024] Figure 12 This is a diagram illustrating an example of the correspondence between the mode of the control unit and the signals transmitted at the terminals of the semiconductor device.

[0025] Explanation of reference numerals in the attached figures

[0026] 1…Electronic device; 2…PC; 3…SD card; 10…Image reading device; 12…Device body; 13…Recording device; 16…Operating unit; 18…Opening; 20…Pull-out unit; 22…Front side tray; 24…Rear side tray; 26…Paper receiving unit; 27…ADF; 28…Original document transport unit; 40…Original document placement surface; 42…Original document discharge surface; 44…Cover; 50…Main substrate; 51…Sub-substrate; 52…Sub-substrate; 61…Motor; 62…Printhead; 63…Scanning module; 64…Wireless LAN module; 65…LCD; 71, 72, 73…Cables; 100…Semiconductor device; 110…Motor driver; 120…Head driver IC; 130…Serial flash memory; 140…DDR; 151, 152, 153, 154…Connectors; 160…LCD control IC; 170…SD control IC; 181…Connector; 190…Power supply circuit; 192…Reset IC ; 200…Integrated circuit chip; 210…Control unit; 221; 222; 223…USB interface circuit; 231, 232…Memory interface circuit; 241, 241-1 to 241-n…GPIO; 250…Clock signal generation circuit; 260…Storage unit; 261…ROM; 262…RAM; 263…Register; 300, 300a, 300d…Base substrate; 301, 301a, 301d…Terminal mounting surface ; 302a, 303a, 304a, 305a…Edges of the base substrate; 302d, 303d, 304d, 305d…Edges of the base substrate; 310, 310a, 310d…Solder balls; 321, 322…Wiring; 330, 330a, 330b, 330c, 330d…Package; 350…Housing; 370…Connecting components; 380…Connecting lines; 400, 400A, 400B…Printed substrate; 410…Pads. Detailed Implementation

[0027] Hereinafter, preferred embodiments of the present invention will be described using the accompanying drawings. The drawings are provided for ease of explanation. It should be noted that the embodiments described below do not unduly limit the scope of the invention as described in the claims. Furthermore, not all structures described below are essential components of the present invention.

[0028] Hereinafter, as an example of the electronic device involved in this invention, a multifunction printer having printing and scanning functions will be used to describe the electronic device of this embodiment.

[0029] 1. Structure of electronic devices

[0030] Figure 1 This is a perspective view of the external appearance of electronic device 1. It should be noted that the following description uses the X, Y, and Z directions, which are orthogonal to each other. Additionally, sometimes the starting side of the arrow representing the X direction is called the -X side, and the tip side is called the +X side; the starting side of the arrow representing the Y direction is called the -Y side, and the tip side is called the +Y side; and the starting side of the arrow representing the Z direction is called the -Z side, and the tip side is called the +Z side.

[0031] Electronic device 1 includes a main body 12 that is generally rectangular in shape as a whole. The main body 12 includes a recording device 13 for recording on paper; and an image reading device 10 disposed on the recording device 13 for reading information such as pictures, characters, and photographs formed on the original document and generating an image. For example, the image generated by the image reading device 10 is printed on paper by the recording device 13.

[0032] The image reading device 10 includes an automatic document feeder (ADF) 27. The ADF 27 is configured to rotate with the -Y side, i.e. the back side of the device body 12, as the pivot point of the rotation axis J, and also functions as a top plate that can be opened and closed relative to the upper part of the device body 12.

[0033] The ADF27 includes: an original document transport section 28 with a drive mechanism for transporting original documents; an original document placement surface 40; and an original document discharge surface 42. The original document placed on the original document placement surface 40 is fed into the image reading device 10 through the original document transport section 28, read, and then discharged and placed on the original document discharge surface 42.

[0034] An operation section 16 is provided on the upper part of the +Y side, i.e. the front side, of the main body 12 of the device. The operation section 16 is configured to include a power button, a printed setting button, a display panel, etc. for operating the electronic device 1.

[0035] The device body 12 has a back side tray 24 for holding paper on the -Y side, i.e., the back side. The paper held on the back side tray 24 is fed to the recording device 13 for recording.

[0036] A paper receiving section 26 for holding multiple sheets of paper is provided on the -Z side, i.e., the bottom side, of the front side tray 22. The paper receiving section 26 is configured to slide along the Y direction in the lower part of the device body 12 and is detachable from the device body 12. The paper held in the paper receiving section 26 is fed to the recording device 13 for recording.

[0037] The device body 12 has a pull-out section 20 on the front side, which is mounted on the front side tray 22 and can slide in the Y direction. Paper that has been fed into the recording device 13 from the rear side tray 24 or the paper receiving section 26 and recorded is discharged from the opening 18 on the front side of the device body 12 and placed on the front side tray 22, in the state of being pulled out from the front side tray 22.

[0038] 2. The functional structure of electronic devices

[0039] Figure 2 This diagram illustrates an example of the functional configuration of electronic device 1. (For example...) Figure 2 As shown, the electronic device 1 has a main substrate 50, a sub-substrate 51, and a sub-substrate 52. The main substrate 50 and the sub-substrates 51 and 52 are, for example, multilayer printed substrates.

[0040] The main substrate 50 is equipped with a semiconductor device 100 having an integrated circuit chip 200, a motor driver 110, a head driver IC 120, a serial flash memory 130, a DDR 140, a power supply circuit 190, and a reset IC 192. DDR is short for Double-Data-Rate Synchronous Dynamic Random Memory (DDRAM). Additionally, connectors 151, 152, 153, and 154 are provided on the main substrate 50.

[0041] An LCD control IC 160 is mounted on the sub-board 51. The sub-board 51 is connected to the main board 50 via a cable 71.

[0042] An SD control IC 170 is mounted on the sub-board 52, and a connector 181 is also provided. The sub-board 52 is connected to the main board 50 via a cable 72.

[0043] In addition, electronic device 1 includes various motors 61, a printhead 62, a scanning module 63, a wireless LAN module 64, and an LCD 65. LAN is short for Local Area Network. LCD is short for Liquid Crystal Display.

[0044] The motor 61 is connected to the main board 50 via connector 151 and is driven by motor driver 110.

[0045] The printhead 62 is located in the recording device 13, connected to the main substrate 50 via connector 152, and driven by the printhead driver IC 120.

[0046] The scanning module 63 is included in the image reading device 10, connected to the main substrate 50 via connector 153, and controlled by the integrated circuit chip 200. Furthermore, the scanning module 63 sends the scanned data generated from scanning the original document to the integrated circuit chip 200.

[0047] The wireless LAN module 64 is a module for wireless data communication with external devices of the electronic device 1. The wireless LAN module 64 is connected to the main substrate 50 via cable 73 and is controlled by the integrated circuit chip 200. Additionally, the wireless LAN module 64 communicates with the integrated circuit chip 200 via USB.

[0048] LCD65 is included in the operation unit 16 and is a display panel for displaying various information. LCD65 is connected to the sub-substrate 51 via cable 74 and is controlled by LCD control IC 160.

[0049] LCD control IC 160 is connected to LCD 65 via cable 74 and is the circuit that controls the display of various information on LCD 65. LCD control IC 160 is controlled by integrated circuit chip 200.

[0050] The SD controller IC 170 is a circuit that controls the writing and reading of data from the SD card 3 inserted into connector 181. The SD controller IC 170 is controlled by integrated circuit chip 200. Additionally, the SD controller IC 170 communicates with integrated circuit chip 200 via USB.

[0051] The motor driver 110 is connected to the motor 61 via connector 151 and is a circuit that drives the motor 61. The motor driver 110 is controlled by integrated circuit chip 200.

[0052] The head driver IC120 is connected to the print head 62 via connector 152 and is the circuit that drives the print head 62. The head driver IC120 is controlled by integrated circuit chip 200.

[0053] Serial flash memory 130 and DDR140 are storage devices for storing various types of data, and the writing and reading of data are controlled by integrated circuit chip 200.

[0054] Power supply circuit 190 supplies power to semiconductor device 100, motor driver 110, head driver IC 120, serial flash memory 130, and DDR 140. For example, power supply circuit 190 generates a power supply voltage of several volts and supplies it to semiconductor device 100, motor driver 110, head driver IC 120, serial flash memory 130, and DDR 140. Additionally, power supply circuit 190 generates a power supply voltage of tens of volts to drive motor 61 and printhead 62 and supplies it to motor driver 110 and head driver IC 120. Power supply circuit 190 is controlled by integrated circuit chip 200.

[0055] If an abnormality is detected by monitoring the power supply voltage or other parameters of the semiconductor device 100, the reset IC 192 resets the semiconductor device 100. The reset IC 192 is controlled by the integrated circuit chip 200.

[0056] Thus, the integrated circuit chip 200 is a SoC that controls the motor driver 110, head driver IC 120, serial flash memory 130, DDR 140, scanning module 63, wireless LAN module 64, LCD control IC 160, SD control IC 170, power supply circuit 190, and reset IC 192. SoC is short for System On Chip.

[0057] Additionally, the integrated circuit chip 200 is connected to an external PC2 of the electronic device 1 via connector 154 and communicates data with the PC2. Connector 154 is, for example, a USB connector.

[0058] 3. Structure of semiconductor devices

[0059] Figure 3 This is a cross-sectional view showing the structure of the semiconductor device 100. It should be noted that the following is relative to... Figure 1 The X, Y, and Z directions are shown as independent directions, and are described using mutually orthogonal x, y, and z directions. Additionally, sometimes the starting side of the arrow representing the x direction is called the -x side, and the leading side is called the +x side; the starting side of the arrow representing the y direction is called the -y side, and the leading side is called the +y side; and the starting side of the arrow representing the z direction is called the -z side, and the leading side is called the +z side.

[0060] like Figure 3 As shown, the semiconductor device 100 includes a base substrate 300, an integrated circuit chip 200, and a housing 350.

[0061] The housing 350 is located on the +z side of the integrated circuit chip 200 and is bonded to the base substrate 300 in a manner that covers the integrated circuit chip 200. The housing 350 includes epoxy resin or the like and protects the integrated circuit chip 200.

[0062] The base substrate 300 is located on the -z side of the integrated circuit chip 200. The integrated circuit chip 200 is mounted on the base substrate 300 via bonding components 370 such as adhesives. The base substrate 300 and the integrated circuit chip 200 are electrically connected via bonding wires 380.

[0063] A plurality of wiring patterns (not shown) and a plurality of electrodes are provided on the base substrate 300. Furthermore, bonding lines 380 are electrically connected to electrodes (not shown) formed on the +z side surface of the base substrate 300. Additionally, a plurality of electrodes (not shown) are provided on the -z side surface of the base substrate 300. Furthermore, each of the plurality of electrodes provided on the -z side surface of the base substrate 300 is fitted with a solder ball 310. That is, a plurality of spherical terminals, i.e., a plurality of solder balls 310, are provided on the base substrate 300. Figure 2 The main substrate 50, i.e., the printing substrate 400, is provided with a plurality of pads 410 and a plurality of wirings (not shown), and each of the plurality of solder balls 310 and each of the plurality of pads 410 are bonded together. The base substrate 300 is electrically connected to the printing substrate 400 via the plurality of solder balls 310. The plurality of solder balls 310 constitute a so-called ball grid array that electrically and mechanically connects the base substrate 300 and the printing substrate 400. It should be noted that, in the following description, the -z side surface of the base substrate 300 on which the plurality of solder balls 310 are mounted is referred to as the terminal mounting surface 301.

[0064] Package 330 is constructed by a ball grid array consisting of a base substrate 300, a housing 350, and multiple solder balls 310. Integrated circuit chip 200 is mounted on the inner substrate of package 330, namely the base substrate 300.

[0065] In the semiconductor device 100 configured as described above, signals input to the semiconductor device 100 via a plurality of solder balls 310 disposed on the terminal mounting surface 301 are transmitted via electrodes, wiring patterns, and bonding lines 380 disposed on the substrate 300 and input to the integrated circuit chip 200. Additionally, signals output from the integrated circuit chip 200 are input to a plurality of pads 410 of the printed circuit board 400 via bonding lines 380, electrodes, wiring patterns, and solder balls 310 disposed on the substrate 300.

[0066] In this embodiment, the integrated circuit chip 200 can be mounted in various types of packages 330. Hereinafter, the description will assume that the integrated circuit chip 200 is mounted in any one of four packages: 330a, 330b, 330c, and 330d. However, the types of packages 330 in which the integrated circuit chip 200 is mounted are not limited to these four. It should be noted that in the following description, when the package 330 is described as any one of packages 330a, 330b, 330c, and 330d, the reference numerals for its constituent elements will also be added with "a", "b", "c", and "d" for further explanation.

[0067] Figure 4 This is a view of the terminal mounting surface 301a of the base substrate 300a of the package 330a from the +z side. Additionally, Figure 5 This is a view of the terminal mounting surface 301d of the base substrate 300d of package 330d from the +z side. Package 330a is a smaller package; for example, the terminal mounting surface 301a has dimensions of 12mm × 12mm. Package 330d is a larger package; for example, the terminal mounting surface 301d has dimensions of 16mm × 16mm.

[0068] like Figure 4 As shown, the base substrate 300a of the package 330a has a side 302a extending in the x-direction, a side 303a extending in the x-direction and opposite to side 302a, a side 304a extending in the y-direction, and a side 305a extending in the y-direction and opposite to side 304a. Sides 304a and 305a intersect with sides 302a and 303a, respectively. That is, the base substrate 300a is generally rectangular in shape with sides 302a, 303a, 304a, and 305a as its outer perimeter.

[0069] like Figure 4 As shown, in the terminal mounting surface 301a of the base substrate 300a, a plurality of solder balls 310a are arranged in a grid pattern in 23 rows along the y-direction, with a maximum of 23 solder balls 310a in each row. Solder balls 310a that connect to the motor driver 110, head driver IC 120, serial flash memory 130, DDR 140, and connectors 151, 152, 153, and 154 are arranged near the outermost periphery of the terminal mounting surface 301a. The plurality of solder balls 310a arranged at the outermost periphery are spaced widely to ensure sufficient space for wiring connecting to the solder balls 310a inside them to pass through. Furthermore, in the terminal mounting surface 301a, a power supply voltage is supplied to the plurality of solder balls 310a arranged in the area near the center surrounded by dashed lines.

[0070] like Figure 5As shown, the base substrate 300d of the package 330d has an edge 302d extending along the x-direction, an edge 303d extending along the x-direction and opposite to edge 302d, an edge 304d extending along the y-direction, and an edge 305d extending along the y-direction and opposite to edge 304d. Edges 304d and 305d intersect with edges 302d and 303d, respectively. That is, the base substrate 300d is approximately rectangular in shape with edges 302d, 303d, 304d, and 305d as its outer perimeter.

[0071] like Figure 5 As shown, on the terminal mounting surface 301d of the base substrate 300d, a plurality of solder balls 310d are distributed in 29 rows along the y-direction and arranged in a staggered pattern, with a maximum of 15 solder balls 310d in each row. At or near the outermost periphery of the terminal mounting surface 301d, solder balls 310d are positioned for connection to the motor driver 110, head driver IC 120, serial flash memory 130, DDR 140, and connectors 151, 152, 153, and 154. Furthermore, a power supply voltage is supplied to the plurality of solder balls 310d positioned in the central area surrounded by dashed lines on the terminal mounting surface 301d.

[0072] 4. Functional Structure of Integrated Circuit Chips

[0073] Figure 6 This is a functional block diagram of integrated circuit chip 200. (Example) Figure 6 As shown, the integrated circuit chip 200 includes a control unit 210, USB interface circuits 221, 222, and 223, memory interface circuits 231 and 232, n GPIOs 241-1 to 241-n, a clock signal generation circuit 250, and a storage unit 260. GPIO is short for General-Purpose Input / Output. It should be noted that the integrated circuit chip 200 may also be omitted or modified. Figure 6 A structure that is part of or has other constituent elements attached to it.

[0074] Clock signal generation circuit 250 generates and outputs clock signals CKU1, CKU2, CKU3, CKM1, CKM2, and CK. For example, clock signal generation circuit 250 can divide or multiply the source oscillation signal generated by a quartz crystal oscillator (not shown) mounted on the base substrate 300 to generate clock signals CKU1, CKU2, CKU3, CKM1, CKM2, and CK. Clock signals CKU1, CKU2, and CKU3 are supplied to USB interface circuits 221, 222, and 223, respectively. Additionally, clock signals CKM1 and CKM2 are supplied to memory interface circuits 231 and 232, respectively. Furthermore, clock signal CK is supplied to control unit 210.

[0075] USB interface circuit 221 is connected to terminal group T1G, which includes multiple terminals of integrated circuit chip 200. USB interface circuit 222 is connected to terminal group T2G, which includes multiple terminals of integrated circuit chip 200. USB interface circuit 223 is connected to terminal group T3G, which includes multiple terminals of integrated circuit chip 200. Memory interface circuit 231 is connected to terminal group T4G, which includes multiple terminals of integrated circuit chip 200. Memory interface circuit 232 is connected to terminal group T5G, which includes multiple terminals of integrated circuit chip 200. Control unit 210 is connected to terminal group T6G, which includes multiple terminals of integrated circuit chip 200.

[0076] Terminal groups T1G to T6G of integrated circuit chip 200 are respectively connected to terminal groups S1G to S6G of semiconductor device 100. Each terminal in terminal groups S1G to S6G of semiconductor device 100 is a solder ball 310 disposed on terminal mounting surface 301. Terminal group S1G of semiconductor device 100 is connected to PC2 via connector 154. Terminal group S2G of semiconductor device 100 is connected to SD control IC 170 via cable 72. Terminal group S3G of semiconductor device 100 is connected to wireless LAN module 64 via cable 73. Terminal group S4G of semiconductor device 100 is connected to serial flash memory 130. Terminal group S5G of semiconductor device 100 is connected to DDR 140. Terminal group S6G of semiconductor device 100 is connected to LCD control IC 160.

[0077] GPIO241-1 to 241-n are connected to terminals T1 to Tn of integrated circuit chip 200, respectively. Terminals T1 to Tn of integrated circuit chip 200 are connected to terminals S1 to Sn of semiconductor device 100, respectively. Terminals S1 to Sn of semiconductor device 100 are solder balls 310 disposed on terminal mounting surface 301. Terminals Tp and Tq of integrated circuit chip 200 are connected to wirings 321 and 322, respectively, which are disposed on the base substrate 300 of package 330. In the base substrate 300, wiring 321 is fixed to a power supply potential or a ground potential, and wiring 322 is fixed to a power supply potential or a ground potential. Figure 6 In this configuration, wiring 321 is fixed at the power supply potential, and wiring 322 is fixed at the ground potential.

[0078] The storage unit 260 includes ROM 261, RAM 262, and register 263. ROM is short for Read Only Memory, and RAM is short for Random Access Memory. ROM 261 stores various programs and predetermined data. RAM 262 is used as the operating area of ​​the control unit 210, storing programs and data read from ROM 261, as well as data temporarily generated by the control unit 210. Register 263 stores various setting data, etc.

[0079] The control unit 210 performs various controls, image processing, etc. In this embodiment, the control unit 210 is a processor such as a CPU, which performs various controls, image processing, etc. by executing a program (not shown) stored in the ROM 261. Some of the processing by the control unit 210 can also be implemented in hardware.

[0080] Specifically, the control unit 210 performs various controls on the motor driver 110, the head driver IC 120, the scanning module 63, and the LCD control IC 160.

[0081] In addition, the control unit 210 communicates with the PC2 via USB through the control of the USB interface circuit 221. Furthermore, the control unit 210 communicates with the SD control IC 170 via USB through the control of the USB interface circuit 222. Additionally, the control unit 210 communicates with the wireless LAN module 64 via USB through the control of the USB interface circuit 223. Furthermore, the control unit 210 sends image data to the LCD control IC 160.

[0082] Furthermore, the control unit 210 performs data writing and reading from the serial flash memory 130 by controlling the memory interface circuit 231. Additionally, the control unit 210 performs data writing and reading from the DDR 140 by controlling the memory interface circuit 232.

[0083] For example, the control unit 210 receives image data for printing from the PC2 via the USB interface circuit 221 and writes it to the serial flash memory 130 or DDR140. Additionally, for example, the control unit 210 receives image data stored on the SD card 3 from the SD controller IC 170 via the USB interface circuit 222 and writes it to the serial flash memory 130 or DDR140. Furthermore, for example, the control unit 210 receives image data from the wireless LAN module 64 via the USB interface circuit 223 and writes it to the serial flash memory 130 or DDR140. Additionally, for example, the control unit 210 obtains scanning data from the scanning module 63, performs image processing on the scanning data to generate image data, and writes it to the serial flash memory 130 or DDR140.

[0084] Additionally, for example, the control unit 210 writes image data generated by image processing of the scan data to the serial flash memory 130 or DDR 140.

[0085] Additionally, for example, the control unit 210 reads image data for printing from the serial flash memory 130 or DDR140, performs image processing for printing to generate printing data, and outputs it to the head driver IC 120. Additionally, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and sends it to the PC2 via the USB interface circuit 221. Additionally, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and sends it to the SD control IC 170 via the USB interface circuit 222. Additionally, for example, the control unit 210 reads image data from the serial flash memory 130 or DDR140 and sends it to the wireless LAN module 64 via the USB interface circuit 223.

[0086] Furthermore, the control unit 210 controls the input and output of each of GPIOs 241-1 to 241-n. Specifically, the control unit 210 controls each of GPIOs 241-1 to 241-n as any one of an input / output circuit, an input circuit, or an output circuit. For example, the control unit 210 may control GPIOs 241-k and T1 of GPIOs 241-3 to 241-n to become output circuits, respectively, and output control signals from terminals Tk and T1 to the power supply circuit 190 and the reset IC 192.

[0087] Furthermore, in this embodiment, the control unit 210 is supplied with the potentials of terminals Tp and Tq. Therefore, the control unit 210 determines the type of package 330 on which the integrated circuit chip 200 is mounted based on the potentials of terminals Tp and Tq. That is, the control unit 210 determines which of the following packages 330—330a, 330b, 330c, or 330d—is based on the potentials of terminals Tp and Tq.

[0088] Figure 7 This is a diagram illustrating an example of the correspondence between the potentials of terminals Tp and Tq and packages 330a, 330b, 330c, and 330d. Figure 7 In the example, when the potentials of terminals Tp and Tq are both low, the control unit 210 determines that package 330 is package 330a. Package 330a is a smaller package, and the electronic device 1 carrying the semiconductor device 100 belongs to the group of models 1 with large functional limitations.

[0089] Furthermore, when the potential of terminal Tp is low and the potential of terminal Tq is high, the control unit 210 determines that package 330 is package 330b. Package 330b is a medium-sized package, and the electronic device 1 equipped with semiconductor device 100 belongs to model group 2 with medium functional limitations.

[0090] Furthermore, when the potential of terminal Tp is high and the potential of terminal Tq is low, the control unit 210 determines that package 330 is package 330c. Package 330c is a medium-sized package, and the electronic device 1 equipped with semiconductor device 100 belongs to model group 3 with smaller functional limitations.

[0091] Furthermore, when the potentials of terminals Tp and Tq are both high, the control unit 210 determines that package 330 is package 330d. Package 330d is a larger package, and the electronic device 1 equipped with the semiconductor device 100 belongs to model group 4, which has no functional limitations.

[0092] Therefore, the electronic device 1, which is larger in size according to the order of packages 330d, 330c, 330b, and 330a, and has a greater functional limitation according to the order of packages 330a, 330b, 330c, and 330d, is also larger. Therefore, the control unit 210 controls the operation of various functional circuits such as the USB interface circuits 221, 222, and 223, the memory interface circuits 231 and 232, and the GPIOs 241-1 to 241-n, depending on the type of package 330.

[0093] For example, the control unit 210 can determine whether a predetermined terminal Ti of the integrated circuit chip 200 is used as either a CMOS terminal or an LVDS terminal, depending on the type of package 330. CMOS is short for Complementary Metal-Oxide Semiconductor. LVDS is short for Low Voltage Differential Signaling. For example, when the package 330 is package 330a, the control unit 210 determines whether terminal Ti is dedicated to either a CMOS terminal or an LVDS terminal; when the package 330 is package 330d, the control unit determines whether terminal Ti is used as either a CMOS terminal or an LVDS terminal.

[0094] Furthermore, the control unit 210 can fix the potential of each unused terminal Tj among the multiple terminals of the integrated circuit chip 200 to a low level, depending on the type of package 330. For example, when terminal T2 is unused, the control unit 210 controls GPIO 241-2 to become an output circuit and controls terminal T2 to a low level potential. In this way, the unused terminals Tj become intermediate potentials, reducing the risk of damage to internal components such as MOSFETs of the integrated circuit chip 200 due to leakage current, and reducing the risk of malfunction of the integrated circuit chip 200 due to noise. In addition, it also reduces the risk that the terminals Sj of the semiconductor device 100 connected to the unused terminals Tj become intermediate potentials, thereby reducing the risk of malfunction of external devices connected to the terminals Sj.

[0095] Furthermore, the control unit 210 can also stop supplying clock signals to unused functional circuits based on the type of package 330. For example, when the control unit 210 determines that package 330 is package 330a, if the functions of SD card 3 and wireless LAN module 64 are not needed, it controls the clock signal generation circuit 250 to stop supplying clock signals CKU2 and CKU3 to USB interface circuits 222 and 223. This reduces power consumption, suppresses the rise in internal temperature of the small package 330a with poor heat dissipation, and thus reduces the risk of malfunction of the semiconductor device 100.

[0096] Furthermore, the control unit 210 can also stop supplying power to unused functional circuits based on the type of package 330. For example, when the control unit 210 determines that package 330 is package 330a, if the functions of SD card 3 and wireless LAN module 64 are not required, it will stop supplying power to USB interface circuits 222 and 223. This reduces power consumption, suppresses the rise in internal temperature of the small package 330a with poor heat dissipation, and thereby reduces the risk of malfunction of the semiconductor device 100.

[0097] It should be noted that the control unit 210 can also stop supplying clock signals to unused functional circuits and stop power supply, depending on the type of package 330.

[0098] Furthermore, the control unit 210 can also avoid performing initial settings for unused functional circuits depending on the type of package 330. For example, when the control unit 210 determines that package 330 is package 330a, if the functions of SD card 3 and wireless LAN module 64 are not needed, the initial settings for USB interface circuits 222 and 223 will not be performed. As a result, since no unnecessary initial settings are required, the startup time of the semiconductor device 100 is shortened.

[0099] Furthermore, the control unit 210 can also change the frequency of the clock signal CK according to the type of package 330. For example, when the control unit 210 determines that the package 330 is package 330d, it controls the clock signal generation circuit 250 to make the frequency of the clock signal CK fall within a first frequency range. When the control unit 210 determines that the package 330 is package 330c, it controls the clock signal generation circuit 250 to make the frequency of the clock signal CK fall within a second frequency range lower than the first frequency range. When the control unit 210 determines that the package 330 is package 330b, it controls the clock signal generation circuit 250 to make the frequency of the clock signal CK fall within a third frequency range lower than the second frequency range. When the control unit 210 determines that the package 330 is package 330a, it controls the clock signal generation circuit 250 to make the frequency of the clock signal CK fall within a fourth frequency range lower than the third frequency range. In this way, since a larger package 330 provides better heat dissipation, the control unit 210 can improve the performance of the semiconductor device 100 by increasing the frequency range of the clock signal CK. Furthermore, since smaller package sizes result in poorer heat dissipation, the control unit 210 can reduce power consumption by lowering the maximum frequency of the clock signal CK. Therefore, the rise in internal temperature of the package 330 is suppressed, reducing the risk of malfunction in the semiconductor device 100.

[0100] 5. Switching of terminal functions in semiconductor devices

[0101] In this embodiment, the semiconductor device 100 can be mounted on multiple types of printing substrates 400. Hereinafter, the semiconductor device 100 will be described as being able to be mounted on either of two types of printing substrates 400A and 400B, but the types of printing substrates 400 for mounting the semiconductor device 100 are not limited to these two. It should be noted that printing substrates 400A and 400B are equivalent to... Figure 2 The main substrate 50 shown.

[0102] Figure 8 This is a top view of a portion of the printed circuit board 400A viewed from the +z side. (See image.) Figure 3 As shown, the printed circuit board 400A has multiple pads 410, such as Figure 8 As shown, the plurality of pads 410 include pads P1A, P2A, P3A, P4A, P5A, P6A, P7A, P11A, P12A, P13A, P14A, P15A, P16A, and P17A. The plurality of pads 410 are respectively disposed at positions corresponding to each of the plurality of terminals, i.e., the plurality of solder balls 310, of the semiconductor device 100. The semiconductor device 100 is mounted on the printed circuit board 400A through the bonding of each solder ball 310 with each pad 410. It should be noted that... Figure 8In the diagram, the edge 302 of the terminal mounting surface 301 is indicated by a dashed line. That is, the pads P2A and P12A are respectively engaged with the solder balls 310 located on the outermost periphery of the terminal mounting surface 301.

[0103] Furthermore, by mounting the semiconductor device 100 on the printing substrate 400A, each of the plurality of pads 410 provided on the printing substrate 400A is electrically connected to any terminal of the semiconductor device 100 and any terminal of the integrated circuit chip 200.

[0104] The printing substrate 400A has multiple wirings including wires W1A, W2A, W3A, W4A, W5A, W6A, W7A, W11A, W12A, W13A, W14A, W15A, W16A, and W17A. Furthermore, the printing substrate 400A is a multilayer substrate and has multiple through-holes including vias TH1A, TH2A, TH11A, and TH12A.

[0105] Routers W1A, W2A, W3A, W4A, W5A, W6A, and W7A are connected to pads P1A, P2A, P3A, P4A, P5A, P6A, and P7A, respectively. Additionally, routers W11A, W12A, W13A, W14A, W15A, W16A, and W17A are connected to pads P11A, P12A, P13A, P14A, P15A, P16A, and P17A, respectively. Router W6A is connected to a router (not shown) on another layer via via TH1A. Router W7A is connected to a router (not shown) on another layer via via TH2A. Router W16A is connected to a router (not shown) on another layer via via TH11A. Router W17A is connected to a router (not shown) on another layer via via TH12A.

[0106] Router W5A extends from pad P5A along the y-direction. Router W1A extends from pad P1A, passing between pads P5A and P3A, along the y-direction. Router W4A extends from pad P4A, passing between pads P3A and P15A, along the y-direction. Router W2A extends from pad P2A, passing between routers W1A and W3A, along the y-direction. Router W3A extends from pad P3A, passing between routers W2A and W4A, along the y-direction. That is, routers W2A and W3A are located between routers W1A and W4A.

[0107] Router W15A extends from pad P15A, passing between routers W4A and W11A, along the y-direction. Router W11A extends from pad P11A, passing between pads P15A and P13A, along the y-direction. Router W14A extends from pad P14A, along the y-direction. Router W12A extends from pad P12A, passing between routers W11A and W13A, along the y-direction. Router W13A extends from pad P13A, passing between routers W12A and W14A, along the y-direction. That is, routers W12A and W13A are located between routers W11A and W14A.

[0108] Figure 9 This is a top view of a portion of the printed circuit board 400B viewed from the +z side. (See image.) Figure 9 As shown, the plurality of pads 410 disposed on the printing substrate 400B include pads P1B, P2B, P3B, P4B, P5B, P6B, P7B, P11B, P12B, P13B, P14B, P15B, P16B, and P17B. The plurality of pads 410 are respectively disposed at positions corresponding to each of the plurality of terminals, i.e., the plurality of solder balls 310, of the semiconductor device 100. The semiconductor device 100 is mounted on the printing substrate 400B through the bonding of each solder ball 310 with each pad 410. It should be noted that... Figure 9 In the diagram, the edge 302 of the terminal mounting surface 301 is indicated by a dashed line. That is, the pads P2B and P12B are each engaged with the solder balls 310 located on the outermost periphery of the terminal mounting surface 301.

[0109] Then, by mounting the semiconductor device 100 on the printing substrate 400B, each of the plurality of pads 410 provided on the printing substrate 400B is electrically connected to any terminal of the semiconductor device 100 and any terminal of the integrated circuit chip 200.

[0110] The printing substrate 400B has multiple wirings including wirings W1B, W2B, W3B, W4B, W5B, W6B, W7B, W11B, W12B, W13B, W14B, W15B, W16B, W17B, W21B, W22B, W23B, and W24B. Furthermore, the printing substrate 400B is a multilayer substrate and has multiple through-holes including vias TH1B, TH2B, TH11B, and TH12B.

[0111] Routers W1B, W2B, W3B, W4B, W5B, W6B, and W7B are connected to pads P1B, P2B, P3B, P4B, P5B, P6B, and P7B, respectively. Additionally, routers W11B, W12B, W13B, W14B, W15B, W16B, and W17B are connected to pads P11B, P12B, P13B, P14B, P15B, P16B, and P17B, respectively. Router W7B is connected to a router (not shown) on another layer via via TH2B. Router W16B is connected to a router (not shown) on another layer via via TH11B. Router W17B is connected to a router (not shown) on another layer via via TH12B.

[0112] Router W21B is connected to pads P1B and P4B. Router W22B is connected to pads P4B and P11B. Router W23B is connected to pads P11B and P14B. Router W24B is connected to pad P4B and, through via TH1B, to a grounding pattern (not shown) on another layer. Therefore, routers W1B, W4B, W11B, W14B, W21B, W22B, W23B, and W24B are all at ground potential.

[0113] Router W5B extends from pad P5B along the y-direction. Router W1B extends from pad P1B along the y-direction, passing between pads P5B and P3B. Router W4B extends from pad P4B along the y-direction, passing between pads P3B and P15B. Router W2B extends from pad P2B along the y-direction, passing between routers W1B and W3B. Router W3B extends from pad P3B along the y-direction, passing between routers W2B and W4B. That is, routers W2B and W3B are located between routers W1B and W4B at ground potential. Therefore, due to the ground potential of routers W1B and W4B, crosstalk between signals transmitted along routers W2B and W3B and signals transmitted along routers W5B and W15B is reduced in the x-direction. Therefore, the signals transmitted along wirings W2B and W3B are protected from noise based on the signals transmitted along wirings W5B and W15B, and the signals transmitted along wirings W5B and W15B are also protected from noise based on the signals transmitted along wirings W2B and W3B.

[0114] Furthermore, since there is a grounded wire W21B between wires W2B, W3B, and W6B, crosstalk between signals transmitted along wires W2B and W3B and signals transmitted along wire W6B is reduced in the y-direction due to the grounded wire W21B. Therefore, signals transmitted along wires W2B and W3B are protected from noise based on signals transmitted along wire W6B, and signals transmitted along wire W6B are also protected from noise based on signals transmitted along wires W2B and W3B.

[0115] In this way, the grounded wirings W1B, W4B, W21B, W2B, W3B, W5B, W6B, W15B are protected from noise interference, thereby reducing the risk of the semiconductor device 100 malfunctioning due to the superposition of extra pulses on any of these wirings.

[0116] Router W15B extends along the y-direction from pad P15B, passing between routers W4B and W11B. Router W11B extends along the y-direction from pad P11B, passing between pads P15B and P13B. Router W14B extends along the y-direction from pad P14B. Router W12B extends along the y-direction from pad P12B, passing between routers W11B and W13B. Router W13B extends along the y-direction from pad P13B, passing between routers W12B and W14B. That is, routers W12B and W13B are located between grounded routers W11B and W14B. Therefore, in the x-direction, due to the grounded routers W11B and W14B, the crosstalk between the signal transmitted along routers W12B and W13B and the signal transmitted along router W15B is reduced. Therefore, the signals transmitted along wiring W12B and W13B are protected from noise based on the signals transmitted along wiring W15B, and the signals transmitted along wiring W15B are also protected from noise based on the signals transmitted along wiring W12B and W13B.

[0117] Furthermore, since there is a grounded wire W23B between wires W12B, W13B, and W16B, crosstalk between signals transmitted along wires W12B and W13B and signals transmitted along wire W16B is reduced in the y-direction due to the grounded wire W23B. Therefore, signals transmitted along wires W12B and W13B are protected from noise based on signals transmitted along wire W16B, and signals transmitted along wire W16B are also protected from noise based on signals transmitted along wires W12B and W13B.

[0118] In this way, the grounded wirings W11B, W14B, W23B, W12B, W13B, W15B, W16B are protected from noise interference, thereby reducing the risk of the semiconductor device 100 malfunctioning due to the superposition of extra pulses on any of these wirings.

[0119] In this embodiment, the semiconductor device 100 of the integrated circuit chip 200 is mounted on either the printing substrate 400A or the printing substrate 400B. When the semiconductor device 100 is mounted on the printing substrate 400A, the integrated circuit chip 200 operates in mode A; when the semiconductor device 100 is mounted on the printing substrate 400B, the integrated circuit chip 200 operates in mode B. The control unit 210 determines, for example, whether the printing substrate 400 on which the semiconductor device 100 is mounted is printing substrate 400A or printing substrate 400B based on the potential of terminal S1 of the semiconductor device 100, i.e., the potential of terminal T1 of the integrated circuit chip 200. For example, when the potential of terminal T1 is low, the control unit 210 determines that the printing substrate 400 is printing substrate 400A and operates in mode A; when the potential of terminal T1 is high, the control unit 210 determines that the printing substrate 400 is printing substrate 400B and operates in mode B.

[0120] In this embodiment, the wiring W7A on the printing substrate 400A is at ground potential, and the wiring W7B on the printing substrate 400B is at power potential. Furthermore, when the semiconductor device 100 is mounted on the printing substrate 400A, the pad P7A is connected to the terminal S1 of the semiconductor device 100; when the semiconductor device 100 is mounted on the printing substrate 400B, the pad P7B is connected to the terminal S1 of the semiconductor device 100. Therefore, when the semiconductor device 100 is mounted on the printing substrate 400A, the pad P7A is connected to the terminal S1 of the semiconductor device 100, as... Figure 10 As shown, the potential of terminal T1 of integrated circuit chip 200 is ground potential. On the other hand, when semiconductor device 100 is mounted on printed circuit board 400B, pad P7B is connected to terminal S1 of semiconductor device 100, as shown. Figure 11 As shown, the potential of terminal T1 of integrated circuit chip 200 is the power supply potential. Therefore, the control unit 210 can determine that the printing substrate 400 on which the semiconductor device 100 is mounted is printing substrate 400A when the potential of terminal T1 is low, and operate in mode A; and determine that the printing substrate 400 is printing substrate 400B when the potential of terminal T1 is high, and operate in mode B.

[0121] For example, when the semiconductor device 100 is mounted on the printing substrate 400A, pads P1A, P2A, P3A, and P4A are connected to predetermined terminals Sa, Sb, Sc, and Sd of the semiconductor device 100, respectively. When the semiconductor device 100 is mounted on the printing substrate 400B, pads P1B, P2B, P3B, and P4B are connected to terminals Sa, Sb, Sc, and Sd of the semiconductor device 100, respectively. In Mode A and Mode B, for example, the signals transmitted in terminals Sa, Sb, Sc, and Sd of the semiconductor device 100 are different.

[0122] Figure 12 This is a diagram illustrating an example of the correspondence between modes A and B and the signals transmitted in terminals Sa, Sb, Sc, and Sd. Figure 12 In the example, under mode A, low-speed signals are transmitted in terminals Sa, Sb, Sc, and Sd. That is, low-speed signals are transmitted in the wirings W1A, W2A, W3A, and W4A provided on the printed circuit board 400A. Therefore, when the control unit 210 determines that the printed circuit board 400 on which the semiconductor device 100 is mounted is the printed circuit board 400A, it sets terminals Sa, Sb, Sc, and Sd as terminals for transmitting low-speed signals. The low-speed signal has a frequency lower than 20MHz. For example, the low-speed signal can be a CMOS signal such as 3.3V.

[0123] On the other hand, in Mode B, high-speed signals are transmitted in terminals Sb and Sc, while terminals Sa and Sd become grounded potentials because they are connected to wirings W1A and W4A. That is, high-speed signals are transmitted in wirings W2A and W3A provided on the printed circuit board 400A, and noise is shielded by wirings W1B, W4B, and W21B, which are grounded potentials. Therefore, when the control unit 210 determines that the printed circuit board 400 on which the semiconductor device 100 is mounted is a printed circuit board 400B, it sets terminals Sb and Sc as terminals for transmitting high-speed signals. The high-speed signal has a frequency of 20MHz or higher.

[0124] For example, the high-speed signal can be a USB communication signal used for USB 2.0 High-Speed ​​mode (480MHz). For instance, a signal used for communication between semiconductor device 100 and PC2, SD control IC 170, wireless LAN module, etc., is a USB communication signal. Furthermore, the high-speed signal in this example could also be a high-speed differential signal composed of two signals.

[0125] Alternatively, high-speed signals can also be LVDS (Low Voltage Differential) signals. For example, printing data output from semiconductor device 100 to head driver IC 120, scanning data input from scanning module 63 to semiconductor device 100, and image data output from semiconductor device 100 to LCD control IC 160 can all be LVDS signals. In the electronic device 1 equipped with printing substrate 400B, since LCD 65 is relatively large and displays animations, control unit 210 operates in mode B, sending high-speed image data to LCD control IC 160 via terminal group S6G. On the other hand, in the electronic device 1 equipped with printing substrate 400A, since LCD 65 is relatively small and does not display animations, control unit 210 operates in mode A, sending low-speed image data to LCD control IC 160 via terminal group S6G.

[0126] Additionally, for example, if when the semiconductor device 100 is mounted on the printing substrate 400A, pads P11A, P12A, P13A, and P14A are connected to predetermined terminals Se, Sf, Sg, and Sh of the semiconductor device 100, respectively, and when the semiconductor device 100 is mounted on the printing substrate 400B, pads P11B, P12B, P13B, and P14B are connected to terminals Se, Sf, Sg, and Sh of the semiconductor device 100, respectively, then in mode A and mode B, for example, the signals transmitted to terminals Se, Sf, Sg, and Sh of the semiconductor device 100 are different.

[0127] Although the illustration is omitted, in Mode A, low-speed signals are transmitted in terminals Se, Sf, Sg, and Sh, and also in the wiring W11A, W12A, W13A, and W14A provided on the printing substrate 400A. Therefore, when the control unit 210 determines that the printing substrate 400 on which the semiconductor device 100 is mounted is the printing substrate 400A, it sets terminals Se, Sf, Sg, and Sh as terminals for transmitting low-speed signals.

[0128] On the other hand, in Mode B, high-speed signals are transmitted in terminals Sf and Sg, and terminals Se and Sh are connected to wirings W11A and W14A, thus becoming ground potential. That is, high-speed signals are transmitted in wirings W12A and W13A provided on the print substrate 400A, and noise is shielded by wirings W11B, W14B, and W23B with ground potential. Therefore, when the control unit 210 determines that the print substrate 400 on which the semiconductor device 100 is mounted is the print substrate 400B, it sets terminals Sb and Sc as terminals for transmitting high-speed signals.

[0129] It should be noted that terminal Tp of integrated circuit chip 200 is an example of a "first terminal", and wiring 321 of base substrate 300 is an example of a "first wiring". Terminal Tq of integrated circuit chip 200 is an example of a "second terminal", and wiring 322 of base substrate 300 is an example of a "second wiring". In addition, a specific terminal Ti of integrated circuit chip 200 is an example of a "third terminal".

[0130] 6. Effects

[0131] As explained above, according to the electronic device 1 of this embodiment, in the semiconductor device 100, an integrated circuit chip 200 can be mounted in multiple types of packages 330, thus eliminating the need to design and manufacture integrated circuit chips with different functions for each package 330. Therefore, the production line and equipment for the integrated circuit chip 200 can be kept to a minimum, thereby minimizing production costs and labor hours, and further minimizing the management time for the integrated circuit chip 200, thus achieving cost reduction. Furthermore, by limiting the function of the integrated circuit chip 200 according to the function of the electronic device 1, the integrated circuit chip 200 can be mounted in a package 330 of the required minimum size according to its function, thereby achieving miniaturization of the semiconductor device 100. Additionally, since the integrated circuit chip 200 can be mounted in a package 330 of the required minimum size according to its function, the materials required for the production of the package 330 can be reduced, and the production equipment for the integrated circuit chip 200 can be kept to a minimum, thereby enabling efficient use of resources such as materials and personnel required for production. Furthermore, since the production equipment for the integrated circuit chip 200 can be kept to a minimum, the amount of compressed air and electricity used in the production plant can be reduced, thereby reducing CO2 production.

[0132] Furthermore, according to the electronic device 1 of this embodiment, in the semiconductor device 100, when the integrated circuit chip 200 is mounted onto the package 330b, the terminal Ti can be used as both a CMOS terminal and an LVDS terminal, thereby reducing the number of terminals of the integrated circuit chip 200 and the number of wirings on the printed circuit board 400 to be mounted on the semiconductor device 100. Additionally, by dedicating the terminal Ti to either a CMOS terminal or an LVDS terminal and limiting the function of the integrated circuit chip 200, the integrated circuit chip 200 can be mounted into the package 330 of the required minimum size according to its function.

[0133] Furthermore, when the function of the integrated circuit chip 200 is limited according to the function of the electronic device 1 equipped with the semiconductor device 100, by fixing the potential of the unused terminals in the integrated circuit chip 200 to a low level, the risk of the unused terminal potential becoming an intermediate potential can be reduced, thereby reducing the risk of malfunction of the electronic device 1.

[0134] Furthermore, according to the electronic device 1 of this embodiment, in the integrated circuit chip 200, excess clock signals and excess power are stopped from being supplied to unused functional circuits, thereby reducing power consumption and achieving energy saving. In addition, according to the electronic device 1 of this embodiment, since the initial settings of unused functional circuits are not performed in the integrated circuit chip 200, the power consumption required for unnecessary initial settings is reduced, and the startup time is shortened, thereby achieving energy saving. Furthermore, according to the electronic device 1 of this embodiment, by changing the frequency of the clock signal in the package 330 on which the integrated circuit chip 200 is mounted, the performance of the integrated circuit chip 200 can be improved within a range where the internal temperature of the package 330 is not too high. Therefore, stable energy consumption can be achieved at low cost, which helps to reduce the power generation of power plants and is environmentally friendly.

[0135] Furthermore, according to the electronic device 1 of this embodiment, based on the printed circuit board 400 on which the semiconductor device 100 is mounted, by switching the functions of terminals Sa, Sb, Sc, and Sd of the semiconductor device 100 as well as the functions of terminals Se, Sf, Sg, and Sh, these terminals are used concurrently, thereby miniaturizing the required number of terminals and wiring. In addition, since the production line and production equipment for the semiconductor device 100 can also be minimized, the production cost of the semiconductor device 100 is reduced, achieving cost reduction. Furthermore, when the semiconductor device 100 is mounted on the printed circuit board 400B, since the wiring for high-speed signal transmission is sandwiched between ground wiring, crosstalk caused by high-speed signals is reduced, and the risk of malfunction is lowered. Furthermore, according to the electronic device 1 of this embodiment, since the terminals of the semiconductor device 100 are reused, the required number of terminals and wiring can be kept to a minimum. Therefore, the materials required for the production of the semiconductor device 100 and the printed circuit board 400 can be reduced, and the production equipment for the semiconductor device 100 and the printed circuit board 400 can be kept to a minimum, thereby enabling efficient use of resources such as materials and personnel required for production. In addition, since the production equipment for the semiconductor device 100 and the printed circuit board 400 can be kept to a minimum, the consumption of compressed air and electricity in the production plant can be reduced, thereby reducing CO2 emissions.

[0136] Furthermore, according to the electronic device 1 of this embodiment, based on the potential of the terminal S1 of the semiconductor device 100, the printed circuit board 400 on which the semiconductor device 100 is mounted can be identified, thereby realizing the miniaturization and cost reduction of the semiconductor device 100.

[0137] According to the above, the electronic device 1 according to this embodiment can contribute to the objectives 7, 8, 9, 11, and 12 of the SDGs.

[0138] This invention is not limited to this embodiment, and various modifications can be made within the scope of the spirit of this invention.

[0139] For example, in this embodiment, the package 330 of the semiconductor device 100 is described as a BGA (Ball Grid Array), but the package 330 can also be a surface-mount package other than a BGA, such as a SiP (System-in-Package), LGA (Land Grid Array Package), or WPP (Wafer-Level Package). For example, when the package 330 is an LGA, the terminals of the semiconductor device 100 are solder pads provided on the package 330, and the terminals of the semiconductor device 100, i.e., the solder pads, are connected to the pads 410 provided on the printed circuit board 400 by solder balls 310.

[0140] The embodiments have been described above, but the present invention is not limited to these embodiments and can be implemented in various ways without departing from its spirit. For example, the above embodiments can also be appropriately combined.

[0141] This invention includes structures that are substantially the same as those described in the embodiments, such as structures with the same function, method, and result, or structures with the same purpose and effect. Additionally, this invention includes structures after non-essentially replacing parts of the structures described in the embodiments. Furthermore, this invention includes structures that can perform the same function or achieve the same purpose as the structures described in the embodiments. Additionally, this invention includes structures incorporating known techniques into the structures described in the embodiments.

[0142] The following content can be derived based on the above implementation method.

[0143] One type of semiconductor device includes: Packaging; and The integrated circuit chip is mounted on the internal substrate of the package. The integrated circuit chip has: a control unit, multiple terminals, and multiple functional circuits. The internal substrate is provided with a first wiring and a second wiring. The first wiring is connected to a first terminal among a plurality of terminals, and the second wiring is connected to a second terminal among a plurality of terminals. The control unit determines the type of package based on the potential of the first terminal and the potential of the second terminal, and controls the operation of multiple functional circuits according to the type of package.

[0144] According to this semiconductor device, an integrated circuit chip can be mounted in multiple types of packages, eliminating the need to design and manufacture integrated circuit chips with different functions for each package type. Therefore, the production line and equipment for integrated circuit chips can be kept to a minimum, thereby minimizing production costs and labor hours, and consequently, reducing management time and achieving cost reduction. Furthermore, according to this semiconductor device, by limiting the function of the integrated circuit chip according to the function of the attached electronic device, the integrated circuit chip can be mounted in a package of the minimum required size, achieving miniaturization. Additionally, because the integrated circuit chip can be mounted in a package of the minimum required size according to its function, the materials required for package production can be reduced, and the production equipment can be kept to a minimum, enabling efficient use of resources such as materials and personnel. Moreover, because the production equipment can be kept to a minimum, the consumption of compressed air and electricity in the production plant can be reduced, thereby lowering CO2 emissions. Therefore, this semiconductor device is able to contribute to the 7th, 8th, 9th, 11th and 12th Sustainable Development Goals (SDGs).

[0145] According to one embodiment of the semiconductor device, it can also be that... The control unit determines, based on the type of package, whether the third terminal among the plurality of terminals is also used as a CMOS terminal or an LVDS terminal.

[0146] According to this semiconductor device, the number of terminals on integrated circuit chips and the number of wirings on the printed circuit board on which the semiconductor device is mounted can be reduced. Furthermore, according to this semiconductor device, by limiting the function of the integrated circuit chip according to the function of the mounted electronic device, it is possible to mount the integrated circuit chip in a package of the required minimum size according to its function. Therefore, according to this semiconductor device, it is possible to contribute to SDG objectives 7, 8, 9, 11, and 12.

[0147] According to one embodiment of the semiconductor device, it can also be that... The control unit fixes the potential of unused terminals among the plurality of terminals to a low level according to the type of package.

[0148] According to this semiconductor device, when the function of an integrated circuit chip is limited based on the function of the equipped electronic device, the risk of unused terminal potentials becoming intermediate potentials is reduced, and the risk of malfunction of the electronic device equipped with the semiconductor device is reduced. Therefore, according to this semiconductor device, it is possible to contribute to SDG objectives 7, 8, 9, 11, and 12.

[0149] According to one embodiment of the semiconductor device, it can also be that... The control unit stops supplying clock signals to unused functional circuits among the plurality of functional circuits, depending on the type of the package.

[0150] This semiconductor device stops supplying unnecessary clock signals, thereby reducing power consumption and achieving energy savings. Therefore, it enables stable energy consumption at low cost, helping to reduce power plant output and is environmentally friendly. Thus, this semiconductor device can contribute to SDG objectives 7, 8, 9, 11, and 12.

[0151] According to one aspect of the semiconductor device, it can also be

[0152] The control unit stops supplying power to unused functional circuits among the plurality of functional circuits, depending on the type of the package.

[0153] This semiconductor device stops excess power supply, thereby reducing power consumption and achieving energy savings. Therefore, it enables stable energy consumption at low cost, helping to reduce power plant output and is environmentally friendly. Thus, this semiconductor device can contribute to SDGs 7, 8, 9, 11, and 12.

[0154] According to one embodiment of the semiconductor device, it can also be that... The control unit does not perform initial settings for unused functional circuits among the multiple functional circuits, depending on the type of package.

[0155] This semiconductor device reduces unnecessary power consumption during initial setup and shortens startup time, thus achieving energy savings. Therefore, it enables stable energy consumption at low cost, helping to reduce power plant output and is environmentally friendly. Consequently, this semiconductor device can contribute to SDGs objectives 7, 8, 9, 11, and 12.

[0156] According to one embodiment of the semiconductor device, it can also be that... The control unit changes the frequency of the clock signal according to the package.

[0157] According to this semiconductor device, performance can be improved within a range that does not cause excessively high internal temperatures, depending on the type of package. Therefore, stable energy consumption can be achieved at low cost, helping to reduce power plant output and being environmentally friendly. Thus, this semiconductor device can contribute to SDGs objectives 7, 8, 9, 11, and 12.

Claims

1. A semiconductor device, characterized in that, have: Packaging; and The integrated circuit chip is mounted on the internal substrate of the package. The integrated circuit chip has: a control unit, multiple terminals, and multiple functional circuits. The internal substrate is provided with a first wiring and a second wiring. The first wiring is connected to a first terminal among a plurality of terminals, and the second wiring is connected to a second terminal among a plurality of terminals. The control unit determines the type of package based on the potential of the first terminal and the potential of the second terminal, and controls the operation of multiple functional circuits according to the type of package.

2. The semiconductor device according to claim 1, characterized in that, The control unit determines, based on the type of package, whether the third terminal among the plurality of terminals is also used as a CMOS terminal or an LVDS terminal.

3. The semiconductor device according to claim 1, characterized in that, The control unit fixes the potential of unused terminals among the plurality of terminals to a low level according to the type of package.

4. The semiconductor device according to claim 1, characterized in that, The control unit stops supplying clock signals to unused functional circuits among the plurality of functional circuits, depending on the type of the package.

5. The semiconductor device according to claim 1, characterized in that, The control unit stops supplying power to unused functional circuits among the plurality of functional circuits, depending on the type of the package.

6. The semiconductor device according to claim 1, characterized in that, The control unit does not perform initial settings for unused functional circuits among the multiple functional circuits, depending on the type of package.

7. The semiconductor device according to claim 1, characterized in that, The control unit changes the frequency of the clock signal according to the package.

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