Horizontal extended gate field effect transistor gas sensor and method for manufacturing the same

Abstract

This invention relates to a horizontally extended gate field-effect transistor gas sensor and its fabrication method, comprising a substrate; a conductive channel layer disposed on the substrate; a source and a drain electrically connected to the conductive channel layer; a gate dielectric layer covering the conductive channel layer, the source, and the drain; a horizontally extended gate disposed on the side of the gate dielectric layer away from the substrate, the horizontally extended gate including a gate contact region and a horizontally extending arm extending horizontally from the gate contact region; and a gas-sensitive layer disposed on the side of the gate dielectric layer away from the substrate. This invention physically separates and independently optimizes the sensing and conductive functions, combining high-k dielectric packaging and high-efficiency capacitive coupling to achieve high-sensitivity detection of ppb-level trace gases at room temperature. The device exhibits excellent stability and integration, not only improving the gate's modulation capability of the channel and reducing the operating voltage, but also providing encapsulation protection. It is particularly suitable for industries such as environmental monitoring, industrial security, and medical diagnostics.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor gas sensor technology, specifically relating to a horizontally extended gate field-effect transistor gas sensor based on acceptor-conversion function separation design and its fabrication method. Technical Background

[0002] With the rapid development of the Internet of Things and smart manufacturing, the demand for high-performance gas sensors is increasing. Semiconductor gas sensors, with their low power consumption and ease of integration, have shown great application potential in environmental monitoring, industrial security, and medical diagnostics for detecting trace gases at the ppb level. However, in traditional devices, the sensing material often needs to simultaneously perform gas recognition (i.e., acceptor function) and signal conversion (i.e., conversion function), and the material itself is difficult to possess both high surface activity and high carrier mobility. This makes the synergistic optimization of sensitivity, selectivity, and low power consumption a structural challenge.

[0003] However, traditional semiconductor gas sensors (including resistive or field-effect type) typically use a single material to simultaneously perform gas recognition (receptor function) and signal conversion (conversion function). This requires the sensitive material to possess not only high surface activity to adsorb target gas molecules but also high carrier mobility to achieve efficient signal output. However, in practical material systems, high surface activity is often accompanied by numerous surface defects or scattering centers, leading to a decrease in carrier mobility. Conversely, high-mobility materials (such as black phosphorus and graphene) often have low chemical activity or are easily oxidized by the environment, lacking targeted gas adsorption capabilities. This inherent contradiction between the "receptor" and "conversion" functions makes it difficult for a single material to simultaneously meet the requirements of high sensitivity, high selectivity, and low power consumption, becoming a structural bottleneck restricting the development of high-performance gas sensors.

[0004] Furthermore, while novel two-dimensional materials, such as black phosphorus, possess extremely high carrier mobility and adjustable band gaps, making them ideal channel materials, their susceptibility to oxidation and degradation in air and poor long-term stability limit their direct application in gas sensing. Although existing technologies have proposed suspended or extended gate structures to separate the sensing and detection units, these often suffer from low coupling efficiency, complex manufacturing processes, and difficulties in simultaneously protecting the channel. Summary of the Invention

[0005] The purpose of this invention is to overcome the defects of the existing technology and provide a horizontally extended gate field-effect transistor gas sensor and its fabrication method. Through the technical solutions of "receptor-conversion function decoupling", "horizontal extended gate integrated structure", "windowed pure capacitive coupling at the end of the extended arm", and "high-k dielectric encapsulation protection", the invention breaks through the material and performance bottlenecks of traditional sensors from the structural and process levels, realizes the decoupling of gas identification and signal conversion functions, and simultaneously solves the stability problem of high-mobility materials such as black phosphorus, so as to improve the overall performance of the sensor and ultimately achieve high sensitivity and high selectivity room temperature detection of ppb-level target gases.

[0006] The technical solution of the present invention is as follows: A horizontally extended gate field-effect transistor gas sensor, characterized in that, from bottom to top, it comprises: a substrate, a conductive channel layer, a source electrode, a drain electrode, a gate dielectric layer, a horizontally extended gate electrode, and a gas-sensitive layer; the conductive channel layer is disposed on the substrate; the source electrode and the drain electrode are electrically connected to the conductive channel layer respectively; the gate dielectric layer covers the conductive channel layer, the source electrode, and the drain electrode; the horizontally extended gate electrode is disposed on the side of the gate dielectric layer away from the substrate, the horizontally extended gate electrode is a continuous metal electrode, including a gate contact region and a horizontally extended arm extending horizontally from the gate contact region to below the gas-sensitive layer; the end of the horizontally extended arm is provided with an opening. In the window region, the metal is removed and the gate dielectric layer is exposed. The gas-sensitive layer is disposed on the side of the gate dielectric layer away from the substrate. The gas-sensitive layer is directly deposited on the surface of the gate dielectric layer in the window region, and a purely capacitive coupling interface is formed between it and the horizontal extension arm through the gate dielectric layer. The horizontal extension arm extends into or around the projection area of ​​the gas-sensitive layer. The gas-sensitive layer forms a capacitive coupling structure with the conductive channel layer through the gate dielectric layer, realizing the physical separation of the gas identification function and the signal conversion function. The gas-sensitive layer undertakes the receiver function of gas identification, and the conductive channel layer undertakes the conversion function of signal conversion and amplification, thus achieving decoupling of the receiver-conversion function.

[0007] Furthermore, the substrate is a high-resistivity silicon substrate with a 300 nm thick thermal oxide layer on its surface. Insulating buffer layer.

[0008] Furthermore, the conductive channel layer is made of a highly mobile two-dimensional material that is easily oxidized, such as a black phosphorus film or a transition metal sulfide. Or one of the graphene types, with a thickness of 10–20 nm.

[0009] Furthermore, the gate dielectric layer is a high dielectric constant gate dielectric layer, which also serves as a protective encapsulation layer for the conductive channel layer; the high dielectric constant gate dielectric layer completely covers the conductive channel layer to isolate the conductive channel layer from the erosion caused by the ambient atmosphere.

[0010] Furthermore, the material of the horizontally extended gate is... or The gate contact area is used for external gate voltage connection, and the length and width of the horizontal extension arm are adjustable according to the detection target. The gate contact area of ​​the horizontally extended gate is located on one side of the conductive channel layer, and the horizontal extension arm extends in a direction parallel to the conductive channel layer, crossing the top of the gate dielectric layer to reach the bottom or side of the gas sensitive layer.

[0011] Furthermore, the gas-sensitive layer employs a highly surface-active nanomaterial, which is one or more of colloidal quantum dots, metal oxide nanoparticles, or organic semiconductors; the gas-sensitive layer is a PbS colloidal quantum dot film, or It can specifically adsorb , Or acetone gas; within the vertical projection area of ​​the gas-sensitive layer, the horizontal extension arm of the horizontally extended gate is insulated from the gas-sensitive layer by the gate dielectric layer; or, the end of the horizontal extension arm is located at the edge of the projection area of ​​the gas-sensitive layer, and the gas-sensitive layer is directly deposited on the surface of the exposed gate dielectric layer.

[0012] A method for fabricating a horizontally extended gate field-effect transistor gas sensor, characterized by comprising the following steps:

[0013] Step S1, Substrate Preparation: Take a high-resistivity silicon substrate and perform thermal oxidation growth. Insulating buffer layer, clean and dry;

[0014] Step S2, Preparation of conductive channel layer: Prepare a few-layer black phosphorus layer on the substrate. Or a graphene film, patterned to form the conductive channel layer;

[0015] Step S3: Fabrication of source and drain electrodes: The source and drain electrodes are formed at both ends of the conductive channel layer using electron beam evaporation and photolithography lift-off processes.

[0016] Step S4: Deposit gate dielectric layer: Using atomic layer deposition (ALD) technology, deposit a layer covering the entire surface of the conductive channel layer, source, and drain. or The thin film serves as the gate dielectric layer;

[0017] Step S5: Fabrication of horizontally extended gate: Deposit metal electrodes and perform photolithography to form the gate contact area and the horizontal extension arm;

[0018] Step S6: Opening a window in the sensitive layer region: The window region is defined by photolithography, and the metal at the end of the extension arm is removed by ion beam etching to expose the underlying gate dielectric layer;

[0019] Step S7: Deposit a gas-sensitive layer: Deposit a gas-sensitive material in the windowed area to form a purely capacitively coupled gas-sensitive unit; Prepare a gas-sensitive layer on the gate dielectric layer corresponding to the region of the horizontal extension arm, so that the gas-sensitive layer is capacitively coupled to the conductive channel layer through the gate dielectric layer;

[0020] Step S8, Source and Drain Electrode Windowing: Etch away the gate dielectric layer above the source and drain electrodes to expose the electrode surfaces and complete device fabrication.

[0021] Furthermore, the atomic layer deposition temperature of the gate dielectric layer in step S4 is 120–150 °C, so as to achieve in-situ encapsulation protection of the easily oxidized conductive channel layer while forming an insulating gate.

[0022] Furthermore, the gate dielectric layer described in step S4 is a high dielectric constant gate dielectric layer, with a deposition temperature controlled at 130°C and a thickness of 10 nm.

[0023] Furthermore, the gas-sensitive layer mentioned in step S7 is a PbS quantum dot, synthesized by thermal injection, with a particle size of 3–5 nm, and deposited by drop casting or inkjet printing, with a thickness of approximately 20 nm.

[0024] The beneficial effects of this invention are:

[0025] 1. The device is designed with a “receptor-conversion function separation” approach, which decouples the gas recognition and signal conversion functions in the structure. The materials of the sensitive layer and the channel layer can be independently optimized for high surface activity and high carrier mobility, respectively, breaking through the dilemma of mutual constraints on the performance of single materials.

[0026] 2. The “horizontally extended gate structure” extends the gate horizontally from the channel region to below the sensitive layer, expanding the gate’s sensing range for changes in the sensitive layer’s potential and enhancing capacitive coupling efficiency, thereby improving the overall sensitivity of the sensor.

[0027] 3. Apply a high dielectric constant gate dielectric layer (such as...) , As an interface coupling layer, it not only improves the modulation capability of the gate to the channel and reduces the operating voltage, but also plays a role in encapsulation and protection, and is especially suitable for easily oxidized channel materials such as black phosphorus.

[0028] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Attached Figure Description

[0029] Figure 1 This is a three-dimensional structural schematic diagram of the gas sensor according to an embodiment of the present invention;

[0030] Figure 2 This is a process flow diagram of the fabrication steps of the gas sensor according to an embodiment of the present invention;

[0031] Figure 3 This is a test curve of the electrical characteristics of the gas sensor according to an embodiment of the present invention;

[0032] Figure 4 The gas sensor in this embodiment of the invention is exposed to Transfer characteristic curves before and after;

[0033] Figure 5 The gas sensor of this embodiment of the invention is exposed to... Gas sensitivity test curve under environmental conditions.

[0034] In the figure, 1 is the substrate, 2 is the conductive channel layer, 3 is the source, 4 is the drain, 5 is the gate dielectric layer, 6 is the horizontally extended gate, 6a is the gate contact region, 6b is the horizontally extended arm, and 7 is the gas sensitive layer. Detailed Implementation

[0035] Example 1:

[0036] This embodiment is based on PbS quantum dots / black phosphorus. Gas sensor and its preparation method, as shown in the appendix Figures 1 to 5 As shown.

[0037] The gas sensor described in this embodiment employs... A high dielectric constant dielectric layer is used as the gate insulating layer, lead sulfide (PbS) colloidal quantum dots are used as the gas-sensitive layer, and black phosphorus (BP) is used as the conductive channel material, enabling the control of... The specific structure and preparation method of a highly sensitive room-temperature gas detection and identification method are as follows:

[0038] like Figure 1 As shown, from bottom to top, it includes: substrate 1, conductive channel layer 2, source 3, drain 4, high dielectric constant gate dielectric layer 5, horizontally extended gate 6, and gas sensitive layer 7. Figure 2 The device fabrication process flow diagram illustrates the key steps from substrate 1 preparation to gas-sensitive layer 7 deposition. Figure 3 The electrical characteristics of the device under room temperature air environment are tested, including the current-voltage characteristic curve, output characteristic curve and transfer characteristic curve, which verifies the ohmic contact and gate control capability of the device. Figure 4 For the device exposed to The comparison of the transfer characteristic curves before and after shows the response characteristics of positive threshold voltage drift and increased source-drain current. Figure 5 For devices in the range of 0~5ppm The gas-sensitive test curves within the concentration range visually reflect the response trend of current as gas concentration increases.

[0039] The connection relationships of each component are as follows:

[0040] Substrate 1: It is used to support the device structure and is a high-resistivity silicon substrate with a 300 nm thick thermally oxidized coating on the surface. Insulating buffer layer.

[0041] Conductive channel layer 2 (conversion layer): a high carrier mobility material, such as graphene, One of the black phosphorus materials used in this embodiment is a few-layer black phosphorus with a thickness of 10-20 nm, preferably 15 nm, which is used for carrier transport, signal conversion and amplification.

[0042] Source 3, Drain 4: Metal electrodes (such as Au, This embodiment adopts (10 nm / 50 nm), used for outputting electrical signals.

[0043] High dielectric constant gate dielectric layer 5: such as , Or a combination thereof, this embodiment adopts With a thickness of 5–20 nm, the optimal thickness is 10 nm. It is used for interface optimization and electrical coupling, enhances gate control capability, suppresses leakage current, and serves as a protective encapsulation layer for the conductive channel layer, completely covering the conductive channel layer 2 and the source / drain electrodes, and isolating the conductive channel layer from the erosion of the ambient atmosphere.

[0044] Horizontal extended gate 6: or Continuous metal electrode, used in this embodiment (5 nm / 50 nm) The gate structure extends horizontally, enhancing the control over the channel, improving the electric field modulation capability, and increasing sensitivity.

[0045] Gas-sensitive layer 7 (acceptor layer): PbS quantum dots, or One of them, in this embodiment, uses PbS colloidal quantum dots for the specific adsorption of target gas molecules (such as...). , This generates interface charge injection, enabling gas identification.

[0046] Specifically, the conductive channel layer 2 is disposed on the substrate 1; the source electrode 3 and the drain electrode 4 are electrically connected to the conductive channel layer 2, respectively; the gate dielectric layer 5 covers the conductive channel layer 2, the source electrode 3, and the drain electrode 4; the horizontally extended gate electrode 6 is disposed on the side of the gate dielectric layer 5 away from the substrate 1, and the horizontally extended gate electrode 6 is a continuous metal electrode, including a gate contact region 6a and a horizontally extending arm 6b extending horizontally from the gate contact region 6a to below the gas sensitive layer 7; the gate contact region 6a of the horizontally extended gate electrode 6 is located on one side of the conductive channel layer 2, and the horizontally extending arm 6b extends along the planar direction of the conductive channel layer 2, crossing above the gate dielectric layer 5 to reach below or to the side of the gas sensitive layer 7. The end of the extension arm 6b is provided with a window area, in which metal is removed and a high dielectric constant gate dielectric layer is exposed; the gas sensitive layer 7 is disposed on the side of the gate dielectric layer 5 away from the substrate 1; the gas sensitive layer 7 is directly deposited on the surface of the gate dielectric layer 5 in the window area, and a pure capacitive coupling interface is formed between the gas sensitive layer 7 and the extension arm 6b through the gate dielectric layer 5.

[0047] The horizontal extension arm 6b extends into or around the projection area of ​​the gas-sensitive layer 7. The gas-sensitive layer 7 forms a capacitive coupling structure with the conductive channel layer 2 through the gate dielectric layer 5, thereby physically separating the gas identification function from the signal conversion function. The gas-sensitive layer 7 undertakes the receptor function for gas identification, while the conductive channel layer 2 undertakes the conversion function for signal conversion and amplification, thus achieving decoupling of the receptor-conversion function.

[0048] In the vertical projection area of ​​the gas-sensitive layer 7, the horizontal extension arm 6b of the horizontally extended gate 6 is insulated from the gas-sensitive layer 7 by the gate dielectric layer 5; or, the end of the horizontal extension arm 6b is located at the edge of the projection area of ​​the gas-sensitive layer 7, and the gas-sensitive layer 7 is directly deposited on the surface of the exposed gate dielectric layer 5.

[0049] The above layers are stacked in sequence in the vertical direction. The horizontally extended gate converts the chemical signal of the sensitive layer into an electrical gate control signal, which is then efficiently coupled to the conductive channel through a high-k dielectric layer. Finally, quantitative detection of gas is achieved through changes in source and drain current.

[0050] In this device configuration, the functions of each component are clearly defined and work synergistically. The conductive channel layer, utilizing its high carrier mobility, amplifies and converts signals, ensuring that minute gate control signals are transformed into significant current changes. The high-dielectric-constant gate dielectric layer enhances gate control capability while effectively suppressing leakage current and providing a stable capacitive coupling interface between the sensitive layer and the gate. The horizontally extended gate extends the gate control region below the sensitive layer, significantly enhancing the modulation efficiency of gas molecule-induced charges on channel carriers. The gas-sensitive layer focuses on gas recognition without needing to consider conductivity, allowing for priority consideration of high surface activity and high selectivity in material selection. This functional separation design strategy enables independent optimization of the materials for the sensitive layer and channel layer, fundamentally overcoming the performance bottleneck of traditional sensors where a single material cannot simultaneously perform both gas recognition and signal conversion functions.

[0051] A method for fabricating a horizontally extended gate field-effect transistor gas sensor includes the following steps:

[0052] Step S1, Substrate 1 Preparation: Take a high-resistivity silicon (Si) substrate and cover the surface with a 300 nm thick thermal oxidation growth layer. Insulating buffer layer, dried with nitrogen after standard cleaning;

[0053] Step S2: Fabrication of conductive channel layer 2: Conductive channel layer 2 is patterned on substrate 1. Bulk black phosphorus is peeled off to the substrate surface using a blue adhesive-assisted mechanical peeling method. The rectangular channel region is located by an optical microscope and etched under oxygen plasma assistance. The conductive channel layer 2 is made of a highly mobile two-dimensional material that is easily oxidized. It is a few-layer black phosphorus film grown by mechanical peeling or chemical vapor deposition (CVD) with a thickness of about 10~20 nm, preferably 15 nm. The rectangular channel is formed by dry transfer to the substrate or photolithography patterning.

[0054] Step S3, Fabrication of source electrode 3 and drain electrode 4: Spin-coating photoresist (PMMA) and depositing it using electron beam evaporation. (10nm / 50 nm) metal electrodes, through photolithography lift-off process, form source electrode 3 and drain electrode 4 at both ends of conductive channel layer 2;

[0055] Step S4: Depositing a high-dielectric-constant gate dielectric layer 5: Using atomic layer deposition (ALD), the sample is placed in an ALD chamber, with trimethylaluminum (TMA) and water as precursors. The ALD temperature is 120–150 °C, with an optimal temperature of 130 °C, to achieve in-situ encapsulation protection of the easily oxidized conductive channel layer while forming an insulating gate. The gate dielectric layer 5 is made of a high-dielectric-constant dielectric material, including… , Or a combination thereof, with a thickness of 5–20 nm, as shown in this embodiment. The thin film has an optimal thickness of 10 nm; the gate dielectric layer 5 completely covers the conductive channel layer 2 and the source / drain electrodes, which is used to isolate the conductive channel layer from the erosion of the ambient atmosphere, and at the same time serves as a gate insulating layer and a black phosphorus encapsulation layer.

[0056] Step S5, Fabrication of the horizontally extended gate 6: Evaporate metal electrodes and pattern them using photolithography, spin-coat photoresist, expose to define the gate pattern (including the contact area and the extension arm), and deposit using electron beam evaporation. After stripping (5 nm / 50 nm), a gate contact region 6a and a horizontal extension arm 6b are formed; the gate contact region 6a is used for external gate voltage connection, and the length and width of the extension arm 6b are adjustable according to the detection target; the gate is a continuous metal electrode, including:

[0057] Gate contact region 6a: Located on one side of the channel, used to apply the gate voltage. This region is directly deposited on the surface of the gate dielectric layer, with the top metal exposed.

[0058] Horizontal extension arm 6b: extends horizontally from the contact area to the sensitive layer area.

[0059] Step S6, Opening a window in the sensitive layer region: Define the sensitive layer deposition region (located directly above the end of the horizontal extension arm) by photolithography, and remove the metal of the horizontal extended gate (end of extension arm 6b) in this region by ion beam etching or wet etching to expose the surface of the high dielectric constant gate dielectric layer 5 below.

[0060] Step S7: Deposit gas-sensitive layer 7: Prepare gas-sensitive layer 7 on the gate dielectric layer 5 in the region corresponding to the horizontal extension arm 6b, such that the gas-sensitive layer 7 is capacitively coupled to the conductive channel layer 2 through the gate dielectric layer 5; deposit gas-sensitive material in the windowed region to form a purely capacitively coupled gas-sensitive unit; the gas-sensitive layer 7 uses a nanomaterial with high surface activity, wherein the nanomaterial is one or more of colloidal quantum dots, metal oxide nanoparticles, or organic semiconductors.

[0061] In this embodiment, the gas-sensitive layer 7 is a PbS colloidal quantum dot film, capable of specifically adsorbing... , Alternatively, acetone gas can be used; a pre-synthesized PbS quantum dot dispersion (using n-octane as solvent) is deposited in the windowed area via drop casting or inkjet printing. After the solvent evaporates, a thin film is formed, and the sensitive layer directly contacts the surface. The gate dielectric layer is approximately 20 nm thick. The sensitive layer and the underlying extension arm are separated by only one gate dielectric layer, and signal transmission is achieved through capacitive coupling.

[0062] The synthesis method of PbS colloidal quantum dots is as follows: PbS colloidal quantum dots are synthesized by hot injection method. First, an appropriate amount of PbO, oleic acid and octadecene are added to a three-necked flask and heated to 120°C for vacuum degassing for 1 hour; under a nitrogen atmosphere, the temperature is raised to 150°C, and a trace amount of hexamethyldisilazane (TMS) is rapidly injected; after reacting for 3 minutes, the mixture is quenched in an ice-water bath, acetone is added to precipitate the quantum dots, and after centrifugation, they are dispersed in n-octane to obtain PbS quantum dots with a particle size of about 3-5 nm. In this example, the particle size is about 4 nm, which are drop-coated onto the windowed area.

[0063] Step S8, Opening windows in the source and drain electrode regions: The positions of the source and drain electrodes are defined by photolithography. Reactive ion etching (RIE) is used to remove the gate dielectric layer 5 above the source electrode 3 and drain electrode 4, exposing the surface of the source / drain metal electrodes, thus completing the device fabrication. The gate contact region is already exposed and no windowing is required.

[0064] Electrical testing

[0065] This embodiment compares and analyzes the electrical characteristics of the device under ambient air conditions. For example... Figure 3 (a) shows that the device's current-voltage characteristic curve exhibits good central symmetry, indicating a good ohmic contact between the source / drain electrodes and the channel. Further analysis of the output characteristic curve, such as... Figure 3 As shown in (b), when the gate bias voltage ( When the source-drain current increases negatively within the range of +20 V to -60 V, the source-drain current ( This trend is significantly enhanced in the transfer characteristic curve, as shown in... Figure 3 This is also verified in (c): Under a fixed gate voltage, the source-drain current varies with the source-drain voltage ( (It increases and improves.)

[0066] Figure 4 The device was demonstrated to withstand exposure to 1 ppm. The transfer characteristic curves before and after exposure. As shown in the figure, when exposed to 1 ppm... At the same gate voltage ( Under these conditions, the source and drain currents ( ) increased significantly. At the same time, The interaction between the PbS quantum dot sensitive layer and the sensor causes the transfer characteristic curve to shift overall towards the positive gate voltage direction, and the threshold voltage (Vth) also shifts accordingly in the positive direction. This phenomenon indicates that the signal amplification effect introduced by the horizontally extended gate structure in this device configuration provides key support for the sensor to achieve high-sensitivity detection. In this structure, The introduction of the insulating layer enables the black phosphorus channel and the PbS quantum dot sensitive layer to be electrically decoupled, allowing them to be optimized independently and work together, thus constructing a high-performance sensing unit that integrates gas identification and signal conversion.

[0067] Gas sensing performance test

[0068] The prepared device was placed in a gas-sensitive testing system and subjected to different concentrations at room temperature (25°C). Gas sensing characteristic testing, such as Figure 5 As shown. Test conditions: source-drain voltage Gate voltage (No external gate voltage applied, relying solely on the gate control effect induced by gas adsorption). Test gas concentration range: It ranges from 20 ppb to 5 ppm.

[0069] Working principle

[0070] The horizontally extended gate field-effect transistor gas sensor proposed in this invention operates based on the Fermi level coupling mechanism between the sensitive layer and the channel material. Taking gases as an example, when When molecules adsorb onto the p-type PbS quantum dot sensitive layer, The strong oxidizing property of PbS draws electrons from PbS, leading to an increase in the hole concentration and a shift of its Fermi level towards the top of the valence band. This is achieved through a high dielectric constant. The capacitive coupling of the gate dielectric layer transmits changes in the PbS Fermi level to the p-type black phosphorus channel, causing the Fermi level in the black phosphorus channel to shift synchronously towards the valence band top, increasing the hole concentration and channel conductivity. Under constant source-drain bias, the source-drain current increases significantly, thereby achieving... High-sensitivity gas detection. For Reducing gases, with their opposite mechanisms, cause the Fermi level in the channel to move away from the valence band top, resulting in a decrease in hole concentration and a reduction in source-drain current. This band coupling mechanism provides a unified explanation for the device's response characteristics to different gases, verifying the physical effectiveness of the "acceptor-conversion function decoupling" design strategy of this invention.

[0071] Example 2:

[0072] This embodiment is a further refinement based on Embodiment 1. The differences from Embodiment 1 are as follows, while the remaining structure and process parameters are the same as in Embodiment 1:

[0073] Conductive channel layer 2: Employs a transition metal sulfide n-type monolayer molybdenum disulfide The thickness is about 10 nm. It is grown on the substrate by dry transfer method or chemical vapor deposition (CVD) to form a conductive channel region.

[0074] Source 3 and Drain 4: Ni / Au (10 nm / 50 nm) metal electrodes were deposited using electron beam evaporation and defined at both ends of the channel layer using photolithography lift-off. High dielectric constant gate dielectric layer 5: Deposited on the overall device surface using atomic layer deposition (ALD) technology. The thin film was deposited at a temperature controlled at 120°C and had a thickness of 15 nm.

[0075] Gas-sensitive layer 7: Selected Nanowires are deposited by electrophoresis on the sensitive area, i.e., the windowed area, with the sensitive layer directly contacting the surface of the gate dielectric layer, and the thickness is about 20 nm.

[0076] Example 3:

[0077] This embodiment is a further refinement based on Embodiment 1. The differences from Embodiment 1 are as follows, while the remaining structure and process parameters are the same as in Embodiment 1:

[0078] The conductive channel layer is grown using CVD with few layers. The thickness is approximately 15nm;

[0079] High dielectric constant gate dielectric layer 5: using ALD deposition was performed at 130 °C with a thickness of 10 nm, using trimethylaluminum (TMA) and water as precursors.

[0080] Gas-sensitive layer uses Nanomaterials, deposited in the windowed area using a spray pyrolysis deposition method, are approximately 20 nm thick and directly contact the surface. On the surface of the gate dielectric layer, a purely capacitive coupling is formed with the horizontal extension arm, achieving functional decoupling. It has high selectivity and high sensitivity, and can achieve ppb level. Quantitative detection, applicable to monitoring industrial waste gas and ambient air quality.

[0081] Example 4:

[0082] This embodiment is a further refinement based on Embodiment 1. The differences from Embodiment 1 are as follows, while the remaining structure and process parameters are the same as in Embodiment 1:

[0083] The conductive channel layer is made of CVD-grown monolayer graphene, and the gas-sensitive layer is made of... Nanomaterials, approximately 20 nm thick, were deposited in the windowed area using a drop-coating method, directly contacting... The surface of the gate dielectric layer forms a pure capacitive coupling with the horizontal extension arm, achieving functional decoupling. It has a fast response and good selectivity to acetone gas and can be used for acetone detection in human respiration, showing potential for medical diagnostic applications.

[0084] This invention uses a device design strategy of "receptor-conversion function decoupling" to separate the gas recognition function and the signal conversion function in physical structure. The gas sensitive layer can focus on optimizing high surface activity and high selectivity, while the conductive channel layer can focus on high carrier mobility and low noise characteristics. The two do not restrict each other, fundamentally breaking through the bottleneck of traditional sensors where a single material cannot achieve dual performance, and realizing the synergistic optimization of sensitivity, selectivity and low power consumption.

[0085] This invention features a unique horizontally extended gate structure that extends the gate horizontally from the channel region to below the gas-sensitive layer, significantly expanding the gate's sensing range for changes in the sensitive layer's potential. Combined with a high-dielectric-constant gate dielectric layer (such as... , The efficient capacitive coupling of the sensing layer enables the efficient transmission and amplification of weak interfacial charge changes into a significant channel current signal, thereby achieving the detection of ppb-level target gases (such as...) , High-sensitivity room temperature detection.

[0086] This invention employs a high dielectric constant gate dielectric layer as a protective encapsulation layer for easily oxidized channel materials such as black phosphorus, effectively suppressing the degradation of channel materials in air, significantly improving the long-term stability of the device, and the device structure is compatible with CMOS technology, possessing good integration potential, and can be further developed into a multi-gas detection array or integrated into portable sensing devices.

[0087] This invention offers high flexibility in material selection; the sensitive layer can be made of metal oxide nanomaterials (such as...) depending on the type of target gas. , ), colloidal quantum dots (such as PbS) or organic semiconductors, and the channel layer can be made of graphene, transition metal sulfides (such as... High-mobility materials such as black phosphorus can be rapidly extended to meet gas detection needs in different application scenarios through the universal coupling mechanism of horizontally extended grid structures.

[0088] Specifically, the gas-sensitive layer undertakes the identification function, responsible for the specific adsorption of target gas molecules and the injection of interfacial charges; the channel layer, made of highly conductive material, completes the conversion function, realizing efficient transport of charge carriers and signal amplification; and the high dielectric constant gate dielectric layer realizes the interface matching and electrical coupling between the two, thereby breaking through the dilemma of the limited performance of a single material at the device configuration level.

[0089] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A horizontally extended gate field-effect transistor gas sensor, characterized in that, The structure, from bottom to top, comprises: a substrate (1), a conductive channel layer (2), a source (3), a drain (4), a gate dielectric layer (5), a horizontally extended gate (6), and a gas-sensitive layer (7); the conductive channel layer (2) is disposed on the substrate (1); the source (3) and the drain (4) are electrically connected to the conductive channel layer (2); the gate dielectric layer (5) covers the conductive channel layer (2), the source (3), and the drain (4); the horizontally extended gate (6) is disposed on the side of the gate dielectric layer (5) away from the substrate (1), and the horizontally extended gate (6) is... A continuous metal electrode includes a gate contact region (6a) and a horizontal extension arm (6b) extending horizontally from the gate contact region (6a) to below the gas-sensitive layer (7); the end of the horizontal extension arm (6b) is provided with a window region, in which metal is removed and the gate dielectric layer (5) is exposed; the gas-sensitive layer (7) is disposed on the side of the gate dielectric layer (5) away from the substrate (1); the gas-sensitive layer (7) is directly deposited on the surface of the gate dielectric layer (5) in the window region, and forms a purely capacitive coupling interface with the horizontal extension arm (6b) through the gate dielectric layer (5); wherein, The horizontal extension arm (6b) extends to the projection area or periphery of the gas sensitive layer (7). The gas sensitive layer (7) forms a capacitive coupling structure with the conductive channel layer (2) through the gate dielectric layer (5), thereby realizing the physical separation of the gas identification function and the signal conversion function. The gas sensitive layer (7) undertakes the receptor function of gas identification, and the conductive channel layer (2) undertakes the conversion function of signal conversion and amplification. The two achieve decoupling of the receptor-conversion function.

2. The gas sensor according to claim 1, characterized in that, The substrate (1) is a high-resistivity silicon substrate with a 300 nm thick thermal oxide layer on its surface. Insulating buffer layer.

3. The gas sensor according to claim 1, characterized in that, The conductive channel layer (2) is made of a highly mobile two-dimensional material that is easily oxidized. The two-dimensional material is a black phosphorus film or a transition metal sulfide. Or one of the graphene types, with a thickness of 10–20 nm.

4. The gas sensor according to claim 1, characterized in that, The gate dielectric layer (5) is a high dielectric constant gate dielectric layer, and the material of the high dielectric constant gate dielectric layer includes... , Or a combination thereof, with a thickness of 5–20 nm, as an encapsulation protective layer for the conductive channel layer (2); the high dielectric constant gate dielectric layer (5) completely covers the conductive channel layer (2) to isolate the conductive channel layer (2) from the erosion of the conductive channel layer (2) by the ambient atmosphere.

5. The gas sensor according to claim 1, characterized in that, The material of the horizontally extended gate (6) is or The gate contact area (6a) is used for external gate voltage, and the length and width of the horizontal extension arm (6b) are adjustable according to the detection target. The gate contact area (6a) of the horizontal extended gate (6) is located on one side of the conductive channel layer (2), and the horizontal extension arm (6b) extends horizontally along the plane direction of the conductive channel layer (2), crossing the gate dielectric layer (5) above and reaching the gas sensitive layer (7) below or to the side.

6. The gas sensor according to claim 1, characterized in that, The gas-sensitive layer (7) is made of a nanomaterial with high surface activity, wherein the nanomaterial is one or more of colloidal quantum dots, metal oxide nanoparticles, or organic semiconductors; the gas-sensitive layer (7) is a PbS colloidal quantum dot film, or It can specifically adsorb , Or acetone gas; in the vertical projection area of ​​the gas sensitive layer (7), the horizontal extension arm (6b) of the horizontal extended gate (6) is insulated from the gas sensitive layer (7) by the gate dielectric layer (5); or, the end of the horizontal extension arm (6b) is located at the edge of the projection area of ​​the gas sensitive layer (7), and the gas sensitive layer (7) is directly deposited on the surface of the exposed gate dielectric layer (5).

7. A method for fabricating a horizontally extended gate field-effect transistor gas sensor as described in any one of claims 1-6, characterized in that, Includes the following steps: Step S1, Substrate (1) Preparation: Take a high-resistivity silicon substrate and perform thermal oxidation growth. Insulating buffer layer, clean and dry; Step S2, Preparation of conductive channel layer (2): A few-layer black phosphorus layer is prepared on the substrate (1). Or a graphene film, patterned to form the conductive channel layer (2). Step S3, Preparation of source (3) and drain (4): The source (3) and drain (4) are formed at both ends of the conductive channel layer (2) by electron beam evaporation and photolithography lift-off process. Step S4, Deposit gate dielectric layer (5): Using atomic layer deposition process, deposit a full-coverage layer on the surface of the conductive channel layer (2), source (3) and drain (4). or Thin film, forming the gate dielectric layer (5); Step S5: Fabrication of horizontally extended gate (6): Deposit metal electrodes and perform photolithography to form gate contact area (6a) and horizontal extension arm (6b). Step S6, Windowing of sensitive layer region: Photolithography defines the windowing region, and ion beam etching is used to remove the metal at the end of the extension arm to expose the gate dielectric layer (5) below. Step S7, Deposit gas sensitive layer (7): Deposit gas sensitive material in the windowed area to form a gas sensitive unit with pure capacitive coupling; Prepare the gas sensitive layer (7) on the gate dielectric layer (5) in the area corresponding to the horizontal extension arm (6b) so that the gas sensitive layer (7) is capacitively coupled to the conductive channel layer (2) through the gate dielectric layer (5); Step S8, Source and Drain Electrode Windowing: Etch away the gate dielectric layer (5) above the source (3) and drain (4) to expose the electrode surface and complete the device fabrication.

8. The preparation method according to claim 7, characterized in that, The atomic layer deposition temperature of the gate dielectric layer (5) in step S4 is 120–150 °C, so as to achieve in-situ encapsulation protection of the easily oxidized conductive channel layer while forming an insulating gate.

9. The preparation method according to claim 7, characterized in that, The gate dielectric layer (5) mentioned in step S4 is a high dielectric constant gate dielectric layer, with a deposition temperature controlled at 130℃ and a thickness of 10 nm.

10. The preparation method according to claim 7, characterized in that, The gas-sensitive layer (7) mentioned in step S7 is a PbS quantum dot, which is synthesized by thermal injection and has a particle size of 3–5 nm. It is deposited by drop coating or inkjet printing and has a thickness of 20 nm.

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