A method for detecting negative voltage and open circuit of a storage battery and for judging battery performance.

Abstract

This invention belongs to the field of battery inspection technology, specifically a method for detecting negative voltage, open circuit, and judging battery performance in batteries. The method includes: dividing n series-connected batteries into at least two battery segments; using n+2 first photorelays to sequentially conduct the voltage signal of each individual battery to the corresponding segment's voltage bus; using four second photorelays to selectively conduct signals from different segment voltage buses to a shared voltage sampling circuit; a CPU controlling the on / off state of the photorelays and acquiring voltage signals through the voltage sampling circuit; and the CPU judging the battery's voltage state and open circuit fault based on a preset voltage and logic relationship. This invention requires only n+6 photorelays to complete the inspection of n batteries, significantly reducing hardware costs and effectively withstanding and detecting abnormally high or negative voltage when the battery is open-circuited.

Description

Technical Field

[0001] This invention relates to the field of battery inspection technology, and in particular to a method for detecting negative voltage and open circuit of a battery and judging battery performance. Background Technology

[0002] Existing battery inspection technologies typically measure the voltage across each individual cell directly, with the detection range generally set at 0. 3V. However, when an open-circuit fault occurs in a battery in a series-connected battery pack, especially during charging or discharging, an abnormally high or negative voltage will be generated across the faulty battery. For example, in a system of 110 batteries connected in series, the voltage across the open-circuit battery can reach approximately 24V during charging, and approximately -234V during discharging. This voltage, far exceeding the normal range, can easily burn out the sampling devices in the inspection circuit, making it impossible to detect the faulty battery, or even damaging the entire inspection equipment.

[0003] Furthermore, in traditional inspection circuit designs, 2^n relays are typically required for channel switching to inspect n batteries, resulting in high hardware costs. For example, inspecting 110 batteries requires 220 relays, which increases both equipment size and power consumption, as well as the failure rate. Therefore, there is an urgent need for a low-cost, highly reliable inspection method that can withstand high positive and negative pressure shocks and accurately detect open circuits and performance issues in batteries. Summary of the Invention

[0004] This invention proposes a method for detecting negative voltage and open circuit of a storage battery and judging battery performance. It aims to solve the technical problem in the prior art that voltages far exceeding the normal range can easily burn out the sampling devices in the inspection circuit, resulting in the inability to detect faulty batteries.

[0005] This invention provides a method for detecting negative voltage and open circuit of a storage battery and judging battery performance. It is applied to a storage battery pack consisting of n individual storage batteries connected in series, where n is an integer greater than 1. The method includes: dividing the storage battery pack into at least two battery segments. The voltage signals of each individual battery are time-divisionally transmitted to the voltage sampling circuit through an array of photoelectric relays. The central processing unit controls the photorelay array and collects voltage signals to determine the status of individual battery cells; The optical relay array includes n+2 first optical relays and four second optical relays; The positive and negative terminals of each individual battery are connected to the input terminal of a first opto-relay. The common connection terminal of two adjacent individual batteries shares the input terminal of a first opto-relay. The output terminal of each first opto-relay is connected to the corresponding segment voltage bus according to the battery segment to which the individual battery belongs. The input terminals of the four second optical relays are respectively connected to the voltage bus within each segment, and their output terminals are all connected to a common voltage sampling circuit. The central processing unit controls the on / off state of the n+2 first photorelays and four second photorelays, so that at any sampling time, only the voltage signal of a single battery cell in one battery segment is connected to the voltage sampling circuit.

[0006] The technical advantages of the method for detecting negative voltage and open circuit of a storage battery and judging battery performance disclosed in this invention are as follows: The central processing unit controls the time-sharing conduction of each photorelay, ensuring that at any given sampling moment, only the voltage signal of one individual battery in one battery segment is input to the sampling circuit. This reduces the total number of photorelays required to detect n individual batteries from 2n to n+6, significantly reducing hardware costs. Simultaneously, the inclusion of an input voltage divider network, bias voltage circuit, and voltage-limiting diodes in the voltage sampling circuit enables the inspection circuit to convert positive and negative bipolar input voltages into unipolar sampling voltages that the central processing unit can acquire. Automatic clamping protection is provided when the absolute value of the input voltage exceeds a preset threshold, effectively withstanding the impact of tens of volts of positive high voltage during charging and hundreds of volts of reverse negative voltage during discharging. This ensures that even under extreme fault conditions such as open circuits in the battery, the inspection circuit itself is protected, and abnormal voltage signals are accurately acquired to determine the location of the faulty battery.

[0007] Furthermore, the battery pack is divided into a first battery segment and a second battery segment, wherein the first battery segment includes a section numbered B starting from the negative terminal. 01 To B m The second battery segment includes a single-cell storage battery, and the second battery segment includes the cell numbered B. m+1 To B n The single-cell storage battery, where m is an integer greater than 1 and less than n-1.

[0008] Furthermore, the connection method of the first photorelay is as follows: Single-cell battery B 01 The negative terminal is connected to the first photorelay K. 01 The input terminal, its positive terminal is connected to the B cell of the single-cell battery. 02 The negative terminals are connected together to the first photorelay K. 02 The input terminals, and so on, until the individual battery B. n The positive terminal is connected to the first photorelay K. n+2 The input terminal; The output terminal of the first photorelay corresponding to the first battery segment is connected to the voltage bus of the first segment, and the output terminal of the first photorelay corresponding to the second battery segment is connected to the voltage bus of the second segment.

[0009] Furthermore, the central processing unit controls the on and off of the photorelay, specifically including: The central processing unit outputs a control signal so that when the two first photorelays corresponding to a certain single battery in the first battery segment are turned on, the two first photorelays corresponding to a certain single battery in the second battery segment are also turned on at the same time. The central processing unit controls the four second opto-relays via a level signal from an output port to select which signal on one of the segment voltage buses is connected to the voltage sampling circuit.

[0010] Furthermore, the central processing unit controls the four second optical relays through a level signal at an output port, specifically: When the output port is at a low level, the two second photorelays connected to the voltage bus in the first segment are turned on. When the output port is at a high level, the high level is inverted by an inverter and then drives the two second photorelays connected to the second segment's internal voltage bus to turn on.

[0011] Furthermore, the voltage sampling circuit includes an input voltage divider network, a differential amplifier circuit, and a bias voltage circuit; The bias voltage circuit provides a fixed DC bias voltage to the input terminal of the differential amplifier circuit, so that when the input single-cell battery voltage is negative, the output voltage after processing by the differential amplifier circuit is still within the effective acquisition range of the central processing unit.

[0012] Furthermore, the unipolar sampling voltage Vout output by the voltage sampling circuit satisfies the relationship Vout=Vref+Vin*k / M with respect to the input single-cell battery voltage Vin, where Vref is the DC bias voltage, k is the amplification factor of the differential amplifier circuit, and M is a constant related to the resistance value in the input voltage divider network.

[0013] Furthermore, a voltage limiting diode is connected in parallel at the input terminal of the voltage sampling circuit to clamp the voltage across the sampling resistor within a preset range when the absolute value of the input single-cell battery voltage Vin exceeds a preset threshold.

[0014] Furthermore, the central processing unit determines whether a single battery cell has an open-circuit fault based on the sampled voltage and the current operating status of the battery pack, specifically including: When the battery pack is in a charging state, if the voltage of a certain individual battery is higher than the first preset threshold and the voltages of the other individual batteries are within the normal range, it is determined that the individual battery has an open circuit fault. When the battery pack is in a discharging state, if the voltage of a certain individual battery is lower than the second preset threshold or is negative, while the voltages of the other individual batteries are within the normal range, then it is determined that the individual battery has an open circuit fault.

[0015] Furthermore, both the first optocoupler and the second optocoupler are optocouplers with an isolation voltage of not less than 400V between the primary and secondary sides. Attached Figure Description

[0016] Figure 1 This is a flowchart illustrating a method for detecting negative voltage and open circuit of a storage battery and judging battery performance according to an embodiment of the present invention. Figure 2 A schematic diagram of the principle of CPU controlling the first photorelay provided in an embodiment of the present invention; Figure 3 A simplified diagram of a voltage sampling and signal conditioning circuit provided in an embodiment of the present invention. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Existing battery inspection technologies typically measure the voltage across each individual cell directly, with the detection range generally set at 0. 3V. However, when an open-circuit fault occurs in a battery in a series-connected battery pack, especially during charging or discharging, an abnormally high or negative voltage will be generated across the faulty battery. For example, in a system of 110 batteries connected in series, the voltage across the open-circuit battery can reach approximately 24V during charging, and approximately -234V during discharging. This voltage, far exceeding the normal range, can easily burn out the sampling devices in the inspection circuit, making it impossible to detect the faulty battery, or even damaging the entire inspection equipment.

[0019] Based on this, embodiments of the present invention provide a method for detecting negative voltage and open circuit in a battery, and for judging battery performance. This method is applied to a battery pack consisting of n individual valve-regulated sealed lead-acid batteries with a rated voltage of 2V connected in series, where n can be 24, 55, 108, or 110, etc. The system includes a charger, a switch, a battery pack, a load, and a battery monitoring device. When the AC input is normal, the charger charges the battery pack and supplies power to the load; when the AC input is interrupted, the battery pack discharges to the load. The battery monitoring device monitors the voltage of each individual battery in real time under both states.

[0020] like Figure 1 As shown, the overall process of the method of the present invention includes the following steps: Step 1: Divide the n series-connected individual batteries into at least two battery segments; Step 2: Configure n+2 first photoelectric relays. Connect one input terminal to the positive and one to the negative terminals of each individual battery. Adjacent batteries share a common relay. Connect the output terminals to the voltage bus in the corresponding segment according to the segment. Step 3: Configure four second photorelays, with their input terminals connected to the voltage bus within each segment, and their output terminals connected to a common voltage sampling circuit. Step 4: The CPU controls the photorelay to conduct in a time-sharing manner, so that at any given moment only the voltage of one battery in one segment is connected to the voltage sampling circuit; Step 5: The voltage sampling circuit converts the input voltage into a unipolar sampling voltage, provides bias to handle negative voltage, and uses a voltage-limiting diode for clamping protection; Step 6: The CPU determines the open circuit fault based on the sampled voltage and operating status.

[0021] The following provides a detailed explanation of each step.

[0022] Step 1: Segmentation of the battery pack.

[0023] To reduce hardware overhead and improve interference immunity, the battery pack is divided into at least two battery segments. Taking 60 batteries as an example (n=60), they are numbered sequentially from the negative terminal to the positive terminal as B. 01 B 02 ...B 60 The individual battery cells are divided into two battery segments: First battery segment: includes single-cell battery B 01 To B 30 (i.e., m=30).

[0024] Second battery segment: includes single-cell battery B 31 To B 60 .

[0025] This embodiment uses only two segments as an example. For larger battery packs, they can be divided into more segments, but the principle is the same.

[0026] Step 2: Connecting the first photorelay.

[0027] To collect the voltage of each individual battery cell, n+2 first photorelays are used, which is 62 in this case, numbered K. 01 To K 62 The connection rules are as follows: Single-cell battery B 01 The negative terminal is connected to the first photorelay K.01 The input terminal; B 01 The positive extremes and B 02 The negative extremes are connected together to K 02 The input terminal; B 02 The positive extremes and B 03 The negative extremes are connected together to K 03 The input terminal; and so on, until B. 60 The positive end is connected to K 62 The input terminal.

[0028] Segment with the first battery (B) 01 B 30 Related K 01 To K 31 The output terminal is connected to the first internal voltage bus, with its positive terminal denoted as VinA+ and its negative terminal denoted as VinA-.

[0029] With the second battery segment (B) 31 B 60 ) Related K 32 To K 62 The output terminal is connected to the second internal voltage bus, with its positive terminal denoted as VinB+ and its negative terminal denoted as VinB-.

[0030] The selected first photoelectric relay model is TLP240GA, which has an output voltage withstand capability of up to 400V and an input-output isolation voltage effective value of 5000V, providing basic isolation and withstand voltage protection for the system.

[0031] Step 3: Connect the second photorelay to the voltage sampling circuit.

[0032] Four second optical relays were used, numbered K. 101 K 102 K 103 K 104 Combining Figure 3 As shown: Second optical relay K 101 and K 102 The input terminals are respectively connected to the positive terminal VinA+ and the negative terminal VinA- of the first segment internal voltage bus.

[0033] Second optical relay K 103 and K 104 The input terminals are connected to the positive terminal VinB+ and the negative terminal VinB- of the second segment's internal voltage bus, respectively.

[0034] The outputs of the four second photorelays are all connected to a common voltage sampling circuit.

[0035] The voltage sampling circuit includes the following parts: 1. Input voltage divider network: Current-limiting resistors R1 to R62, each with a resistance of 51kΩ, are connected in series with the input terminal of each first photorelay. After the second photorelay is turned on, the voltage signal is applied across the sampling resistor R106 (2kΩ) via current-limiting resistors R108 and R109 (both 1kΩ). For example... Figure 3 As shown, from K 101 / K 103 The signal comes from K via R108. 102 / K 104 The signal passes through R109 and acts together on the sampling resistor R106.

[0036] 2. Protection Circuit: A first voltage-limiting diode V1 and a second voltage-limiting diode V2 are connected in parallel across the sampling resistor R106 to clamp abnormal high voltage, such as... Figure 3 The voltage limiting diode D in the middle.

[0037] 3. Bias circuit: powered by a 1.65V reference voltage ( Figure 3 The bias voltage (VREF) is supplied to the positive input terminal of the differential amplifier through resistors R110 and R107. This bias voltage ensures that even if the input voltage is negative, the output voltage after differential amplification remains at 0. Between 3.3V.

[0038] 4. Differential amplifier circuit: It consists of operational amplifiers U1A and U1B, with a settable amplification factor k, and its output Vout is sent to the analog-to-digital converter (ADC) port of the CPU.

[0039] Step 4: Control timing of the central processing unit.

[0040] The central processing unit coordinates the control of multiple opto-relays to achieve time-division multiplexing sampling in the following way. Figure 2 This illustrates the principle by which the CPU controls the first photorelay via a decoder.

[0041] 1. Control of the first optical relays: The CPU controls 62 first optical relays through a decoder (such as 74HC138).

[0042] At sampling time T1, the CPU controls the first photorelay K to... 01 K 02 and K 32 K 33 Simultaneously activated. At this time, B... 01 The voltage signal is sent to the first internal voltage bus (VinA+ / VinA-), B 31 The voltage signal is sent to the second internal voltage bus (VinB+ / VinB-).

[0043] At sampling time T2, K 02 K 03 and K 33 K 34 Simultaneous conduction. B 02 and B 32 The voltage signals are sent to the corresponding buses respectively.

[0044] This process continues until time T30, at which point the work on B is completed. 30 and B 60 Sampling.

[0045] 2. Control of the second photorelay (bus selection): The CPU selects it through one of its I / O ports. A "break-before-make" control timing with dead time is used to prevent both sets of relays from conducting simultaneously due to inverter transmission delay during level switching, thus avoiding short circuits in different battery bus segments.

[0046] When this port outputs a low level, the second photorelay K 101 and K 102 When the circuit is turned on, the voltage signal on the first internal voltage bus (VinA+ / VinA-) is connected to the subsequent voltage sampling circuit.

[0047] When this port outputs a high level, it is inverted by the inverter and then drives K. 103 and K 104 When turned on, the voltage signal on the second internal voltage bus (VinB+ / VinB-) is connected to the subsequent voltage sampling circuit.

[0048] Hardware Connection and Interlocking Mechanism: The drive circuits for the four second photorelays incorporate interlocking logic at the hardware level. Specifically, the inverter output and the original I / O signal are combined using a dual-input NAND gate (such as a 74HC00). This ensures that when the I / O level changes, there is a fixed "simultaneously invalid" interval (dead time) between the two sets of drive signals. This interlocking logic guarantees that at most one set of second photorelays is active at any given time. Without hardware interlocking, the following software dead-time control method must be used.

[0049] Software dead-time control method (applicable to scenarios without hardware interlocks): When the CPU switches segments, it operates according to the following timing sequence: First, set the I / O port to a high-impedance input state (or output an invalid intermediate level), and at the same time turn off the drive power or enable signal of all second photorelays (if there is an independent enable pin); if there is no independently controllable enable pin, then by configuring the I / O port to a high-impedance state, use an external pull-down resistor (such as 10kΩ) to pull the inverter input low, thereby turning off both sets of relays.

[0050] Wait for a preset dead time (ranging from 500μs to 2ms, preferably 1ms), which is greater than the sum of the inverter’s maximum transmission delay (typically tens to hundreds of nanoseconds) and the opto-relay’s maximum turn-off time (approximately 200μs).

[0051] After the dead time ends, the CPU outputs the target level (high or low) from the I / O port to drive the target group relay to turn on.

[0052] Using the above method, the system first acquires B at time T1 by using a low level. 01 Voltage, then sampled via a high-level signal (B). 31 The voltage is then checked, and the cycle repeats until time T2. This bus multiplexing technology allows only n+6 photorelays to be used to detect n batteries, significantly reducing costs.

[0053] Step 5: Processing and Calculation of Voltage Signals.

[0054] The voltage sampling circuit converts the input single-cell battery voltage Vin into a unipolar sampling voltage Vout that is always positive. The conversion relationship follows the formula: Vout = 1.65 + Vin * k / 52; Where k is the amplification factor of the differential amplifier circuit.

[0055] By selecting different amplification factors k, the effective measurement range of the input voltage Vin can be set. For example, when k=2, the effective measurement range of Vin is approximately -42.9V to +42.9V, corresponding to a Vout range of 0V to 3.3V.

[0056] Protection mechanism: When Vin exceeds the above range (e.g., an open circuit fault causing excessively high voltage or excessively low negative voltage), the voltage limiting diode connected in parallel across the sampling resistor will conduct, clamping the voltage across the sampling resistor to approximately ±0.7V, thereby protecting the subsequent differential amplifier and CPU port.

[0057] Polarity handling: Due to the characteristics of circuit connections, for odd-numbered single-cell batteries (B... 01 B 03 ...), its Vin value presented on the bus is positive; for even-numbered single-cell batteries (B 02 B 04 ...), its Vin value presented on the bus is negative. During calculation, the CPU can automatically identify the original polarity of the voltage by sampling time and channel information, and perform reconstruction calculation in combination with 1.65V bias.

[0058] Step Six: Fault Diagnosis and Judgment Logic.

[0059] Based on the calculated individual battery voltage Vin and the current system operating state, the CPU executes the following judgment logic: 1. During charging, a certain single battery B... k Diagnosis of open circuit: Principle Analysis: Assume the total number of battery packs is n, and the charger output equalization voltage is approximately 2.35V*n. Since the k-th battery B... k With the circuit open, the charging circuit is disconnected, and there is actually no current. At this time, except for B... k The remaining n-1 batteries are in a resting state, with a terminal voltage of approximately the resting voltage of 2.15V. According to Kirchhoff's voltage law, the voltage UB across Bk is... k =2.35n-2.15(n-1)=0.2n+2.15(V).

[0060] Example calculation: When n=110, UB k =24.15V; when n=24, UB k =6.95V.

[0061] Diagnostic rule: When the battery pack is charging, if the calculated voltage Vin of a single battery cell is higher than a first preset voltage threshold (e.g., 3V), while the voltages of other single batteries cell voltages are within the normal float charging range (e.g., around 2.15V), then that battery cell is determined to have an open circuit fault or severely abnormal performance. In the design of this invention, even if Vin is as high as 24.15V, the system can accurately measure and safely handle the situation.

[0062] 2. Under discharge conditions, a certain single-cell battery B k Diagnosis of open circuit: Principle Analysis: Assume the total number of batteries in the battery pack is n, and they are in a discharging state. Because B... k With the circuit open and the main discharge circuit disconnected, the battery pack is essentially in a static state. (Except for B) k The terminal voltage of the n-1 batteries outside is approximately the resting voltage of 2.15V. The series voltage of these n-1 batteries is applied in reverse to B through the loop formed by the load resistor. k The two ends. Therefore, B k Voltage UB at both ends k =-2.15*(n-1)(V).

[0063] Example calculation: When n=110, UB k =-234.35V; when n=20, UB k =-40.85V.

[0064] Diagnostic rule: When the battery pack is in a discharging state, if the calculated voltage Vin of a certain individual battery is lower than the second preset voltage threshold (e.g., 0V), or even negative, while the voltages of other individual batteries are within the normal discharge range (e.g., 1.8V), then... If the voltage is below 2.1V, the battery is determined to have an open circuit fault or a serious performance abnormality.

[0065] The first preset voltage threshold (charging open circuit threshold) and the second preset voltage threshold (discharging open circuit threshold) involved in this method are not fixed values, but are based on the total number of series-connected batteries n and the rated voltage U of each individual battery. nom (Typical values ​​are 2V, 6V, or 12V) and dynamically calculated based on the charger's output voltage parameters. The specific calculation method is as follows: Among them, the first preset voltage threshold Vth in the charging state charge Calculation: When the battery pack is charging, the charger output voltage U char The typical value is: U char =n×U float U float For a single cell float charge voltage (for a 2V lead-acid battery, U...) float =2.23V 2.35V; for 6V or 12V batteries, convert proportionally.

[0066] If the k-th battery is open-circuited, then the remaining n-1 batteries are essentially in a static state, and their terminal voltage is approximately the static voltage U. rest (For a 2V lead-acid battery, U) rest ≈2.10V 2.15V). According to Kirchhoff's voltage law, the voltage Uopen across an open-circuit battery is... charge for: Uopen charge =U char -(n-1)×U rest ; First preset voltage threshold Vth charge It should be set slightly lower than Uopen. charge The calculated value is used to ensure reliable detection of open-circuit faults while avoiding false alarms caused by normal battery voltage fluctuations. The recommended calculation formula is: Vth charge =0.7×(U char -(n-1)×U rest )+0.3×U nom .

[0067] The second preset voltage threshold Vth under discharge conditions charge Calculation: When the battery pack is discharging, if the k-th battery is open-circuited, the remaining n-1 batteries will remain in a static state (because the circuit is open), and their terminal voltage will be approximately U. rest The series voltage of these n-1 batteries is applied in reverse through the load circuit to the open-circuit battery terminals, therefore the voltage Uopen that the open-circuit battery withstands is... charge for: Uopen charge =-(n-1)×U rest ; Second preset voltage threshold Vth charge It should be set slightly higher than Uopen. charge The calculated value (i.e., the "larger" value among negative values, for example, if the calculated value is -234V, the threshold can be set to -100V or 0V) is used to correctly identify open circuits while protecting the sampling circuit. The recommended calculation formula is: Vth charge =0.5×(-(n-1)×U rest ).

[0068] Protection Action: Taking n=20 as an example, a negative voltage of -40.85V is still within the effective measurement range for a circuit configuration with k=2. For the extreme negative voltage of -234.35V generated by n=110, although it exceeds the effective measurement range, the voltage-limiting diode will immediately conduct, clamping the voltage across the sampling resistor, making the output Vout close to 0V. The CPU collects a Vout value close to 0V, and combined with the information about the discharge status and the normal voltages of the other batteries, it can still accurately determine that this battery has experienced a severe reverse voltage, i.e., an open circuit fault.

[0069] Through the above method, the present invention not only achieves low-cost and high-reliability inspection of battery packs, but more importantly, it successfully solves the technical problem of protecting the inspection circuit itself and accurately locating the faulty battery under the extreme fault state of battery open circuit.

[0070] Example embodiments have been disclosed herein, and while specific terminology has been used, it is for illustrative purposes only and should be construed as such, and is not intended to be limiting. In some instances, it will be apparent to those skilled in the art that features, characteristics, and / or elements described in conjunction with particular embodiments may be used alone, or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the scope of the invention as set forth in the appended claims.

Claims

1. A method for detecting negative voltage and open circuit of a storage battery and judging battery performance, applied to a storage battery pack composed of n individual storage batteries connected in series, where n is an integer greater than 1, comprising: The battery pack is divided into at least two battery segments; The voltage signals of each individual battery are time-divisionally transmitted to the voltage sampling circuit through an array of photoelectric relays. The central processing unit controls the photorelay array and collects voltage signals to determine the status of individual battery cells; Its features are: The optical relay array includes n+2 first optical relays and four second optical relays; The positive and negative terminals of each individual battery are connected to the input terminal of a first opto-relay. The common connection terminal of two adjacent individual batteries shares the input terminal of a first opto-relay. The output terminal of each first opto-relay is connected to the corresponding segment voltage bus according to the battery segment to which the individual battery belongs. The input terminals of the four second optical relays are respectively connected to the voltage bus in each segment, and their output terminals are all connected to a common voltage sampling circuit. The central processing unit controls the on / off state of the n+2 first photorelays and four second photorelays, so that at any sampling time, only the voltage signal of a single battery cell in one battery segment is connected to the voltage sampling circuit.

2. The method according to claim 1, characterized in that, The battery pack is divided into a first battery segment and a second battery segment. The first battery segment includes a section numbered B starting from the negative terminal. 01 To B m The second battery segment includes a single-cell storage battery, and the second battery segment includes the cell numbered B. m+1 To B n The single-cell storage battery, where m is an integer greater than 1 and less than n-1.

3. The method according to claim 2, characterized in that, The connection method of the first photoelectric relay is as follows: Single-cell battery B 01 The negative terminal is connected to the first photorelay K. 01 The input terminal, its positive terminal is connected to the B cell of the single-cell battery. 02 The negative terminals are connected together to the first photorelay K. 02 The input terminals, and so on, until the individual battery B. n The positive terminal is connected to the first photorelay K. n+2 The input terminal; The output terminal of the first photorelay corresponding to the first battery segment is connected to the voltage bus of the first segment, and the output terminal of the first photorelay corresponding to the second battery segment is connected to the voltage bus of the second segment.

4. The method according to claim 1, characterized in that, The central processing unit controls the on / off state of the photorelay, specifically including: The central processing unit outputs a control signal so that when the two first photorelays corresponding to a certain single battery in the first battery segment are turned on, the two first photorelays corresponding to a certain single battery in the second battery segment are also turned on at the same time. The central processing unit controls the four second opto-relays via a level signal at an output port to select which signal on one of the segment voltage buses is connected to the voltage sampling circuit.

5. The method according to claim 4, characterized in that, The central processing unit controls the four second optical relays through a level signal at an output port, specifically: When the output port is at a low level, the two second photorelays connected to the voltage bus in the first segment are turned on. When the output port is at a high level, the high level is inverted by an inverter and then drives the two second photorelays connected to the second segment's internal voltage bus to turn on.

6. The method according to claim 1, characterized in that, The voltage sampling circuit includes an input voltage divider network, a differential amplifier circuit, and a bias voltage circuit. The bias voltage circuit provides a fixed DC bias voltage to the input terminal of the differential amplifier circuit, so that when the input single-cell battery voltage is negative, the output voltage after processing by the differential amplifier circuit is still within the effective acquisition range of the central processing unit.

7. The method according to claim 6, characterized in that, The unipolar sampling voltage Vout output by the voltage sampling circuit and the input single-cell battery voltage Vin satisfy the relationship Vout=Vref+Vin*k / M, where Vref is the DC bias voltage, k is the amplification factor of the differential amplifier circuit, and M is a constant related to the resistance value in the input voltage divider network.

8. The method according to claim 7, characterized in that, A voltage limiting diode is connected in parallel at the input terminal of the voltage sampling circuit. When the absolute value of the input single-cell battery voltage Vin exceeds a preset threshold, the voltage across the sampling resistor is clamped within a preset range.

9. The method according to claim 1, characterized in that, The central processing unit determines whether a single battery cell has an open-circuit fault based on the sampled voltage and the current operating status of the battery pack, specifically including: When the battery pack is in a charging state, if the voltage of a certain individual battery is higher than the first preset threshold and the voltages of the other individual batteries are within the normal range, it is determined that the individual battery has an open circuit fault. When the battery pack is in a discharging state, if the voltage of a certain individual battery is lower than the second preset threshold or is negative, while the voltages of the other individual batteries are within the normal range, then it is determined that the individual battery has an open circuit fault.

10. The method according to claim 1, characterized in that, Both the first opto-relay and the second opto-relay are optocouplers with an isolation voltage of not less than 400V between the primary and secondary sides.

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