A register data shift-in / shift-out device

Abstract

This application relates to the field of data processing, specifically a register data shifting device, comprising a register and a data mirror. Before process switching, the state data of the process to be processed is moved to the data mirror; during process switching, state data is transferred between the register and the data mirror; after process switching, the state data in the data mirror is saved. Multiple data mirrors can be configured, and a conversion register can also be included; the conversion register may include input registers and output registers; the data mirror may include input mirrors and output mirrors, and can utilize various communication connection methods, such as parallel communication and serial communication. This application, through these technical solutions, achieves efficient processing and saving of state data during process switching, thereby improving process switching efficiency.

Description

Technical Field

[0001] This application relates to the field of data processing, and in particular to a register data shifting device. Background Technology

[0002] In the field of computer technology, with the rapid development of information technology, various systems and devices have increasingly higher requirements for data processing capabilities and efficiency. Process management, as one of the core functions of an operating system, directly affects the overall system's operating efficiency and stability. Efficient process management enables systems to handle multitasking more smoothly, improves user experience, and plays a crucial role in many fields such as industrial control and intelligent devices.

[0003] In traditional process management techniques, process switching typically involves frequent reading and writing of data between memory and CPU registers. On one hand, during process switching, the current process's state data needs to be saved from registers to memory, and then the state data of the next process to be processed needs to be read from memory into registers. On the other hand, communication between registers and memory often employs parallel communication to ensure data transfer speed.

[0004] Traditional process switching consumes CPU resources, leading to decreased system performance. Frequent memory read and write operations not only increase the CPU load but also prolong process switching time, reducing system responsiveness. Summary of the Invention

[0005] To reduce the time occupied by process switching, this application provides a register data shifting in and out device.

[0006] The register data shift-in / shift-out device provided in this application adopts the following technical solution: A register data shifting device includes a register and a data mirror. Before switching processes, the status data of the processes to be processed is moved to the data mirror. During process switching, the status data in the data mirror is moved to the register, and the status data in the register is moved to the data mirror. After a process switch, the state data in the data mirror is saved.

[0007] By employing the above technical solution, the CPU executes the process corresponding to the state data in the register. Using the clock cycle of the currently executing process, the state data in the data mirror is saved, and the state data of the process to be processed is moved to the data mirror. When a process switch is needed, only one pulse signal / clock cycle is required to move the state data of the process to be processed into the register, completing the process switch.

[0008] Preferably, the data mirror is provided in multiple ways. At least one of the data mirrors is used to connect to the data stack using parallel communication. The data mirrors communicate serially.

[0009] By adopting the above technical solution, serial communication is used between data mirrors, which reduces the number of wires between data mirrors, thus reducing the area occupied by the wires between data mirrors and facilitating circuit design.

[0010] Preferably, it also includes a translation register. The translation register is used to connect to the data stack via parallel communication. The conversion register and the data mirror communicate serially. The data mirrors communicate serially.

[0011] By adopting the above technical solution, the conversion register is used to realize the conversion between serial and parallel communication, and to realize the communication between the data image and the data stack.

[0012] Preferably, the conversion register includes an input register and an output register. The input register is used to connect to the data stack via parallel communication, and the input register and the data mirror use serial communication. The output register is used to connect to the data stack using parallel communication, and the output register and the data mirror use serial communication.

[0013] By adopting the above technical solution, the conversion register is divided into an input register and an output register, which enables efficient and orderly management of process status data.

[0014] Preferably, the data mirroring includes an input mirror and an output mirror. Before switching processes, the status data of the process to be processed is moved to the input image. During process switching, the status data in the register is moved to the output image, and the status data in the input image is moved to the register. After the process is switched, the status data in the output image is saved.

[0015] By adopting the above technical solution, the data mirror is divided into input mirror and output mirror, and different mirrors are operated on at different stages, so as to manage the process status data efficiently and orderly.

[0016] Preferably, at least one of the input mirrors is used to connect to the data stack using parallel communication, and the input mirrors communicate with each other using serial communication. At least one of the output mirrors is used to connect to the data stack using parallel communication, and the output mirrors communicate serially with each other.

[0017] By adopting the above technical solution, the input mirror and output mirror communicate with the data stack in parallel to ensure efficient data interaction. Serial communication is used between the input mirrors and between the output mirrors, which helps reduce the number of wires between data mirrors, reduces the area occupied by these wires, and simplifies circuit design.

[0018] Preferably, it also includes a translation register. The translation register is used to connect to the data stack via parallel communication. The conversion register communicates serially with the input mirror, and the input mirrors communicate serially with each other. The conversion register and the output mirror communicate serially, and the output mirrors communicate serially with each other.

[0019] By adopting the above technical solution, the conversion register is used to realize the conversion between serial and parallel communication, and to realize the communication between the data image and the data stack.

[0020] Preferably, the conversion register includes an input register and an output register. The input register is used to connect to the data stack via parallel communication, and the input register communicates serially with the input mirror. The output register is used to connect to the data stack using parallel communication, and the output register and the output mirror use serial communication.

[0021] By adopting the above technical solution, the conversion register is divided into an input register and an output register, which enables efficient and orderly management of process status data.

[0022] Preferably, the data mirror and the register communicate in parallel.

[0023] By adopting the above technical solution, efficient communication between the data mirror and the register enables the transfer of the status data of the process to be processed to the register and complete the process switching with only one pulse signal / clock cycle.

[0024] In summary, this application includes at least one of the following beneficial technical effects: By transferring and saving state data between registers and data mirrors before and after process switching, the CPU usage of process switching is reduced, and the response speed of process switching is accelerated. Serial communication is used between data mirrors, which reduces the number of wires between data mirrors, thus reducing the area occupied by the wires and facilitating circuit design. Attached Figure Description

[0025] Figure 1 This is a structural block diagram of the register data shifting in and out device in Embodiment 1 of this application; Figure 2 This is a structural block diagram of the register data shifting in and out device in Embodiment 2 of this application; Figure 3 This is a structural block diagram of the register data shifting in and out device in Embodiment 3 of this application; Figure 4 This is a structural block diagram of the register data shifting in and out device in Embodiment 4 of this application; Figure 5 This is a structural block diagram of the register data shifting in and out device in Embodiment 5 of this application; Figure 6 This is a structural block diagram of the register data shifting in and out device in Embodiment 6 of this application; Figure 7 This is a structural block diagram of the register data shifting in and out device in Embodiment 7 of this application; Figure 8 This is a structural block diagram of the register data shifting in and out device in Embodiment 8 of this application.

[0026] Explanation of reference numerals in the attached diagram: 1. Register; 2. Data mirror; 21. Input mirror; 22. Output mirror; 3. Transition register; 31. Input register; 32. Output register. Detailed Implementation

[0027] The present application will be further described in detail below with reference to the accompanying drawings.

[0028] Reference Figure 1 This application discloses a register data shifting device, which mainly adopts a scheme of transferring process state data between register 1 and data mirror 2, thereby reducing the CPU usage caused by process switching and optimizing circuit design.

[0029] Example 1 of this application A register data shifting device includes a register 1 and a data mirror 2. Before a process switch, the state data of the process to be processed is moved to the data mirror 2, thus preparing the state data of the process in advance and avoiding reading from memory during the process switch, reducing the CPU load during process switching. During a process switch, the state data in the data mirror 2 is moved to the register 1, and the state data in the register 1 is moved to the data mirror 2, thus quickly completing the process state replacement. After the process switch, the state data in the data mirror 2 is saved for later use.

[0030] Specifically, Register 1 is a component in a computer used for temporary data storage. It can be manufactured using high-speed semiconductor materials, resulting in fast read and write speeds. Common types of Register 1 include General-Purpose Register 1 and Special-Purpose Register 1. For example, General-Purpose Register 1 can be used to store computational data, while Special-Purpose Register 1 can be used to store specific control information. Data Mirror 2 can be seen as a backup of process state data. Data Mirror 2 can use the same hardware as Register 1 to achieve fast data storage and retrieval. In terms of connectivity, Data Mirror 2 and Register 1 use parallel communication to improve data transmission speed, enabling rapid transfer of process state data between the two.

[0031] This method of combining Register 1 and Data Mirror 2 works by first storing the state data of the process to be processed in Data Mirror 2 before the process switch, then quickly exchanging data between Register 1 and Data Mirror 2 during the switch, and finally saving the data after the switch. The combined effect is to reduce CPU read / write operations during process switching, thus improving the speed of process switching. Because the data is stored in Data Mirror 2 in advance, it does not need to be read from memory during the switch, reducing memory read / write time and CPU workload.

[0032] Register 1 has multiple registers, and each data mirror 2 corresponds one-to-one with a register 1. At least one data mirror 2 is used to connect to the data stack via parallel communication to enable fast data interaction with the data stack and improve data transmission efficiency. Data mirror 2s use serial communication to reduce the number of wires between them, which helps to reduce the area occupied by the wires and facilitates circuit design.

[0033] Parallel communication to data mirror 2 of the data stack can be achieved using high-speed data lines to ensure rapid data transmission. Serial communication between data mirrors 2 can utilize simple serial interfaces, such as SPI, reducing the need for wiring.

[0034] When all data mirrors 2 are connected end-to-end in a ring, one data mirror 2 can be used to connect to the data stack using parallel communication. Figure 1 In (a) of the above, when all data mirrors 2 are connected end-to-end in a linear fashion, both the first and last data mirrors 2 are used to connect to the data stack using parallel communication [e.g., ...]. Figure 1 (b) in the middle.

[0035] Example 2 of this application The difference from Embodiment 1 is that the register data shifting device further includes a conversion register 3. The conversion register 3 is used to connect to the data stack via parallel communication to enable rapid data exchange with the data stack. The conversion register 3 and the data mirror 2 communicate via serial communication.

[0036] Specifically, conversion register 3 serves as a buffer and convertor for data. It can convert parallel data received from the data stack into serial data for communication with data mirror 2; conversely, it can convert serial data received from data mirror 2 into parallel data before sending it to the data stack. Conversion register 3 can be implemented using a dedicated integrated circuit chip, offering high conversion speed and stability.

[0037] When all data mirrors 2 are connected end-to-end in a ring, one data mirror 2 can be connected to the conversion register 3 via serial communication. When all data mirrors 2 are connected end-to-end in a linear shape, both the first and last data mirrors 2 are connected to the conversion register 3 via serial communication.

[0038] Example 3 of this application The difference from Embodiment 2 is that the conversion register 3 includes an input register 31 and an output register 32. The input register 31 is used to connect to the data stack using parallel communication, and the input register 31 and the data mirror 2 use serial communication; the output register 32 is used to connect to the data stack using parallel communication, and the output register 32 and the data mirror 2 use serial communication.

[0039] Specifically, input register 31 is mainly responsible for receiving parallel data from the data stack and converting it into serial data before sending it to data mirror 2. Output register 32 is responsible for receiving serial data from data mirror 2 and converting it into parallel data before sending it to the data stack.

[0040] When all data mirrors 2 are connected end to end in a ring: it is possible that the same data mirror 2 is connected to the input register 31 and the output register 32 via serial communication; or it is possible that one data mirror 2 is connected to the input register 31 via serial communication and the other data mirror 2 is connected to the output register 32 via serial communication.

[0041] Example 4 of this application The difference from Embodiment 1 is that data mirror 2 includes input mirror 21 and output mirror 22. Before process switching, the status data of the process to be processed is moved to input mirror 21; during process switching, the status data in register 1 is moved to output mirror 22, and the status data in input mirror 21 is moved to register 1; after process switching, the status data in output mirror 22 is saved.

[0042] Specifically, input mirror 21 is used to store the status data of the process to be processed. Output mirror 22 is used to store the status data of the switched-out process. Serial communication is used between input mirrors 21 and between output mirrors 22 to reduce the area occupied by the wires.

[0043] At least one input mirror 21 is used to connect to the data stack using parallel communication, and at least one output mirror 22 is used to connect to the data stack using parallel communication.

[0044] Example 5 of this application The difference from Embodiment 4 is that the register data shifting device further includes a conversion register 3. The conversion register 3 is used to connect to the data stack via parallel communication to enable rapid data exchange with the data stack. The conversion register 3 communicates serially with the input mirror 21 and the output mirror 22.

[0045] Example 6 of this application The difference from Embodiment 5 is that the conversion register 3 includes an input register 31 and an output register 32. The input register 31 is used to connect to the data stack using parallel communication, and the input register 31 communicates serially with the input mirror 21; the output register 32 is used to connect to the data stack using parallel communication, and the output register 32 communicates serially with the output mirror 22.

[0046] Example 7 of this application The difference from Embodiment 1 is that any data mirror 2 is used to connect to the data stack using parallel communication.

[0047] Example 8 of this application The difference from Embodiment 7 is that the data mirror 2 includes an input mirror 21 and an output mirror 22.

[0048] Before process switching, the status data of the process to be processed is moved to input mirror 21; during process switching, the status data in register 1 is moved to output mirror 22, and the status data in input mirror 21 is moved to register 1; after process switching, the status data in output mirror 22 is saved.

[0049] Specifically, input mirror 21 is used to store the status data of the process to be processed. Output mirror 22 is used to store the status data of the switched-out process. Either input mirror 21 is used to connect to the data stack via parallel communication; either output mirror 22 is used to connect to the data stack via parallel communication.

[0050] The implementation principle of the register data shifting in / out device in this application embodiment is as follows: by reasonably transferring process state data between register 1 and data mirror 2, the clock cycle required for process switching is shortened, which helps to improve system performance. At the same time, by adopting a combination of parallel and serial communication, both the data interaction efficiency with the data stack is guaranteed, and the area occupied by the wires between data mirror 2 is reduced, thus optimizing the circuit design.

[0051] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A register data move-in / move-out apparatus, characterized by comprising: Includes registers (1) and data mirror (2): Before switching processes, the status data of the process to be processed is moved to the data mirror (2). During process switching, the status data in the data mirror (2) is moved to the register (1), and the status data in the register (1) is moved to the data mirror (2). After the process is switched, the status data in the data mirror (2) is saved.

2. The register data shift-in shift-out device of claim 1, wherein, The data mirror (2) has multiple mirrors. At least one of the data mirrors (2) is used to connect to the data stack using parallel communication. The data mirrors (2) communicate serially with each other.

3. The register data shifting-in / shift-out device according to claim 1, characterized in that, It also includes a translation register (3). The conversion register (3) is used to connect to the data stack using parallel communication. The conversion register (3) and the data mirror (2) communicate serially. The data mirrors (2) communicate serially with each other.

4. The register data shifting-in / shift-out device according to claim 1, characterized in that, The conversion register (3) includes an input register (31) and an output register (32). The input register (31) is used to connect to the data stack via parallel communication, and the input register (31) communicates serially with the data mirror (2). The output register (32) is used to connect to the data stack using parallel communication, and the output register (32) communicates serially with the data mirror (2).

5. The register data shifting in and out device according to claim 1, characterized in that, The data mirror (2) includes an input mirror (21) and an output mirror (22). Before switching processes, the status data of the process to be processed is moved to the input image (21). During process switching, the status data in register (1) is moved to the output mirror (22), and the status data in the input mirror (21) is moved to register (1). After the process is switched, the status data in the output image (22) is saved.

6. The register data shift-in / shift-out device according to claim 5, characterized in that, At least one of the input mirrors (21) is used to connect to the data stack using parallel communication, and the input mirrors (21) communicate serially with each other. At least one of the output mirrors (22) is used to connect to the data stack using parallel communication, and the output mirrors (22) communicate serially with each other.

7. The register data shifting in and out device according to claim 5, characterized in that, It also includes a translation register (3). The conversion register (3) is used to connect to the data stack using parallel communication. The conversion register (3) communicates serially with the input mirror (21), and the input mirrors (21) communicate serially with each other. The conversion register (3) and the output mirror (22) communicate serially, and the output mirrors (22) communicate serially with each other.

8. The register data shifting in and out device according to claim 7, characterized in that, The conversion register (3) includes an input register (31) and an output register (32). The input register (31) is used to connect to the data stack via parallel communication, and the input register (31) communicates serially with the input mirror (21). The output register (32) is used to connect to the data stack using parallel communication, and the output register (32) and the output mirror (22) use serial communication.

9. The register data shift-in / shift-out device according to any one of claims 1, characterized in that, Any of the data mirrors (2) is used to connect to the data stack using parallel communication.

10. The register data shifting-in / shifting-out apparatus according to any one of claims 1-9, characterized in that, The data mirror (2) and the register (1) communicate in parallel.

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