Delay unit and ring oscillator
By using a delay unit composed of an input MOSFET and a current source in the ring oscillator, the problem of frequency instability in traditional ring oscillators is solved, thereby improving frequency stability and cost-effectiveness.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CRM ICBG (WUXI) CO LTD
- Filing Date
- 2024-12-27
- Publication Date
- 2026-06-30
AI Technical Summary
The oscillation frequency of traditional ring oscillators is not stable enough and is easily affected by power supply voltage fluctuations and ambient temperature changes, which limits their application in systems that require high-stability oscillation signals.
The delay unit structure, which includes an input MOSFET, a first current source, a second current source, and an output capacitor, is adopted. The charging and discharging current is controlled by adjusting the gate voltage to adjust the delay time, thereby forming a ring oscillator to reduce dependence on the power supply voltage.
It improves the stability of the oscillation frequency, simplifies the delay unit structure, reduces chip area and cost, and can generate higher frequency oscillation signals while reducing power consumption.
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Figure CN122316218A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit technology, and in particular to a delay unit and a ring oscillator. Background Technology
[0002] Ring oscillators are widely used in microcontroller units (MCUs) as internal clock sources to provide system clock signals due to their simple circuit structure, ease of integration, and low cost.
[0003] Figure 1 A schematic diagram of a conventional ring oscillator 100 is shown. (See diagram below.) Figure 1 As shown, a conventional ring oscillator 100 typically consists of multiple inverters IN connected in a chain, with the output of the last stage feeding back to the input of the first stage, thus forming a closed loop. Each inverter IN acts as a delay unit 110 in the circuit. By adjusting the number and characteristics of the delay units 110, the frequency of the output signal of the ring oscillator 110 can be adjusted.
[0004] However, in practical applications, the oscillation frequency of this conventional ring oscillator 110 is often not stable enough, mainly affected by power supply voltage fluctuations and ambient temperature changes, which limits its application in systems that require high-stability oscillation signals. Summary of the Invention
[0005] The purpose of this application is to provide a delay unit and a ring oscillator that can solve at least one of the technical problems mentioned in the prior art.
[0006] One aspect of this application provides a delay unit applied to a ring oscillator. The delay unit includes an input MOSFET, a first current source, a second current source, and an output capacitor. One of the source and drain terminals of the input MOSFET is connected to the first current source and a first terminal of the output capacitor, serving as the output terminal of the delay unit. The second terminal of the output capacitor is grounded. The other of the source and drain terminals of the input MOSFET is connected to the second current source. The gate of the input MOSFET serves as the input terminal of the delay unit. When the input MOSFET is off, the first current source provides a charging current to the output capacitor. When the input MOSFET is on, the second current source provides a discharging current to the output capacitor.
[0007] Furthermore, the input MOS transistor is an input NMOS transistor, wherein the drain of the input NMOS transistor is connected to the first current source and the first terminal of the output capacitor, and the source of the input NMOS transistor is connected to the second current source.
[0008] Furthermore, the first current source includes a PMOS transistor, wherein the source of the PMOS transistor is connected to a power supply voltage, the drain of the PMOS transistor is connected to the drain of the input NMOS transistor, and the gate of the PMOS transistor is connected to a first gate voltage.
[0009] Furthermore, the magnitude of the charging current of the delay unit is changed by adjusting the magnitude of the first gate voltage, thereby changing the delay time of the delay unit.
[0010] Furthermore, the second current source includes an NMOS transistor, wherein the source of the NMOS transistor is grounded, the drain of the NMOS transistor is connected to the source of the input NMOS transistor, and the gate of the NMOS transistor is connected to a second gate voltage.
[0011] Furthermore, the magnitude of the discharge current of the delay unit is changed by adjusting the magnitude of the second gate voltage, thereby changing the delay time of the delay unit.
[0012] Furthermore, the delay time of the delay unit is related to the turn-on voltage of the input MOSFET, but not to the power supply voltage.
[0013] Another aspect of this application provides a ring oscillator. The ring oscillator includes a plurality of cascaded delay units as described above, wherein the output of any stage of the delay unit is connected to the input of the next stage of the delay unit.
[0014] Furthermore, the number of cascaded delay units includes an odd number.
[0015] Furthermore, when the charging current provided by the first current source is equal to the discharging current provided by the second current source, the oscillation frequency of the ring oscillator is:
[0016]
[0017] Among them, f osc C is the oscillation frequency of the ring oscillator. L For the output capacitance of each stage of the delay unit, V TH Where I is the turn-on voltage of the input MOSFET, N is the number of cascaded delay units, and I... B For bias current, I P The charging current provided by the first current source, I N The discharge current provided to the second current source.
[0018] The delay time of the delay unit in this application is related to the turn-on voltage of the input MOSFET, but not to the power supply voltage. By using such a delay unit, the ring oscillator of this application makes its oscillation frequency related to the turn-on voltage of the input MOSFET, but not to the power supply voltage. Therefore, the oscillation frequency of the ring oscillator of this application will not be affected by power supply voltage fluctuations, thus improving the stability of the oscillation frequency.
[0019] The ring oscillator of this application uses an input MOS transistor instead of an inverter to form the delay unit structure, which saves components, simplifies the structure of the delay unit, and makes the structure of the ring oscillator simpler, reducing the required chip area and effectively reducing chip cost.
[0020] The ring oscillator of this application can generate higher frequency oscillation signals and consumes less power. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of a traditional ring oscillator.
[0022] Figure 2 This is a schematic diagram of the structure of a flow-controlled ring oscillator in related technologies.
[0023] Figure 3 This is a schematic diagram of the structure of a ring oscillator according to an embodiment of this application. Detailed Implementation
[0024] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses consistent with some aspects of this application as detailed in the appended claims.
[0025] Figure 2 A schematic diagram of a flow-controlled ring oscillator 200 in related technologies is shown. For example... Figure 2 As shown, the flow-controlled ring oscillator 200 in Figure 1 Based on the conventional inverter structure shown, a current source structure, namely a first current source P and a second current source N, is introduced into each delay unit 210. The bias current of the inverter IN is controlled by the first current source P and the second current source N of each delay unit 210, thereby adjusting the output capacitor C of each delay unit 210. L The charging and discharging speed is adjusted to control the frequency of the output signal of the ring oscillator 200.
[0026] Specifically, for each delay unit 210, the time it takes for the output of the inverter IN to go from a low level ("0") to a high level ("1") is called the high propagation delay time t. r The time it takes for the output of the inverter IN to go from a high level ("1") to a low level ("0") is called the low propagation delay time t. f Among them, the high propagation delay time t r and low propagation delay time t f The charging current I provided by the first current source P P The discharge current I provided by the second current source N N Control, which can be represented as:
[0027]
[0028] Among them, C L V represents the output capacitance of each delay unit 210. M V represents the threshold voltage of the inverter IN. DD This is the power supply voltage.
[0029] Therefore, the average delay time T of each delay unit 310 D for:
[0030]
[0031] Assume the charging current I provided by the first current source P P The discharge current I provided by the second current source N N If they are matched, their currents are equal. Let I P =I N =I B If the flow-controlled ring oscillator 200 uses N-stage delay units 210, then the oscillation frequency f of the flow-controlled ring oscillator 200 is... osc It can be represented as:
[0032]
[0033] Among them, T OSC The oscillation period of the flow-controlled ring oscillator 200 is represented by N, which represents the number of cascaded delay units 210.
[0034] Therefore, the current-controlled ring oscillator 200 can control the bias current I of the delay unit 210. B To change the delay time T of delay unit 310 D This achieves the frequency (i.e., oscillation frequency f) of the output signal of the flow-controlled ring oscillator 200. osc ) control.
[0035] The current-controlled ring oscillator 200 improves frequency stability to some extent by adding a current source connected to the inverter IN. However, as can be seen from the above formula (4), the oscillation frequency f of the current-controlled ring oscillator 200 is still low. osc Still related to the power supply voltage V DD Therefore, the oscillation frequency f of the flow-controlled ring oscillator 200 is related. osc It will still be affected by the power supply voltage V DD The fluctuations affect the oscillation frequency f of the flow-controlled ring oscillator 200. osc The stability of the flow-controlled ring oscillator 200 is affected; moreover, the delay unit 310 of the flow-controlled ring oscillator 200 is constructed by an inverter IN, which increases the structural complexity, increases the chip area, and increases the chip cost.
[0036] In view of this, this application provides an improved delay unit and a ring oscillator for use in a ring oscillator, which can solve at least one of the technical problems mentioned in the above-mentioned related technologies.
[0037] The delay unit and ring oscillator of this application will now be described in detail with reference to the accompanying drawings. Unless otherwise specified, the features of the following embodiments and implementations can be combined with each other.
[0038] Figure 3 A schematic diagram of the structure of a ring oscillator 300 according to one embodiment of this application is shown. Figure 3 As shown, a ring oscillator 300 in one embodiment of this application may include a plurality of cascaded delay units 310.
[0039] The number of cascaded delay units 310 includes an odd number. Figure 3 In the illustrated embodiment, the ring oscillator 300 of this application includes five cascaded delay units 310, namely a first-stage delay unit 311, a second-stage delay unit 312, a third-stage delay unit 313, a fourth-stage delay unit 314, and a fifth-stage delay unit 315. It is understood that... Figure 3 The five cascaded delay units 310 shown are merely an example of the ring oscillator 300 of this application. However, the number of cascaded delay units 310 included in the ring oscillator 300 of this application is not limited to five. In other embodiments, the number of cascaded delay units 310 of this application may also include three or other numbers. These minor changes do not change the inventive nature of this application and are all within the protection scope of this application.
[0040] In this system, the output of any stage delay unit 310 is connected to the input of the next stage delay unit 310, thus forming a closed loop. For example, for Figure 3In the case of the five cascaded delay units 310 shown, the output of the first-stage delay unit 311 is connected to the input of the second-stage delay unit 312, the output of the second-stage delay unit 312 is connected to the input of the third-stage delay unit 313, the output of the third-stage delay unit 313 is connected to the input of the fourth-stage delay unit 314, the output of the fourth-stage delay unit 314 is connected to the input of the fifth-stage delay unit 315, and the output of the fifth-stage delay unit 315 is then connected back to the input of the first-stage delay unit 311, thus forming a closed loop.
[0041] Each stage of the delay unit 310 includes an input MOSFET M, a first current source P, a second current source N, and an output capacitor C. L For example, the first-stage delay unit 311 includes an input MOSFET M1, a first current source P1, a second current source N1, and an output capacitor C1; the second-stage delay unit 312 includes an input MOSFET M2, a first current source P2, a second current source N2, and an output capacitor C2; the third-stage delay unit 313 includes an input MOSFET M3, a first current source P3, a second current source N3, and an output capacitor C3; the fourth-stage delay unit 314 includes an input MOSFET M4, a first current source P4, a second current source N4, and an output capacitor C4; and the fifth-stage delay unit 315 includes an input MOSFET M5, a first current source P5, a second current source N5, and an output capacitor C5.
[0042] The input MOSFET M is responsible for the input and output of the oscillation signal and also acts as a switch. One of the source and drain terminals of the input MOSFET M is connected to the first current source P and the output capacitor C. L The first terminal is used as the output terminal of the delay unit 310, and the output capacitor C L The second terminal is grounded; the other terminal of the source and drain of the input MOSFET M is connected to the second current source N; the gate of the input MOSFET M serves as the input terminal of the delay unit 310.
[0043] In one embodiment, the input MOSFET M is an input NMOS transistor. The drain of the input NMOS transistor is connected to the first current source P and the output capacitor C. L The first terminal is connected to the source of the NMOS transistor, which is connected to the second current source N.
[0044] The first current source P of each stage delay unit 310 provides bias current for the output capacitor C of that stage delay unit 310. L Provides charging current. When the input MOSFET M is turned off, the first current source P can be the output capacitor C. L Provides charging current.
[0045] The second current source N of each stage delay unit 310 provides bias current for the output capacitor C of that stage delay unit 310.L It provides discharge current. When the input MOSFET M is turned on, the second current source N can be the output capacitor C. L Provides discharge current.
[0046] In some embodiments, the first current source P of each delay unit 310 includes a PMOS transistor. The source of the PMOS transistor in each delay unit 310 is connected to a power supply voltage V. DD The drain of the PMOS transistor is connected to the drain of the input MOS transistor M, and the gate of the PMOS transistor is connected to the first gate voltage VBP. The PMOS transistor is controlled by the first gate voltage VBP.
[0047] In some embodiments, the second current source N includes an NMOS transistor. The source of the NMOS transistor is grounded, the drain of the NMOS transistor is connected to the source of the input MOS transistor M, and the gate of the NMOS transistor is connected to a second gate voltage VBN, and the NMOS transistor is controlled by the second gate voltage VBN.
[0048] By adjusting the magnitude of the first gate voltage VBP of the first current source P, the magnitude of the charging current of the delay unit 310 can be changed, thereby changing the delay time of the delay unit 310; by adjusting the magnitude of the second gate voltage VBN of the second current source N, the magnitude of the discharging current of the delay unit 310 can be changed, thereby changing the delay time of the delay unit 310.
[0049] The working principle of the ring oscillator 300 of this application will be explained in detail below, taking the ring oscillator 300 of this application, which includes five cascaded delay units 310, as an example.
[0050] Assuming the initial state, the input voltage of the first-stage delay unit 311 (i.e., the gate voltage of the input MOSFET M1) is low. At this time, the input MOSFET M1 is off, and the bias current provided by the first current source P1 in the first-stage delay unit 311 charges the output capacitor C1 of the first-stage delay unit 311. When the input voltage of the second-stage delay unit 312 (i.e., the gate voltage of the input MOSFET M2) charges to the turn-on voltage of the input MOSFET M2, the input MOSFET M2 turns on, and the input voltage of the third-stage delay unit 313 (i.e., the gate voltage of the input MOSFET M3) flips to low. At this time, the input MOSFET... When M3 is turned off, the bias current provided by the first current source P3 in the third-stage delay unit 313 charges the output capacitor C3 of the third-stage delay unit 313. When the input voltage of the fourth-stage delay unit 314 (i.e., the gate voltage of the input MOSFET M4) is charged to the turn-on voltage of the input MOSFET M4, the input MOSFET M4 turns on, and the input voltage of the fifth-stage delay unit 315 (i.e., the gate voltage of the input MOSFET M5) flips to a low level. At this time, the input MOSFET M5 is turned off, and the bias current provided by the first current source P5 in the fifth-stage delay unit 315 charges the output capacitor C5 of the fifth-stage delay unit 315.
[0051] The output of the fifth-stage delay unit 315 is connected back to the input of the first-stage delay unit 311. When the output capacitor C5 of the fifth-stage delay unit 315 charges, causing the input voltage of the first-stage delay unit 311 (i.e., the gate voltage of the input MOSFET M1) to charge to the turn-on voltage of the input MOSFET M1, the input MOSFET M1 turns on, and the input voltage of the second-stage delay unit 312 (i.e., the gate voltage of the input MOSFET M2) flips to a low level; at this time, the input MOSFET M2 is turned off, and the bias current provided by the first current source P2 in the second-stage delay unit 312 charges the output capacitor C2 of the second-stage delay unit 312; when the input voltage of the third-stage delay unit 313 (i.e., the gate voltage of the input MOSFET M3) charges to the turn-on voltage of the input MOSFET M1, the input voltage of the second-stage delay unit 312 turns on. When the turn-on voltage of transistor M3 is reached, input MOSFET M3 turns on, and the input voltage of the fourth-stage delay unit 314 (i.e., the gate voltage of input MOSFET M4) flips to a low level. At this time, input MOSFET M4 is turned off, and the bias current provided by the first current source P4 in the fourth-stage delay unit 314 charges the output capacitor C4 of the fourth-stage delay unit 314. When the input voltage of the fifth-stage delay unit 315 (i.e., the gate voltage of input MOSFET M5) is charged to the turn-on voltage of input MOSFET M5, input MOSFET M5 turns on, and the input voltage of the first-stage delay unit 311 (i.e., the gate voltage of input MOSFET M1) is flipped to a low level again. This completes one cycle. Then, the above steps are repeated to form an oscillation.
[0052] Assuming that the charging current provided by the first current source P and the discharging current provided by the second current source N in each stage of the delay unit 310 are equal, and that they are both equal to the bias current, i.e.
[0053] I P =I N =I B (5)
[0054] Among them, I P The charging current I provided by the first current source P of each delay unit 310 N The discharge current I provided by the second current source N of each delay unit 310 B This is the bias current.
[0055] Therefore, according to the law of charge conservation, the charge Q1 provided by each stage of delay unit 310 is equal to the output capacitance C of each stage of delay unit 310. L The amount of charge stored on it is Q2. The amount of charge provided by each stage delay unit 310 is Q1 = T. D ×I B The output capacitor C of each delay unit 310 L The amount of charge stored on it is Q2 = C L V TH Therefore, the delay time of each delay unit 310 can be obtained as follows:
[0056]
[0057] Among them, T D C represents the delay time of each delay unit 310. L V represents the output capacitance of each delay unit 310. TH This represents the turn-on voltage of the input MOSFET in each delay unit 310.
[0058] Therefore, the oscillation frequency f of the ring oscillator 300 can be obtained. osc for:
[0059]
[0060] Among them, T OSC The value represents the oscillation period of the ring oscillator 300, and N represents the number of cascaded delay units 310.
[0061] Therefore, the ring oscillator 300 of this application can change the charging current I of each stage delay unit 310 by adjusting the magnitude of the first gate voltage VBP connected to the first current source P and the second gate voltage VBN connected to the second current source N. P and discharge current I N The size of the delay unit 310 is adjusted to change its delay time T.D To achieve the frequency of the output signal of the ring oscillator 300 (i.e., the oscillation frequency f). osc The purpose of ).
[0062] As can be seen from formula (5) above, the delay time T of each delay unit 310 in this application is... D With the turn-on voltage V of the input MOSFET M TH Related to, and related to, the power supply voltage V DD Irrelevant. Therefore, the resulting oscillation frequency f of the ring oscillator 300... osc The formula is shown in formula (7) above. The oscillation frequency f of the ring oscillator 300 of this application is... osc With the turn-on voltage V of the input MOSFET M TH Related to, and related to, the power supply voltage V DD Irrelevant, therefore, the oscillation frequency f of the ring oscillator 300 of this application osc It will not be affected by the power supply voltage V DD The effect of fluctuations increases the oscillation frequency f osc Stability.
[0063] Compared to Figure 2 As shown in the flow-controlled ring oscillator 200 formed by inverters to form delay units 210, the ring oscillator 300 of this application uses input MOS transistors M to replace inverters to form the structure of delay units 310, thereby saving components, simplifying the structure of delay units 310, and making the structure of ring oscillator 300 simpler, reducing the required chip area, and effectively reducing chip cost.
[0064] In addition, the turn-on voltage V of the input MOSFET M is twice that of conventional processes. TH Less than the power supply voltage V DD , i.e. 2V TH <V DD As can be seen from the comparison of formulas (4) and (7) above, the smaller the denominator, the higher the oscillation frequency f. osc The larger the value, the better, therefore, relative to Figure 2 Compared with the flow-controlled ring oscillator 200 shown, the ring oscillator 300 of this application can generate oscillation signals at higher frequencies.
[0065] Furthermore, a comparison of formulas (4) and (7) above reveals that at the generated oscillation frequency f osc Under certain conditions, due to twice the turn-on voltage V of the input MOSFET M TH Less than the power supply voltage V DD , i.e. 2V TH <V DD The smaller the denominator, the lower the required bias current I.B It can also be smaller, therefore, relative to Figure 2 For the current-controlled ring oscillator 200 shown, the required bias current I of the ring oscillator 300 of this application is... B Smaller size means that the power consumption of the ring oscillator 300 in this application will be lower.
[0066] The delay unit and ring oscillator provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the delay unit and ring oscillator of the embodiments of this application. The description of the above embodiments is only for the purpose of helping to understand the core idea of this application and is not intended to limit this application. It should be noted that for those skilled in the art, several improvements and modifications can be made to this application without departing from the spirit and principles of this application, and all such improvements and modifications should fall within the protection scope of the appended claims.
Claims
1. A delay unit applied to a ring oscillator, characterized by, It includes an input MOSFET, a first current source, a second current source, and an output capacitor, among which, One of the source and drain terminals of the input MOSFET is connected to the first current source and the first terminal of the output capacitor, serving as the output terminal of the delay unit; the second terminal of the output capacitor is grounded; the other of the source and drain terminals of the input MOSFET is connected to the second current source; the gate terminal of the input MOSFET serves as the input terminal of the delay unit. When the input MOSFET is turned off, the first current source is used to provide charging current for the output capacitor; When the input MOSFET is turned on, the second current source is used to provide discharge current for the output capacitor.
2. The delay cell of claim 1, wherein, The input MOS transistor is an input NMOS transistor, wherein the drain of the input NMOS transistor is connected to the first current source and the first terminal of the output capacitor, and the source of the input NMOS transistor is connected to the second current source.
3. The delay cell of claim 2, wherein, The first current source includes a PMOS transistor, wherein, The source of the PMOS transistor is connected to the power supply voltage, the drain of the PMOS transistor is connected to the drain of the input NMOS transistor, and the gate of the PMOS transistor is connected to the first gate voltage.
4. The delay cell of claim 3, wherein, The magnitude of the charging current of the delay unit is changed by adjusting the magnitude of the first gate voltage, thereby changing the delay time of the delay unit.
5. The delay cell of claim 2, wherein, The second current source includes an NMOS transistor, wherein, The source of the NMOS transistor is grounded, the drain of the NMOS transistor is connected to the source of the input NMOS transistor, and the gate of the NMOS transistor is connected to a second gate voltage.
6. The delay cell of claim 5, wherein, The magnitude of the discharge current of the delay unit is changed by adjusting the magnitude of the second gate voltage, thereby changing the delay time of the delay unit.
7. The delay cell of claim 3, wherein, The delay time of the delay unit is related to the turn-on voltage of the input MOSFET, but not to the power supply voltage.
8. A ring oscillator characterized by, It includes multiple cascaded delay units as described in any one of claims 1 to 7, wherein the output of any stage of the delay unit is connected to the input of the next stage of the delay unit.
9. The ring oscillator of claim 8, wherein, The number of cascaded delay units includes an odd number.
10. The ring oscillator as claimed in claim 9, characterized in that, When the charging current provided by the first current source is equal to the discharging current provided by the second current source, the oscillation frequency of the ring oscillator is: I P = I N = I B Among them, f osc C is the oscillation frequency of the ring oscillator. L For the output capacitance of each stage of the delay unit, V TH Where I is the turn-on voltage of the input MOSFET, N is the number of cascaded delay units, and I... B For bias current, I P The charging current provided by the first current source, I N The discharge current provided to the second current source.