4-inch heteroepitaxial diamond wafer and method of making the same
By fabricating a composite buffer layer of YSZ and graphene layers on a 4-inch N-type silicon wafer and combining it with microwave plasma CVD and chemical mechanical polishing processes, the problems of high fabrication cost and poor crystal quality of 4-inch diamond wafers were solved, realizing high-quality heteroepitaxial diamond wafers suitable for high-performance electronic devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI CHAOYING SEMICONDUCTOR CO LTD
- Filing Date
- 2026-04-09
- Publication Date
- 2026-07-03
AI Technical Summary
In the existing technology, the preparation of 4-inch diamond wafers has problems such as the scarcity and high cost of natural large-size diamond seed crystals, high dislocation density and excessive surface roughness. In addition, the lattice mismatch rate of heteroepitaxial method is high, which makes it difficult to meet the crystal quality requirements of electronic devices and limits its large-scale application.
Using a 4-inch N-type silicon wafer as a heterogeneous substrate, a composite buffer layer consisting of a YSZ layer and a graphene layer is deposited sequentially on the wafer. This is combined with microwave plasma CVD and chemical mechanical polishing processes to fabricate a structure that includes a heterogeneous substrate, a composite buffer layer, and a diamond epitaxial layer. This approach alleviates interfacial stress caused by lattice mismatch and thermal expansion differences, and reduces defect density and surface roughness.
This technology enables the production of 4-inch heteroepitaxial diamond wafers with lower defect density, higher thermal conductivity, and better surface quality. It improves compatibility with existing semiconductor process equipment, reduces manufacturing costs, and expands the application prospects of these wafers in high-power devices, high-frequency communication devices, and high-heat-dissipation electronic devices.
Smart Images
Figure CN122327367A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor substrate material technology, specifically to a 4-inch heteroepitaxial diamond wafer and its preparation method. Background Technology
[0002] 4-inch diamond wafers are a crucial dimension bridging laboratory research and development with industrial applications. They are compatible with mainstream semiconductor pilot-scale equipment, significantly reducing the cost of industrialization modifications. Currently, 4-inch diamond wafers are primarily fabricated using homoepitaxial growth, but large-size natural diamond seeds are scarce and expensive, and the growth process is prone to problems such as excessive dislocation density and excessive surface roughness. While heteroepitaxial growth can overcome the seed seed limitation, the lattice mismatch between heterogeneous substrates such as silicon and silicon carbide and diamond exceeds 50%, resulting in dense defects in the epitaxial layer. This makes it difficult to meet the crystal quality requirements of electronic-grade devices, severely restricting the large-scale application of 4-inch diamond wafers. Therefore, there is a need for 4-inch heteroepitaxial diamond wafers and their fabrication methods. Summary of the Invention
[0003] The main objective of this invention is to provide a 4-inch heteroepitaxial diamond wafer and its preparation method, which can effectively solve the problems in the background art.
[0004] To achieve the above objectives, the technical solution adopted by the present invention is as follows: A 4-inch heteroepitaxial diamond wafer is characterized in that it comprises, from bottom to top, a heteroepitaxial substrate layer, a composite buffer layer and a diamond epitaxial layer, wherein the composite buffer layer is disposed between the heteroepitaxial substrate layer and the diamond epitaxial layer, and the composite buffer layer comprises a YSZ layer and a graphene layer.
[0005] Furthermore, the heterogeneous substrate layer is a 4-inch N-type silicon wafer with a thickness of 500-700μm and a surface flatness of ≤2μm.
[0006] Furthermore, the total thickness of the composite buffer layer is 50-100 nm, the YSZ layer is located on the side near the heterostructure substrate layer and has a thickness of 30-60 nm, and the graphene layer is located on the side near the diamond epitaxial layer and has a thickness of 1-5 atomic layers.
[0007] Furthermore, the diamond epitaxial layer is a single-crystal CVD diamond material with a thickness of 200-500 μm and a dislocation density ≤5×10⁻⁶. 3 cm -2 Thermal conductivity ≥1800W / (m·K), surface roughness Ra≤0.5nm.
[0008] The method for preparing a 4-inch heteroepitaxial diamond wafer according to any one of claims 1 to 4 is characterized by comprising the following steps: S1: Pre-treatment of heterogeneous substrate layer; S2: Prepare a composite buffer layer on the surface of the pretreated heterogeneous substrate layer; S3: Diamond epitaxial growth is performed on the surface of the composite buffer layer to form diamond epitaxial layer 3; S4: Perform precision polishing on the diamond epitaxial layer.
[0009] Furthermore, the pretreatment includes RCA cleaning and hydrogen plasma activation treatment to remove impurities and the native oxide layer on the surface of the heterogeneous substrate. The hydrogen plasma activation treatment is performed at a temperature of 1000-1200℃ for a time of 10-15 minutes.
[0010] Furthermore, the preparation of the composite buffer layer includes depositing a YSZ layer on the surface of a heterogeneous substrate using a magnetron sputtering process with a sputtering power of 150-200W and a deposition temperature of 300-400℃; and then growing a graphene layer on the surface of the YSZ layer using a chemical vapor deposition process with a methane to hydrogen molar ratio of 1:50 and a growth temperature of 900-1000℃.
[0011] Furthermore, the diamond epitaxial layer is grown using microwave plasma CVD technology, with methane and hydrogen as the reaction gases, methane volume fraction of 2%-4%, growth temperature of 850-950℃, deposition pressure of 80-120 Torr, and a stepwise microwave power control method. The initial microwave power is 3kW, increasing by 0.5kW every 2 hours until it reaches 5kW, with a total growth time of 20-30 hours. The diamond epitaxial layer is precision polished using chemical mechanical polishing (CMP), with the polishing slurry being an H2O2-Fe2+ system. The coarse polishing speed is 60-80 r / min, and the fine polishing speed is 30-50 r / min, reducing the surface roughness to below 0.5 nm.
[0012] Compared with the prior art, the present invention has the following beneficial effects: The 4-inch heteroepitaxial diamond wafer and its preparation method provided by this invention effectively alleviate the interfacial stress caused by lattice mismatch and thermal expansion differences at the hetero interface by setting a composite buffer layer including a YSZ layer and a graphene layer between the hetero substrate layer and the diamond epitaxial layer. This reduces the generation of dislocations, cracks and other defects during epitaxial growth, and improves the crystal quality, structural stability and growth uniformity of the diamond epitaxial layer. At the same time, the combination of microwave plasma CVD growth process with stepwise microwave power increase and chemical mechanical polishing process can further improve the thickness control effect and surface flatness of the diamond epitaxial layer and reduce surface roughness. Furthermore, the use of a 4-inch N-type silicon wafer as the hetero substrate layer can reduce material costs and improve compatibility with existing 4-inch semiconductor process equipment, thereby giving the obtained wafer a lower defect density, higher thermal conductivity, better surface quality and better prospects for industrial application. Attached Figure Description
[0013] Figure 1 This is a schematic diagram of the structure of the present invention; In the figure: 1. Heterogeneous substrate layer; 2. Composite buffer layer; 3. Diamond epitaxial layer. Detailed Implementation
[0014] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.
[0015] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," "front end," "rear end," "both ends," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0016] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0017] Example Please see Figure 1 The present invention provides the following technical solution: This embodiment provides a 4-inch heteroepitaxial diamond wafer, which, from bottom to top, includes a heterogeneous substrate layer 1, a composite buffer layer 2, and a diamond epitaxial layer 3. The heterogeneous substrate layer 1 provides the overall support base. The composite buffer layer 2 is disposed between the heterogeneous substrate layer 1 and the diamond epitaxial layer 3 to improve the mismatch problem between the heterogeneous interfaces. The diamond epitaxial layer 3 is formed on top of the composite buffer layer 2 and serves as a functional material layer for subsequent power devices or high-frequency devices.
[0018] Specifically, the heterogeneous substrate 1 is a 4-inch N-type silicon wafer with a thickness of 600 μm and a surface flatness controlled within 2 μm. Using a 4-inch N-type silicon wafer as the heterogeneous substrate 1 facilitates processing using existing mature 4-inch semiconductor equipment and reduces the fabrication cost of large-size diamond wafers, improving industrial applicability. To ensure the quality of the subsequent composite buffer layer 2 and diamond epitaxial layer 3, the heterogeneous substrate 1 is preferably cleaned and activated before fabrication to improve surface cleanliness and bonding stability.
[0019] Specifically, the composite buffer layer 2 is formed on the surface of the heterogeneous substrate layer 1, with a total thickness controlled at 80 nm. The composite buffer layer 2 includes a YSZ layer and a graphene layer. The YSZ layer is located closer to the heterogeneous substrate layer 1, with a preferred thickness of 50 nm, while the graphene layer is located closer to the diamond epitaxial layer 3, with a preferred thickness of 3 atomic layers. By setting the composite buffer layer 2 between the heterogeneous substrate layer 1 and the diamond epitaxial layer 3, a relatively smooth structural transition can be formed between the two. The YSZ layer mainly serves as an interface transition and stress buffer, while the graphene layer helps to further improve the initial epitaxial growth interface state, thereby reducing defect accumulation at the heterogeneous interface caused by lattice mismatch and thermal expansion differences, and improving the crystal quality and surface quality of the subsequent diamond epitaxial layer 3.
[0020] Specifically, the diamond epitaxial layer 3 is a single-crystal CVD diamond material, preferably 300 μm thick, with a dislocation density controlled at 5 × 10⁻⁶. 3 The thermal conductivity is not less than 1800 W / (m·K) and the surface roughness Ra is not higher than 0.5 nm. By controlling the diamond epitaxial layer 3 within the above-mentioned structural and performance range, the resulting 4-inch heteroepitaxial diamond wafer can have both high thermal conductivity, low defect density and excellent surface flatness, thereby meeting the requirements of high-power devices, high-frequency communication devices and high heat dissipation electronic devices.
[0021] This embodiment also provides a method for preparing the above-mentioned 4-inch heteroepitaxial diamond wafer, including the following steps: S1: Pretreatment of heterogeneous substrate layer 1. First, a 4-inch N-type silicon wafer is selected as heterogeneous substrate layer 1, followed by RCA cleaning and hydrogen plasma activation treatment. RCA cleaning removes particles, organic contaminants, and residual metal ions from the silicon wafer surface, while hydrogen plasma activation treatment further removes the native oxide layer and enhances surface activity. In this embodiment, the hydrogen plasma activation treatment temperature is preferably 1100℃, and the treatment time is preferably 12 minutes. After pretreatment, the heterogeneous substrate layer 1 has high surface cleanliness and activity, which is beneficial for the stable deposition of the subsequent composite buffer layer 2.
[0022] S2: A composite buffer layer 2 is prepared on the surface of the pretreated heterogeneous substrate 1. First, a YSZ layer is deposited on the surface of the heterogeneous substrate 1 using magnetron sputtering. The preferred magnetron sputtering power is 180W, and the preferred deposition temperature is 350℃, forming a YSZ layer with a thickness of 50nm. After the YSZ layer deposition is completed, a graphene layer is grown on the surface of the YSZ layer using chemical vapor deposition. During the graphene layer growth process, the preferred molar ratio of methane to hydrogen is 1:50, and the preferred growth temperature is 950℃, ultimately forming a graphene layer with a thickness of 3 atoms. The composite buffer layer 2 prepared in the above manner can effectively cover the surface of the heterogeneous substrate 1 and provide a stable interface foundation during the subsequent diamond growth process.
[0023] S3: Diamond epitaxial layer 3 is formed by diamond epitaxial growth on the surface of the composite buffer layer 2. The diamond epitaxial layer 3 is grown using microwave plasma CVD technology, with methane and hydrogen as the reaction gases, wherein the methane volume fraction is preferably 3%, the growth temperature is preferably 900℃, and the deposition pressure is preferably 100 Torr. During the growth process, a step-by-step microwave power control method is adopted, with the initial microwave power set at 3kW, increasing by 0.5kW every 2 hours until reaching 5kW, and the total growth time preferably 24 hours. This step-by-step power increase method allows the diamond epitaxial layer 3 to maintain a relatively stable nucleation and growth environment in the early stages of growth, while gradually increasing the growth efficiency in the later stages, thereby balancing crystal quality and growth thickness control, and reducing defects and stress concentration problems caused by abrupt changes in growth rate.
[0024] S4: The diamond epitaxial layer 3 is precision polished. After the diamond epitaxial layer 3 is grown, a chemical mechanical polishing (CMP) process is used for surface treatment. The polishing slurry is preferably an H2O2-Fe2+ system. The preferred rotation speed for the rough polishing stage is 70 r / min, and the preferred rotation speed for the fine polishing stage is 40 r / min. By first rough polishing and then fine polishing, the microscopic undulations and processing marks on the surface of the diamond epitaxial layer 3 are gradually removed, reducing its surface roughness Ra to below 0.5 nm. After precision polishing, the resulting wafer surface is smoother, which is beneficial for subsequent processes such as photolithography, deposition, etching, and metal interconnection in device fabrication.
[0025] The 4-inch heteroepitaxial diamond wafer and its preparation method provided by this invention, by setting a composite buffer layer 2 between the hetero substrate layer 1 and the diamond epitaxial layer 3, and constructing the composite buffer layer 2 into a bilayer transition structure combining a YSZ layer and a graphene layer, can form a relatively smooth structural transition relationship at the hetero interface, thereby effectively alleviating the interface stress caused by lattice mismatch and thermal expansion difference between the hetero substrate and the diamond material, reducing the generation of dislocations, cracks and other crystal defects during epitaxial growth, and improving the crystal quality and overall stability of the diamond epitaxial layer 3.
[0026] This invention rationally designs the material composition, layer distribution, and thickness range of the composite buffer layer 2, and combines it with the step-by-step power control method of microwave plasma CVD growth process, so that the diamond epitaxial layer 3 can maintain a relatively stable growth state in both the early and late stages of growth. While taking into account growth efficiency, it improves the uniformity of epitaxial layer thickness distribution and reduces the problem of local defect accumulation caused by growth rate fluctuations, thereby facilitating the acquisition of 4-inch diamond wafers with lower defect density and more stable performance.
[0027] This invention employs chemical mechanical polishing (CMP) to perform precision surface treatment on the diamond epitaxial layer 3 after diamond epitaxial growth, which effectively reduces surface roughness, improves wafer surface flatness and processing quality, and makes the resulting wafer more suitable for subsequent semiconductor device manufacturing processes such as photolithography, deposition, etching and packaging. This further enhances the wafer's applicability in high-power devices, high-frequency communication devices and high-heat-dissipation electronic devices.
[0028] Compared with the existing homoepitaxial route that mainly relies on natural large-size diamond seed crystals, the present invention uses a 4-inch N-type silicon wafer as a heterogeneous substrate layer 1, which can make full use of the existing mature 4-inch semiconductor process equipment, reduce the preparation cost of large-size diamond wafers, improve compatibility with existing semiconductor production lines, and is more conducive to promoting the development of 4-inch diamond wafers from experimental research to engineering and industrialization.
[0029] The diamond wafers prepared by this invention have high thermal conductivity, low dislocation density, and superior surface quality, thus better meeting the comprehensive requirements of new energy vehicle power modules, high-frequency communication devices, and other high-performance electronic devices for the heat dissipation performance, electrical performance, and surface quality of substrate materials, and have good prospects for practical applications.
[0030] Through the above structural design and fabrication process, the 4-inch heteroepitaxial diamond wafer prepared in this embodiment can effectively improve the defect problems caused by heterojunction interface mismatch while maintaining low fabrication cost, and also achieves high thermal conductivity, low dislocation density, and superior surface quality. Furthermore, since this embodiment uses a 4-inch N-type silicon wafer as the heterosubstrate layer 1, it is well-suited to existing 4-inch semiconductor process platforms, thus showing promising application prospects in new energy vehicle power modules, high-frequency communication devices, and other high-performance electronic devices.
[0031] It should be noted that the above embodiments are only one of the preferred embodiments of this solution. In actual applications, the specific thickness of the heterogeneous substrate layer 1, the thickness parameters of each layer in the composite buffer layer 2, the growth thickness of the diamond epitaxial layer 3, and the corresponding process parameters can all be adjusted based on the technical ideas disclosed in this solution. As long as they do not deviate from the core concept of this solution, they should all be considered to fall within the protection scope of this solution.
Claims
A 1.4-inch heteroepitaxial diamond wafer, characterized in that: From bottom to top, it includes a heterogeneous substrate layer (1), a composite buffer layer (2) and a diamond epitaxial layer (3). The composite buffer layer (2) is disposed between the heterogeneous substrate layer (1) and the diamond epitaxial layer (3). The composite buffer layer (2) includes a YSZ layer and a graphene layer.
2. The 4-inch heteroepitaxial diamond wafer according to claim 1, characterized in that: The heterogeneous substrate layer (1) is a 4-inch N-type silicon wafer with a thickness of 500-700μm and a surface flatness of ≤2μm.
3. The 4-inch heteroepitaxial diamond wafer according to claim 1, characterized in that: The total thickness of the composite buffer layer (2) is 50-100nm, the YSZ layer is located on the side close to the heterogeneous substrate layer (1) and has a thickness of 30-60nm, and the graphene layer is located on the side close to the diamond epitaxial layer (3) and has a thickness of 1-5 atomic layers.
4. The 4-inch heteroepitaxial diamond wafer according to claim 1, characterized in that: The diamond epitaxial layer (3) is a single-crystal CVD diamond material with a thickness of 200-500 μm and a dislocation density ≤5×10⁻⁶. 3 cm -2 Thermal conductivity ≥1800W / (m·K), surface roughness Ra≤0.5nm.
5. The method for preparing a 4-inch heteroepitaxial diamond wafer according to any one of claims 1 to 4, characterized in that: Includes the following steps: S1: Pre-treatment of heterogeneous substrate layer (1); S2: Prepare a composite buffer layer (2) on the surface of the pretreated heterogeneous substrate layer (1); S3: Diamond epitaxial growth is performed on the surface of the composite buffer layer (2) to form a diamond epitaxial layer (3); S4: Perform precision polishing on the diamond epitaxial layer (3).
6. The method for preparing a 4-inch heteroepitaxial diamond wafer according to claim 5, characterized in that: The pretreatment includes RCA cleaning and hydrogen plasma activation treatment to remove impurities and natural oxide layer on the surface of the heterogeneous substrate layer (1). The hydrogen plasma activation treatment temperature is 1000-1200℃ and the treatment time is 10-15min.
7. The method for preparing a 4-inch heteroepitaxial diamond wafer according to claim 5, characterized in that: The preparation of the composite buffer layer (2) includes depositing a YSZ layer on the surface of the heterogeneous substrate layer (1) using a magnetron sputtering process with a sputtering power of 150-200W and a deposition temperature of 300-400℃; and then growing a graphene layer on the surface of the YSZ layer using a chemical vapor deposition process with a methane to hydrogen molar ratio of 1:50 and a growth temperature of 900-1000℃.
8. The method for preparing a 4-inch heteroepitaxial diamond wafer according to claim 5, characterized in that: The diamond epitaxial layer (3) is grown using microwave plasma CVD technology. The reaction gases are methane and hydrogen, with a methane volume fraction of 2%–4%. The growth temperature is 850–950℃, and the deposition pressure is 80–120 Torr. A step-by-step microwave power control method is adopted, with an initial microwave power of 3kW, which is increased by 0.5kW every 2 hours until it reaches 5kW. The total growth time is 20–30 hours. The diamond epitaxial layer (3) is precision polished using chemical mechanical polishing technology. The polishing liquid is an H2O2-Fe2+ system. The coarse polishing speed is 60–80 r / min, and the fine polishing speed is 30–50 r / min, so that the surface roughness is reduced to below 0.5 nm.