A gate drive circuit for a single-inductor high-low voltage hybrid multi-output power supply

Abstract

The application discloses a gate drive circuit for a single-inductor high-low voltage hybrid multi-output power supply, comprising the following steps: a single-inductor multi-output subcircuit, wherein the single-inductor multi-output subcircuit comprises a first switch S1, a second switch S2 and a third switch S3 connected in parallel with the first switch S1, and a fourth switch connected in parallel with the third switch S3, the fourth switch comprising a first sub-switch S41, a second sub-switch S42 and a third sub-switch S43; a sampling circuit connected in signal with the single-inductor multi-output subcircuit, a control circuit connected in signal with the sampling circuit, and a gate drive circuit connected in signal with the control circuit, wherein the gate drive circuit is connected in signal with the fourth switch. According to the application, multi-path high-low voltage hybrid output is realized without using additional off-chip capacitors.

Description

Technical Field

[0001] This invention relates to the technical field of integrated circuits and switching power supply circuits, and particularly to a gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply. Background Technology

[0002] With the continuous development of modern electronic applications, electronic devices are becoming more and more advanced in terms of functionality, and their internal modules are also becoming more and more numerous. Since the operating voltages of each module are different, power management chips are required to provide multiple different output voltages simultaneously.

[0003] The traditional approach integrates multiple different boost circuits, buck circuits, charge pumps, and low-dropout linear regulators onto a single chip to simultaneously provide multiple different output voltages. However, this approach occupies a large chip area and requires many off-chip capacitors and inductors, resulting in poor system integration.

[0004] To address the aforementioned limitations, single-inductor multi-output DC-DC converters have been proposed as a promising alternative. These converters utilize only a single inductor to simultaneously provide multiple different output voltages, offering advantages such as small size, low cost, and high efficiency, and are currently widely used in various electronic devices.

[0005] Current gate drive designs for the output P-type MOSFET switches in single-inductor multi-output power supplies can only operate when the voltage difference between the multiple outputs is small. If the voltage difference between different outputs is too large, the output P-type MOSFET switches will fail to turn on and off properly, resulting in leakage between different outputs. On the other hand, gate drive designs for the output N-type MOSFET switches in single-inductor multi-output power supplies require large capacitors. These large capacitors necessitate the use of off-chip components or require a significant chip area for on-chip implementation, thus increasing costs.

[0006] There are already some single-inductor multi-output DC-DC converter designs, but these designs still have some problems.

[0007] Example 1: The power stage topology designed in the single-inductor multi-output DC-DC converter design [1] can only achieve boost output and cannot achieve buck output. The operating voltage range is small, the output switch is a P-type MOSFET switch, and the gate drive design cannot achieve high and low voltage mixed output.

[0008] Example 2: The design of a single-inductor multi-output DC-DC converter[2] realizes dual output, in which the first output can realize either boost output or buck output, while the second output can only realize boost output. The operating voltage range is small, the output terminal switch is a P-type MOSFET switch, and the gate drive design cannot realize high and low voltage mixed output.

[0009] Example 3: Gate driver design for high voltage synchronous switching power converter [3] designed and implemented gate drive circuits for P-type MOSFET switches on the high side and N-type MOSFET switches on the high side, but the above gate drive designs require additional off-chip capacitors.

[0010] In summary, the proposed single-inductor multi-output DC-DC converter designs all have some problems, and there is no design for the gate drive circuit of the P-type MOSFET for a single-inductor high-low voltage mixed buck-boost multi-output power supply.

[0011] [1]H. -P. Le, C. -S. Chae, K. -C. Lee, S. -W. Wang, G. -H. Cho and G.-H. Cho, "A Single-Inductor Switching DC–DC Converter With Five Outputs andOrdered Power-Distributive Control," in IEEE Journal of Solid-State Circuits, vol. 42, no. 12, pp. 2706-2714, Dec. 2007. [2]Guan-Lin Li, Ying-Chi Chen, Yi-Ting Chang, C. -H. Tsai and Huei-Shan Chen, "A single-inductor dual-output DC-DC converter with output voltagemode switching," 2012 IEEE 13th Workshop on Control and Modeling for PowerElectronics (COMPEL), 2012, pp. 1-4. [3]Z. Liu, L. Cong and H. Lee, "Design of On-Chip Gate Drivers WithPower-Efficient High-Speed ​​Level Shifting and Dynamic Timing Control for High-Voltage Synchronous Switching Power Converters," in IEEE Journal ofSolid-State Circuits, vol. 50, no. 6, pp. 1463-1477, June 2015, doi: 10.1109 / JSSC.2015.2422075. Summary of the Invention

[0012] To address the shortcomings of existing technologies, the present invention aims to provide a gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply, solving the problem that when the voltage difference between multiple outputs is large, the P-type MOSFET switch at the output terminal cannot be properly turned on and off, resulting in leakage between different outputs. This allows for the realization of multiple high-low voltage mixed outputs without the use of additional external capacitors. To achieve the above-mentioned objective and other advantages of the present invention, a gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply is provided, comprising: A single-inductor multi-output sub-circuit, comprising a first switch S1, a second switch S2 and a third switch S3 connected in parallel with the S1, and a fourth switch connected in parallel with the third switch S3, wherein the fourth switch comprises a first sub-switch S41, a second sub-switch S42 and a third sub-switch S43. A sampling circuit connected to the single-inductor multi-output sub-circuit signal, a control circuit connected to the sampling circuit signal, and a gate driving circuit connected to the control circuit signal, wherein the gate driving circuit is connected to the fourth switch signal; The gate drive circuit includes a bias branch and a fourth MOSFET M connected in parallel with the bias branch. P4 With the fifth MOS tube M P5 The fourth MOSFET M P4 A sixth MOSFET M is connected in parallel. P6 The fifth MOSFET M P5 MOSFET M connected in series N1 The sixth MOSFET M P6 MOSFET M connected in series N2 .

[0013] Preferably, the bias branch includes a first MOSFET MP1、 With the first MOSFET M P1 The second MOSFET M in series P2 , and the second MOSFET M P2 The third MOSFET M in series P3 .

[0014] Preferably, the source voltage Vs of the output switch is connected to the highest voltage of the gate drive circuit as the input of the gate drive circuit, and the output is the gate signal, which can be directly connected to the gate of the output switch to control the turn-on and turn-off of the output switch.

[0015] Preferably, the power stage voltage and current signals of the single-inductor multi-output sub-circuit are sampled by the sampling circuit and then input to the control circuit. The control circuit uses the voltage signal output by the sampling circuit as input and, after passing through the control algorithm, obtains the switching control signal as output.

[0016] Preferably, in the gate drive circuit, when the output switch is turned on, the source voltage of the switch is clamped to... V OUT When the output switch is turned off, the source voltage of the switch is turned on through the body diode of the inner P-type MOSFET. The source voltage of the switch is clamped by other conducting branches. Since the source voltage is equal to the gate voltage, the output switch is still turned off, the output is not affected, and there will be no leakage between different outputs.

[0017] Compared with the prior art, the advantages and positive effects of the present invention are: This invention can be used in various single-inductor high-low voltage hybrid multi-output power supply systems. The low-voltage switching control signal output from the system control circuit is input into this design. After conversion by this design, the output voltage gate signal can be directly connected to the gate of the output switching transistor, directly controlling the conduction and turn-off of the output switching transistor. This ensures that the output switching transistor can operate under normal operating voltage and realizes high-low voltage hybrid multi-output, avoiding leakage between different outputs and ensuring that the system can work normally. Attached Figure Description

[0018] Figure 1 This is a prior art system block diagram of a gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply according to the present invention; Figure 2 This is a system block diagram of a single-inductor high-low voltage mixed-output power supply according to the present invention, which is used for a gate drive circuit of a single-inductor high-low voltage mixed-output power supply. Figure 3 This is a structural diagram of the gate drive circuit for a single-inductor high-low voltage hybrid multi-output power supply according to the present invention. Figure 4 The waveform diagram shows the output voltage switching response of a single-inductor three-output power management system for a gate drive circuit of a single-inductor high-low voltage mixed multi-output power supply according to the present invention, wherein the third output switches between 5V, 10V, and 18V. Figure 5 The diagram shows the relationship between efficiency and output power of a single-inductor three-output power management system for a gate drive circuit of a single-inductor high-low voltage mixed multi-output power supply according to the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] like Figure 1 As shown, for the high-side N-type MOSFET switch, a dynamic control level converter design is used. The switch control signal is taken as the input signal, and after passing through the dynamic control level converter, a high-voltage drive signal is obtained. Then, after passing through a buffer, an output gate signal that can directly drive the high-side N-type MOSFET switch to turn on or off is obtained, thus realizing the control signal controlling the switch state. For the high-side P-type MOSFET switch, a capacitively coupled level converter design is used. The switch control signal is taken as the input signal, and after passing through the capacitively coupled level converter, a high-voltage drive signal is obtained. Then, after passing through a buffer, an output gate signal that can directly drive the high-side P-type MOSFET switch to turn on or off is obtained, thus realizing the control signal controlling the switch state. In both of the above level converter designs, a large-value off-chip capacitor is used.

[0021] Reference Figure 2 A gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply includes: A single-inductor multi-output sub-circuit, comprising a first switch S1, a second switch S2 and a third switch S3 connected in parallel with the S1, and a fourth switch connected in parallel with the third switch S3, wherein the fourth switch comprises a first sub-switch S41, a second sub-switch S42 and a third sub-switch S43. A sampling circuit connected to the single-inductor multi-output sub-circuit signal, a control circuit connected to the sampling circuit signal, and a gate driving circuit connected to the control circuit signal, wherein the gate driving circuit is connected to the fourth switch signal; The gate drive circuit includes a bias branch and a fourth MOSFET M connected in parallel with the bias branch. P4 With the fifth MOS tube MP5 The fourth MOSFET M P4 A sixth MOSFET M is connected in parallel. P6 The fifth MOSFET M P5 MOSFET M connected in series N1 The sixth MOSFET M P6 MOSFET M connected in series N2 .

[0022] Furthermore, the power stage voltage and current signals, after being sampled by the sampling circuit, are input to the control circuit. The control circuit uses the voltage signal output from the sampling circuit as input, processes it through a control algorithm, and obtains the switch control signal as its output. The control circuit is connected to the gate drive circuit, using the switch control signal as its input signal, and simultaneously outputting the source voltages corresponding to switches S41, S42, and S43. V s1 , V s2 , V s3 It is also connected to the input terminal of the gate drive circuit as an input signal. The switching control signal and the source voltage, after passing through the gate drive circuit, yield the gate signal. V g1 , V g2 , V g3 It can be directly connected to the gate of the output switches S41, S42, and S43 to control the switches to turn on and off.

[0023] Furthermore, the output node voltage in a single-inductor multi-output system V x The switching range is large. When the power supply is in the charging stage, switch S3 is turned on. V x With grounding at 0, when the power supply is in the discharge phase, switches S41, S42, and S43 are turned on respectively. V x They are respectively V out1 , V out2 , V out3 The power supply has three output discharges. The output switches S41, S42, and S43 are connected back-to-back using P-type MOSFETs to prevent leakage current through the body diodes of the P-type MOSFETs from the mixed high and low voltage outputs of the multiple output branches. Furthermore, because the gate-source voltage of the switching transistors cannot exceed 5V, ... V x It will be at 0~ V out3 (Maximum output voltage, system designed as) Vout1 < V out2 < V out3 The gate voltage of the switching transistor fluctuates within a certain range. Therefore, to ensure the normal operation of the switching transistor, a certain gate voltage is required. V g Follow source voltage V s Floating operation is achieved through a designed gate drive circuit.

[0024] Furthermore, the structural diagram of the gate drive circuit is as follows: Figure 3 As shown. The source voltage of the output switching transistor. V s The highest voltage connected to the gate drive circuit serves as the input to the gate drive circuit, and the output is the gate signal, which can be directly connected to the gate of the output switching transistor to control its on / off state. The circuit works as follows: mos tube M P1 M P2 M P3 A MOSFET connected to a diode and a reference current source I REF The series connection forms the bias branch of the MOSFET M. P4 and M P5 Provides gate bias voltage. The control signals are D and D', which are opposite in nature and are connected to MOSFET M respectively. N2 and M N1 The gate.

[0025] Furthermore, when the control signal D is low, D' is high, and MOSFET M... N2 Shutdown cutoff, MOSFET M N1 The conductor is connected to ground, MOSFET M P6 Gate voltage drops, M P6 The conduction level increases until it is fully turned on, at which point the gate drive output signal is activated. V g equal to source voltage V s The output switch is turned off.

[0026] When the control signal D is high, D' is low, and MOSFET M... N2 The conductor is connected to ground, MOSFET M N1 Shutdown cutoff, MOSFET M P6 As the gate voltage rises, M P6 The conductivity decreases, M P6 As the on-resistance increases, the gate drive output signal... V g Through the conducting MOSFET MN2 Connected to ground, discharging to ground, while the input gate drives the input signal. V s Through MOSFET M P6 Resistor R1, and conducting MOSFET M N2 Connected to ground, discharging to ground, controlling the value of resistor R1 and MOSFET M N2 The size of the signal makes V g The discharge rate is faster than the signal. V s The discharge rate makes V g < V s The control output switch is turned on. Simultaneously, the signal... V g The discharge rate must not be too fast to prevent the gate-source voltage from exceeding 5V, which could damage the switching transistor. Therefore, a Zener diode D1 is connected in parallel with a resistor R1 to regulate the signal. V g With signal V s The voltage difference clamp is within 5V.

[0027] Furthermore, for the gate drive circuit, when the output switch is turned on, the source voltage of the switch is clamped to... V OUT When the output switch is turned off, the source voltage of the switch is turned on through the body diode of the inner P-type MOSFET. The source voltage of the switch is clamped by other conducting branches. However, since the source voltage is equal to the gate voltage, the output switch is still turned off, the output is not affected, and there will be no leakage between different outputs.

[0028] In summary, the gate drive circuit of this invention can be used in single-inductor high-low voltage mixed multi-output power supplies where the output switching transistor is a P-type MOSFET. Using this gate drive circuit design, a single-inductor three-output power management system was designed and implemented. This design achieves a tenfold isolation voltage ratio (highest output voltage / lowest output voltage). To further improve the isolation voltage ratio, [further steps can be taken]. Figure 3 Add a reference current source to the bias branch I REF The number of MOSFETs connected in series with diodes can be increased, thereby enabling a higher isolation voltage ratio. Figure 4 The output voltage waveform diagram for the output voltage switching response is shown in the results. V out1 The output ripple is -23~66mV. V out2 The output ripple is -5~38mV.V out3 The output ripple is -30~210mV. For example... Figure 5 The relationship between conversion efficiency and output power for a single-inductor three-output power management system is shown in the figure. As can be seen from the figure, within the design range, the converter efficiency is greater than 70.39%.

[0029] This invention can be used in various single-inductor high-low voltage hybrid multi-output power supply systems. The low-voltage switching control signal output from the system control circuit is input into this design. After conversion by this design, the output voltage gate signal can be directly connected to the gate of the output switching transistor, directly controlling the conduction and turn-off of the output switching transistor. This ensures that the output switching transistor can operate under normal operating voltage and realizes high-low voltage hybrid multi-output, avoiding leakage between different outputs and ensuring that the system can work normally.

[0030] like Figure 2 As shown, the specific implementation method is as follows: the power stage voltage and current signals are sampled by the sampling circuit and then input to the control circuit. The control circuit uses the voltage signal output by the sampling circuit as input, and after passing through the control algorithm, obtains the switch control signal as output. The control circuit is connected to the gate drive circuit of this invention, using the switch control signal as the input signal of the gate drive circuit. At the same time, the source voltages Vs1, Vs2, and Vs3 corresponding to the output switches S41, S42, and S43 are also connected to the input terminal of the gate drive circuit as input signals. After the switch control signal and the source voltage pass through the gate drive circuit of this invention, gate signals Vg1, Vg2, and Vg3 are obtained, which can be directly connected to the gates of the output switches S41, S42, and S43 to control the switches to turn on and off, thereby realizing a single-inductor high-low voltage hybrid multi-output power management system.

[0031] The number of devices and processing scale described herein are for simplification purposes. Applications, modifications, and variations of this invention will be readily apparent to those skilled in the art. Although embodiments of the invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. It can be applied to various fields suitable for this invention, and further modifications can be readily implemented by those skilled in the art. Therefore, without departing from the general concept defined by the claims and their equivalents, this invention is not limited to the specific details and illustrations shown and described herein.

Claims

1. A gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply, characterized in that, include: A single-inductor multi-output sub-circuit, comprising a first switch S1, a second switch S2 and a third switch S3 connected in parallel with the S1, and a fourth switch connected in parallel with the third switch S3, wherein the fourth switch comprises a first sub-switch S41, a second sub-switch S42 and a third sub-switch S43. A sampling circuit connected to the single-inductor multi-output sub-circuit signal, a control circuit connected to the sampling circuit signal, and a gate driving circuit connected to the control circuit signal, wherein the gate driving circuit is connected to the fourth switch signal; The gate drive circuit includes a bias branch and a fourth MOSFET M connected in parallel with the bias branch. P4 With the fifth MOS tube M P5 The fourth MOSFET M P4 A sixth MOSFET M is connected in parallel. P6 The fifth MOSFET M P5 MOSFET M connected in series N1 The sixth MOSFET M P6 MOSFET M connected in series N2 .

2. The gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply as described in claim 1, characterized in that, The bias branch includes a first MOSFET M P1、 With the first MOSFET M P1 The second MOSFET M in series P2 , and the second MOSFET M P2 The third MOSFET M in series P3 .

3. The gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply as described in claim 2, characterized in that, The source voltage Vs of the output switch is connected to the highest voltage of the gate drive circuit as the input of the gate drive circuit. The output is the gate signal, which can be directly connected to the gate of the output switch to control the turn-on and turn-off of the output switch.

4. The gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply as described in claim 1, characterized in that, The power stage voltage and current signals of the single-inductor multi-output sub-circuit are sampled by the sampling circuit and then input into the control circuit. The control circuit uses the voltage signal output by the sampling circuit as input, and after passing through the control algorithm, obtains the switching control signal as output.

5. The gate drive circuit for a single-inductor high-low voltage mixed multi-output power supply as described in claim 1, characterized in that, In the gate drive circuit, when the output switch is turned on, the source voltage of the switch is clamped to... V OUT When the output switch is turned off, the source voltage of the switch is turned on through the body diode of the inner P-type MOSFET. The source voltage of the switch is clamped by other conducting branches. Since the source voltage is equal to the gate voltage, the output switch is still turned off, the output is not affected, and there will be no leakage between different outputs.

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