A multi-stage reaction process parameter intelligent switching system for a reaction kettle

Abstract

This invention belongs to the technical field of process control and automation, and relates to an intelligent switching system for multi-stage reaction process parameters in a reactor. The system includes: a transient physical sequence generation module to acquire signal-generated variable sequences; a Jacobian tensor array construction module to construct a dynamic heat flux Jacobian tensor array reflecting temporal coupling strength; a system topological singularity identification module to analyze the array and generate eigenvalue reduction mutation flags; a hardware wake-up vector generation module to generate a hardware-level execution clock trigger vector for the wake-up controller in response to the flags; a transient residual data extraction module to extract transient heat flux residual data fragments via a direct memory access mechanism; and a control state overwrite activation module to overwrite the controller state using the fragments and output a disturbance-free control command for the target stage. This invention solves the problem of difficulty in accurately capturing physical phase transition singularities and the initial state of the synchronous controller during multi-stage operation, leading to control disturbances during switching.

Description

Technical Field

[0001] This invention belongs to the technical field of process control and automation, and relates to an intelligent switching system for multi-stage reaction process parameters in a reactor. Background Technology

[0002] In batch production processes in industries such as chemicals, pharmaceuticals, and new materials, the reactor is a core piece of equipment. The chemical reactions within it typically undergo multiple distinct process stages, such as heating, isothermal reaction, and cooling crystallization. Each stage has different control requirements for key process variables such as temperature and pressure, necessitating the configuration of independent control parameter sets. Currently, the core challenge in stage switching control practices is accurately determining the physicochemical endpoint of the previous stage and smoothly transferring control to the controller of the next stage. This avoids process disturbances such as temperature overshoot, oscillation, or hysteresis during the switching process, which can affect product yield, crystal form, and quality stability.

[0003] There are two main types of solutions commonly used in the industry. The first is a switching method based on preset time programs or simple logical thresholds. This means that when the reaction time reaches a preset value, or when an observable variable such as temperature or pressure reaches a preset threshold, the system is forcibly switched to the next stage of control parameters. The second type is advanced model-based control methods, such as model predictive control. This method relies on establishing an accurate mathematical model of the reaction process, predicting future system behavior through the model, and optimizing the control sequence online to achieve a smooth transition. For example, Chinese invention patent CN110764414A proposes a robust predictive control method for multi-stage batch asynchronous switching processes with multiple disturbances, aiming to handle disturbances and optimize the switching process through a model.

[0004] However, the aforementioned traditional methods have certain limitations when dealing with complex nonlinear reaction systems. Time-based or simple threshold-based switching methods have fixed triggering conditions and cannot adapt to batch-to-batch differences in raw materials, equipment aging, or unmodeled exothermic fluctuations. This may lead to switching too early or too late, before the reaction has truly reached the physical phase transition singularity, thus causing process disturbances. For model-based control methods, their performance is highly dependent on the accuracy of the model. For complex processes accompanied by drastic phase transitions, crystal transformations, or abrupt changes in reaction kinetics, establishing a mechanistic model that describes the system's behavior near topological singularities is technically challenging. Model mismatch may lead to inaccurate predictions, and the switching effect also needs improvement. Furthermore, while a model-free adaptive PID control strategy for polymer reactor product concentration control proposed in Chinese invention patent CN112255912A can adapt to changes in process characteristics, its design focuses primarily on parameter optimization within a single stage. Its feedforward coordination mechanism still has significant room for optimization in predicting and connecting two adjacent reaction stages with significantly different dynamic characteristics. Summary of the Invention

[0005] To address the aforementioned problems, this invention provides an intelligent switching system for multi-stage reaction process parameters in a reactor.

[0006] A multi-stage reaction process parameter intelligent switching system for a reactor includes:

[0007] The transient physics sequence generation module is used to acquire multi-source physical sensing signals from the underlying hardware of the reactor and generate a transient physics variable sequence characterizing the current energy transfer state of the system.

[0008] The Jacobian tensor array building module is used to construct discrete Jacobian estimation tensor arrays that characterize the dynamic phase space evolution properties of a system.

[0009] The system topological singularity identification module is used to analyze the dynamic heat flux Jacobian tensor array, identify the system topological singularities, and generate eigenvalue dimensionality reduction mutation flags.

[0010] The hardware wake-up vector generation module is used to perform timing interlocking in response to the feature root dimensionality reduction mutation flag bit, and to generate a hardware-level execution clock trigger vector for the forced wake-up stage controller.

[0011] The transient residual data extraction module, based on the hardware-level execution clock trigger vector interception activation wake-up interrupt cycle related tasks, extracts transient heat flux residual data fragments under multi-source physical sensing conditions through direct memory access mechanism;

[0012] The control state overwrite activation module is used to forcibly overwrite the internal state of the stage controller using transient heat flux residual data fragments, activate reset parameters to output a target stage disturbance-free control command that can seamlessly switch to the next reaction cycle. The internal state of the stage controller includes the initial integral accumulation value and differential slope value that can offset the energy imbalance state.

[0013] A further aspect of the present invention involves acquiring multi-source physical sensing signals from the underlying hardware of the reactor, including the following steps:

[0014] The internal temperature, jacket inlet and outlet temperatures, and feedback current of the temperature control valve position of the reactor system are collected synchronously within a preset high-frequency interruption cycle.

[0015] The feedback current is converted into the corresponding physical valve position opening.

[0016] The instantaneous heat removal rate is calculated by combining the physical valve opening, internal temperature, and jacket inlet and outlet temperatures.

[0017] A further aspect of the present invention involves generating a sequence of transient physical variables characterizing the current energy transfer state of the system, comprising the following steps:

[0018] Extract the differential change in internal temperature within a single preset high-frequency interrupt cycle;

[0019] Calculate the rate of change of internal energy of the reaction vessel system;

[0020] The timestamps of internal temperature, instantaneous heat removal rate, and internal energy change rate are recombined to generate a transient physical variable sequence.

[0021] A further aspect of the present invention, processing a sequence of transient physical variables, includes the following steps:

[0022] Calculate the algebraic sum of the instantaneous heat removal rate and the internal energy change rate in the transient physical variable sequence to generate balance residual data characterizing the transient energy balance deviation;

[0023] The transient heat flux residual data generated by a single preset high-frequency interrupt cycle is spliced ​​together and filled into a ring-shaped memory buffer of preset fixed depth in real time.

[0024] A further aspect of this invention involves constructing a dynamic heat flux Jacobian tensor array that reflects the strength of multivariable temporal coupling, comprising the following steps:

[0025] Extract the data sequence from the circular memory buffer;

[0026] Calculate the first-order dynamic sensitivity and second-order trend rate of change among the variable components in the data sequence to generate the Jacobian estimation sequence.

[0027] By recombining the Jacobian estimation sequence in the spatial dimension, a dynamic heat flux Jacobian tensor array containing thermodynamic inertial coupling relationships is generated.

[0028] A further aspect of this invention involves analyzing a dynamic heat flux Jacobian tensor array, identifying topological singularities that trigger the system, and generating eigenvalue dimension reduction mutation flags, comprising the following steps:

[0029] Read multiple data matrices from the bottom layer of the dynamic heat flux Jacobian tensor array, and solve for the determinant characteristic polynomial principal components of the multiple data matrices;

[0030] Track the relative motion trajectory of the eigenvalues ​​corresponding to the principal component of the determinant characteristic polynomial within a continuous time step, monitor and compare whether the relative motion trajectory exhibits a trajectory abrupt change phenomenon that represents the reversal of energy flow. The trajectory abrupt change phenomenon is determined when the relative vector angle change or local curvature of the eigenvalue trajectory in the complex plane exceeds a set threshold.

[0031] A confirmation instruction is issued based on the real part of the eigenvalue crossing the preset zero point, resulting in a spatial feature dimensionality reduction state. The eigenvalue dimensionality reduction mutation flag, which represents the phase transition singularity of the physical system, is written separately into the preset register.

[0032] A further aspect of the present invention involves generating a hardware-level execution clock trigger vector for the forced wake-up phase controller, comprising the following steps:

[0033] The system calls multiple independent reaction stage control parameter clusters that are in clock-gated sleep state in the main control system memory, and locks the independent reaction stage control parameter clusters to be executed in the next sequence, thus restricting multiple independent reaction stage control parameter clusters from acquiring the right to allocate processor task time slices in the round-robin within the normal control cycle.

[0034] The characteristic root dimension reduction mutation flag bit carried in the preset register is converted to output logic voltage, generating a transient hardware-level level switching signal;

[0035] The hardware-level level-flipping signal is hard-wired and mapped to the wake-up interrupt vector table of the control parameter cluster of the next sequence's independent response stage. The output is the hardware-level execution clock trigger vector that directly triggers the activation of the control parameter cluster of the next sequence's independent response stage.

[0036] A further aspect of this invention involves intercepting and activating tasks associated with wake-up interrupt cycles based on hardware-level execution clock trigger vectors, including the following steps:

[0037] Suspend the basic control scan program within the same machine cycle as the hardware-level execution clock trigger vector wake-up interrupt;

[0038] Establish a direct memory access bus channel from the circular memory buffer to the physical address of the independent reaction stage control parameter cluster for the next sequence.

[0039] A further aspect of this invention involves extracting transient heat flux residual data fragments under multi-source physical sensing conditions via a direct memory access mechanism, comprising the following steps:

[0040] Manipulate the direct memory access bus channel to extract transient heat flux residual data at the end of the circular memory buffer without controller intervention;

[0041] Synthesize transient heat flux residual data fragments containing real-time internal energy states.

[0042] A further aspect of this invention utilizes transient heat flux residual data fragments to forcibly overwrite the internal state of the stage controller, activating and resetting parameters to output a target stage disturbance-free control command capable of seamlessly transitioning to the next reaction cycle, comprising the following steps:

[0043] Write the extracted transient heat flux residual data fragments into the integral accumulator register and differential advance buffer within the control parameter cluster of the next sequence independent reaction stage;

[0044] The transient heat flux residual data fragments are fully replaced with the original integral and differential calculation accumulated deviations of the control parameter cluster of the independent reaction stage in the next sequence, so that the initial calculated opening of the control valve is adapted to the actual transient thermal energy state of the current reactor.

[0045] Release the clock sleep gating state of the independent reaction stage control parameter cluster for the next sequence, apply the reset parameter instructions to the underlying actuator to execute the disturbance-free stage switching driven by the dynamic singularity, and output the disturbance-free control instruction for the target stage.

[0046] In summary, the present invention has the following beneficial technical effects:

[0047] 1. This invention constructs a dynamic heat flux Jacobian tensor array and solves for eigenvalues ​​to mathematically characterize the coupling relationship between multiple variables such as temperature, heat removal rate, and internal energy change rate. Compared to traditional methods that rely solely on a single slow variable (such as a temperature threshold), this approach can identify the physical moment when the real part of the eigenvalue crosses zero from the system's inherent dynamic structural changes. This mechanism effectively corresponds to the "topological singularity point" where physical phase transitions or reaction kinetic properties undergo qualitative changes, thereby improving the accuracy of switching point identification and reducing process deviations caused by improper switching timing.

[0048] 2. This invention converts the identified eigenvalue dimensionality reduction mutation flag into a level-to-level signal at the hardware level and uses hard-wired interrupts to wake up the controller in subsequent stages. This mechanism bypasses the inherent task scheduling, scan cycle waiting, and logic interpretation overhead in traditional software control systems, establishing a low-latency deterministic path from physical event detection to control command execution. Hardware-level interrupt response ensures that the next stage of control tasks can be started immediately upon identification of the physical phase transition point, providing a timeliness guarantee for seamless switching between stages.

[0049] 3. By employing a Direct Memory Access (DMA) mechanism, this invention overwrites the transient heat flux residual data, characterizing the energy state near the singularity, into the internal state register of the newly activated controller without controller intervention. This processing method allows the integral accumulator and differential advance buffer of the newly activated controller to directly perform calculations based on the initial state reflecting the system's thermal dynamics at the moment of switching during the first control cycle, rather than starting from a zero state or a historically disconnected state. This achieves synchronization between the controller's initial mathematical state and the actual physical state of the equipment, effectively suppressing output abrupt changes during switching, mitigating overshoot and oscillations of the controlled variable, and ensuring a smooth transition in the response process. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. The drawings are used to provide a further understanding of the present invention.

[0051] Fig. 1 This is a schematic diagram of the framework in the embodiments of this application.

[0052] Fig. 2 This is a flowchart illustrating an embodiment of this application. Detailed Implementation

[0053] The following is in conjunction with the appendix Figs. 1-2 A preferred description of the present invention is provided below.

[0054] See attached document Figs. 1-2 This invention proposes an intelligent switching system for multi-stage reaction process parameters in a reactor, comprising the following modules:

[0055] The transient physics sequence generation module is used to acquire multi-source physical sensing signals from the underlying hardware of the reactor and generate a transient physics variable sequence characterizing the current energy transfer state of the system.

[0056] The Jacobian tensor array building module is used to construct discrete Jacobian estimation tensor arrays that characterize the dynamic phase space evolution properties of a system.

[0057] The system topological singularity identification module is used to analyze the dynamic heat flux Jacobian tensor array, identify the system topological singularities, and generate eigenvalue dimensionality reduction mutation flags.

[0058] The hardware wake-up vector generation module is used to perform timing interlocking in response to the feature root dimensionality reduction mutation flag bit, and to generate a hardware-level execution clock trigger vector for the forced wake-up stage controller.

[0059] The transient residual data extraction module, based on the hardware-level execution clock trigger vector interception activation wake-up interrupt cycle related tasks, extracts transient heat flux residual data fragments under multi-source physical sensing conditions through direct memory access mechanism;

[0060] The control state overwrite activation module is used to forcibly overwrite the internal state of the stage controller using transient heat flux residual data fragments, activate reset parameters to output a target stage disturbance-free control command that can seamlessly switch to the next reaction cycle. The internal state of the stage controller includes the initial integral accumulation value and differential slope value that can offset the energy imbalance state.

[0061] In one embodiment of the present invention, the transient physical sequence generation module is used to perform the following steps:

[0062] The system synchronously acquires the internal temperature, jacket inlet and outlet temperatures, and feedback current of the temperature control valve position within a preset high-frequency interruption cycle of the reactor system. It then converts the feedback current into the corresponding physical valve opening. Combining the physical valve opening, internal temperature, and jacket inlet and outlet temperatures, it calculates the current instantaneous heat removal rate. The system extracts the differential change in internal temperature within a single preset high-frequency interruption cycle; calculates the rate of change of internal energy in the reactor system; and reassembles the timestamps of the internal temperature, instantaneous heat removal rate, and internal energy change rate to generate a transient physical variable sequence.

[0063] This is executed by a data acquisition and preprocessing server deployed in the main control system, such as a distributed control system (DCS) or a programmable logic controller (PLC). Specifically, this server initiates a hardware-level high-frequency interrupt service routine driven by the system's real-time clock via its high-speed analog-to-digital converter interface card.

[0064] When the interrupt service routine is triggered, i.e. at the beginning of each preset high-frequency interrupt cycle, multiple analog sensor signals from the reactor physical system are synchronously acquired. At the signal acquisition level, it acquires voltage signals characterizing the temperature of the reactants through a signal conditioning module connected to a sheathed K-type thermocouple installed inside the reactor, and acquires signals characterizing the temperature of the cooling medium through a module connected to PT100 platinum resistance temperature sensors installed at the inlet and outlet of the reactor cooling jacket. At the same time, it records the 4-20mA current signal output by the valve position feedback device associated with the temperature regulating valve actuator.

[0065] The processing unit within the server will process the valve position feedback current signal. The value is converted into a physical valve opening within the range of 0-100% using a preset linear transformation function. Combined with the jacket medium mass flow rate measured by the electromagnetic flowmeter Specific heat capacity of the medium retrieved from the physical property database and the inlet and outlet temperatures of the jacket and The instantaneous heat removal rate at the current moment is calculated. This rate characterizes the instantaneous power by which the cooling system removes heat from the reactor.

[0066]

[0067] In the formula, For the current moment The instantaneous heat removal rate, The current jacket medium mass flow rate. The specific heat capacity of the jacket medium, These are the temperatures at the jacket outlet and inlet at the current moment, respectively.

[0068] Simultaneously, the processing unit extracts the internal temperature. At the moment corresponding to the current interruption The time corresponding to the previous interruption The difference between them, combined with the total volume of materials in the reactor as preset or queried in real time from the material formulation database. Average density and average specific heat capacity The rate of change of internal energy of the reaction vessel system was calculated based on the fundamental laws of thermodynamics. This rate reflects the net rate of internal energy accumulation or consumption caused by the exothermic or endothermic chemical reaction and material mixing within the reaction system itself:

[0069]

[0070] In the formula, The rate of change of energy within the reactor. These are the average density, total volume, and average specific heat capacity of the material, respectively. and These are the internal temperatures at the current moment and the previous moment, respectively. The preset high-frequency interrupt period is defined later.

[0071] After completing the calculation of the above basic physical quantities, the server will record the timestamp of the current interruption period. The internal temperature The instantaneous heat removal rate and the rate of change of internal energy The data is reorganized into a quadruplet vector according to a fixed data structure format, and this vector is appended as a data point to the end of the first-in-first-out queue, thereby continuously generating and maintaining the sequence of transient physical variables that characterize the current energy transfer state of the system.

[0072] In this embodiment, the multi-source physical sensing signals include at least the internal temperature of the reactor measured by a sheathed K-type thermocouple, the cooling medium temperature at the jacket inlet and outlet measured by a PT100 platinum resistance thermometer, and a 4-20mA standard industrial current signal from the valve position feedback device.

[0073] The preset high-frequency interrupt period The typical value can be set from 1 ms to 10 ms, for example, 5 ms. This period is set based on the need to be much smaller than the primary thermal inertia time constant of the reaction system, typically on the order of seconds or minutes, to ensure that transient changes in the energy state, rather than steady-state averages, are captured. The instantaneous heat removal rate... At a certain point in time The rate at which energy is transferred from the reactor via the jacketed cooling system, measured in kW. The rate of change of internal energy. At a certain point in time The rate of change of total energy of the materials inside the reactor, expressed in kW, indicates an increase in internal energy, such as from a strongly exothermic reaction, while a negative value indicates a decrease in internal energy. The transient physical variable sequence is a quadruplet vector arranged continuously along the time dimension. The collection provides a high-resolution dynamic profile of the system's energy for subsequent steps.

[0074] As a practical application scenario for this step, let's assume a high-frequency interrupt cycle. Inside, the data acquisition and preprocessing server performs this step. At that moment, the recorded temperature inside the vessel was... In the current At any given moment, the server collects the temperature inside the vessel. Jacket inlet temperature outlet temperature Meanwhile, the electromagnetic flowmeter reading is... The system retrieved the specific heat capacity of the cooling medium (water) from the material property database. Average density of reactants Effective volume of the reactor average specific heat capacity of materials The server performs calculations, first calculating the instantaneous heat removal rate. Substituting the values, we get ,Right now Next, the rate of change of internal energy is calculated. Substituting the values, we get ,Right now Finally, the server combines these calculation results with timestamps. and internal temperature Combine to generate the transient physical variable vector at that moment. This data is then stored as a new data point in the transient physical variable sequence for use in subsequent steps.

[0075] In one embodiment of the present invention, the Jacobian tensor array construction module is used to perform the following steps:

[0076] The algebraic sum of the instantaneous heat removal rate and the internal energy change rate in the transient physical variable sequence is calculated to generate balance residual data characterizing the transient energy balance deviation; the transient heat flux residual data generated by a single preset high-frequency interruption cycle is spliced ​​and filled into a ring-shaped memory buffer of preset fixed depth in real time; the data sequence in the ring-shaped memory buffer is extracted; and the sequence is subjected to low-pass smoothing filtering and dimensionless processing based on a preset reference value.

[0077] The first-order dynamic sensitivity and second-order trend rate of change among the variable components after dimensionless transformation are calculated to generate the Jacobian estimation sequence. The Jacobian estimation sequence is then reorganized in the spatial dimension to generate a dynamic heat flux Jacobian tensor array containing thermodynamic inertial coupling relationships.

[0078] Executed by a coprocessor or dedicated signal processing unit running on the main control system, which receives the sequence of transient physical variables. For each high-frequency interrupt cycle in the sequence... The generated quadruplet vector The processing unit first performs quantification of the energy imbalance. Specific data processing logic includes extracting the instantaneous heat removal rate. and the rate of change of internal energy The algebraic sum of the two is calculated to produce a scalar value characterizing the source term of the total heat flux. :

[0079]

[0080] This scalar value is defined as the equilibrium residual, used to quantify the intensity of transient heat sources generated by chemical reactions or phase transitions in the system. Once the above data is obtained, the processing unit will generate the new transient heat flux residual data. Through direct memory write operations, data is filled to the position pointed to by the current write pointer in a pre-defined circular memory buffer of fixed depth. This write pointer is automatically incremented after each write and rolls back to the beginning position when it reaches the end of the buffer, thereby achieving continuous data updates and overwriting, and always maintaining residual data records from the most recent period.

[0081] Once the circular memory buffer has been filled at least once, the processing unit retrieves the currently stored complete data sequence from the circular memory buffer. The time span of this sequence is determined by the depth of the buffer. Simultaneously, the processing unit retrieves the internal temperature from the storage area of ​​the transient physical variable sequence, which perfectly corresponds to the time range of the data sequence within the circular memory buffer. Instantaneous heat removal rate and rate of change of internal energy Time series segments.

[0082] Subsequently, for the time series of these three variables, the processing unit first uses a preset baseline state value. Dimensionless normalization is performed on each variable to obtain dimensionless variables. Based on this, the backward difference method is used to calculate the first-order and second-order rate-of-change sequences in the dimensionless state. For any dimensionless variable... First rate of change and second-order rate of change The calculation is as follows:

[0083]

[0084]

[0085] After the above calculations, the processing unit establishes the relative rates of change between the first-order and second-order rate-of-change sequences of the three variables, i.e., cross-sensitivity estimation. It also introduces constant regularization to suppress the amplification of zero-value noise under high-frequency sampling, forming a pseudo-Jacobi matrix of dynamic sensitivity. Specifically, the 3×3 first-order dynamic sensitivity matrix is ​​calculated using the following formula. and a 3×3 second-order trend matrix :

[0086]

[0087]

[0088] Among them, dimensionless components , , , To prevent the denominator from being zero and to filter out high-frequency, minute fluctuations, a pre-defined dimensionless, minute positive number penalty factor is used, for example, limited to 10. -8 Simultaneously, the real-time sensitivity of each energy state component to the deviation of the state variable is calculated, and a Jacobi estimation matrix reflecting the local linearization coupling characteristics of the dynamic system is constructed. When the system enters a metastable state or a phase transition point, the eigenvalues ​​of this matrix will show a switching of positive and negative signs in their real parts, thereby identifying topological singularities.

[0089] It should be noted that the transient heat flux residual data is a quantification of the degree of deviation of the energy balance equation in the reactor from the actual energy balance on an extremely short time scale. It is intended to characterize the energy imbalance on an extremely short time scale. In this specific embodiment, it is represented by microsecond-level heat flux residual data obtained through high-frequency sampling. The microsecond level is intended to emphasize that it reflects the rapid dynamics originating from the physicochemical processes themselves (such as crystal transformation and microphase separation), which are smoothed out in conventional second-level or minute-level sampling. It is obtained through millisecond-level interrupted periodic sampling.

[0090] In this embodiment, the circular memory buffer has a preset fixed depth. This is a key parameter, and its value is usually set at... arrive Between data points, for example The depth setting is based on an engineering trade-off: the depth needs to be large enough to contain complete periodic information reflecting dynamic characteristics, thereby ensuring the statistical stability of covariance calculation; at the same time, the depth cannot be too large to avoid introducing too much historical information and reducing sensitivity to sudden changes in the current state, and the real-time performance of the calculation must be guaranteed. The dynamic heat flux Jacobian tensor array... It is at each time step Dynamically updated The tensor, whose first layer matrix is ​​the aforementioned first-order dynamic sensitivity matrix and the second layer is the aforementioned second-order trend matrix, captures the instantaneous coupling strength and direction between the rate of change of various energy-related physical quantities and their acceleration within the system.

[0091] To further illustrate the logic above and connect with the preceding examples, in The transient physical variables acquired at each moment are First, the processing unit calculates the transient heat flux residual data. Assume the depth of the circular memory buffer is... The value is 1024, and the current write pointer is located at index address 500. The processing unit writes the value 113.9 to this address, i.e. Now, assume the buffer is full and the Jacobian tensor array needs to be computed. To do this, the system retrieves data from the same time period as the data in the buffer (from...). arrive )of Sequence. For simplicity, assume... During the stable phase, its principal component eigenvalues The real part of the equation is controlled by the heat dissipation slope. Since the system is in dynamic stable equilibrium, the eigenvalues ​​lie in the left half of the complex plane, and the real part is negative, such as -0.15. As the reaction approaches the singularity of a violent phase transition, the gradient of the heat production rate increases sharply and exceeds the heat dissipation slope. Solving for... The obtained real part will cross zero and become positive, such as 0.22. The processor monitors... The reversal of the positive and negative signs confirms that a qualitative change has occurred in the system's dynamic manifold.

[0092] In one embodiment of the present invention, the system topology singularity identification module is used to perform the following steps:

[0093] Read multiple data matrices from the bottom layer of the dynamic heat flux Jacobian tensor array, and solve for the determinant characteristic polynomial principal components of the multiple data matrices;

[0094] Track the relative motion trajectory of the eigenvalues ​​corresponding to the principal component of the determinant characteristic polynomial within a continuous time step, monitor and compare whether the relative motion trajectory exhibits a trajectory abrupt change phenomenon that represents the reversal of energy flow. The trajectory abrupt change phenomenon is determined when the relative vector angle change or local curvature of the eigenvalue trajectory in the complex plane exceeds a set threshold.

[0095] A confirmation instruction is issued based on the real part of the eigenvalue crossing the preset zero point, resulting in a spatial feature dimensionality reduction state. The eigenvalue dimensionality reduction mutation flag, which represents the phase transition singularity of the physical system, is written separately into the preset register.

[0096] The analysis and resolution of this tensor array is performed by a dedicated mathematical coprocessor of the main control system or a numerical computation library such as LAPACK or Eigen running on a high-performance processor. This processor actively reads the dynamic heat flux Jacobian tensor array during each control update cycle. This array is essentially a tensor array of size [missing information]. The data structure contains two The data matrix, i.e., the first-order dynamic sensitivity matrix. and second-order trend matrix .

[0097] The processor first targets the multiple data matrices respectively, that is... and The problem involves finding the eigenvalues ​​of these two matrices. This solution process is achieved by calculating the matrices. Characteristic polynomial To achieve this, in which In order and , Let be the characteristic roots to be found. Let be the identity matrix. Solve for the roots of this cubic polynomial to obtain the three eigenvalues ​​of each matrix.

[0098] Based on the obtained eigenvalues, the processor is configured to track the real-time trajectory of the principal component of the determinant characteristic polynomial, i.e., the eigenvalue with the largest amplitude and stable sign under most stable operating conditions. In specific implementation, the system is... and Maintain separate tracking queues to store the latest updates. The values ​​of its principal component eigenvalues ​​within each time step, for example Within consecutive time steps, the processor will update the most recently calculated principal eigenvalues. The principal component eigenvalues ​​in the tracking queue at the previous time step The system monitors and compares the relative motion trajectories by calculating the changes in their position vectors on the complex plane. The system pays particular attention to the presence of abrupt trajectory changes that characterize a reversal of energy flow. As a specific judgment logic, the criteria for determining abrupt trajectory changes are that the change in the relative vector angle or local curvature of the characteristic root trajectory within the complex plane exceeds a set threshold.

[0099] To improve computational efficiency, the core judgment logic in this step is more direct; the system continuously monitors the real part of the eigenvalues. Whether it crosses a preset zero point, or suddenly approaches or crosses zero from a stable positive or negative value. When the real part of any principal component eigenvalue is detected to cross a zero point, for example... and ,in For a small positive threshold, the system determines that a state has occurred that leads to a reduction in the dimensionality of the physical system's dynamic behavior space. The physical interpretation of this state is that the system's state variables have lost their dynamic stability in the direction of the eigenvector corresponding to the eigenvalue, resulting in a qualitative change.

[0100] When the zero-crossing threshold condition is detected and met, the processor immediately issues an acknowledgment instruction based on the real part of the eigenvalue crossing a preset zero point, resulting in a spatial feature dimensionality reduction state. This instruction triggers an atomic write operation, flipping a specific bit in the preset register, specifically designed for flag bit communication, from logic 0 to logic 1. This bit is the separately written flag bit representing the eigenvalue dimensionality reduction abrupt change at the phase transition singularity of the physical system. This register is designed to be directly accessible in hardware, ensuring that the flag bit state can be transmitted without delay.

[0101] The principal component of the determinant characteristic polynomial is the main eigenvalue that plays a decisive role in the dynamics of the system during the non-phase transition stage. It typically has the largest magnitude or the largest absolute value of its real part. In practice, by analyzing steady-state data over a certain period, it is possible to determine a priori which eigenvalue to track as the principal component, or to identify the eigenvalue with the largest magnitude in real time using an algorithm.

[0102] The trajectory abrupt change phenomenon, which characterizes the reversal of energy flow, refers to the local curvature of the characteristic root trajectory exceeding a predetermined threshold in the complex plane. This is usually a precursor to a system dynamics transition from one attractor to another. The predetermined zero point is actually a tiny numerical range. ,For example It is used to stably determine whether the real part of the characteristic root crosses zero in numerical computation.

[0103] It should be noted that the preset register is located in a high-speed static random access memory (SRAM) area shared by the processor and peripherals, or it is directly the status register inside the processor. Its specific status changes can be configured to generate hardware interrupt signals.

[0104] The eigenvalue reduction mutation flag is a binary bit. Setting it (becoming 1) is the final and only software criterion for switching to the next reaction stage. All subsequent hardware-level operations are directly triggered by this flag, without involving any numerical comparisons or logical judgments.

[0105] To illustrate the working principle more intuitively, let's assume that... At any given time, the coprocessor receives the dynamic heat flux Jacobian tensor array. Focus on one of the matrices, for example, the first-order dynamic sensitivity matrix. For simplicity, let's assume... During the stable phase, its principal component eigenvalues The real part is stable at - in consecutive time steps. Approximately. This value is continuously recorded in the tracking queue. As the reaction approaches the phase transition point, in Time, what is sought The real part is - .exist Time, for - In the current At any moment, the solution is needed. New eigenvalues ​​are obtained, and their principal component eigenvalues ​​are discovered. The real part becomes The system's zero-point crossing threshold is set. for Processor comparison and If this condition is met, spatial feature dimensionality reduction has been confirmed. The processor immediately generates a confirmation instruction. Assume the physical address of the preset register is 0x3F80A004, and the bit used for the flag is the 3rd bit. The processor executes a bit manipulation instruction, such as HWREG(0x3F80A004)|=(1<<3), forcibly setting the 3rd bit of the register address from 0 to 1. At this point, the feature root dimensionality reduction mutation flag is written, its state becomes active, and subsequent hardware logic will directly respond to this state flip.

[0106] In one embodiment of the present invention, the hardware wake-up vector generation module is used to perform the following steps:

[0107] The system calls multiple independent reaction stage control parameter clusters that are in clock-gated sleep state in the main control system memory, and locks the independent reaction stage control parameter clusters to be executed in the next sequence, thus restricting multiple independent reaction stage control parameter clusters from acquiring the right to allocate processor task time slices in the round-robin within the normal control cycle.

[0108] The characteristic root dimension reduction mutation flag bit carried in the preset register is converted to output logic voltage, generating a transient hardware-level level switching signal;

[0109] The hardware-level level-flipping signal is hard-wired and mapped to the wake-up interrupt vector table of the control parameter cluster of the next sequence's independent response stage. The output is the hardware-level execution clock trigger vector that directly triggers the activation of the control parameter cluster of the next sequence's independent response stage.

[0110] From the perspective of stage switching control, the execution of this step involves the collaborative work of the real-time operating system (RTOS) kernel, timing logic controller, and memory management unit within the main control system to respond to the eigenvalue dimensionality reduction mutation flag. First, during the initialization phase, the system loads multiple independent reaction stage control parameter clusters, each corresponding to a different reaction stage, into the high-speed memory of the main control system according to a preset reaction process recipe. Each control parameter cluster is encapsulated as an independent execution task or thread, for example, named Stage1_Task, Stage2_Task, etc. At any given time, only one task is active; all other tasks are placed in a clock-gated sleep state by the RTOS, i.e., suspended and removed from the scheduler's ready queue, thereby avoiding competition for processor task time slice allocation rights and achieving the goal of saving power and computing resources.

[0111] The system simultaneously maintains a sequence pointer to explicitly lock the next independent reaction stage control parameter set to be executed after the currently executing task. For example, if Stage1_Task is currently active, the sequence pointer points to Stage2_Task. When the characteristic root dimensionality reduction mutation flag bit carried in the preset register is set, the state change of this memory address bit is physically mapped to the general-purpose digital output port GPIO, thereby converting the logic 1 into a high-level logic voltage, such as jumping from 0V to 3.3V, generating a nanosecond-level, transient hardware-level level toggle signal. The generation of this signal is a direct hardware behavior, completely independent of the regular software scan cycle of the main control system. This hardware-level level toggle signal is directly connected to the dedicated external interrupt request pin IRQ of the main control system microprocessor through physical wiring on the PCB board, i.e., hard-wired connection. This pin is configured in edge-triggered mode, such as rising edge triggering.

[0112] When the pin detects a voltage rise due to the hardware-level level toggle signal, it immediately submits a high-priority hardware interrupt request to the processor core. The processor core responds to the interrupt, suspending any currently executing low-priority tasks and jumping to the pre-defined interrupt service routine (ISR) entry address based on the entry corresponding to the IRQ number in the wake-up interrupt vector table. This ISR is relatively small; its main function is to call an RTOS kernel function to wake up the control parameter set of the next independent reaction stage pointed to by the sequence pointer from its suspended state and place it in the ready state. This entire deterministic, non-bypassable execution path, triggered by a hardware interrupt and ultimately waking up the target task, constitutes the hardware-level execution clock trigger vector that directly triggers the activation of the control parameter set, ensuring that the instruction source for stage switching deterministically corresponds to the actual topological mutation of the physical system.

[0113] In this embodiment, the multiple independent reaction stage control parameter clusters are either stored in non-volatile memory or issued from the host computer before the reaction begins. Each cluster contains all the parameters required for a complete PID control loop, such as the setpoint SP, proportional coefficient P, integral time I, derivative time D, and related logic and output limiting. The clock-gated sleep state, at the RTOS level, manifests as the task being in a suspended or blocked state. At the hardware level, this corresponds to the clock signal of the computing unit involved in the task code being temporarily shut off by the gating unit when it is not executing, thus entering a low-power consumption state.

[0114] The hardware-level level-flipping signal is a standard digital logic signal whose voltage and current characteristics conform to TTL or CMOS level standards, ensuring reliable signal transmission. The wake-up interrupt vector table is an inherent memory area in the processor architecture, establishing a fixed address mapping between hardware interrupt sources and their corresponding handlers. The hardware-level execution clock trigger vector is initiated by the hardware-level level-flipping signal, and through the interrupt mechanism, ultimately leads to a change in the target task's state—the entire control flow—serving as a precise, asynchronous, and highly deterministic control mechanism.

[0115] To illustrate the specific process of hardware linkage, continuing from the previous example, the processor has set bit 3 of register 0x3F80A004 to 1. This register is memory-mapped to pin PB5 of the processor's GPIO_PortB. Therefore, the output voltage of pin PB5 immediately rises from 0V to 3.3V. The physical trace of this pin is connected to a high-priority external interrupt pin on the same chip, such as the EXTI pin.

[0116] It is important to note that the priority of this external interrupt is precisely configured to be equal to or slightly lower than the highest interrupt priority allowed by the RTOS for system calls, such as the `configMAX_SYSCALL_INTERRUPT_PRIORITY` threshold in FreeRTOS, to ensure that the interrupt can respond extremely quickly while still allowing safe invocation of system kernel functions. The processor detects a rising edge signal on the pin, triggering the highest priority interrupt under the configured threshold. The system interrupt vector table indicates that execution will now jump to the corresponding interrupt service routine entry address 0x00000200. The program sequence pointer currently points to the task handle `h_stage2_task`, which encapsulates the parameters of the second reaction stage. The interrupt service routine code at 0x00000200 is very concise, containing only interrupt-safe instructions: `xTaskResumeFromISR(h_stage2_task)`; or using a more efficient task notification mechanism: `vTaskNotifyGiveFromISR(h_stage2_task,&xHigherPriorityTaskWoken)`.

[0117] This is a FreeRTOS API call specifically designed for interrupt context, used to safely wake up a specified suspended task and force a context switch upon exiting an interrupt. After this instruction is executed, the state of Stage2_Task changes from suspended to ready. When the next RTOS scheduler tick arrives, since Stage2_Task has been activated, it will acquire a CPU time slice and begin execution, thus completing the next-stage controller wake-up process driven by the eigenvalue reduction mutation flag, with extremely low deterministic hardware latency. The hardware-level execution clock trigger vector is fully embodied in this example through the level toggling of the PB5 pin, the triggering of a high-priority external interrupt, and the execution of the interrupt service routine.

[0118] In one embodiment of the present invention, the transient residual data extraction module is used to perform the following operations:

[0119] Suspend the basic control scan program within the same machine cycle where the hardware-level execution clock trigger vector wake-up interrupt occurs; build a direct memory access bus channel from the ring memory buffer to the physical address of the independent reaction stage control parameter cluster of the next sequence; manipulate the direct memory access bus channel to extract transient heat flux residual data at the end of the ring memory buffer without controller intervention; synthesize transient heat flux residual data fragments containing real-time internal energy states.

[0120] In terms of timing, execution is carried out by the context of the highest-priority interrupt service routine (ISR) or by a high-priority real-time task directly awakened by the interrupt. When the generated hardware-level execution clock trigger vector activates the wake-up interrupt, the processor core responds immediately. At the beginning of the execution of the wake-up interrupt's ISR or the highest-priority task awakened by it, the system first executes a suspend instruction to forcibly halt or postpone the execution of the currently running basic control scan program. The basic control scan program is a cyclic task responsible for routine logic control and low-speed PID loop regulation, with a lower priority than the stage switching task. By suspending it, processor resources can be prioritized for executing critical stage switching operations, preventing potential race conditions or data inconsistency issues.

[0121] Meanwhile, to achieve zero-latency data transfer, the system bypasses the conventional CPU-mediated data copying method and instead configures and starts the Direct Memory Access (DMA) controller. This configuration process includes setting the DMA transfer descriptors (including source address, destination address, and transfer length): since the circular memory buffer is linear in physical memory, the system calculates the logical boundaries based on the read pointer position. The DMA source address configuration mechanism supports dynamically issuing single transfer commands or scatter-gather chained transfer descriptors based on whether physical wraparound occurs, ensuring safe and continuous data extraction from the end of the buffer; the destination address is set to the physical address of the specific data receiving area reserved in the memory space of the control parameter cluster (which is now activated) for the next sequential independent reaction stage; the data length is set to a predefined number of bytes, i.e., the size of the transient heat flux residual data to be extracted. Once configured, the DMA controller is immediately activated, taking over the system bus and automatically fetching a byte stream of the specified length from the source address (circular memory buffer) without CPU intervention, and writing it directly to the destination address, i.e., the receiving area of ​​the control parameter cluster.

[0122] Since this process involves entirely hardware-level data transfer, it has extremely low time overhead. The extracted byte stream is the latest segment of transient heat flux residual data in the circular memory buffer, closest to the phase transition singularity. This data is further processed or encapsulated to synthesize a fragment of transient heat flux residual data containing the real-time internal energy state. This fragment not only contains the magnitude of energy imbalance but also implicitly contains the dynamic energy gradient information of the system at the moment of topological abrupt change.

[0123] It should be noted that suspending the basic control scan program within the same machine cycle as the hardware-level execution clock-triggered vector wake-up interrupt means that the regular, non-urgent control algorithm is paused within a very short time in response to the interrupt, ensuring the atomicity and highest execution priority of the switching operation. The Direct Memory Access Bus (DMB) channel is a high-speed data transfer path established between memory modules using the DMA controller. This channel bypasses the CPU, significantly improving data transfer efficiency and reducing CPU load.

[0124] The controller-free data extraction refers to the DMA process autonomously completing data read and write operations once it starts. During this time, the CPU can execute other instructions in parallel. If there are higher priority tasks or the CPU is in a waiting state, it does not need to participate in copying each byte. The transient heat flux residual data fragment is a data block that extracts the critical heat flux residual data recorded in the circular buffer just before and after the system's phase transition singularity. This is a direct record and reflection of the system's dynamics at the critical point.

[0125] Taking the aforementioned scenario as an example, Stage2_Task is awakened and immediately gains execution rights. At the beginning of its task code, the first instruction calls vTaskSuspend(h_base_scan_task), suspending the basic control scan task handle named h_base_scan_task. Assume the physical base address of the created circular memory buffer is 0x20000000, its size is 1024 sampling points, each point occupies 4 bytes, totaling 4096 bytes; the current write pointer points to the buffer address 0x20000400. To extract the 64 most recently updated data points at the end of the buffer as fragments, the system configures the DMA controller. Considering the wraparound characteristics of the circular memory buffer, the system prevents the source pointer from overflowing by performing a modulo operation on the address limits. Let the physical base address of the buffer be Base (0x20000000), the total byte depth be Size (4096 bytes), the current write pointer offset be Offset (0x0400), and the length of bytes to be extracted be Extract (64 × 4 = 256 bytes). Considering that the circular memory buffer is linear in physical address, a single DMA transfer will cause an out-of-bounds error when the extraction range crosses the tail boundary of the physical base address. Therefore, data extraction without controller intervention is accomplished by a DMA controller that supports a distributed-aggregated mode, or by a dual-channel chained DMA with hardware and software cooperation.

[0126] The specific configuration logic is as follows: The system first calculates the offset position of the logical starting point: Start_Offset=(Offset-Extract+Size)%Size.

[0127] (1) If Start_Offset + Extract ≤ Size, it means that the data segment to be extracted does not cross the physical boundary and belongs to contiguous memory. The system is configured for a single DMA transfer, with the source starting address being Base + Start_Offset and the transfer length being Extract (256 bytes).

[0128] (2) If Start_Offset + Extract > Size, it indicates data wrap-around. The system is configured with a chained DMA transfer instruction descriptor: the source address of the first transfer (the tail residue) is Base + Start_Offset, and the transfer length is Size - Start_Offset; after the first transfer is completed, the DMA hardware controller automatically and seamlessly continues to execute the second transfer (the head new entry), the source address jumps back to the starting address Base, and the transfer length is Extract - (Size - Start_Offset); throughout the process, due to the use of the chained descriptor transfer mechanism, no CPU interrupt intervention is required.

[0129] Substituting the values ​​in this scenario, Start_Offset = (1024 - 256 + 4096) % 4096 = 768, corresponding to the address 0x20000300. Since 768 + 256 = 1024 ≤ 4096, it does not cross the physical tail boundary and belongs to a contiguous block. Therefore, the source address register of DMA channel 1 is set to 0x20000300, and the destination address register is set to the physical address of the receive area, 0x40001000, in the Stage2_Task control parameter family.

[0130] After configuration, an enable bit is written to the DMA control register to initiate the transfer. The DMA controller manages the bus, copying 256 bytes of data completely to the internal data area within a very short clock cycle. The CPU does not intervene in the byte-by-byte data transfer process at all. At this point, the transient heat flux residual data fragment containing 64 of the latest heat flux residual values ​​has been successfully written to disk, awaiting the next aggregation and overwrite operation.

[0131] In one embodiment of the present invention, the control state overwrite activation module is used to perform the following steps:

[0132] The extracted transient heat flux residual data fragments are written to the integral accumulator register and differential advance buffer within the control parameter cluster of the next sequence's independent reaction stage. The transient heat flux residual data fragments are then used to completely replace the original accumulated deviations in integral and differential operations of the control parameter cluster of the next sequence's independent reaction stage, ensuring that the initial calculated opening of the control valves matches the actual transient thermal energy state of the current reactor. The clock sleep gating state for the control parameter cluster of the next sequence's independent reaction stage is deactivated, and the reset parameter instructions are applied to the underlying actuators to execute the disturbance-free stage switching driven by the kinetic singularity, outputting the disturbance-free control instruction for the target stage.

[0133] In the subsequent control logic, after the control parameter cluster gains CPU execution rights in the next independent reaction phase, it already carries the transient heat flux residual data fragment transferred from DMA and immediately begins executing its internal preset initialization and control logic. The core action of this step is to forcibly overwrite the status register of the associated PID control algorithm within this parameter cluster.

[0134] First, the task code directly accesses the received transient heat flux residual data fragment and extracts key statistics or the value of the last data point. In one implementation, the mean or weighted average of the data fragment is calculated to obtain a scalar value representing the average energy imbalance near the singularity.

[0135] Subsequently, the task performs an atomic write operation, writing this scalar value directly and unconditionally into the integral accumulator register inside the PID controller to be activated, which is dedicated to storing the integral accumulation value.

[0136] At the same time, the slope representing the trend of change is extracted from the data fragment, for example, by performing linear regression calculation on the data fragment, and this slope value is overwritten into the differential advance buffer.

[0137] Through this series of operations, the method fully replaces the accumulated deviations in the integral and derivative operations of the control parameter cluster for the next independent reaction stage with the transient heat flux residual data fragment. Normally, when a PID controller is activated, its initial values ​​for the integral and derivative terms are usually zero or inherited from the final values ​​of the previous run, which often deviates from the current actual operating conditions. However, this method, through forced overwriting, ensures that the calculation benchmark for the initial calculated opening of the control valve—that is, the internal state of the PID algorithm—originates from a direct mapping of the actual transient thermal energy state of the reactor at the moment of topological change.

[0138] After the forced reset of its internal state, the task performs the final step: calling the RTOS kernel service to release the clock sleep gating state imposed on it. Specifically, it transforms itself from a single-execution interrupt wake-up task into a periodically executed real-time task and formally joins the RTOS's periodic task scheduling queue. At this point, the initialized PID control loop is smoothly integrated into the system. In the first control cycle, based on the forced initial integral and derivative states, it calculates the control output that can immediately counteract the current thermal dynamic inertia of the physical system, and applies the reset parameter commands to the underlying actuators such as the bottom heater and cooling water regulating valve via a digital-to-analog converter (DAC) or pulse-width modulation (PWM) module. The implementation of this command represents the final completion of a disturbance-free phase transition directly driven by the dynamic singularity, aimed at eliminating startup disturbances.

[0139] In this embodiment, the integral accumulator register is used to accumulate historical errors in the digital PID implementation, and its value directly affects the integral component in the PID output; the derivative-ahead buffer is used to temporarily store the controlled variable values ​​of the previous few cycles to calculate its rate of change, i.e., the derivative component. The full replacement means resetting and overwriting any historical state information that the PID controller may have, and reshaping its initial behavior only based on the data of the current physical singularity.

[0140] The phrase "adapting the initial calculated opening of the control valve to the actual transient thermal energy state of the reactor" means that the output value calculated by the new PID in the first execution cycle is no longer based on a calculation starting from zero with a large initial error, but directly from an intermediate state reflecting the current energy imbalance. The first adjustment command generated can largely offset or meet the current energy demand or overflow, thus avoiding overshoot and oscillation. The phrase "releasing the clock sleep gating state" signifies that the control task in this stage has officially transformed from a one-time initialization task to a periodic safeguarding task responsible for the stable control throughout this stage.

[0141] As an explanation of the data substitution effect, Stage2_Task begins execution after obtaining the transient heat flux residual data fragment containing 64 heat flux residual values. It is assumed that the average of the 64 heat generation residual values ​​is... kW. To accurately map this thermodynamic state to the initial mathematical state of the controller, a state mapping factor is introduced. Its unit is It is used to characterize the integral cumulative contribution corresponding to a unit disturbance power.

[0142] Task code execution:

[0143]

[0144] set up Based on process experience, the initial value of the integral term is reset to 56.95. Simultaneously, the rate of change of the residual (kW / s) is multiplied by the differential mapping factor. This is then overwritten to `pid_derivative_buf` to ensure that the calculation basis for controlling the opening is directly anchored to the instantaneous energy potential at the singular point. Simultaneously, by performing least-squares linear fitting on the fragment data, the slope is obtained. The PID module's derivative-ahead buffer, `pid_derivative_buf`, originally stored a set of old or zero values. The task code updates it with a numerical sequence that reflects the slope. At this point, the internal state of the PID controller is reset by the instruction. Next, the task calls the RTOS API, such as `xTaskCreatePeriodic(...)`, to register itself as a periodic task to execute every 100ms, disabling the previous single-interrupt wake-up mechanism. During the first 100ms period of the scheduled task, the Stage2_Task's PID algorithm is calculated for the first time. Its input error is the difference between the current reactor temperature and the set temperature of the new stage, but its internal integral term no longer accumulates from 0; instead, it is calculated directly based on the initial value of `pid_integrator_reg` (56.95). Simultaneously, the derivative term is also calculated based on the slope. Calculations are performed. The final calculated control valve opening command, for example, requires increasing the cooling water valve opening from 20% in the previous stage to 65% to cope with the instantaneous total heat source intensity of up to 113.9 kW. This 65% opening command is sent to the underlying hardware actuator. Since the disturbance-free control command for this target stage reflects the energy state at the moment of phase change, it essentially suppresses the overshoot phenomenon of the reactor temperature, allowing the temperature to approach the set value of the second stage in a relatively stable manner, thus completing the disturbance-free stage switch.

[0145] Each of the modules can be implemented in whole or in part through software, hardware, or a combination thereof. It supports hardware embedded in or independent of the processor in the computer device, and also supports software stored in the memory of the computer device, so that the processor can call and execute the operations corresponding to each of the above modules.

[0146] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. An intelligent switching system for parameters of a multi-stage reaction process in a reactor, characterized in that, include: The transient physics sequence generation module is used to acquire multi-source physical sensing signals from the underlying hardware of the reactor and generate a transient physics variable sequence characterizing the current energy transfer state of the system. The Jacobian tensor array building module is used to construct discrete Jacobian estimation tensor arrays that characterize the dynamic phase space evolution properties of a system. The system topological singularity identification module is used to analyze the dynamic heat flux Jacobian tensor array, identify the system topological singularities, and generate eigenvalue dimensionality reduction mutation flags. The hardware wake-up vector generation module is used to perform timing interlocking in response to the feature root dimensionality reduction mutation flag bit, and to generate a hardware-level execution clock trigger vector for the forced wake-up stage controller. The transient residual data extraction module, based on the hardware-level execution clock trigger vector interception activation wake-up interrupt cycle related tasks, extracts transient heat flux residual data fragments under multi-source physical sensing conditions through direct memory access mechanism; The control state overwrite activation module is used to forcibly overwrite the internal state of the stage controller using transient heat flux residual data fragments, activate reset parameters to output a target stage disturbance-free control command that can seamlessly switch to the next reaction cycle. The internal state of the stage controller includes the initial integral accumulation value and differential slope value that can offset the energy imbalance state.

2. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 1, characterized in that, Acquiring multi-source physical sensing signals from the underlying hardware of the reactor includes the following steps: The internal temperature, jacket inlet and outlet temperatures, and feedback current of the temperature control valve position of the reactor system are collected synchronously within a preset high-frequency interruption cycle. The feedback current is converted into the corresponding physical valve position opening. The instantaneous heat removal rate is calculated by combining the physical valve opening, internal temperature, and jacket inlet and outlet temperatures.

3. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 2, characterized in that, Generating a sequence of transient physical variables characterizing the current energy transfer state of the system includes the following steps: Extract the differential change in internal temperature within a single preset high-frequency interrupt cycle; Calculate the rate of change of internal energy of the reaction vessel system; The timestamps of internal temperature, instantaneous heat removal rate, and internal energy change rate are recombined to generate a transient physical variable sequence.

4. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 3, characterized in that, Processing transient physical variable sequences includes the following steps: Calculate the algebraic sum of the instantaneous heat removal rate and the internal energy change rate in the transient physical variable sequence to generate balance residual data characterizing the transient energy balance deviation; The transient heat flux residual data generated by a single preset high-frequency interrupt cycle is spliced ​​together and filled into a ring-shaped memory buffer of preset fixed depth in real time.

5. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 4, characterized in that, Constructing a dynamic heat flux Jacobian tensor array that reflects the strength of multivariable temporal coupling includes the following steps: Extract the data sequence from the circular memory buffer; Calculate the first-order dynamic sensitivity and second-order trend rate of change among the variable components in the data sequence to generate the Jacobian estimation sequence. By recombining the Jacobian estimation sequence in the spatial dimension, a dynamic heat flux Jacobian tensor array containing thermodynamic inertial coupling relationships is generated.

6. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 5, characterized in that, The process of analyzing the dynamic heat flux Jacobian tensor array, identifying the topological singularities that trigger the system, and generating eigenvalue dimension reduction mutation flags includes the following steps: Read multiple data matrices from the bottom layer of the dynamic heat flux Jacobian tensor array, and solve for the determinant characteristic polynomial principal components of the multiple data matrices; Track the relative motion trajectory of the eigenvalues ​​corresponding to the principal component of the determinant characteristic polynomial within a continuous time step, monitor and compare whether the relative motion trajectory exhibits a trajectory abrupt change phenomenon that represents the reversal of energy flow. The trajectory abrupt change phenomenon is determined when the relative vector angle change or local curvature of the eigenvalue trajectory in the complex plane exceeds a set threshold. A confirmation instruction is issued based on the real part of the eigenvalue crossing the preset zero point, resulting in a spatial feature dimensionality reduction state. The eigenvalue dimensionality reduction mutation flag, which represents the phase transition singularity of the physical system, is written separately into the preset register.

7. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 6, characterized in that, Generating a hardware-level execution clock trigger vector for the forced wake-up phase controller includes the following steps: The system calls multiple independent reaction stage control parameter clusters that are in clock-gated sleep state in the main control system memory, and locks the independent reaction stage control parameter clusters to be executed in the next sequence, thus restricting multiple independent reaction stage control parameter clusters from acquiring the right to allocate processor task time slices in the round-robin within the normal control cycle. The characteristic root dimension reduction mutation flag bit carried in the preset register is converted to output logic voltage, generating a transient hardware-level level switching signal; The hardware-level level-flipping signal is hard-wired and mapped to the wake-up interrupt vector table of the control parameter cluster of the next sequence's independent response stage. The output is the hardware-level execution clock trigger vector that directly triggers the activation of the control parameter cluster of the next sequence's independent response stage.

8. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 7, characterized in that, Intercepting associated tasks that activate wake-up interrupt cycles based on hardware-level execution clock trigger vectors includes the following steps: Suspend the basic control scan program within the same machine cycle as the hardware-level execution clock trigger vector wake-up interrupt; Establish a direct memory access bus channel from the circular memory buffer to the physical address of the independent reaction stage control parameter cluster for the next sequence.

9. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 8, characterized in that, Extracting transient heat flux residual data fragments from multi-source physical sensing states using direct memory access mechanisms includes the following steps: Manipulate the direct memory access bus channel to extract transient heat flux residual data at the end of the circular memory buffer without controller intervention; Synthesize transient heat flux residual data fragments containing real-time internal energy states.

10. The intelligent switching system for multi-stage reaction process parameters in a reactor according to claim 9, characterized in that, The internal state of the stage controller is forcibly overwritten using transient heat flux residual data fragments, and the reset parameters are activated to output a target stage disturbance-free control command that can seamlessly transition to the next reaction cycle. This includes the following steps: Write the extracted transient heat flux residual data fragments into the integral accumulator register and differential advance buffer within the control parameter cluster of the next sequence independent reaction stage; The transient heat flux residual data fragments are fully replaced with the original integral and differential calculation accumulated deviations of the control parameter cluster of the independent reaction stage in the next sequence, so that the initial calculated opening of the control valve is adapted to the actual transient thermal energy state of the current reactor. Release the clock sleep gating state of the independent reaction stage control parameter cluster for the next sequence, apply the reset parameter instructions to the underlying actuator to execute the disturbance-free stage switching driven by the dynamic singularity, and output the disturbance-free control instruction for the target stage.

Images