Power supply circuit and circuit arrangement

Abstract

Power supply circuit and circuit device. A power supply circuit includes an amplifier including a differential pair composed of a first transistor and a second transistor and a load section as a load of the differential pair. Also, in the power supply circuit, an input voltage is input to a gate of the first transistor, and a drain of the second transistor is connected to the gate. Further, the amplifier outputs, from the drain of the second transistor, as an output voltage, a voltage in which a work function difference voltage of the first transistor and the second transistor is offset by an offset voltage based on a size ratio of the first transistor and the second transistor.

Description

Technical Field

[0001] This invention relates to power supply circuits and circuit devices. Background Technology

[0002] Various solutions have been proposed for voltage generation circuits to reduce the temperature dependence of output voltage. Patent Document 1 discloses a voltage generation circuit that improves the temperature characteristics of the output voltage by including a differential amplifier circuit and a voltage divider circuit connected in a voltage follower manner.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2005-340337

[0004] The voltage generation circuit disclosed in Patent Document 1 includes resistors, which increases the chip area. A method is desired to construct a power supply circuit that balances improved temperature characteristics of the output voltage and reduced cost. Summary of the Invention

[0005] One aspect of this disclosure relates to a power supply circuit comprising a first amplifier, the first amplifier including a first differential pair consisting of a first transistor and a second transistor and a first load portion serving as a load of the first differential pair, an input voltage being input to the gate of the first transistor, the drain of the second transistor being connected to the gate, and the first amplifier outputting a voltage from the drain of the second transistor as a first output voltage such that the voltage difference between the first transistor and the second transistor is offset by a first offset voltage based on the size ratio of the first transistor to the second transistor.

[0006] Furthermore, another aspect of this disclosure relates to a circuit device comprising: the aforementioned power supply circuit; a discharge circuit that supplies power to an external source based on a battery voltage from a battery; and a discharge system control circuit that controls the discharge circuit, wherein the power supply circuit operates based on the battery voltage and outputs a power supply voltage based on the first output voltage, and the discharge system control circuit operates based on the power supply voltage. Attached Figure Description

[0007] Figure 1 This is a diagram illustrating an example of the structure of a circuit device including the power supply circuit of this embodiment.

[0008] Figure 2 This is a diagram illustrating an example of the structure of the power supply circuit in this embodiment.

[0009] Figure 3 This is a diagram illustrating a reference example.

[0010] Figure 4 This is a diagram illustrating the effects of this embodiment.

[0011] Figure 5 This is a diagram illustrating a more detailed structural example of the power supply circuit of this embodiment.

[0012] Figure 6 This is another diagram illustrating a more detailed structural example of the power supply circuit of this embodiment.

[0013] Figure 7 This is a diagram illustrating other structural examples of the power supply circuit of this embodiment.

[0014] Label Explanation

[0015] 1. Circuit device; 3. Battery; 10. Power supply circuit; 20. Discharge system control circuit; 30. Discharge circuit; 100. First amplifier; 101. First load section; 111. First differential pair; 200. Second amplifier; 202. Second load section; 222. Second differential pair; 300. Impedance conversion circuit; N11, N12, N13, N14, N15, N21, N22, N23, N24, N25, N26, N27, N28, N31, N32, N33, N34, N35, N36, N51, N52, N53, N54, N55, N56 nodes; TR11, TR12, TR15, T Transistors R21, TR22, TR25, TR31, TR32, TR33, TR34, TR35, TR36, TR37, TR46, TR47, TR51, TR52, TR53, TR54, TR55, TR56, and TR57; TR1 (first transistor); TR2 (second transistor); TR3 (third transistor); TR4 (fourth transistor); V1, V2, and VDD voltages; VBAT (battery voltage); VIN1 (input voltage); VOUT1 (first output voltage); VOUT2 (second output voltage); VPS (power supply voltage); W1 (first work function differential voltage); W2 (second work function differential voltage). Detailed Implementation

[0016] The preferred embodiments of this disclosure are described in detail below. Furthermore, the embodiments described below do not unduly limit the content described in the claims, and the structures described in these embodiments are not necessarily all essential technical features.

[0017] Figure 1 This diagram illustrates an example of the structure of a circuit device 1 including the power supply circuit 10 of this embodiment. The circuit device 1 includes a power supply circuit 10, a discharge system control circuit 20, and a discharge circuit 30. The power supply circuit 10 outputs a power supply voltage VPS based on the battery voltage VBAT from the battery 3, as detailed later. The battery 3 is, for example, a rechargeable secondary battery, such as a lithium battery or a nickel battery.

[0018] The discharge system control circuit 20 performs various controls during the discharge process of the battery 3. Specifically, for example, the discharge system control circuit 20 operates based on the power supply voltage VPS to control the discharge circuit 30. The discharge system control circuit 20 can be implemented, for example, using logic circuits generated by automatic configuration and wiring methods such as gate arrays, or various processors such as microcomputers.

[0019] The discharge circuit 30 supplies voltage to the external circuit device 1. That is, the discharge circuit 30 is a power supply circuit that supplies voltage to the external device based on the discharge of the battery 3. For example, the discharge circuit 30 supplies voltage to devices such as DSPs (digital signal processors) and microprocessors. In this way, the circuit device 1 of this embodiment operates as a discharge system circuit that supplies voltage to external devices through the discharge of the battery 3.

[0020] Furthermore, the structure of the circuit device 1 in this embodiment is not limited to... Figure 1 Various modifications, such as adding other structures, can be implemented. For example, the circuit device 1 may also include a charging system circuit. Detailed descriptions and illustrations of the charging system circuit are omitted, but it includes, for example, a receiving circuit, a charging system control circuit, and a charging circuit. For example, the charging system control circuit controls the receiving circuit and the charging circuit; the receiving circuit receives power from an external power supply device (not shown), and the charging circuit charges the battery 3 based on the rectified voltage output by the receiving circuit. Thus, the circuit device 1 can operate as a receiving device. Therefore, by combining the circuit device 1 with the power supply device, a contactless power transmission system can be constructed. The contactless power transmission system can be used, for example, for charging electronic devices. Electronic devices include, for example, hearing aids, watches, biometric measuring devices, portable information terminals, cordless phones, shavers, electric toothbrushes, list computers, handheld terminals, in-vehicle devices, hybrid vehicles, electric cars, electric motorcycles, or electric bicycles. For example, when the electrical device is a hearing aid, the receiving device including the circuit device 1 of this embodiment and the load including the battery 3 correspond to headphones, and the power supply device corresponds to the charging housing.

[0021] These electronic devices require stable operation over a wider temperature range. Furthermore, there is a need for lower costs in these electronic devices; one measure to reduce costs is to reduce the chip area of ​​the circuit device 1. The method of this embodiment relates to a power supply circuit 10 and a circuit device 1 including the power supply circuit 10, which balances improved temperature characteristics of the output voltage with cost reduction.

[0022] Figure 2This diagram illustrates an example of the structure of the power supply circuit 10. The power supply circuit 10 includes a first amplifier 100. The first amplifier 100 includes a first load portion 101 and a first differential pair 111. Furthermore, in the following description, unless otherwise specified, the transistors appearing in this embodiment are enhancement-type MOS transistors. More specifically, all transistors appearing except for those described in the first differential pair 111 and the second differential pair 222 (described later) are enhancement-type MOS transistors.

[0023] Furthermore, the following description does not preclude the application of the power supply circuit 10 of this embodiment in [the following context] Figure 1 Circuit devices other than circuit device 1. For example, for convenience, the external power supply voltage supplied to the power supply circuit 10 will be referred to as "voltage VDD" below, but when the power supply circuit 10 is applied to... Figure 1 In the case of circuit device 1, it is assumed that the battery voltage VBAT supplied from battery 3 corresponds to the voltage VDD.

[0024] The first load section 101 is the load of the first differential pair 111. For example, the first load section 101 includes transistor TR11 and transistor TR12, both of which are P-type transistors, and transistors TR11 and TR12 form a current mirror circuit. More specifically, the source of transistor TR11 is connected to the node on the voltage VDD side, the drain is connected to node N11, and the gate is connected to node N12. The node on the voltage VDD side will be referred to as the "power node" below. Node N11 is connected to node N12. Furthermore, the source of transistor TR12 is connected to the power node, the drain is connected to node N14, and the gate is connected to node N12.

[0025] The first differential pair 111 consists of a first transistor TR1 and a second transistor TR2. The drain of the first transistor TR1 is connected to node N11, and the source is connected to node N13. An input voltage VIN1 is applied to the gate of the first transistor TR1. The drain of the second transistor TR2 is connected to node N14, the source is connected to node N13, and the gate is connected to node N15.

[0026] In addition, to facilitate understanding of the method of this embodiment, the input voltage VIN1 will be set to the ground voltage and the ground voltage will be set to 0V for explanation. However, this is just an example. The input voltage VIN1 can be a constant voltage as long as the specific value is appropriately determined.

[0027] and, Figure 2The transistor TR15 is an N-type transistor, with its drain connected to node N13, its source connected to the ground node, and its gate connected to a bias voltage generation circuit (not shown). Hereinafter, the ground node will be referred to as the ground node, and the bias voltage generation circuit (not shown) will be simply referred to as the bias voltage generation circuit. Thus, transistor TR15 operates as a current source for the first amplifier 100 based on the bias voltage output from the bias voltage generation circuit.

[0028] The first amplifier 100, configured in this way, outputs a first output voltage VOUT1. Specifically, from... Figure 2 Node N14 outputs the first output voltage VOUT1. Furthermore, by connecting node N14 to node N15, the drain and gate of the second transistor TR2 are connected. That is, the node connected to the gate of the first transistor TR1 corresponds to the node on the inverting terminal side of the first amplifier 100, node N15 corresponds to the node on the non-inverting terminal side of the first amplifier 100, and node N14 corresponds to the output node of the first amplifier 100.

[0029] Furthermore, in this embodiment, the work function of the gate electrode of the first transistor TR1 is different from the work function of the gate electrode of the second transistor TR2. The work function refers to the height of the potential barrier that an electron must overcome on the surface of a substance to escape from it; it is equivalent to the absolute value of the energy of the Fermi level of that substance when the vacuum potential is set to 0. For example, by using N-type polysilicon as the material for the gate electrode of one transistor and P-type polysilicon as the material for the gate electrode of the other transistor, the work functions of the gate electrodes can be made different. Therefore, the difference between the threshold voltage of the first transistor TR1 and the threshold voltage of the second transistor TR2 is called the difference between the work function of the gate electrode of the first transistor TR1 and the work function of the gate electrode of the second transistor TR2. In this embodiment, this difference is referred to as the "first work function difference voltage W1".

[0030] The following example illustrates an instance where the gate electrode of the first transistor TR1 is made of N-type polysilicon, and the gate electrode of the second transistor TR2 is made of P-type polysilicon. This allows for a positive first work function difference voltage W1. In other words, in this embodiment, the first transistor TR1 is a depletion-mode N-type transistor, and the second transistor TR2 is an enhancement-mode N-type transistor. Consequently, a first output voltage VOUT1, equivalent to the magnitude of the first work function difference voltage W1, is output from the first amplifier 100. However, this is merely an example; as long as the gate electrode material of one of the first transistors TR1 and TR2 is different from the material of the other, the first transistor TR1 does not necessarily need to be a depletion-mode transistor.

[0031] More specifically, for example, the threshold voltage of the first transistor TR1 is set to "-0.52V", and the threshold voltage of the second transistor TR2 is set to "0.45V". In this case, if the first offset voltage described later is disregarded, the output voltage from the output node of the first amplifier 100 is "0.97V". Furthermore, "0.97V" will be used hereafter for convenience, but it is merely an example.

[0032] Furthermore, in this embodiment, the dimensions of the first transistor TR1 and the second transistor TR2 are different. The degree to which the dimensions differ is appropriately determined by considering the difference between the desired first output voltage VOUT1 and the first work function difference voltage W1. For example, it is desirable to set the first output voltage VOUT1 to "0.9V", but as described above, the first work function difference voltage W1 is set to "0.97V". That is, an offset voltage of "-0.07V" is required. In this case, the dimensions of the second transistor TR2 are set such that the difference between the threshold voltage of the first transistor TR1 and the threshold voltage of the second transistor TR2, assuming the same gate electrode material, is "-0.07V". Furthermore, in this embodiment, the voltage that constitutes this difference of "-0.07V" is referred to as the first offset voltage.

[0033] For example, although detailed illustrations are omitted, it is sufficient to make the gate width of the second transistor TR2 a predetermined multiple of the gate width of the first transistor TR1. More specifically, for example, setting the predetermined multiple to 6 times is equivalent to having 6 second transistors TR2 of the same size as the first transistor TR1 connected in parallel. Alternatively, the gate length of the second transistor TR2 can be shortened proportionally to the gate length of the first transistor TR1. Although the mathematical formula is omitted, this is because the magnitude of the current flowing through the MOS transistor is directly proportional to the gate width and inversely proportional to the gate length. Thus, by increasing the gate width or shortening the gate length of the second transistor TR2, the threshold voltage of the second transistor TR2 decreases by an amount that increases the current flowing through the second transistor TR2, and the magnitude of the voltage decrease is called the first offset voltage.

[0034] Then, a first output voltage VOUT1 of 0.9V is input to the first circuit 1000, from which a power supply voltage VPS is output. For example, the first circuit 1000 further adjusts the first output voltage VOUT1 to output a power supply voltage VPS with a different voltage value than the first output voltage VOUT1. Alternatively, the first circuit 1000 may buffer the first output voltage VOUT1 to output a power supply voltage VPS with the same voltage value as the first output voltage VOUT1. A detailed example of the first circuit 1000 will be described later. Additionally, the first offset voltage can also be positive. In this case, the gate width of the second transistor TR2 can be smaller than the gate width of the first transistor TR1, or the gate length of the second transistor TR2 can be shorter than the gate length of the first transistor TR1.

[0035] As described above, the power supply circuit 10 of this embodiment includes a first amplifier 100, which includes a first differential pair 111 composed of a first transistor TR1 and a second transistor TR2, and a first load portion 101 serving as the load of the first differential pair 111. Furthermore, in the power supply circuit 10, an input voltage VIN1 is input to the gate of the first transistor TR1, and the drain of the second transistor TR2 is connected to its gate. The first amplifier 100 outputs a first output voltage VOUT1 from the drain of the second transistor TR2 as follows: the voltage VOUT1 is the voltage offset by a first offset voltage based on the size ratio of the first transistor TR1 to the second transistor TR2, corresponding to the first work function difference voltage W1 between the first transistor TR1 and the second transistor TR2.

[0036] Thus, the power supply circuit 10 of this embodiment includes a first amplifier 100, which includes a first load portion 101 and a first differential pair 111, thereby enabling it to output a desired voltage. Furthermore, an input voltage VIN1 is input to the gate of the first transistor TR1, and the drain of the second transistor TR2 is connected to the gate, outputting a first output voltage VOUT1 from the drain of the second transistor TR2; therefore, it can operate as a non-inverting amplifier circuit. Specifically, a relationship can be established where the input voltage VIN1 signal is input to the non-inverting terminal of the first amplifier 100, the first output voltage VOUT1 signal is output from the output terminal of the first amplifier 100, and is input as a feedback signal to the inverting terminal of the first amplifier 100. Moreover, the first output voltage VOUT1 is output from the first amplifier 100 using the first work function difference voltage W1, thus eliminating the need for a feedback resistor. This reduces the chip area of ​​the power supply circuit 10, thereby lowering manufacturing costs. Furthermore, the magnitude of the first work function difference voltage W1 depends on the material of the gate electrode, thus improving the temperature characteristics of the first output voltage VOUT1. Therefore, a power supply circuit 10 can be constructed that balances chip area reduction with improved temperature characteristics of the output voltage. Furthermore, a first output voltage VOUT1 is output, which further considers a first offset voltage based on the different size ratios of the first transistor TR1 and the second transistor TR2. Thus, a first output voltage VOUT1 with a magnitude different from the first work function difference voltage W1 can be output. In other words, although the first work function difference voltage W1 is a constant value determined by the process, by further adding the first offset voltage, the voltage value of the power supply voltage VPS can be set more freely.

[0037] Furthermore, the method of this embodiment can also be implemented as circuit device 1. That is, circuit device 1 of this embodiment includes: the power supply circuit 10 described above; a discharge circuit 30 that supplies power to the outside based on the battery voltage VBAT from the battery 3; and a discharge system control circuit 20 that controls the discharge circuit 30. The power supply circuit 10 operates based on the battery voltage VBAT and outputs a power supply voltage VPS based on the first output voltage VOUT1, and the discharge system control circuit 20 operates based on the power supply voltage VPS. Thus, the same effect as described above can be obtained.

[0038] Furthermore, in the power supply circuit 10 of this embodiment, the first transistor TR1 may be a depletion-type MOS transistor, and the second transistor TR2 may be an enhancement-type MOS transistor. Therefore, the gate electrode material of the first transistor TR1 is different from that of the second transistor TR2, thus enabling the first amplifier 100 to operate as a power function difference amplifier.

[0039] Furthermore, in the power supply circuit 10 of this embodiment, the size ratio of the first transistor TR1 to the second transistor TR2 can also be the ratio of their gate widths or their gate lengths. This allows the threshold voltage of the first transistor TR1 to differ from the threshold voltage of the second transistor TR2, generating a first offset voltage.

[0040] Furthermore, in the power supply circuit 10 of this embodiment, the first output voltage VOUT1 can also be lower than the first work function difference voltage W1 by a first offset voltage. Therefore, a first amplifier 100 that outputs a first output voltage VOUT1 lower than the first work function difference voltage W1 can be constructed.

[0041] Thus, in the power supply circuit 10 of this embodiment, the gate width of the second transistor TR2 is larger than the gate width of the first transistor TR1, or the gate length of the second transistor TR2 is shorter than the gate length of the first transistor TR1. This increases the current flowing through the second transistor TR2, lowers the threshold voltage, and therefore enables the generation of a first offset voltage that applies a smaller offset than the first work function difference voltage W1.

[0042] Additionally, as a reference example, in Figure 3 A0 shows a regulator that outputs the desired voltage without using a resistor, but as described below, it can be said that the power supply circuit 10 of this embodiment has a superior temperature characteristic of the power supply voltage.

[0043] Figure 3 The regulator shown in A0 includes transistors TR51, TR52, TR53, TR54, TR55, TR56, and TR57. Furthermore, the circuit shown in the dashed box in A1 is a circuit formed by connecting multiple P-type transistors connected in parallel and then in series with diode-connected P-type transistors. Hereinafter, for convenience, the circuit shown in the dashed box in A1 will be referred to as the "first P-type transistor circuit." In each of the first P-type transistor circuits, the size of the diode-connected P-type transistors is different. Although not shown, the gate of each P-type transistor is connected to the first decoder.

[0044] The circuit shown in the dashed box of A2 is the same as the circuit shown in the dashed box of A1; it is a circuit formed by connecting multiple P-type transistors connected in parallel and then in series with diodes. Hereinafter, for convenience, the circuit formed by connecting P-type transistors in series with diodes in the circuit shown in the dashed box of A2 will be referred to as the "second P-type transistor circuit." Furthermore, in each of the second P-type transistor circuits, the size of the diode-connected P-type transistors is different. Also, although not shown, the gate of each P-type transistor is connected to the second decoder. Additionally, in... Figure 3In the example, the number of the first P-type transistor circuits connected in parallel is 7, but this is merely an illustration. The number of the second P-type transistor circuits is the same.

[0045] Transistors TR51 and TR52, both P-type transistors, form a current mirror circuit. The source of transistor TR51 is connected to the power node, its drain to node N53, and its gate to node N51. The source of transistor TR52 is connected to the power node, its drain to node N52, and its gate to node N51. Transistors TR53 and TR54 are both N-type transistors, forming a differential pair. The drain of transistor TR53 is connected to node N53, its source to node N54, and its gate to the bias voltage generation circuit. The drain and source of transistor TR54 are connected to node N52, and its gate to node N56. The current mirror circuit formed by transistors TR51 and TR52 is the active load of the differential pair formed by transistors TR53 and TR54. Transistor TR55 is an N-type transistor with its drain connected to node N54, its source connected to the ground node, and its gate connected to the bias voltage generation circuit. Transistor TR55 is a constant current source consisting of a differential pair of transistors TR53 and TR54.

[0046] The output stage consists of transistor TR56, a P-type transistor, and transistor TR57, an N-type transistor. The drain of transistor TR57 is connected to node N56, its source to ground, and its gate to the bias voltage generation circuit. Like transistor TR55, transistor TR57 operates as a current source. The source of transistor TR56 is connected to the power supply node, and its gate is connected to node N53.

[0047] Furthermore, using a first decoder (not shown), any one of the P-type transistors within the dashed box shown in A1 is turned on. For convenience, the turned-on P-type transistor is referred to as the "first P-type transistor of the first generation," and the diode-connected P-type transistor connected to the first P-type transistor of the first generation is referred to as the "second P-type transistor of the first generation." More precisely, the drain of the first P-type transistor of the first generation is connected to the source of the second P-type transistor of the first generation. Also, using a second decoder (not shown), any one of the P-type transistors within the dashed box shown in A2 is turned on. For convenience, the turned-on P-type transistor is referred to as the "first P-type transistor of the second generation," and the diode-connected P-type transistor connected to the drain of the second first P-type transistor is referred to as the "second P-type transistor of the second generation." More precisely, the drain of the second first P-type transistor of the second generation is connected to the source of the second second P-type transistor of the second generation. Furthermore, the source of the first first P-type transistor of the first generation is connected to the drain of transistor TR56, the drain of the first second P-type transistor of the first generation is connected to the source of the second first P-type transistor, and the drain of the second second P-type transistor of the second generation is connected to node N56.

[0048] In this regulator configuration, the output voltage from node N55 is the sum of the bias voltage (the voltage input to the gate of transistor TR53), the threshold voltage of the first second P-type transistor, and the threshold voltage of the second second P-type transistor. Typically, transistors exhibit manufacturing variations, thus causing variations in the regulator's output voltage at a specified temperature. Therefore, to adjust the output voltage to the desired value at the specified temperature, the first transistor circuit is selected from the dashed box shown in A1, and the second transistor circuit is appropriately selected from the dashed box shown in A2. That is, the output voltage can be changed according to the combination of the product of the number of first P-type transistor circuits and the number of second P-type transistor circuits. Figure 3 In this case, there are 7×7=49 combinations.

[0049] However, although Figure 3 The method shown in the reference example can adjust the output voltage at a specified temperature by taking into account manufacturing variations of the transistor, but it does not take into account the deviation of the output voltage caused by temperature changes, i.e., the temperature characteristics of the output voltage. This is because, in the reference example, a transistor is used to adjust the output voltage.

[0050] Figure 4 The temperature characteristics of the output voltage in the power supply circuit 10, to which the method of this embodiment is applied, are shown. Figure 3A comparison of the temperature characteristics of the output voltage in the reference example. The temperature characteristics of the output voltage in the reference example are shown in B1, and the temperature characteristics of the output voltage in the power supply circuit 10 using the method of this embodiment are shown in B2. If the range from voltage V1 to voltage V2 is set as the allowable error range of the output voltage, then in the reference example, as shown in C1, it becomes the range from temperature T2 to temperature T3. In other words, the range shown in C1 becomes the operating guarantee temperature of the electronic device containing the regulator shown in the reference example. On the other hand, in the case of the power supply circuit 10 using the method of this embodiment, the allowable temperature range for the output voltage error is the range from temperature T1 to temperature T4, as shown in C2. Temperature T1 is lower than temperature T2, and temperature T4 is higher than temperature T3. This is because the slope of the temperature characteristic determined by the temperature characteristic of the work function difference voltage is less than the slope of the temperature characteristic determined by the temperature characteristic of the threshold voltage of the diode-connected P-type transistor.

[0051] Thus, the method without resistors can also be implemented in the reference example, but the method in the reference example cannot simultaneously improve the temperature characteristics of the output voltage. In this regard, the power supply circuit 10 using the method of this embodiment can improve the temperature characteristics of the output voltage, and since no resistors are used, the chip area can be reduced, so it can be said to be more advantageous.

[0052] The power supply circuit 10 of this embodiment will be described in more detail. For example... Figure 5 As shown, the power supply circuit 10 of this embodiment includes a second amplifier 200 in addition to the first amplifier 100 described above. A second output voltage VOUT2 is output from the second amplifier 200, and a power supply voltage VPS is output via the second circuit 2000. That is, Figure 2 The first circuit 1000 is containing Figure 5 The relationship between the second amplifier 200 and the second circuit 2000 is explained. The second circuit 2000, for example, buffers the second output voltage VOUT2 and outputs a power supply voltage VPS with the same voltage value as the second output voltage VOUT2. A detailed example of the second circuit 2000 will be described later. Alternatively, the second circuit 2000 can be omitted, and the second output voltage VOUT2 can be used as the power supply voltage VPS. Furthermore, in... Figure 5 In the explanation, appropriate omissions are made in Figure 2 The description of the first amplifier 100 that has already appeared in the text.

[0053] The second amplifier 200 includes a second load section 202 and a second differential pair 222. The second load section 202 is the load of the second differential pair 222, supplying current to the second differential pair 222. For example, the second load section 202 includes transistor TR21 and transistor TR22, both of which are P-type transistors, and transistors TR21 and TR22 form a current mirror circuit. More specifically, the source of transistor TR21 is connected to the power supply voltage node, the drain is connected to node N21, and the gate is connected to node N22. Similarly, the source of transistor TR22 is connected to the power supply voltage node, the drain is connected to node N24, and the gate is connected to node N22.

[0054] The second differential pair 222 consists of a third transistor TR3 and a fourth transistor TR4, both N-type transistors. The drain of the third transistor TR3 is connected to node N21, and its source is connected to node N23. The drain of the fourth transistor TR4 is connected to node N24, its source is connected to node N23, and its gate is connected to node N25.

[0055] and, Figure 5 The transistor TR25 is an N-type transistor, with its drain connected to node N23, its source connected to ground, and its gate connected to the bias voltage generation circuit. That is, transistor TR25 and... Figure 2 Similarly, the transistor TR15 described herein operates as a current source for the second amplifier 200 based on the bias voltage output from the bias voltage generation circuit.

[0056] The second amplifier 200, configured in this way, outputs a second output voltage VOUT2. Specifically, from... Figure 5 Node N24 outputs the second output voltage VOUT2. Furthermore, by connecting node N24 to node N25, the drain and gate of the fourth transistor TR4 are connected. That is, the node connected to the gate of the third transistor TR3 corresponds to the node on the inverting terminal side of the second amplifier 200, node N25 corresponds to the node on the non-inverting terminal side of the second amplifier 200, and node N24 corresponds to the output node of the second amplifier 200.

[0057] Furthermore, in the second amplifier 200, the third transistor TR3, like the first transistor TR1, is a depletion-type N-type transistor, and the fourth transistor TR4, like the second transistor TR2, is an enhancement-type N-type transistor. That is, the work function of the gate electrode of the third transistor TR3 differs from that of the fourth transistor TR4; in this embodiment, this difference is referred to as the "second work function difference voltage W2". Therefore, if the second offset voltage described later is disregarded, the second output voltage VOUT2 output from node N24 becomes the sum of the first output voltage VOUT1 and the second work function difference voltage W2. Thus, since the second output voltage VOUT2 is based on the first work function difference voltage W1 and the second work function difference voltage W2, the temperature characteristics of the output voltage are improved compared to the aforementioned reference example.

[0058] Thus, the power supply circuit 10 of this embodiment includes a second amplifier 200, which includes a second differential pair 222 composed of a third transistor TR3 and a fourth transistor TR4, and a second load portion 202 serving as the load of the second differential pair 222. Furthermore, in the power supply circuit 10, a first output voltage VOUT1 is input to the gate of the third transistor TR3, and the drain of the fourth transistor TR4 is connected to its gate. The second amplifier 200 outputs a second output voltage VOUT2 from the drain of the fourth transistor TR4 based on the second work function difference voltage W2 between the third transistor TR3 and the fourth transistor TR4. This improves the temperature characteristics of the output voltage, and allows the power supply circuit 10 to output a second output voltage VOUT2 that is larger than the first output voltage VOUT1.

[0059] Furthermore, the dimensions of the fourth transistor TR4 can also differ from those of the third transistor TR3. Specifically, for example, the gate width of the fourth transistor TR4 can be a predetermined multiple of the gate width of the third transistor TR3, or the gate length of the fourth transistor TR4 can be shortened proportionally relative to the gate length of the third transistor TR3. Thus, an offset voltage is generated in the same manner as the aforementioned first offset voltage. In this embodiment, this differential voltage is referred to as the second offset voltage.

[0060] For example, if we want to output 1.8V from the power supply circuit 10, if we configure the first amplifier 100 so that the first output voltage VOUT1 is 0.9V and configure the second amplifier 200 so that it has the same structure as the first amplifier 100, then we can set the second output voltage VOUT2 to 1.8V. In this case, the third transistor TR3 can be the same transistor as the first transistor TR1, and the fourth transistor TR4 can be the same transistor as the second transistor TR2. Furthermore, we can simply configure the second load portion 202 and the first load portion 101 to have the same structure, and configure the transistors TR15 and TR25, which serve as current sources, to be the same transistors. However, the magnitude of the first output voltage VOUT1 can also be different from the magnitude of the second output voltage VOUT2. In other words, the structures of the first amplifier 100 and the second amplifier 200 in this embodiment can also be different. Furthermore, the second offset voltage can also be positive. In this case, the gate width of the fourth transistor TR4 can be smaller than the gate width of the third transistor TR3, or the gate length of the fourth transistor TR4 can be shorter than the gate length of the third transistor TR3.

[0061] Thus, in the power supply circuit 10 of this embodiment, the second amplifier 200 outputs a voltage as the second output voltage VOUT2 as the sum of the voltage after the second work function difference voltage W2 is offset by a second offset voltage based on the size ratio of the third transistor TR3 to the fourth transistor TR4, and the first output voltage VOUT1. Therefore, a power supply circuit 10 can be constructed that improves the temperature characteristics of the second output voltage VOUT2 and adjusts its magnitude.

[0062] Figure 6 To explain in more detail Figure 5 The diagram shows the power supply circuit 10. In addition to the first amplifier 100 and the second amplifier 200 described above, the power supply circuit 10 of this embodiment also includes an impedance conversion circuit 300. That is, Figure 6 Impedance conversion circuit 300 and Figure 5 The second circuit 2000 corresponds to this.

[0063] Impedance conversion circuit 300 is a circuit with an output impedance lower than that of the second amplifier 200. That is, impedance conversion circuit 300 is used to convert the output impedance of the second amplifier 200 to a lower output impedance to output the power supply voltage VPS. Impedance conversion circuit 300 includes transistors TR31, TR32, TR33, TR34, TR35, TR36, and TR37. A current mirror circuit is formed by transistors TR31 and TR32, both P-type transistors, supplying current to transistors TR33 and TR34. The source of transistor TR31 is connected to the power supply node, its drain is connected to node N31, and its gate is connected to node N32. The source of transistor TR32 is connected to the power supply node, its drain is connected to node N33, and its gate is connected to node N32.

[0064] A differential pair is formed by transistors TR33 and TR34, both N-type transistors. The drain of transistor TR33 is connected to node N31, its source to node N34, and its gate to node N25. That is, the aforementioned second output voltage VOUT2 is input to the gate of transistor TR33. The drain of transistor TR34 is connected to node N33, its source to node N34, and its gate to node N35. The drain of transistor TR35 is connected to node N34, its source to a ground node, and its gate to a bias voltage generation circuit. That is, like transistors TR15 and TR25, transistor TR35 operates as a current source for the impedance conversion circuit 300 based on the bias voltage output from the bias voltage generation circuit.

[0065] The output stage of the impedance conversion circuit 300 is composed of transistor TR36, which is a P-type transistor, and transistor TR37, which is an N-type transistor. The source of transistor TR36 is connected to the power supply node, its drain is connected to node N35, and its gate is connected to node N31. The source of transistor TR37 is connected to the ground node, its drain is connected to node N36, which is the output node of the impedance conversion circuit 300, and its gate is connected to the bias voltage generation circuit. That is, transistor TR37, like transistor TR35, operates as a current source for the impedance conversion circuit 300. Furthermore, node N36 is at the same potential as node N35.

[0066] Impedance conversion circuit 300 does not contain a feedback resistor or a component that can be considered the same as it, and buffers the second output voltage VOUT2 from the second amplifier 200 as the power supply voltage VPS. That is, impedance conversion circuit 300 is a voltage follower circuit.

[0067] As an example of other structures Figure 7 The power supply circuit 10 is shown without the impedance conversion circuit 300. That is, Figure 7This is a structural example that gives the second amplifier 200 the same output impedance as the impedance conversion circuit 300. Figure 7 The second amplifier 200 is similar to the one containing transistors TR46 and TR47. Figure 5 The differences are as follows. Transistor TR46, a P-type transistor, has its source connected to the power supply node, its drain connected to node N28 (the output node), and its gate connected to node N26. Node N26 is connected to the drain of the aforementioned third transistor TR3. Transistor TR47, an N-type transistor, has its source connected to the ground node, its drain connected to node N27, and its gate connected to the bias voltage generation circuit. That is, like transistor TR25, transistor TR47 operates as a current source for the second amplifier 200 based on the bias voltage output from the bias voltage generation circuit. Node N27 is connected to the gate of the fourth transistor TR4.

[0068] In addition, the power supply circuit 10 can also be like Figure 7 That configuration, but under low voltage VDD conditions, in the following aspects, Figure 6 The structure is superior. In the first amplifier 100 of this embodiment, since the work function difference of the gate electrodes of the transistors constituting the differential pair is used, the voltage balance of the differential stage needs to be considered. For example, when the voltage VDD is set to 3V, the input voltage VIN1 is set to 0V, and the first output voltage VOUT1 is set to 0.9V, the voltage on the drain side of the first transistor TR1 is approximately 2.3V. Figure 7 In the comparative example, when the second amplifier 200 is configured with the same structure as the first amplifier 100 and connected to the first amplifier 100, the voltage at node N26, which is connected to the drain of the third transistor TR3, is approximately 2.7V. That is, the voltage difference between the source and gate sides of transistor TR46 is small, 3.0V - 2.7V = 0.3V. Therefore, in order to generate the desired current, the size of transistor TR46 needs to be increased.

[0069] Regarding this point, such as Figure 7 As shown, by including the impedance transformation circuit 300, the source-gate voltage of the output stage transistor TR36 can be further increased. Therefore, the desired current can be generated without excessively increasing the size of the transistor TR36. Specifically, by increasing the current flowing through the current mirror circuit composed of transistors TR31 and TR32, the voltage at node N31 can be further reduced, and the source-gate voltage of transistor TR36 can be further increased.

[0070] Thus, the power supply circuit 10 of this embodiment includes an impedance conversion circuit 300 that converts the output impedance of the second amplifier 200 to output a power supply voltage VPS. Therefore, a power supply circuit 10 that outputs a desired current based on the power supply voltage VPS can be constructed without increasing the size of the transistors in the output stage.

[0071] Thus, in the power supply circuit 10 of this embodiment, the impedance conversion circuit 300 is a voltage follower circuit. Therefore, the desired current can be output based on a power supply voltage VPS that is the same magnitude as the second output voltage VOUT2.

[0072] As described above, the power supply circuit of this embodiment includes a first amplifier, which includes a first differential pair composed of a first transistor and a second transistor, and a first load portion serving as the load of the first differential pair. Furthermore, in the power supply circuit, an input voltage is input to the gate of the first transistor, and the drain of the second transistor is connected to the gate. The first amplifier outputs a first output voltage from the drain of the second transistor as a voltage offset by a first offset voltage based on the size ratio of the first transistor to the second transistor, representing the first work function difference between the first transistor and the second transistor.

[0073] Therefore, by utilizing the first work function difference voltage to output a first output voltage from the first amplifier, a feedback resistor is unnecessary. This reduces the chip area of ​​the power supply circuit, thereby lowering manufacturing costs. Furthermore, since the magnitude of the first work function difference voltage depends on the gate electrode material, the temperature characteristics of the first output voltage can be improved. Thus, a power supply circuit that balances chip area reduction and improved output voltage temperature characteristics can be constructed. Moreover, since the output further considers a first offset voltage based on the different size ratio of the first transistor to the second transistor, a first output voltage of a different magnitude than the first work function difference voltage can be output.

[0074] Furthermore, the power supply circuit may also include a second amplifier, which comprises a second differential pair consisting of a third transistor and a fourth transistor, and a second load portion serving as the load of the second differential pair. In the power supply circuit, a first output voltage may be input to the gate of the third transistor, and the drain of the fourth transistor may be connected to the gate. Furthermore, the second amplifier may output a second output voltage from the drain of the fourth transistor based on the second work function difference voltage between the third and fourth transistors.

[0075] This improves the temperature characteristics of the output voltage and allows the power supply circuit to output a second output voltage that is larger than the first output voltage.

[0076] Furthermore, the second amplifier can also output a voltage as the second output voltage, which is the sum of the voltage after the second work function difference voltage is offset by the second offset voltage based on the size ratio of the third transistor to the fourth transistor and the first output voltage.

[0077] Therefore, it is possible to construct a power supply circuit that can improve the temperature characteristics of the second output voltage and adjust the magnitude of the second output voltage.

[0078] Furthermore, it may also include an impedance conversion circuit that converts the output impedance of the second amplifier to output the power supply voltage.

[0079] Therefore, it is possible to construct a power supply circuit that outputs the desired current based on the power supply voltage without increasing the size of the transistors in the output stage.

[0080] Furthermore, impedance conversion circuits can also be voltage follower circuits.

[0081] Therefore, the desired current can be output based on a power supply voltage of the same magnitude as the second output voltage.

[0082] Furthermore, the first transistor can be a depletion-type MOS transistor, and the second transistor can be an enhancement-type MOS transistor.

[0083] Therefore, since the gate electrode material of the first transistor is different from that of the second transistor, the first amplifier can operate as a power function difference amplifier.

[0084] Furthermore, the size ratio of the first transistor to the second transistor can also be the ratio of their gate widths or their gate lengths.

[0085] Therefore, the threshold voltage of the first transistor can be made different from that of the second transistor, thus generating a first offset voltage.

[0086] Furthermore, the first output voltage can also be lower than the first work function difference voltage by the first offset voltage.

[0087] Therefore, it is possible to construct a first amplifier that outputs a first output voltage that is lower than the first work function difference voltage.

[0088] Alternatively, the gate width of the second transistor may be larger than the gate width of the first transistor, or the gate length of the second transistor may be shorter than the gate length of the first transistor.

[0089] This increases the current flowing through the second transistor and lowers the threshold voltage, thus enabling the generation of a first offset voltage that applies a smaller offset than the first work function difference voltage.

[0090] Furthermore, this embodiment relates to a circuit device comprising: the aforementioned power supply circuit; a discharge circuit that supplies power to an external source based on the battery voltage from the battery; and a discharge system control circuit that controls the discharge circuit, wherein the power supply circuit operates based on the battery voltage, outputs a power supply voltage based on a first output voltage, and the discharge system control circuit operates based on the power supply voltage.

[0091] Furthermore, while this embodiment has been described in detail above, those skilled in the art will readily understand that various modifications can be made without substantially departing from the new aspects and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, in the specification or drawings, a term described at least once with a different term that is more general or synonymous can be replaced with that different term anywhere in the specification or drawings. Moreover, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. Furthermore, the structure and operation of power supply circuits and circuit devices are not limited to those described in this embodiment, and various modifications can be implemented.

Claims

1. A power supply circuit, characterized in that, The power supply circuit includes a first amplifier, which comprises a first differential pair consisting of a first transistor and a second transistor, and a first load portion serving as the load of the first differential pair. An input voltage is applied to the gate of the first transistor, and the drain of the second transistor is connected to the gate. The first amplifier outputs a voltage from the drain of the second transistor as a first output voltage that is offset by a first offset voltage based on the size ratio of the first transistor to the second transistor, based on the first work function difference voltage between the first transistor and the second transistor.

2. The power supply circuit according to claim 1, characterized in that, The power supply circuit includes a second amplifier, which comprises a second differential pair consisting of a third transistor and a fourth transistor, and a second load portion serving as the load of the second differential pair. The first output voltage is input to the gate of the third transistor, and the drain of the fourth transistor is connected to the gate. The second amplifier outputs a second output voltage from the drain of the fourth transistor based on the voltage difference between the second work function of the third transistor and the fourth transistor.

3. The power supply circuit according to claim 2, characterized in that, The second amplifier outputs a voltage as the second output voltage, which is the sum of the second power function difference voltage offset by a second offset voltage based on the size ratio of the third transistor to the fourth transistor and the first output voltage.

4. The power supply circuit according to claim 2, characterized in that, The power supply circuit includes an impedance conversion circuit that converts the output impedance of the second amplifier to output a power supply voltage.

5. The power supply circuit according to claim 4, characterized in that, The impedance conversion circuit is a voltage follower circuit.

6. The power supply circuit according to claim 1, characterized in that, The first transistor is a depletion-type MOS transistor. The second transistor is an enhancement-mode MOS transistor.

7. The power supply circuit according to claim 1, characterized in that, The size ratio of the first transistor to the second transistor is either the ratio of their gate widths or the ratio of their gate lengths.

8. The power supply circuit according to claim 1, characterized in that, The first output voltage is lower than the first work function difference voltage by the first offset voltage.

9. The power supply circuit according to claim 8, characterized in that, The gate width of the second transistor is larger than the gate width of the first transistor, or the gate length of the second transistor is shorter than the gate length of the first transistor.

10. A circuit device, characterized in that, The circuit device includes: The power supply circuit as described in claim 1; A discharge circuit that supplies power to the outside based on the battery voltage from the battery; and The discharge system control circuit controls the discharge circuit. The power supply circuit operates based on the battery voltage and outputs a power supply voltage based on the first output voltage. The discharge system control circuit operates based on the power supply voltage.

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