A method for manufacturing an oxide semiconductor radio frequency transistor
By employing a T-type gate structure and a metal Au/graphene composite gate material in oxide semiconductor RF transistors, the problems of low RF performance and heat accumulation were solved, achieving higher frequency characteristics and reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- PEKING UNIV
- Filing Date
- 2026-04-17
- Publication Date
- 2026-07-10
AI Technical Summary
Oxide semiconductor radio frequency transistors have low cutoff frequencies and maximum oscillation frequencies, and they suffer from heat accumulation and hot carrier degradation (HCD) during operation, which affects radio frequency performance.
A T-type gate structure is adopted, using a composite material of metal Au and high thermal conductivity graphene as the gate. The gate is simultaneously deposited through magnetron sputtering technology to form a gate structure with low gate resistance, thereby improving the problem of heat accumulation.
It significantly improves the RF performance of oxide semiconductor RF transistors, reduces gate resistance, enhances heat dissipation efficiency, avoids the HCD effect, and improves frequency characteristics.
Smart Images
Figure CN122373395A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of information materials and devices technology, and specifically relates to a method for fabricating an oxide semiconductor radio frequency transistor. Background Technology
[0002] As the semiconductor industry enters the post-Moore's Law era, miniaturizing transistors is becoming increasingly difficult. Therefore, monolithic 3D integration is playing an increasingly important role in achieving the goal of surpassing Moore's Law, integrating systems with different functions, such as logic, memory, and radio frequency, onto a single chip. This effectively reduces area overhead, improves energy efficiency, and increases data transmission bandwidth.
[0003] In the post-Moore's Law era, new materials are seen as a solution to the aforementioned problems. Among them, oxide semiconductors, with their back-end compatibility, possess numerous unique advantages, such as high mobility, wide bandgap, low processing temperature, and good uniformity over large areas. Therefore, they are considered a promising transistor channel material for 3D integration. With in-depth research on oxide semiconductors and optimization of device performance, oxide semiconductor devices offer new insights for the development of the semiconductor industry in the post-Moore's Law era.
[0004] Radio frequency (RF) devices are an indispensable part of wireless transceiver and communication systems. Current research on oxide semiconductor materials largely focuses on single devices, dynamic random access memory (DRAM), and logic circuits, where RF materials have shown considerable progress. However, research on the performance and applications of RF devices is relatively limited, and the performance of AOS RF devices still has significant room for improvement. Therefore, for RF materials, in order to truly achieve monolithic 3D integration, it is urgent to conduct research and performance optimization on RF devices.
[0005] The performance of oxide semiconductor radio frequency (RF) transistors is closely related to their gate resistance and parasitic capacitance. Generally, increasing the thickness of the gate metal electrode has historically been used to reduce gate resistance. However, limitations in photolithography processes and metal electrode deposition methods mean that simply increasing the gate metal electrode thickness offers limited improvement in RF performance. Furthermore, due to the low thermal conductivity of oxide semiconductors, RF devices typically face severe heat accumulation problems during operation. This continuous heat buildup can lead to the High-Degree Conversion (HCD) effect, resulting in significant degradation of RF performance. Summary of the Invention
[0006] To address the issues of low cutoff frequency and maximum oscillation frequency in existing oxide semiconductor radio frequency transistors (OSTs), and to avoid heat accumulation and the HCD effect during operation, this invention provides a method for fabricating high-performance OSTs. It utilizes a T-type gate structure to reduce gate resistance, and selects Au metal and graphene with high thermal conductivity as gate materials to improve heat accumulation, thereby enhancing the radio frequency performance of the transistor.
[0007] The technical solution provided by this invention is as follows:
[0008] A method for fabricating an oxide semiconductor radio frequency transistor (OSBRT) is disclosed. The OSBRT structure, from bottom to top, consists of a substrate, an OSBRT active channel layer, source and drain metal electrode layers, a gate dielectric layer, and a T-type top gate metal electrode layer. The fabrication steps are as follows:
[0009] 1) Obtain the substrate and clean it;
[0010] 2) Use magnetron sputtering or atomic layer deposition processes to grow oxide semiconductor active layers;
[0011] 3) Pattern the oxide semiconductor active layer to form a channel;
[0012] 4) Fabricate the metal electrode layers for the source and drain electrodes, and complete the source and drain metal electrodes using a lift-off technique;
[0013] 5) A high dielectric constant top gate dielectric layer is grown using atomic layer deposition (ALD) technology;
[0014] 6) Spin-coat the first type of photoresist and bake it; then spin-coat the second type of photoresist and bake it; the photolithography parameters of the first type of photoresist and the second type of photoresist are different, and photolithography and development are performed to form a T-shaped structure;
[0015] 7) Au metal and graphene are grown simultaneously using magnetron sputtering equipment to prepare a top gate metal electrode layer. The thickness of the top gate metal electrode ranges from 150 to 500 nanometers, and the sputtering rate ratio of Au metal to graphene is 1:0.01 to 1:1.
[0016] 8) Use a stripping technique to complete the top gate electrode metal.
[0017] Furthermore, the substrate includes, but is not limited to, Si, SiO2, SiC, Si3N4, and flexible substrates.
[0018] Furthermore, the oxide semiconductor active layer includes, but is not limited to, all oxide semiconductor thin films with various doping components and proportions such as In2O3, ZnO, ITO, IGO, IZO, IGZO, IWO, and ITWO, and also includes composite channels of multilayer and multiple oxide semiconductor thin film stacks, with the thickness of the oxide semiconductor active layer ranging from 1 to 50 nanometers.
[0019] Furthermore, the source and drain metal electrode layers should be able to form good contact with the active layer channel of the oxide semiconductor, and can be made of metals such as Ni, Pt, Au and their alloys, with the thickness of the source and drain metal electrode layers ranging from 10 to 100 nanometers.
[0020] Furthermore, the top gate dielectric layer should be SiO2, HfO2, HfSiOx, or HfLaO. x HfAlOx and its doped combinations are used in dielectric materials, with the thickness of the top gate dielectric layer ranging from 2 to 50 nanometers.
[0021] Furthermore, the first type of photoresist and the second type of photoresist are PMMA and MMA, respectively. The thickness range of PMMA is 100~300 nanometers, and the thickness range of MMA is 300~600 nanometers.
[0022] This invention, after the top-gate dielectric deposition and growth of an oxide semiconductor RF transistor, involves spin-coating two layers of photoresist with different parameters. Two differentiated photolithography processes are then used for step-by-step exposure and development to form a photolithographic pattern suitable for T-shaped gate formation. Subsequently, a metal-graphene composite gate material is simultaneously deposited via co-sputtering using a magnetron sputtering system. By controlling the sputtering power, gas pressure, and deposition time, a high thermal conductivity gate film of specific thickness and ratio is achieved. After a lift-off process, the device gate forms a typical T-shaped structure. This T-shaped gate significantly reduces gate resistance, while the excellent thermal conductivity of the metal-graphene composite gate material efficiently dissipates device heat, significantly improving heat dissipation and suppressing the hot carrier degradation (HCD) effect. Compared to oxide semiconductor RF transistors fabricated using conventional processes, the device using the co-sputtered composite gate of this invention exhibits a higher cutoff frequency and maximum oscillation frequency, significantly improving RF device performance and reliability. Attached Figure Description
[0023] Figure 1 This invention relates to an oxide semiconductor radio frequency transistor with a T-gate structure.
[0024] Figure 2 This is a flowchart illustrating the fabrication method of an oxide semiconductor radio frequency transistor with a highly thermally conductive T-type gate material structure proposed in this invention.
[0025] In the figure: 1-substrate, 2-oxide semiconductor active layer, 3-source / drain metal electrode layer, 4-top gate dielectric layer, 5-T-type top gate electrode layer. Detailed Implementation
[0026] This invention proposes a method for fabricating a polyoxide semiconductor radio frequency device, such as... Figure 1 As shown, the oxide semiconductor radio frequency transistor structure consists of, from bottom to top, a substrate, an oxide semiconductor active channel layer, source and drain metal electrode layers, a gate dielectric layer, and a T-type top gate metal electrode layer. The following will take an IGZO channel as an example. It should be noted that the present invention can be implemented in a manner different from the details described below, and is therefore not limited to the embodiments disclosed below.
[0027] S001: Obtain the substrate and clean it. This embodiment uses a high-resistivity silicon substrate with a 100 nm SiO2 coating. Particles and organic matter on the substrate are cleaned using a standard RCA1 solution. After cleaning, the substrate is dried with high-purity nitrogen gas. Figure 2 As shown in (1).
[0028] S002: Oxide semiconductor active layers are grown using magnetron sputtering or atomic layer deposition processes, such as... Figure 2 As shown in (2).
[0029] S003: The oxide semiconductor active layer is patterned using process steps including spin coating, baking, photolithography, development, and etching. In this embodiment, the oxide semiconductor active layer is indium gallium zinc oxide (IGZO), and the thickness of the oxide semiconductor active layer ranges from 1 to 50 nanometers. Figure 2 As shown in (3).
[0030] S004: The source and drain metal electrode layers are fabricated using processes including spin coating, baking, photolithography, development, and electron beam evaporation. The source and drain electrode metals are defined using a lift-off technique. The source and drain metal electrode layers should be able to form good contact with the active layer channel of the oxide semiconductor. In this embodiment, Ni metal is used, and the thickness of the source and drain metal electrode layers ranges from 10 to 100 nanometers. Figure 2 As shown in (4).
[0031] S005: Growing HfLaO of a certain thickness using atomic layer deposition process. x As a high dielectric constant top gate dielectric layer, the thickness of the top gate dielectric layer ranges from 2 to 50 nanometers, such as... Figure 2 As shown in (5).
[0032] S006: Spin-coat the first type of photoresist onto the sample. In this embodiment, the first type of photoresist is PMMA, and then bake it. The thickness of the PMMA photoresist ranges from 100 to 300 nanometers. Figure 2 As shown in (6).
[0033] S007: Spin-coat a second type of photoresist onto the sample. In this embodiment, the second type of photoresist is MMA, and then bake it. The thickness of the MMA photoresist ranges from 300 to 600 nanometers. Figure 2 As shown in (7).
[0034] S008: Using photolithography, first expose area 1, then expose area 2 to form a T-shaped structure. Continue with development and other process steps to pattern the top gate metal electrode layer, such as... Figure 2 As shown in (8).
[0035] S009: Au metal and graphene are simultaneously grown using magnetron sputtering to prepare the top-gate electrode layer. The thickness of the top-gate metal electrode ranges from 150 to 500 nanometers, and the sputtering rate ratio of Au metal to graphene is 1:0.01 to 1:1. Figure 2 As shown in (9).
[0036] S010: The top gate metal electrode is completed using a stripping technique, such as... Figure 2 As shown in (10).
[0037] Compared with existing technologies, the technical solutions adopted in this invention can significantly reduce the gate resistance of radio frequency devices, without introducing additional parasitic capacitance, effectively increase the heat dissipation efficiency of radio frequency devices during operation, avoid the HCD effect, and improve the frequency characteristics of oxide semiconductor radio frequency transistors.
[0038] Finally, it should be noted that the purpose of disclosing the embodiments is to help further understand the present invention. However, those skilled in the art will understand that various substitutions and modifications are possible without departing from the spirit and scope of the present invention and the appended claims. Therefore, the present invention should not be limited to the content disclosed in the embodiments, and the scope of protection of the present invention is defined by the scope of the claims.
Claims
1. A method for fabricating an oxide semiconductor radio frequency transistor, comprising the following steps: 1) Obtain the substrate and clean it; 2) Use magnetron sputtering or atomic layer deposition processes to grow oxide semiconductor active layers; 3) Pattern the oxide semiconductor active layer to form a channel; 4) Fabricate the metal electrode layers for the source and drain electrodes, and complete the source and drain metal electrodes using a stripping technique; 5) A high dielectric constant top gate dielectric layer is grown using atomic layer deposition (ALD) technology; 6) Spin-coat the first type of photoresist and bake it; then spin-coat the second type of photoresist and bake it; the photolithography parameters of the first type of photoresist and the second type of photoresist are different, and photolithography and development are performed to form a T-shaped structure; 7) Au metal and graphene are grown simultaneously using magnetron sputtering equipment to prepare a top gate metal electrode layer. The thickness of the top gate metal electrode ranges from 150 to 500 nanometers, and the sputtering rate ratio of Au metal to graphene is 1:0.01 to 1:
1. 8) Use a stripping technique to complete the top gate metal electrode.
2. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 1, characterized in that: The substrate is made of Si, SiO2, SiC, Si3N4 or a flexible substrate.
3. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 1, characterized in that: The active oxide semiconductor layer is an In2O3, ZnO, ITO, IGO, IZO, IGZO, IWO, or ITWO oxide semiconductor thin film, or is composed of multiple of the above oxide semiconductor thin films stacked together.
4. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 3, characterized in that: The thickness of the oxide semiconductor active layer ranges from 1 to 50 nanometers.
5. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 1, characterized in that: The source and drain metal electrode layers are made of Ni, Pt, Au and their alloys.
6. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 5, characterized in that: The thickness of the source and drain metal electrode layers ranges from 10 to 100 nanometers.
7. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 1, characterized in that: The top gate dielectric layer uses SiO2, HfO2, HfSiOx, and HfLaO. x HfAlOx and its doping.
8. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 7, characterized in that: The thickness of the top gate dielectric layer ranges from 2 to 50 nanometers.
9. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 1, characterized in that: The first type of photoresist and the second type of photoresist are PMMA and MMA, respectively.
10. The method for fabricating an oxide semiconductor radio frequency transistor as described in claim 9, characterized in that: The thickness range of the PMMA adhesive is 100~300 nanometers, and the thickness range of the MMA adhesive is 300~600 nanometers.