Semiconductor device
By optimizing the contact surface shape between the ohmic electrode and the two-dimensional electron gas and increasing the contact side length, the problem of high ohmic contact resistance in traditional HEMT devices is solved, achieving the effects of reducing resistance and chip area.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SILERGY SEMICON TECH (HANGZHOU) CO LTD
- Filing Date
- 2026-03-24
- Publication Date
- 2026-07-10
AI Technical Summary
In traditional HEMT devices, the effective contact area of the ohmic contact electrode is limited by the electrode width, resulting in high ohmic contact resistance and an increased active area of the chip, which increases manufacturing costs and is not conducive to device miniaturization.
By designing ohmic electrodes extending above and below the interlayer dielectric layer, making them mirror-symmetrical or multi-sidedly contacting the sidewalls in contact with the two-dimensional electron gas, the contact side length is increased, and the shape of the ohmic electrodes is optimized to reduce resistance.
Without increasing the lateral dimensions of the ohmic electrodes, it effectively reduces ohmic contact resistance, decreases the active area of the chip, lowers costs, and improves device reliability and stability.
Smart Images

Figure CN122373401A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, specifically to a semiconductor device. Background Technology
[0002] In typical high electron mobility transistor (HEMT) devices, the source and drain electrodes, acting as ohmic contacts, need to penetrate the upper barrier layer to form an electrical connection with the two-dimensional electron gas (2DEG) at the heterojunction interface. Traditional ohmic contact formation processes typically employ high-temperature annealing to diffuse the electrode metal into the barrier layer, thereby forming a conductive path. Structurally, to achieve effective interconnection with the 2DEG layer, conventional designs typically place the ohmic electrodes on the upper surface of the barrier layer, relying on the vertical diffusion or lateral extension of the electrode metal to create the contact channel.
[0003] In traditional HEMT electrode structure designs, ohmic electrodes typically extend only to the surface or shallow region of the barrier layer, and their effective contact area with the two-dimensional electron gas (2DEG) layer is directly limited by the electrode width. To reduce ohmic contact resistance, traditional solutions often rely solely on increasing the geometric width of the ohmic electrode. However, this method of simply increasing width to reduce resistance directly leads to a significant increase in the active area of the chip, not only increasing manufacturing costs but also hindering device miniaturization and high-density integration. Summary of the Invention
[0004] This application provides a semiconductor device to address the problems existing in the prior art.
[0005] According to a first aspect of this application, a semiconductor device is provided, comprising: a semiconductor substrate; a channel layer on the semiconductor substrate; a barrier layer on the channel layer, forming a two-dimensional electron gas between the barrier layer and the channel layer; an interlayer dielectric layer on the barrier layer; and an ohmic electrode extending from the interlayer dielectric layer to below the two-dimensional electron gas, the ohmic electrode including a first portion above the interlayer dielectric layer and a second portion below the upper surface of the interlayer dielectric layer, wherein the second portion of the ohmic electrode is configured such that at least two sidewalls thereon contact the two-dimensional electron gas, and the contact side length with the two-dimensional electron gas is greater than the width of the two-dimensional electron gas in a direction perpendicular to the length of the channel.
[0006] Preferably, the two sides of the second portion of the ohmic electrode that are in contact with the two-dimensional electron gas are mirror-symmetrical with respect to the longitudinal central axis of the ohmic electrode.
[0007] Preferably, the device further includes a gate structure located on the barrier layer, the gate structure comprising a P-type III-V compound layer and a gate metal located on the P-type III-V compound layer, and the ohmic electrodes being located on both sides of the gate structure.
[0008] Preferably, the maximum width of the top view of the second part of the ohmic electrode is set to 0.5-0.8 μm.
[0009] Preferably, in a direction perpendicular to the channel length, the second portion of the ohmic electrode includes a plurality of separate substructures connected to the first portion.
[0010] Preferably, in a direction perpendicular to the channel length, the ohmic electrode comprises a plurality of separate substructures, each substructure being individually connected to a first interconnect metal layer and having the same potential.
[0011] Preferably, the cross-sectional view of the second portion of the ohmic electrode is in the shape of an inverted trapezoid.
[0012] Preferably, the second part of the ohmic electrode is cylindrical or square-shaped.
[0013] Preferably, the second portion of the ohmic electrode includes side surfaces that are in contact with the two-dimensional electron gas and are sequentially convex and concave.
[0014] Preferably, in a top view, the first and second sides of the second portion of the ohmic electrode are periodically bent continuously and include multiple bending units.
[0015] Preferably, each bending unit is arranged equidistantly in the direction of channel width and includes sequentially continuous horizontal and vertical segments.
[0016] Preferably, each bending unit is arranged equidistantly in the direction of the channel width and includes sequentially continuous horizontal segments, diagonal segments and vertical segments.
[0017] Preferably, each bending unit includes at least two oblique line segments in opposite directions.
[0018] Preferably, the ohmic electrode is grooved.
[0019] Preferably, in the top view, the side length of the first part of the ohmic electrode is smaller than the side length of the second part of the ohmic electrode.
[0020] This invention provides a semiconductor device that, without increasing the lateral dimension of the ohmic electrode, increases the side length of the contact with the two-dimensional electron gas by optimizing the shape of the side of the ohmic electrode in contact with the two-dimensional electron gas or increasing the number of sides in contact with the two-dimensional electron gas, thereby reducing the ohmic contact resistance. Attached Figure Description
[0021] The above and other objects, features, and advantages of this application will become clearer from the following description of embodiments with reference to the accompanying drawings, in which:
[0022] Figure 1 This is a schematic diagram of the structure of the semiconductor device of this application;
[0023] Figure 2 This is a partial schematic diagram of a top view of the semiconductor device according to the first embodiment of this application;
[0024] Figure 3 This is a partial schematic diagram of a top view of a semiconductor device according to the second embodiment of this application;
[0025] Figure 4 This is a partial schematic diagram of a top view of a semiconductor device according to the third embodiment of this application;
[0026] Figure 5 This is a partial schematic diagram of a top view of a semiconductor device according to the fourth embodiment of this application. Detailed Implementation
[0027] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0028] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0029] The semiconductor device and its fabrication method of this application will be described in detail below with reference to the specific accompanying drawings and corresponding embodiments.
[0030] Example 1
[0031] This embodiment provides a semiconductor device, such as Figure 1 and Figure 2 As shown. Figure 1 For along Figure 2 The cross-sectional view of reference line AB is shown.
[0032] The semiconductor device includes: a semiconductor substrate; a channel layer 103 on the semiconductor substrate; a barrier layer 104 on the channel layer 103, forming a two-dimensional electron gas 200 between the barrier layer 104 and the channel layer 103; an interlayer dielectric layer 105 on the barrier layer 104; and an ohmic electrode 110 extending from the interlayer dielectric layer 105 to below the two-dimensional electron gas 200, the ohmic electrode 110 including a first portion 1101 above the interlayer dielectric layer and a second portion 1102 below the upper surface of the interlayer dielectric layer. The second portion 1102 of the ohmic electrode 110 is configured such that at least two of its sidewalls contact the two-dimensional electron gas 200, and the contact side length with the two-dimensional electron gas is greater than the width of the two-dimensional electron gas perpendicular to the channel length direction.
[0033] As an example, the semiconductor device is configured as a HEMT device, and the semiconductor substrate includes at least a semiconductor substrate layer 101. The material of the semiconductor substrate layer 101 may be Si, SiC, AlN, Al2O3, sapphire, etc. In an optional embodiment, the semiconductor substrate further includes a buffer layer 102 located between the semiconductor substrate layer 101 and the channel layer 103. The buffer layer 102 is used to release stress caused by lattice mismatch and thermal mismatch between the epitaxially grown heterostructure and the semiconductor substrate layer 101. The material of the buffer layer 102 is a III-V group semiconductor material, such as AlGaN. The buffer layer 102 may include one or more layers. In some embodiments, the buffer layer 102 may be, for example, AlGaN with different aluminum concentrations, with the buffer layer adjacent to the channel layer 103 having the lowest aluminum concentration.
[0034] As an example, the channel layer 103 and the barrier layer 104 are preferably group III nitride materials, and the bandgap of the barrier layer 104 is larger than the bandgap of the channel layer 103, forming a two-dimensional electron gas at the interface between the channel layer 103 and the barrier layer 104. The channel layer 103 may be, for example, made of GaN material, and the barrier layer 104 may be, for example, made of AlGaN material. In some optional embodiments, the barrier layer 104 further includes an AlN material layer located beneath the AlGaN material layer.
[0035] As an example, the semiconductor device can be configured as a power device, and the gate structure 108 includes a P-type doped III-V compound layer 106 and a gate metal layer 107 located on the P-type doped III-V compound layer 106. Preferably, the P-type doped III-V compound layer 106 is P-type GaN, and the gate metal layer 107 can be made of existing materials suitable for use as gate metal layers in HEMT devices, such as TiN or a Ni / Au stacked material.
[0036] As an example, the interlayer dielectric layer 105 covers the upper surface of the gate structure 108 and the barrier layer 104, and the thickness of the interlayer dielectric layer 105 is greater than the thickness of the gate structure 108. The interlayer dielectric layer 105 is configured to include at least one of oxides, nitrides, or other insulating materials known to those skilled in the art.
[0037] As an example, the ohmic electrode 110 includes separate source and drain ohmic electrodes, wherein the gate structure is located between the source and drain ohmic electrodes. A second portion 1102 of the ohmic electrode penetrates the interlayer dielectric layer 105, the barrier layer 104, and the two-dimensional electron gas 200, extending into the channel layer 103. The second portion of the ohmic electrode 110 is columnar. The cross-sectional view of the second portion 1102 of the ohmic electrode is an inverted trapezoidal shape, which can increase the contact characteristics of the ohmic electrode and improve the reliability and stability of the device. The ohmic electrode is configured as a groove, and subsequent interconnect metal formed in the groove can improve the connection contact characteristics between them. The material of the ohmic electrode includes, for example, Ti, AlCu, TiN, etc.
[0038] like Figure 2 As shown, Figure 2 for Figure 1The diagram shows a partial top view of a first type of semiconductor device. The top view of the first portion 1101 of the ohmic electrode is square. In the top view, the side length of the first portion 1101 of the ohmic electrode (the blue line in the diagram, which only includes the active region portion; hereinafter, it is assumed that only the active region portion is included) is smaller than the side length of the second portion 1102 of the ohmic electrode. The second portion 1102 of the ohmic electrode includes side surfaces that are in contact with the two-dimensional electron gas and are sequentially convex and concave. In this embodiment, the second portion 1102 of the ohmic electrode includes opposing first and second sides in contact with the two-dimensional electron gas, and the first and second sides are mirror-symmetrical with respect to the longitudinal central axis of the ohmic electrode. The first and second sides of the second portion 1102 of the ohmic electrode are periodically and continuously bent, and include multiple bending units 211. Each bending unit 211 is equidistantly repeated on a square channel width, and each bending unit includes a horizontal segment and a vertical segment. Specifically, the bending units 211 are square, and each square has the same width and length. Each pair of adjacent bending units 211 is connected by a vertical segment. The opposite sides of the second portion 1102 of the ohmic electrode can take other non-planar forms, as long as the contact side length between the second portion 1102 of the ohmic electrode and the two-dimensional electron gas is greater than the width of the two-dimensional electron gas perpendicular to the channel length direction. There are no restrictions on the shape of the second portion of the ohmic electrode. It should be noted that the channel length direction refers to the direction of the source and drain electrodes.
[0039] The maximum width L1 of the top view of the second portion 1102 of the ohmic electrode is set to 0.5-0.8 μm. The distance L2 between the protrusion of the second portion 1102 of the ohmic electrode in contact with the two-dimensional electron gas 200 and the side corresponding to the first portion 1101 of the ohmic electrode is set to 0.09-1.02 μm. Due to the constraints of power devices on chip cell size, this embodiment, without increasing the lateral dimension of the ohmic electrode, or even sacrificing the lateral dimension of the ohmic electrode, optimizes the side shape of the ohmic electrode in contact with the two-dimensional electron gas to increase its contact side length with the two-dimensional electron gas, thereby achieving the purpose of reducing ohmic contact resistance.
[0040] Example 2
[0041] like Figure 3 As shown, Figure 2 The diagram shows a partial top view of the second type of semiconductor device. Except for the shape of the second part of the ohmic electrode, the structure is basically the same as the first embodiment, and will not be described again here.
[0042] In this embodiment, the second part of the ohmic electrode includes a first side and a second side in contact with the two-dimensional electron gas. The first side and the second side are mirror-symmetrical with respect to the longitudinal central axis of the ohmic electrode to ensure uniform current distribution, improve current capability, and enhance dynamic performance. In a top view, the first and second sides of the second part of the ohmic electrode are periodically and continuously bent, and include multiple bending units 212. Each bending unit 212 is equidistantly repeated in the channel width direction and includes sequentially continuous oblique segments, horizontal segments, and vertical segments. Each bending unit includes at least two oblique segments in opposite directions. Specifically, each bending unit 212 is sequentially composed of a first horizontal segment, a first oblique segment, a first vertical segment, a second oblique segment, a second horizontal segment, a second vertical segment, a third horizontal segment, a third oblique segment, a third vertical segment, a fourth oblique segment, and a fourth horizontal segment. Each bending unit 212 is symmetrically arranged about the central perpendicular line of the second vertical segment, and every two adjacent bending units 212 are connected by a vertical segment. Compared to Embodiment 1, this embodiment has more bending structures and a longer contact edge between the ohmic electrode and the two-dimensional electron gas, further reducing the ohmic resistance of the device.
[0043] Example 3
[0044] like Figure 4 As shown, Figure 2 The diagram shows a partial top view of the third type of semiconductor device. Except for the different shape of the second part of the ohmic electrode, the structure is basically the same as the first embodiment, and will not be described again here.
[0045] In this embodiment, in the direction perpendicular to the channel length, the second portion 1102 of the ohmic electrode includes a plurality of separate substructures 311 connected to the first portion 1101. The spacing between the plurality of substructures 311 is the same, and the width of the substructures 311 is also substantially the same. In this embodiment, the two-dimensional electron gas can contact three or four adjacent sides of each substructure 311. Compared to the one contact side in the prior art or the two contact sides in the above embodiment, this embodiment further effectively increases the contact side length between the ohmic electrode and the two-dimensional electron gas. Furthermore, the structure of the ohmic electrode in this embodiment is easier to form in the manufacturing process, reducing process complexity. It should be noted that the "sides" here refer to all the sides of a complete structure, and do not refer to the specific shapes of small sides on each side.
[0046] Furthermore, a shape structure similar to that in Embodiment 1 and Embodiment 2 is provided on at least one side of each substructure, which further increases the contact side length between the ohmic electrode and the two-dimensional electron gas.
[0047] Example 4
[0048] like Figure 5 As shown, Figure 2 The diagram shows a partial top view of the fourth type of semiconductor device. Except for the ohmic electrode structure, the other structures are basically the same as in the first embodiment, and will not be described again here.
[0049] In this embodiment, the ohmic electrode comprises a plurality of separate substructures 411 perpendicular to the channel length. Each substructure 411 includes a first portion 4111 located on the interlayer dielectric layer and a second portion 4112 located below the upper surface of the interlayer dielectric layer, i.e., the top view area of the second portion 4112 of each substructure 411 is smaller than that of the first portion 4111. The spacing between any two adjacent substructures 411 is the same. Three or four adjacent sides of the second portion 4112 of each substructure 411 are in contact with the two-dimensional electron gas, further increasing the contact side length with the two-dimensional electron gas.
[0050] Furthermore, at least one side of the second part 4112 of each substructure is provided with a shape structure similar to that of Embodiment 1 and Embodiment 2, which further increases the side length of the contact between the ohmic electrode and the two-dimensional electron gas.
[0051] In this embodiment, the ohmic electrode not only increases the contact edge length with the two-dimensional electron gas, but each substructure 411 of the ohmic electrode can also be individually connected to the first interconnect metal layer and have the same potential.
[0052] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
[0053] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A semiconductor device, characterized in that, include: Semiconductor substrate; The channel layer located on the semiconductor substrate; A barrier layer is located on the channel layer, and a two-dimensional electron gas is formed between the barrier layer and the channel layer; An interlayer dielectric layer located on the barrier layer; as well as An ohmic electrode extends from the interlayer dielectric layer to below the two-dimensional electron gas, the ohmic electrode comprising a first portion above the interlayer dielectric layer and a second portion below the upper surface of the interlayer dielectric layer. The second portion of the ohmic electrode is configured such that at least two of its sidewalls are in contact with the two-dimensional electron gas, and the side length of the contact with the two-dimensional electron gas is greater than the width of the two-dimensional electron gas in the direction perpendicular to the channel length.
2. The semiconductor device according to claim 1, characterized in that, The second part of the ohmic electrode is mirror-symmetrical about the two sides in contact with the two-dimensional electron gas with respect to the longitudinal central axis of the ohmic electrode.
3. The semiconductor device according to claim 1, characterized in that, It also includes a gate structure located on the barrier layer, the gate structure comprising a P-type III-V compound layer and a gate metal located on the P-type III-V compound layer, the ohmic electrodes being located on both sides of the gate structure.
4. The semiconductor device according to claim 1, characterized in that, The maximum width of the top view of the second part of the ohmic electrode is set to 0.5-0.8 μm.
5. The semiconductor device according to claim 1, characterized in that, In a direction perpendicular to the channel length, the second portion of the ohmic electrode includes a plurality of separate substructures connected to the first portion.
6. The semiconductor device according to claim 1, characterized in that, In a direction perpendicular to the channel length, the ohmic electrode comprises multiple separate substructures, each individually connected to a first interconnect metal layer and having the same potential.
7. The semiconductor device according to claim 1, characterized in that, The cross-sectional view of the second part of the ohmic electrode is in the shape of an inverted trapezoid.
8. The semiconductor device according to claim 1, characterized in that, The second part of the ohmic electrode is cylindrical or square-shaped.
9. The semiconductor device according to claim 1, characterized in that, The second part of the ohmic electrode includes a side surface that is in contact with the two-dimensional electron gas and is sequentially convex and concave.
10. The semiconductor device according to claim 1, characterized in that, In the top view, the first and second sides of the second part of the ohmic electrode are periodically bent continuously and include multiple bending units.
11. The semiconductor device according to claim 10, characterized in that, Each bending unit is arranged at equal intervals along the width of the channel and includes consecutive horizontal and vertical segments.
12. The semiconductor device according to claim 10, characterized in that, Each bending unit is arranged equidistantly in the direction of the channel width and includes sequentially continuous horizontal, diagonal, and vertical segments.
13. The semiconductor device according to claim 12, characterized in that, Each bending unit includes at least two diagonal segments in opposite directions.
14. The semiconductor device according to claim 1, characterized in that, The ohmic electrode is grooved.
15. The semiconductor device according to claim 1, characterized in that, In the top view, the side length of the first part of the ohmic electrode is smaller than the side length of the second part of the ohmic electrode.