Magnetic storage device
By inserting an insulator other than a nitride into the magnetic storage device and using a conductor to form a current path, the problem of easy degradation of the magnetic properties of the storage cell is solved, and the stability and performance of the storage cell are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- KIOXIA CORP
- Filing Date
- 2022-03-07
- Publication Date
- 2026-07-10
AI Technical Summary
In existing magnetic storage devices, the magnetic properties of the storage cells are prone to degradation, which affects the device's performance.
In magnetic storage devices, an insulator other than a nitride is inserted between the upper electrode and the ferromagnetic layer to avoid direct contact. A current path is formed using a conductor to ensure electrical connection, while suppressing the influence of the nitride on the ferromagnetic layer.
It effectively suppresses the degradation of the magnetic properties of the ferromagnetic layer by the upper electrode material, ensures the normal function of the magnetoresistive element, and improves the stability and performance of the memory cell.
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Figure CN122373684A_ABST
Abstract
Description
[0001] This application is a divisional application of patent application No. 202210215580.0, filed on March 7, 2022, entitled "Magnetic storage device and method of manufacturing magnetic storage device".
[0002] This application enjoys priority to Japanese Patent Application No. 2021-040518 (filed March 12, 2021) and U.S. Patent Application No. 17 / 472395 (filed September 10, 2021). This application incorporates the entire contents of the basic applications by reference. Technical Field
[0003] The implementation methods generally involve magnetic storage devices. Background Technology
[0004] Magnetic storage devices are known as a type of storage device. Magnetic storage devices use storage cells that include elements that provide a magnetoresistive effect to store data. To improve the performance of magnetic storage devices, it is desirable to suppress the degradation of the magnetic properties of the storage cells. Summary of the Invention
[0005] The problem to be solved by the present invention is to provide a magnetic storage device in which the degradation of magnetic properties is suppressed.
[0006] One embodiment of a magnetic storage device includes: a first conductor; a variable resistive material on the upper surface of the first conductor; a second conductor on the upper surface of the variable resistive material; a first insulator other than a nitride on the upper surface of the second conductor; a third conductor located in the first insulator and having a bottom surface in contact with the upper surface of the second conductor; and magnetoresistive effect elements on the upper surface of the first insulator and the upper surface of the third conductor. Attached Figure Description
[0007] Figure 1 The functional block diagram and associated elements of the magnetic storage device according to the first embodiment are shown.
[0008] Figure 2 This is a circuit diagram of the memory cell array according to the first embodiment.
[0009] Figure 3 The structure of a cross section of a portion of the memory cell array of the first embodiment is shown.
[0010] Figure 4 The structure of a cross section of a portion of the memory cell array of the first embodiment is shown.
[0011] Figure 5 A cross section showing an example of the construction of the storage cell in the first embodiment.
[0012] Figure 6 This illustrates a state between manufacturing processes of the construction of the storage cell in the first embodiment.
[0013] Figure 7 Showing the connection Figure 6 The subsequent state.
[0014] Figure 8 Showing the connection Figure 7 The subsequent state.
[0015] Figure 9 A cross section showing an example of the construction of the storage cell in the second embodiment.
[0016] Figure 10 This illustrates a state between manufacturing processes of the construction of the storage cell in the second embodiment.
[0017] Figure 11 Showing the connection Figure 10 The subsequent state.
[0018] Figure 12 Showing the connection Figure 11 The subsequent state.
[0019] Label Explanation
[0020] 1…Magnetic storage device, 2…Storage controller, 11…Storage cell array, 12…Input / output circuit, 13…Control circuit, 14…Row selection circuit, 15…Column selection circuit, 16…Write circuit, 17…Read circuit, MC…Storage cell, WL…Word line, BL…Bit line, VR…Magnetic reluctance element, SE…Selector, 21…Conductor, 22…Conductor, 23…Interlayer insulator, 28…Insulator, 35…Hard mask, 41…Conductor, 24…Lower electrode, 25…Variable resistivity material, 26…Upper electrode, 31…Ferromagnetic layer, 32…Insulating layer, 33…Ferromagnetic layer, 45…Conductor. Detailed Implementation
[0021] Hereinafter, embodiments will be described with reference to the accompanying drawings. In the following description, constituent elements having substantially the same function and structure are labeled with the same reference numerals, and repeated descriptions are sometimes omitted.
[0022] The accompanying drawings are schematic; the relationship between thickness and planar dimensions, and the ratio of thicknesses of different layers, may differ from reality. The drawings may also include sections with different dimensional relationships and ratios.
[0023] In this specification and claims, a first element being "connected" to another second element includes the first element being directly or always or selectively connected to the second element via an element that is conductive.
[0024] The following describes the implementation method using an xyz orthogonal coordinate system.
[0025] 1. First Implementation Method
[0026] 1.1. Construction (Structure)
[0027] 1.1.1. Overall Structure
[0028] Figure 1 A functional block diagram of the magnetic storage device according to the first embodiment is shown. For example... Figure 1 As shown, the magnetic storage device 1 is controlled by the storage controller 2. The magnetic storage device 1 includes a storage cell array 11, an input / output circuit 12, a control circuit 13, a row selection circuit 14, a column selection circuit 15, a write circuit 16, and a read circuit 17.
[0029] The storage cell array 11 includes multiple storage cells (MCs), multiple word lines (WLs), and multiple bit lines (BLs). Each storage cell (MC) can store data non-volatilely. Each storage cell (MC) is connected to one word line (WL) and one bit line (BL). The word line (WL) is associated with a row. The bit line (BL) is associated with a column. A storage cell (MC) is determined by selecting one row and one column.
[0030] Input / output circuit 12 receives control signal CNT, command CMD, address signal ADD, and data (write data) DAT from memory controller 2. Input / output circuit 12 sends data (read data) DAT to memory controller 2.
[0031] The row selection circuit 14 receives the address signal ADD from the input / output circuit 12, and makes the word line WL associated with the row determined by the received address signal ADD selected.
[0032] The column selection circuit 15 receives the address signal ADD from the input / output circuit 12, and makes the multiple bit lines BL associated with the column determined by the received address signal ADD selected.
[0033] The control circuit 13 receives control signals CNT and commands CMD from the input / output circuit 12. The control circuit 13 controls the write circuit 16 and the read circuit 17 based on the control signals CNT and CMD. Specifically, during the writing of data to the memory cell array 11, the control circuit 13 supplies the voltage used for data writing to the write circuit 16. Additionally, during the reading of data from the memory cell array 11, the control circuit 13 supplies the voltage used for data reading to the read circuit 17.
[0034] The write circuit 16 receives write data DAT from the input / output circuit 12 and supplies the voltage to the voltage select circuit 15 used in data writing based on the control of the control circuit 13 and the write data DAT.
[0035] The readout circuit 17, based on the control of the control circuit 13, uses the voltage used in data readout to extract the data held in the storage cell MC. The extracted data is supplied to the input / output circuit 12 as readout data DAT. The readout circuit 17 includes a sense amplifier.
[0036] 1.1.2. Circuit Structure of Memory Cell Array
[0037] Figure 2 This is a circuit diagram of the memory cell array 11 according to the first embodiment. Figure 2 As shown, the storage cell array 11 includes M+1 (M is a natural number) word lines WLA (WLA <0> WLA <1> ..., WLA <m>) and M+1 word lines WLB (WLB <0> WLB <1> ..., WLB <m>Additionally, the memory cell array 11 includes N+1 (N is a natural number) bit lines BL (BL... <0> BL <1> BL <n>).
[0038] Each memory cell MC (MCA and MCB) has a first node and a second node. Each memory cell MC is connected to a word line WL at the first node and to a bit line BL at the second node. More specifically, memory cell MCA includes all combinations of all cases where α is an integer greater than or equal to M and β is an integer greater than or equal to N, including memory cell MCA<α, β>, which is connected between word line WLA<α> and bit line BL<β>. Similarly, memory cell MCB includes all combinations of all cases where α is an integer greater than or equal to M and β is an integer greater than or equal to N, including memory cell MCB<α, β>, which is connected between word line WLB<α> and bit line BL<β>.
[0039] Each memory cell MC includes one magnetoresistive element VR (VRA or VRB) and one selector SE (SEA or SEB). More specifically, for all combinations of cases where α is an integer greater than or equal to M and β is an integer greater than or equal to N, memory cell MCA<α, β> includes the magnetoresistive element VRA<α, β> and the selector SEA<α, β>. Furthermore, for all combinations of cases where α is greater than or equal to M and β is an integer greater than or equal to N, memory cell MCB<α, β> includes the magnetoresistive element VRB<α, β> and the selector SEB<α, β>.
[0040] In each memory cell (MC), the magnetoresistive element VR and the selector SE are connected in series. The magnetoresistive element VR is connected to one word line WL, and the selector SE is connected to one bit line BL.
[0041] A magnetoresistive element (VR) can switch between a low-resistance state and a high-resistance state. The VR can store one bit of data using the difference between these two resistance states.
[0042] The selector SE can be, for example, a switching element as described below. The switching element has two terminals. When a voltage less than a first threshold is applied between the two terminals in a first direction, the switching element is in a high-resistance state, for example, an electrically non-conducting state (open state). On the other hand, when a voltage greater than the first threshold is applied between the two terminals in the first direction, the switching element is in a low-resistance state, for example, an electrically conducting state (closed state). The switching element further has the same function regarding a second direction opposite to the first direction, switching between a high-resistance state and a low-resistance state based on the magnitude of the voltage applied in the first direction. That is, the switching element is a bidirectional switching element. By turning the switching element on or off, the presence or absence of current supply to the magnetoresistive element VR connected to the switching element can be controlled, i.e., the selection or non-selection of the magnetoresistive element VR.
[0043] 1.1.3. Construction of a Storage Cell Array
[0044] Figure 3 and Figure 4 The structure of a cross section of a portion of the memory cell array 11 of the first embodiment is shown. Figure 3 The cross-section along the xz plane is shown. Figure 4 The cross section along the yz plane is shown.
[0045] like Figure 3 and Figure 4 As shown, a plurality of conductors 21 are disposed above a semiconductor substrate (not shown). The conductors 21 extend along the y-axis and are arranged along the x-axis. Each conductor 21 functions as a word line WL.
[0046] Each conductor 21 is connected at its upper surface to the bottom surface of each of the plurality of memory cell MCBs. The memory cell MCBs have, for example, a circular shape in the xy-plane. The memory cell MCBs are arranged along the y-axis on each conductor 21, forming a matrix in the xy-plane. Each memory cell MCB includes a structure that functions as a selector SEB and a structure that functions as a magnetoresistive element VRB. The structures that function as the selector SEB and the structures that function as the magnetoresistive element VRB, as described below, each include one or more layers.
[0047] Multiple conductors 22 are disposed above the memory cell MCB. The conductors 22 extend along the x-axis and are arranged along the y-axis. Each conductor 22 is connected at its bottom surface to the upper surface of the multiple memory cells MCB arranged along the x-axis. Each conductor 22 functions as a bit line BL.
[0048] Each conductor 22 is connected at its upper surface to the bottom surface of each of the plurality of memory cell MCAs. The memory cell MCAs have, for example, a circular shape in the xy-plane. The memory cell MCAs are arranged along the x-axis on each conductor 22, forming a matrix in the xy-plane. Each memory cell MCA includes a structure that functions as a selector SEA and a structure that functions as a magnetoresistive element VRA. The structures that function as a selector SEA and as a magnetoresistive element VRA, as described below, each include one or more layers.
[0049] Further conductors 21 are provided on the upper surface of each of the multiple memory cells MCA arranged along the y-axis.
[0050] 1.1.4. Construction of Storage Units
[0051] Figure 5 A cross section showing an example of the construction of the storage cell in the first embodiment. Figure 5 The diagram shows the structure of the layer containing conductor 22 and extending along the z-axis from that layer to the layer containing the next conductor 21. That is, Figure 5 The storage unit MC shown is equivalent to the storage unit MCA.
[0052] like Figure 5 As shown, an interlayer insulator 23 is disposed above a semiconductor substrate (not shown). A conductor 22 is disposed within the interlayer insulator 23. Memory cells MC are located on the upper surface of each conductor 22. Each memory cell MC includes a selector SE, an insulator 28, a magnetoresistive element VR, a hard mask 35, and a conductor 41. The memory cell MC may also include further layers.
[0053] Each selector SE is located on the upper surface of a conductor 22 and forms a tapered shape on its side. Each selector SE can, for example, have a frustum-shaped cone. When a selector SE has a frustum-shaped cone, the selector SE's... Figure 5 The construction of different sections shown is as follows: Figure 5 The construction shown and described below is the same.
[0054] The selector SE includes a lower electrode 24, a variable resistance material (variable resistance material layer) 25, and an upper electrode 26.
[0055] The lower electrode 24 is located on the upper surface of the conductor 22, and is substantially formed, for example, of nitrogen (N) and titanium (Ti) or of TiN. In this specification and claims, the use of "substantially formed" or "substantially become" and similar descriptions implies that the element "substantially formed" may contain unintentional impurities.
[0056] The variable resistive material 25 is, for example, a two-terminal switching element, where the first terminal is one of the upper and bottom surfaces of the variable resistive material 25, and the second terminal is the other of the upper and bottom surfaces. When the voltage applied between the two terminals is below a threshold value, the switching element is in a "high resistance" state, i.e., an electrically non-conductive state. When the voltage applied between the two terminals is above the threshold value, the switching element is in a "low resistance" state, i.e., an electrically conductive state. The variable resistive material 25 is formed of a material including an insulator and contains dopants introduced by ion implantation. The insulator, for example, comprises an oxide, SiO2, or a material substantially formed from SiO2. The dopants, for example, comprise arsenic (As) or germanium (Ge).
[0057] The upper electrode 26 is located on the upper surface of the variable resistor material 25, and may contain, for example, nitrogen (N) and titanium (Ti), or one or more of titanium nitride (TiN), aluminum (Al), tantalum (Ta), tungsten (W), copper (Cu), and carbon (C), or may be substantially formed from one or more of TiN, Al, Ta, W, Cu, and C. The upper electrode 26 is composed of a lower portion 26B including a lower end and an upper portion 26T including an upper end. The boundary between the lower portion 26B and the upper portion 26T on the side of the upper electrode 26 is stepped. That is, the side of the upper portion 26T is not on the extension line of the side of the lower portion 26B. In other words, the area of the upper end of the lower portion 26B, i.e., the boundary with the upper portion 26T, is larger than the area of the lower end of the upper portion 26T, i.e., the boundary with the lower portion 26B.
[0058] Insulators 28 are located on the upper surfaces of each upper electrode 26. Each insulator 28 comprises a material other than a nitride, or is substantially formed of a material other than a nitride. Each insulator 28 is tapered in shape on its sides. Each insulator 28 can, for example, have a frustum-shaped cone. When the insulator 28 has a frustum-shaped cone, the insulator 28 and Figure 5 The construction of different sections shown is as follows: Figure 5 The construction shown and described below is the same.
[0059] The insulator 28 is intended to widen the gap between the upper electrode 26 and the insulating layer 32 above the insulator 28. That is, the insulating layer 32 is required to be sufficiently separated from the upper electrode 26 for reasons described later, and the thickness (dimension along the z-axis) of the insulator 28 is determined in such a way as to achieve this purpose. Between the upper electrode 26 and the insulating layer 32, in addition to the insulator 28, a ferromagnetic layer 31 is also located, as described later. Therefore, the insulator 28 has a thickness equal to the difference between the desired gap between the upper electrode 26 and the ferromagnetic layer 31 and the thickness of the ferromagnetic layer 31.
[0060] A magnetoresistive element VR is located on the upper surface of each insulator 28. The magnetoresistive element VR is tapered in shape on its side. Each magnetoresistive element VR can, for example, have a frustum-shaped cone. When the magnetoresistive element VR has a frustum-shaped cone, the magnetoresistive element VR is related to... Figure 5 The construction of different sections shown is as follows: Figure 5 The construction shown and described below is the same. For example, the side surface of each magnetoresistive element VR is continuous with the side surface of the insulator 28.
[0061] Each magnetoresistive element VR exhibits the tunnel magnetoresistive effect, such as an element comprising a magnetic tunnel junction (MTJ element). The following description and figures are based on the example of a magnetoresistive element VR being an MTJ element.
[0062] Specifically, the magnetoresistive element VR includes a ferromagnetic layer 31, an insulating layer 32, and a ferromagnetic layer 33. For example, ... Figure 5 As shown, the insulating layer 32 is located on the upper surface of the ferromagnetic layer 31, and the ferromagnetic layer 33 is located on the upper surface of the insulating layer 32.
[0063] The ferromagnetic layer 31 has an easy magnetization axis along the interface penetrating the ferromagnetic layer 31, the insulating layer 32, and the ferromagnetic layer 33. For example, it has an easy magnetization axis at an angle of 45° or more and 90° or less relative to the interface, or it has an easy magnetization axis perpendicular to the interface. The intention is to ensure that the orientation of the magnetization of the ferromagnetic layer 31 remains unchanged even when data is read from or written to the magnetic storage device 1. The ferromagnetic layer 31 can function as a so-called reference layer. The ferromagnetic layer 31 may also comprise multiple layers.
[0064] The insulating layer 32, for example, contains oxygen and magnesium, or is substantially formed of MgO, and functions as a so-called tunnel barrier.
[0065] The ferromagnetic layer 33 may contain, for example, cobalt, iron, and boron, or boron and iron, or may be substantially formed of CoFeB or FeB. The ferromagnetic layer 33 has an easy magnetization axis along the interface penetrating the ferromagnetic layer 31, the insulating layer 32, and the ferromagnetic layer 33, for example, an easy magnetization axis at an angle of 45° or more and 90° or less relative to the interface, or an easy magnetization axis perpendicular to the interface. The orientation of the magnetization of the ferromagnetic layer 33 can vary due to data writing, and the ferromagnetic layer 33 can function as a so-called storage layer.
[0066] If the magnetization orientation of ferromagnetic layer 33 is parallel to the magnetization orientation of ferromagnetic layer 31, then the magnetoresistive element VR has a low resistance. If the magnetization orientation of ferromagnetic layer 33 is antiparallel to the magnetization orientation of ferromagnetic layer 31, then the magnetoresistive element VR has a higher resistance than the case where the magnetization orientations of ferromagnetic layers 31 and 33 are antiparallel.
[0067] If a write current of a certain magnitude flows from ferromagnetic layer 33 toward ferromagnetic layer 31, the magnetization direction of ferromagnetic layer 33 is parallel to the magnetization direction of ferromagnetic layer 31. On the other hand, if a write current of a different magnitude flows from ferromagnetic layer 31 toward ferromagnetic layer 33, the magnetization direction of ferromagnetic layer 33 is antiparallel to the magnetization direction of ferromagnetic layer 31.
[0068] The hard mask 35 is located on the upper surface of the magnetoresistive element VR, such as the upper surface of the ferromagnetic layer 33. The hard mask 35 is formed of a conductor, such as containing TiN or substantially formed of TiN.
[0069] Conductor 41 comprises the same material as, or is substantially formed of, the same material as, the upper electrode 26. As described later, conductor 41 comprises material removed from a portion of the upper electrode 26. Conductor 41 covers the entire sidewall of insulator 28.
[0070] The conductor 41 is partially in contact with the side surface of the upper electrode 26 at its lower portion, including its lower end; for example, it partially covers the side surface of the upper electrode 26. That is, the conductor 41 is in contact with the side surface of the upper portion 26T of the upper electrode 26, for example, it covers the side surface of the upper portion 26T of the upper electrode 26. Additionally, the conductor 41 is in contact with the upper surface of the lower portion 26B of the upper electrode 26 at its lower portion. For example, the side surface of the conductor 41 is continuous with the side surface of the selector SE, especially the side surface of the upper electrode 26, at the lower portion of the conductor 41.
[0071] The conductor 41 may also cover the entire side of the upper electrode 26 at its lower part. However, the conductor 41 needs to be in contact with the variable resistivity material 25. To prevent the conductor 41 from accidentally coming into contact with the variable resistivity material 25 during the manufacture of the magnetic storage device 1, the lower end of the conductor 41 is preferably sufficiently separated from the upper end of the variable resistivity material 25. For example, the lower end of the conductor 41 can be separated from the upper end of the variable resistivity material 25 by more than half the thickness of the upper electrode 26. That is, the lower end of the conductor 41 is located above the middle position of the upper electrode 26 along the z-axis.
[0072] On the other hand, the conductor 41 provides a current path to the upper electrode 26 that bypasses the insulator 28. Therefore, in order to suppress the resistance relative to the current flowing into and out of the upper electrode 26, the contact area between the conductor 41 and the upper electrode 26 can be increased. The closer the lower end of the conductor 41 is to the lower end of the upper electrode 26, the larger the contact area. Thus, the position of the lower end of the conductor 41 can be determined based on a balance between ensuring the contact area and ensuring the distance between the conductor 41 and the variable resistive material 25.
[0073] Furthermore, the conductor 41 is partially in contact with the side surface of the ferromagnetic layer 31 at its upper portion, including the upper end, for example, partially covering the side surface of the ferromagnetic layer 31. That is, the conductor 41 is in contact with the portion of the side surface of the ferromagnetic layer 31 including the lower end at its upper portion, for example, covering the portion of the side surface of the ferromagnetic layer 31 including the lower end.
[0074] Conductor 41 provides a current path to ferromagnetic layer 31 that bypasses insulator 28. Therefore, in order to suppress the resistance relative to the current flowing into and out of ferromagnetic layer 31, the contact area between conductor 41 and ferromagnetic layer 31 can be increased. The closer the upper end of conductor 41 is to the upper end of ferromagnetic layer 31, the larger the contact area.
[0075] On the other hand, because the material of the conductor 41 is in contact with the ferromagnetic layer in the magnetoresistive element VR, the magnetic properties of the ferromagnetic layer to which the material of the conductor 41 is attached may deteriorate. As described above, the material of the conductor 41 includes the same material as the material of the upper electrode 26. Therefore, because the material of the upper electrode 26 is in contact with the ferromagnetic layer in the magnetoresistive element VR, the magnetic properties of the ferromagnetic layer to which the material of the upper electrode 26 is attached may deteriorate. Therefore, it is sometimes desirable to suppress the attachment of the conductor 41 to the side of the ferromagnetic layer 31. Thus, the position of the upper end of the conductor 41 can be determined based on a balance between two factors: the magnitude of the resistance at the interface between the conductor 41 and the ferromagnetic layer 31 and the degree of deterioration of the magnetic properties of the ferromagnetic layer 31 caused by the material of the conductor 41.
[0076] The conductor 41 extends throughout the upper electrode 26 and the ferromagnetic layer 31, thereby enabling the conductor 41 to function as a current path between the upper electrode 26 and the ferromagnetic layer 31.
[0077] Figure 5 In the structure of the magnetic storage device 1 shown, areas without any elements can be provided with interlayer insulators. Furthermore, insulators covering the surface of the storage cell MC can be provided.
[0078] 1.2. Manufacturing Method
[0079] Figures 6-8 The states between manufacturing processes of a portion of the magnetic storage device of the first embodiment are shown in sequence. Figures 6-8 Showing with Figure 5 The cross-section shown is the same as the cross-section shown.
[0080] like Figure 6 As shown, a conductor 22, an interlayer insulator 23, a lower electrode 24A, a variable resistance material 25A, an upper electrode 26A, an insulator 28A, a ferromagnetic layer 31A, an insulating layer 32A, a ferromagnetic layer 33A, and a hard mask 35A are formed. That is, multiple conductors 22 are formed within the interlayer insulator 23. Next, the lower electrode 24A, the variable resistance material 25A, the upper electrode 26A, the insulator 28A, the ferromagnetic layer 31A, the insulating layer 32A, the ferromagnetic layer 33A, and the hard mask 35A are sequentially deposited on the upper surface of the interlayer insulator 23 and the upper surface of the conductors 22. Examples of deposition methods include chemical vapor deposition (CVD) and sputtering. The lower electrode 24A, variable resistor material 25A, upper electrode 26A, insulator 28A, ferromagnetic layer 31A, insulating layer 32A, and ferromagnetic layer 33A are elements formed respectively into the lower electrode 24A, variable resistor material 25A, upper electrode 26A, insulator 28A, ferromagnetic layer 31A, insulating layer 32A, and ferromagnetic layer 33A in subsequent processes. The hard mask 35A remains directly above the area where the magnetoresistive element VR is to be formed, and has openings 35A1 in other areas. The openings 35A1 extend from the upper surface of the hard mask 35A to the lower surface.
[0081] like Figure 7 As shown, multiple groups of insulator 28B, ferromagnetic layer 31B, insulating layer 32B, and ferromagnetic layer 33B are formed. That is, the structure obtained through the processes up to this point is locally removed by ion beam etching (IBE). Figure 7 The IBE performed during the process is sometimes referred to as the first IBE.
[0082] The ion beam of the first IBE is angled relative to the z-axis. This ion beam penetrates into the opening 35A1 of the hard mask 35A, locally removing the exposed elements within the opening 35A1. A portion of the ion beam is blocked by the hard mask 35A; that is, due to the masking effect of the hard mask 35A, it does not reach the deeper regions within the opening 35A1. However, the hard mask 35A is also locally removed by the first IBE, and its upper surface gradually decreases as the first IBE progresses. As a result, the ion beam reaches deeper regions within the opening 35A1 as the first IBE progresses. The first IBE is performed while rotating the object being etched about the z-axis. Therefore, as the first IBE progresses, the edges of the exposed elements in the xy plane approach the center of the element uniformly. The first IBE continues at least until the insulator 28A, ferromagnetic layer 31A, insulating layer 32A and ferromagnetic layer 33A are partially removed and the upper surface of the upper electrode 26A is exposed.
[0083] Through the first IBE, insulator 28A, ferromagnetic layer 31A, insulating layer 32A, and ferromagnetic layer 33A are partially removed and formed onto insulator 28B, ferromagnetic layer 31B, insulating layer 32B, and ferromagnetic layer 33B, respectively. Additionally, through the first IBE, hard mask 35A becomes hard mask 35B.
[0084] The portion of the upper electrode 26A exposed between the insulators 28B is referred to as part 26AE of the upper electrode 26A.
[0085] like Figure 8 As shown, conductor 41 is formed. That is, the structure obtained through the processes up to this point is partially removed by IBE. Figure 8 The IBE performed during the first IBE process is sometimes referred to as the second IBE. The second IBE is performed under different conditions than those used in the first IBE. The different conditions include at least the angle of the ion beam. The angle of the ion beam relative to the z-axis used in the second IBE is smaller than that used in the first IBE, for example, close to 0°.
[0086] Through the second IBE, a portion 26AE of the upper electrode 26A is locally removed, and the upper surface of the portion 26AE is lowered. As a result, the portion of the upper electrode 26A other than the portion 26AE remains to form the upper part 26T.
[0087] The second IBE causes the material removed from the etched object to scatter in the surrounding area. For example, the localized removal of a portion 26AE of the upper electrode 26A achieved by the second IBE causes elements of the upper electrode 26A material to scatter. The scattered elements can re-accumulate around the starting point of the scattering. This re-accumulation can occur at the side of the insulator 28 closest to the starting point of the scattering. Through this re-accumulation, a conductor 41 is formed. The conductor 41, due to this method of formation, mainly contains the same material as the upper electrode 26A. In addition to containing the material of the upper electrode 26A as the main component, the conductor 41 may also contain other materials resulting from the execution of the second IBE. Therefore, the conductor 41 is sometimes not formed from the same material as the upper electrode 26A.
[0088] For reference Figure 5 As described, the conductor 41 extends throughout the upper electrode 26 and the ferromagnetic layer 31. Therefore, the second IBE is performed under conditions that allow for the re-stacking of the conductor 41 in a manner that ensures it extends throughout the upper electrode 26 and the ferromagnetic layer 31. These conditions include at least one of the following: the ion beam velocity (energy of the ion beam irradiation), the ion beam angle, and the elemental composition (i.e., mass) of the ions. The conditions for forming the conductor 41 that reaches the side of the ferromagnetic layer 31 depend at least in part on the thickness of the insulator 28 (insulator 28B). Therefore, the thickness of the insulator 28 is considered in determining the conditions.
[0089] Through the second IBE, insulator 28B, ferromagnetic layer 31B, insulating layer 32B, and ferromagnetic layer 33A are also partially removed and formed onto insulator 28, ferromagnetic layer 31, insulating layer 32, and ferromagnetic layer 33, respectively. Additionally, through the second IBE, hard mask 35B becomes hard mask 35.
[0090] Next, as Figure 5 As shown, an upper electrode 26, a variable resistive material 25, and a lower electrode 24 are formed. That is, the upper electrode 26A, the variable resistive material 25A, and the lower electrode 24A are partially removed to form the upper electrode 26, the variable resistive material 25, and the lower electrode 24, respectively. The partial removal of the upper electrode 26A, the variable resistive material 25A, and the lower electrode 24A can be performed by any method. For example, the formation of the upper electrode 26, the variable resistive material 25, and the lower electrode 24 can be achieved by... Figure 8 The IBE process continues. Alternatively, the formation of the upper electrode 26, the variable resistance material 25, and the lower electrode 24 can be performed by reactive ion etching (RIE).
[0091] 1.3. Advantages (Effects)
[0092] According to the first embodiment, as described below, a storage unit with high characteristics can be provided.
[0093] As a reference configuration for the storage cell, a magnetoresistive element VR can be provided on the upper surface of the selector SE, which has the same configuration as in the first embodiment. Such a configuration can be formed via IBE, just as in the first embodiment. That is, similar to the first embodiment... Figure 6 Similarly, the lower electrode 24A, variable resistance material 25A, upper electrode 26A, ferromagnetic layer 31A, insulating layer 32A, and ferromagnetic layer 33A, stacked sequentially from the bottom, are formed by IBE. Unlike the first embodiment, the insulator 28A is not provided, so the upper electrode 26A and the ferromagnetic layer 31A are in contact but separated by only a very small distance. Based on this, the IBE of the upper electrode 26A may result in the following two phenomena.
[0094] As the first factor, material that scatters from the upper electrode 26A via IBE may accumulate extensively on the sides of the ferromagnetic layer 31A. In the case where the material contained in the upper electrode 26A, especially if the material of the upper electrode 26A is TiN, the accumulated material contains a large amount of nitrogen. It is generally believed that if nitrogen adheres to the ferromagnetic layer, it may degrade the magnetic properties of the attached ferromagnetic layer. Therefore, if a large amount of material from the upper electrode 26A accumulates on the sides of the ferromagnetic layer 31A, the magnetic properties of the ferromagnetic layer 31A, and consequently the properties of the magnetoresistive element VR, may degrade.
[0095] Secondly, material scattering from the upper electrode 26A via IBE may prevent the magnetoresistive element VR from exhibiting the magnetoresistive effect. That is, because the upper electrode 26A and the ferromagnetic layer 31A are very close, material scattering from the upper electrode 26A via IBE may accumulate on the side surface of the insulating layer 32. This accumulation on the side surface of the insulating layer 32 makes the ferromagnetic layers 31 and 33 electrically conductive. If the ferromagnetic layers 31 and 33 are electrically conductive, the magnetoresistive element VR, including such ferromagnetic layers 31 and 33, cannot exhibit the magnetoresistive effect. Therefore, such a magnetoresistive element VR cannot function as a memory cell.
[0096] According to the first embodiment, an insulator 28 is provided between the upper electrode 26 and the ferromagnetic layer 31. Therefore, the upper electrode 26 and the ferromagnetic layer 31 are not in contact and are spaced apart. Consequently, during the IBE-based forming of the upper electrode 26A, material that scatters from the upper electrode 26A through the IBE is less likely to accumulate on the sidewalls of the ferromagnetic layer 31. The amount of accumulation is at least less than that in the reference structure excluding the insulator 28. Therefore, a memory cell MC in which the degradation of the magnetic properties of the ferromagnetic layer 31 is suppressed compared to the reference structure can be provided.
[0097] For the same reason, material that scatters from the upper electrode 26A via IBE can be significantly suppressed or prevented from accumulating on the side of the insulating layer 32, which is located further away from the ferromagnetic layer 31. This allows for the provision of a memory cell MC that exhibits magnetoresistive effects.
[0098] Unlike the reference configuration, the upper electrode 26 and the ferromagnetic layer 31 are not in contact. Therefore, the upper electrode 26 and the ferromagnetic layer 31 do not have a current path through their interface as in the reference configuration. However, according to the first embodiment, a conductor 41 is provided covering regions on the sides of the upper electrode 26 and the sides of the ferromagnetic layer 31, forming a current path between the upper electrode 26 and the ferromagnetic layer 31. Therefore, the selector SE and the magnetoresistive element VR can be electrically connected. Re-deposition of material scattered from elements exposed to the IBE can cause unintended results if it adheres to surrounding elements; therefore, it is generally desirable to suppress re-deposition. In the first embodiment, re-deposition is actively utilized to address the lack of electrical connection at the interface between the upper electrode 26 and the ferromagnetic layer 31 caused by the non-contact between the upper electrode 26 and the ferromagnetic layer 31 based on the insertion of the insulator 28. That is, by actively re-stacking, a conductor 41 is formed on the side of the insulator 28, and through the conductor 41, an electrical connection is formed between the upper electrode 26 and the ferromagnetic layer 31.
[0099] Furthermore, according to the first embodiment, each insulator 28 comprises a material other than nitride or is substantially formed of a material other than nitride. Therefore, nitrogen adhesion to the ferromagnetic layer 31 due to the insertion of the insulator 28, which ensures the distance between the upper electrode 26 and the ferromagnetic layer 31, can be suppressed. Thus, the deterioration of the magnetic properties of the ferromagnetic layer 31 caused by the insertion of the insulator 28 is suppressed.
[0100] 2. Second Implementation Method
[0101] The second embodiment differs from the first embodiment in that it has a structure for the electrical connection between the upper electrode 26 and the ferromagnetic layer 31. Hereinafter, the features that differ from the first embodiment will be mainly described.
[0102] The magnetic storage device 1, storage unit MC, selector SE, upper electrode 26, and insulator 28 of the second embodiment differ from those of the magnetic storage device 1, storage unit MC, selector SE, upper electrode 26, and insulator 28 of the first embodiment. To distinguish them from those of the magnetic storage device 1, storage unit MC, selector SE, upper electrode 26, and insulator 28 of the first embodiment, they are sometimes referred to as magnetic storage device 1b, storage unit MCb, selector SEb, upper electrode 26b, and insulator 28b, respectively.
[0103] 2.1. Construction
[0104] Figure 9 A cross-section showing an example of the construction of the storage cell according to the second embodiment. Figure 9 In, compared with the first embodiment Figure 5 Similarly, storage cell MCb is equivalent to storage cell MCA.
[0105] The selector SEb replaces the upper electrode 26 in the first embodiment and includes an upper electrode 26b. The upper electrode 26b has a continuous side surface extending from the bottom surface of the upper electrode 26 to the upper surface, and does not have a stepped portion like the upper electrode 26. The side surfaces of the selector SEb, the insulator 28b, and the magnetoresistive element VR are, for example, continuous.
[0106] Each insulator 28b comprises one or more of Co, Fe, bismuth (Bi), barium (Ba), titanium (Ti), lanthanum (La), strontium (Sr), and ruthenium (Ru), or is substantially formed from one or more of Co, Fe, Bi, Ba, Ti, La, Sr, or Ru. Each insulator 28b internally includes one or more conductors 45.
[0107] Each conductor 45 extends along the z-axis, from the bottom surface of the insulator 28b to its upper surface. Each conductor 45 is in contact with the upper surface of the upper electrode 26b and the bottom surface of the ferromagnetic layer 31 in the memory cell MCb, which includes the conductor 45. Each conductor 45 functions as a current path between one upper electrode 26b and one ferromagnetic layer 31. Each conductor 45 contains one or more of the same material as those that can be contained in the insulator 28b, or is substantially formed from one or more of those materials that can be contained in the insulator 28b. Specifically, each conductor 45 contains one or more of Co, Fe, Bi, Ba, Ti, La, Sr, and Ru, or is substantially formed from one or more of Co, Fe, Bi, Ba, Ti, La, Sr, or Ru.
[0108] On the other hand, each conductor 45 has a crystal structure different from that of the insulator 28b. For example, each conductor 45 has a perovskite structure or a spinel structure.
[0109] 2.2. Manufacturing Method
[0110] Figures 10-12 The states between manufacturing processes of a portion of the magnetic storage device of the second embodiment are shown in sequence. Figures 10-12 Showing with Figure 9 The cross-section shown is the same as the cross-section shown.
[0111] like Figure 10 As shown, compared with the first embodiment Figure 6 The described process similarly forms the conductor 22, the interlayer insulator 23, the lower electrode 24A, and the variable resistance material 25A. An upper electrode 26bA is formed on the upper surface of the variable resistance material 25A. The upper electrode 26bA is an element formed from the upper electrode 26b in a subsequent process.
[0112] like Figure 11 As shown, an insulator 28bA and a conductor 45 are formed. The insulator 28bA is an element formed into the insulator 28b through subsequent processes. The insulator 28bA and the conductor 45 can be formed by any method. For example, the insulator 28bA and the conductor 45 can be formed in parallel using both the raw material gas for the insulator 28bA and the raw material gas for the conductor 45. For instance, by adjusting the conditions for forming the insulator 28bA and the conductor 45, the insulator 28b can be deposited by CVD while the conductor 45 is formed by precipitation. According to this method, the location where the conductor 45 is formed is random and may not always be at the intended location. However, the diameter of the conductor 45 (the length through any location in the xy plane, such as the center) is very small, smaller than the diameter of the insulator 28b. Therefore, at least one conductor 45 can be included in approximately all or all of the area of the insulator 28bA formed into the insulator 28b through subsequent processes.
[0113] like Figure 12 As shown, compared with the first embodiment Figure 6 The described process involves sequentially depositing a ferromagnetic layer 31A, an insulating layer 32A, a ferromagnetic layer 33A, and a hard mask 35A on the upper surface of the insulator 28bA.
[0114] like Figure 9 As shown, the structure obtained through the processes up to this point is partially removed by IBE. Thus, the lower electrode 24, variable resistor 25, upper electrode 26b, insulator 28b, ferromagnetic layer 31, insulating layer 32, and ferromagnetic layer 33 are formed from the lower electrode 24A, variable resistor 25A, upper electrode 26b, insulator 28b, ferromagnetic layer 31, insulating layer 32, and ferromagnetic layer 33A. Local removal of one or more of the lower electrode 24A, variable resistor 25A, upper electrode 26bA, insulator 28bA, ferromagnetic layer 31, insulating layer 32, and ferromagnetic layer 33A can also be performed by RIE.
[0115] 2.3. Advantages
[0116] According to the second embodiment, an insulator 28 is provided between the upper electrode 26 and the ferromagnetic layer 31, similar to the first embodiment. Therefore, the same advantages as those obtained by providing the insulator 28 described in the first embodiment can be obtained.
[0117] 3. Variations
[0118] The description up to this point pertains to an example in which a ferromagnetic layer 31, an insulating layer 32, and a ferromagnetic layer 33 are sequentially stacked in a magnetoresistive element VR. The construction of the magnetoresistive element VR is not limited to this example. Alternatively, the ferromagnetic layer 33, the insulating layer 32, and the ferromagnetic layer 31 may be stacked sequentially in a direction away from the selector SE. However, the ferromagnetic layer 33, functioning as a so-called storage layer, is thinner than the ferromagnetic layer 31. Therefore, when the ferromagnetic layer 33 is located at the bottom of the magnetoresistive element VR, the distance between the upper electrode 26 and the insulating layer 32 is closer than when the ferromagnetic layer 31 is located at the bottom of the magnetoresistive element VR. Thus, the configuration where the ferromagnetic layer 31 is located at the bottom of the magnetoresistive element VR can further suppress the accumulation of material that scatters from the upper electrode 26A towards the side of the insulating layer 32 due to IBE on the upper electrode 26A.
[0119] While some embodiments of the invention have been described, these embodiments are provided by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in a wide variety of other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and / or variations thereof are included within the scope and spirit of the invention, as well as within the scope of the claims and their equivalents.< / n> < / m> < / m>
Claims
1. A magnetic storage device comprising: First conductor; Variable resistance material on the upper surface of the first conductor; The second conductor on the upper surface of the variable resistance material; The first insulator other than nitride on the upper surface of the second conductor; A third conductor, located within the first insulator, and having a bottom surface in contact with the upper surface of the second conductor; and Magnetoresistive elements on the upper surface of the first insulator and the upper surface of the third conductor.
2. The magnetic storage device according to claim 1, The third conductor has a columnar shape extending from the bottom surface of the first insulator to the upper surface.
3. The magnetic storage device according to claim 1, The first insulator and the third conductor have different crystal structures.
4. The magnetic storage device according to claim 1, The third conductor comprises a perovskite structure or a spinel structure.