Electronic and electrical system of a vehicle, time synchronization method and vehicle

Abstract

This application relates to an electronic and electrical system for a vehicle, a time synchronization method, and a vehicle. The electronic and electrical system includes a first master clock node, a second master clock node, and a set of domain controllers. The set of domain controllers includes a first subset and a second subset. The first master clock node is connected to the first domain controller of the first subset, and the second master clock node is connected to the last domain controller of the first subset and the first domain controller of the second subset. The first master clock node generates first time synchronization information based on its local time and sends the first time synchronization information to the first subset and the second master clock node, enabling the domain controllers in the first subset and the second master clock node to complete time synchronization. The second master clock node generates second time synchronization information based on the synchronized time and sends the second time synchronization information to the second subset, enabling the domain controllers in the second subset to complete time synchronization according to the second time synchronization information, thereby improving time synchronization accuracy.

Description

Technical Field

[0001] This application relates to the field of vehicle technology, and in particular to vehicle electronic and electrical systems, time synchronization methods, and vehicles. Background Technology

[0002] Multi-domain systems enable modular deployment and isolated management of functions in complex network environments, and have been widely used in fields such as automotive electronics and industrial control. For example, in the field of automotive electronics, multi-domain systems can divide functions such as power control, cockpit entertainment, and body control into independent domains, enabling collaborative operation and independent management of each domain.

[0003] Time synchronization is a fundamental technology for ensuring the collaborative operation of various nodes within a multi-domain system. Especially in scenarios such as autonomous driving and precision manufacturing, the accuracy of time synchronization between nodes directly impacts system stability and task execution accuracy. Therefore, improving the time synchronization accuracy of vehicle electronic and electrical systems has become a current research hotspot.

[0004] There is currently no effective solution to the problem of low time synchronization accuracy in related technologies. Summary of the Invention

[0005] This embodiment provides a vehicle electronic and electrical system, a time synchronization method, and a vehicle, which can improve the time synchronization accuracy of the vehicle's electronic and electrical system, thereby enhancing the stability and reliability of the electronic and electrical system.

[0006] In a first aspect, this embodiment provides a vehicle electronic and electrical system, which includes a first master clock node, a second master clock node, and a set of domain controllers; wherein,

[0007] The set of domain controllers includes a first subset and a second subset; the domain controllers in the first subset form a first chain connection structure; the domain controllers in the second subset form a second chain connection structure.

[0008] The first master clock node is connected to the head domain controller of the first subset, and the second master clock node is connected to the tail domain controller of the first subset and the head domain controller of the second subset.

[0009] The first master clock node is used to generate first time synchronization information based on local time when the preset synchronization period arrives, and send the first time synchronization information to the first subset and the second master clock node through the first chain connection structure, so that each domain controller in the first subset and the second master clock node can complete time synchronization according to the first time synchronization information.

[0010] The second master clock node is used to generate second time synchronization information based on the synchronized time after completing time synchronization according to the first time synchronization information, and send the second time synchronization information to the second subset through the second chain connection structure, so that each domain controller in the second subset can complete time synchronization according to the second time synchronization information.

[0011] Secondly, this embodiment provides a time synchronization method applied to the electronic and electrical system of a vehicle; the electronic and electrical system includes a first master clock node, a second master clock node, and a set of domain controllers; the time synchronization method includes:

[0012] When the preset synchronization period arrives, the first master clock node generates first time synchronization information based on the local time, and sends the first time synchronization information to the first subset and the second master clock node through the first chain connection structure formed by the domain controllers in the first subset of the domain controller set, so that the domain controllers in the first subset and the second master clock node can complete time synchronization according to the first time synchronization information.

[0013] After the second master clock node completes time synchronization based on the first time synchronization information, it generates second time synchronization information based on the synchronized time, and sends the second time synchronization information to the second subset through the second chain connection structure formed by the domain controllers in the second subset of the domain controller set, so that the domain controllers in the second subset complete time synchronization based on the second time synchronization information.

[0014] Thirdly, this embodiment provides a vehicle that includes the electronic and electrical systems described in the first aspect.

[0015] Compared with related technologies, this embodiment provides an electronic and electrical system for a vehicle, a time synchronization method, and a vehicle. The electronic and electrical system includes a first master clock node, a second master clock node, and a set of domain controllers. The set of domain controllers includes a first subset and a second subset. The domain controllers in the first subset form a first chain connection structure, and the domain controllers in the second subset form a second chain connection structure. The first master clock node is connected to the first domain controller of the first subset, and the second master clock node is connected to the last domain controller of the first subset and the first domain controller of the second subset. Based on this, the first master clock node generates first time synchronization information based on the local time when the preset synchronization period arrives, and sends the first time synchronization information to the first subset and the second master clock node through the first chain connection structure, so that each domain controller in the first subset and the second master clock node can complete time synchronization according to the first time synchronization information. After completing time synchronization according to the first time synchronization information, the second master clock node generates second time synchronization information based on the synchronized time, and sends the second time synchronization information to the second subset through the second chain connection structure, so that each domain controller in the second subset can complete time synchronization according to the second time synchronization information. In this way, using the first master clock as a unified reference source, the first subset and the second master clock are first accurately synchronized, making the second master clock a secondary clock source synchronized with the reference clock. Then, the second master clock source independently synchronizes the second subset, realizing unified reference and low-latency time synchronization of all domain controllers, thereby systematically improving the time synchronization accuracy of the vehicle's electronic and electrical system and enhancing the stability and reliability of the electronic and electrical system.

[0016] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects and advantages of this application more readily apparent. Attached Figure Description

[0017] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0018] Figure 1 This is a schematic diagram of the structure of an electronic and electrical system of a vehicle provided in an embodiment of this application;

[0019] Figure 2 This is a schematic diagram of the connection of each domain controller provided in the embodiments of this application;

[0020] Figure 3 This is a schematic diagram of the structure of another vehicle's electronic and electrical system provided in an embodiment of this application;

[0021] Figure 4This is a schematic diagram of the connection of the slave controller provided in an embodiment of this application;

[0022] Figure 5 This is a flowchart of a time synchronization method provided in an embodiment of this application.

[0023] Reference numerals in the attached diagram: 1. First master clock node; 2. Second master clock node; 3. Domain controller; 4. Slave controller. Detailed Implementation

[0024] To better understand the purpose, technical solution, and advantages of this application, the application is described and illustrated below in conjunction with the accompanying drawings and embodiments.

[0025] Unless otherwise defined, the technical or scientific terms used in this application shall have the general meaning understood by one of ordinary skill in the art to which this application pertains. Words such as “a,” “an,” “an,” “the,” “the,” and “these” used in this application do not indicate quantitative limitation and may be singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that comprises a series of steps or modules (units) is not limited to the listed steps or modules (units) but may include steps or modules (units) not listed, or may include other steps or modules (units) inherent to these processes, methods, products, or devices. Words such as “connected,” “linked,” and “coupled” used in this application are not limited to physical or mechanical connections but may include electrical connections, whether direct or indirect. “Multiple” used in this application refers to two or more. “And / or” describes the relationship between related objects, indicating that three relationships may exist; for example, “A and / or B” can represent: A alone, A and B simultaneously, and B alone. Normally, the character " / " indicates that the objects before and after it are in an "or" relationship. The terms "first," "second," "third," etc., used in this application are merely to distinguish similar objects and do not represent a specific order of objects.

[0026] This embodiment provides an electronic and electrical system for a vehicle. Figure 1 This is a schematic diagram of the electronic and electrical system of a vehicle according to this embodiment, as shown below. Figure 1 As shown, the electronic and electrical system includes a first master clock node 1, a second master clock node 2, and a set of domain controllers;

[0027] The set of domain controllers includes a first subset and a second subset; the domain controllers 3 in the first subset form a first chain connection structure; the domain controllers 3 in the second subset form a second chain connection structure.

[0028] The first master clock node 1 is connected to the head domain controller of the first subset, and the second master clock node 2 is connected to the tail domain controller of the first subset and the head domain controller of the second subset.

[0029] The first master clock node 1 is used to generate first time synchronization information based on local time when the preset synchronization period arrives, and send the first time synchronization information to the first subset and the second master clock node 2 through the first chain connection structure, so that each domain controller 3 in the first subset and the second master clock node 2 can complete time synchronization according to the first time synchronization information.

[0030] The second master clock node 2 is used to generate second time synchronization information based on the synchronized time after completing time synchronization according to the first time synchronization information, and send the second time synchronization information to the second subset through the second chain connection structure, so that each domain controller 3 in the second subset can complete time synchronization according to the second time synchronization information.

[0031] Specifically, the first master clock node 1 is the primary master clock (GM), which serves as the system's reference time source, providing a unified reference time for the entire system. The second master clock node 2 is the hot-standby master clock (GM), which acts as a redundant backup clock for the first master clock node 1. It receives the first time synchronization information sent by the first master clock node 1 to complete time synchronization, and remains in a real-time synchronized and available state during normal system operation, ensuring the reliability of the clock backup and the ability to switch over instantly.

[0032] Both the first master clock node 1 and the second master clock node 2 integrate a clock generation module and a multi-domain synchronization module. The clock generation module is used to generate and maintain the local clock signal, and it can use a temperature-controlled crystal oscillator as the clock source; the multi-domain synchronization module is used to execute the time protocol and manage cross-domain time synchronization logic.

[0033] In this embodiment, the first master clock node 1 can be implemented by a central computer, and the second master clock node 2 can be implemented by an analog electronic control unit (ECU).

[0034] The domain controller set includes multiple domain controllers (Zonal ECUs). For example, in one embodiment, the domain controller set may include a cockpit domain controller, an autonomous driving domain controller, a body domain controller, a powertrain domain controller, and a chassis domain controller. The specific configuration can be set according to the actual system architecture requirements, and this embodiment does not impose specific limitations on it.

[0035] The domain controller set includes a first subset and a second subset, which belong to different domains. The first chain connection structure formed by the communication connections of the domain controllers 3 in the first subset belongs to the first domain (domain0), and the second chain connection structure formed by the communication connections of the domain controllers 3 in the second subset belongs to the second domain (domain1). The first and second domains are typically independent logical areas in the system divided according to attributes such as function and communication topology. The transmission paths formed by the first chain connection structure and the transmission paths formed by the second chain connection structure are physically isolated from each other.

[0036] Furthermore, the first master clock node 1, the first chain connection structure, and the second master clock node 2 are connected to form the first synchronization tree, and the second master clock node 2, the second chain connection structure, and the first master clock node 1 are connected to form the second synchronization tree. The first synchronization tree and the second synchronization tree are two time synchronization transmission topologies within the system.

[0037] It should be noted that this embodiment does not specifically limit the number of domain controllers in each subset or the connection method between domain controllers.

[0038] In each subset, the first domain controller and the last domain controller can be the same domain controller or different domain controllers. The first domain controller of the first subset and the last domain controller of the second subset can be the same domain controller or different domain controllers. The last domain controller of the first subset and the first domain controller of the second subset can be the same domain controller or different domain controllers. Furthermore, the first master clock node 1 can be connected only to the first domain controller of the first subset, or it can be connected to both the first domain controller of the first subset and the last domain controller of the second subset.

[0039] For example, in one embodiment, the head domain controller of the first subset and the tail domain controller of the second subset are the same domain controller; the tail domain controller of the first subset and the head domain controller of the second subset are the same domain controller.

[0040] More specifically, let's take the domain controllers 3 in the second subset as examples. (Refer to...) Figure 1 The first and last domain controllers can be connected via a single domain controller 3. See also... Figure 2 The first and last domain controllers can be connected through two domain controllers 3.

[0041] The above figures are merely illustrative examples of this embodiment. The specific number, arrangement, and connection topology of domain controllers 3 can be flexibly adjusted according to the actual system architecture requirements. For example, multiple connections can be set between the first and last domain controllers, with each connection achieved through a domain controller 3, which will not be elaborated further here.

[0042] In practice, each domain controller 3 in the domain controller set is equipped with an Ethernet switch. When forwarding time synchronization information, the Ethernet switch (e.g., a switch that supports the IEEE 802.1AS protocol) can record precise timestamps at the entry and exit ports of the time synchronization information. Based on this, the internal resident delay information and link transmission delay information of the switch are determined, and the delay information is carried in the time synchronization information and sent to the downstream nodes for the downstream nodes to perform delay compensation, thereby achieving high-precision synchronization with the first master clock node 1 or the second master clock node 2 at the microsecond or even nanosecond level.

[0043] The first master clock node 1 sends its own generated first time synchronization information to the first subset and the second master clock node 2 through the first chain connection structure according to a preset synchronization period. The first time synchronization information includes at least the current timestamp (i.e., local time) of the first master clock node 1 and synchronization protocol parameters (e.g., IEEE 802.1AS protocol parameters).

[0044] The preset synchronization period can be flexibly configured based on factors such as synchronization accuracy requirements and network load status. For example, the preset synchronization period can be set to less than or equal to 125ms.

[0045] Furthermore, after the second master clock node 2 completes time synchronization with the first master clock node 1 based on the first time synchronization information, it generates second time synchronization information based on the synchronized time. This second time synchronization information is then distributed to all domain controllers 3 in the second subset via the second chain connection structure. This enables each domain controller 3 in the second subset to complete time synchronization based on the second time synchronization information, thereby ensuring accurate time synchronization across different sets of domain controllers within the entire electronic and electrical system. The second time synchronization information includes at least the latest local time of the second master clock node 2 (i.e., the synchronized time) and synchronization protocol parameters (e.g., IEEE 802.1AS protocol parameters).

[0046] It should be noted that the time synchronization period of the second master clock node 2 is usually matched with that of the first master clock node 1. Referring to the previous example, the time synchronization period of the second master clock node 2 can be set to less than or equal to 125ms to ensure that the time deviation between the second master clock node 2 and the first master clock node 1 is always less than 0.2μS, thus meeting the high-precision synchronization requirements of the system.

[0047] In practice, time synchronization information can be implemented in the form of time synchronization messages. For example, time synchronization messages include Sync messages and Follow_Up messages, which are exchanged based on time synchronization protocols.

[0048] The electronic and electrical system provided in this embodiment is based on a closed-loop double-chain topology formed by multiplexing the first and last domain controllers. It uses the first master clock as a unified reference source to first achieve accurate synchronization of the first subset and the second master clock, so that the second master clock becomes a secondary clock source synchronized with the reference clock. Then, the second subset is independently synchronized by the secondary clock source, realizing unified reference and low-latency time synchronization of the entire domain controller, thereby systematically improving the time synchronization accuracy of the vehicle's electronic and electrical system.

[0049] In some embodiments, such as Figure 3 As shown, the electronic and electrical system also includes at least one slave controller 4; each slave controller 4 is communicatively connected to any one of the first domain controllers in the first chain connection structure, and each slave controller 4 is also communicatively connected to any one of the second domain controllers in the second chain connection structure.

[0050] Either the first domain controller or the second domain controller 3 is also used to forward the time synchronization information to the slave controller 4 when it receives the time synchronization information;

[0051] Each slave controller 4 is used to perform time synchronization based on first time synchronization information from the first chain connection structure and second time synchronization information from the second chain connection structure.

[0052] Specifically, the slave ECU (controller 4) is typically an independent control unit with dedicated functions, including but not limited to the steering ECU, brake control ECU, millimeter-wave radar ECU, and on-board charger ECU. The slave ECU does not participate in the domain clock management; it only acts as a time synchronization terminal node, receiving and executing synchronization logic.

[0053] It should be noted that this embodiment does not specifically limit the number of slave controllers 4 or their connection method with the sub-domain controller 3. (Refer to...) Figure 3 Connect from controller 4 to any domain controller 3 between the first and last domain controllers in the subset. Then refer to... Figure 4 Different slave controllers 4 can simultaneously connect to the same domain controller 3 between the first and last domain controllers in the subset.

[0054] The above figures are merely illustrative examples of this embodiment. The specific number, arrangement, and connection topology of the slave controllers 4 can be flexibly adjusted according to the actual system architecture requirements. For example, different slave controllers 4 can also be connected to different domain controllers 3 between the first and last domain controllers in the subset. Slave controllers 4 can also be directly connected to the first or last domain controller in the subset, which will not be elaborated further here.

[0055] In specific implementation, the slave controller 4 receives time synchronization information through the domain controller 3 connected to it. This time synchronization information includes first time synchronization information from the first chain connection structure and second time synchronization information from the second chain connection structure. The slave controller 4 achieves time synchronization based on the two time synchronization information.

[0056] For example, in one embodiment, the synchronization priority of the first time synchronization information from the first chain connection structure is higher than that of the second time synchronization information from the second chain connection structure. When the controller 4 receives both the first time synchronization information and the second time synchronization information normally, it completes time synchronization based on the first time synchronization information.

[0057] In addition, each node in the system (including the first master clock node 1, the second master clock node 2, each domain controller 3, and the slave controller 4) monitors the synchronization status in real time. The synchronization status includes, but is not limited to, whether the node synchronization is normal, the current time synchronization source, and the synchronization accuracy (i.e., the time deviation between the node's local clock and the current time synchronization source clock). When a synchronization abnormality occurs, the corresponding fault log is recorded.

[0058] Therefore, by flexibly integrating the slave controller into a dual-chain synchronous topology and supporting master-slave priority synchronization, high-precision time synchronization of all nodes can be achieved without changing the original functional architecture of the slave controller. Simultaneously, utilizing two independent synchronization paths effectively improves system fault tolerance and reliability. Even if one chain path fails, the other path can still ensure normal synchronization of the slave controller, thus meeting the high stability requirements of vehicle electronic and electrical systems for time synchronization.

[0059] In some embodiments, the second master clock node 2 is further configured to generate third time synchronization information based on the local time when a communication failure of the first chain connection structure is detected, and send the third time synchronization information to the second subset and each slave controller 4 through the second chain connection structure, so that each domain controller 3 in the second subset and each slave controller 4 can complete time synchronization according to the third time synchronization information.

[0060] For example, if the second master clock node 2 fails to receive the first time synchronization information from the first chain connection structure multiple times within a preset synchronization period, it determines that the first chain connection structure is in communication failure. As another example, if the second master clock node 2 receives the first time synchronization information from the first chain connection structure, and detects an anomaly such as a time jump in this first time synchronization information, it determines that the first chain connection structure is in communication failure.

[0061] It should be noted that when the second master clock node 2 detects a communication failure in the first chain connection structure and is unable to send the first time synchronization information normally, it will trigger the backup clock switching process. The second master clock node 2 generates third time synchronization information based on the local time and sends the third time synchronization information to each domain controller 3 in the second subset through the second chain connection structure, and simultaneously sends it to each slave controller 4 in the system. After receiving the third time synchronization information, each domain controller 3 and each slave controller 4 in the second subset will complete time synchronization based on this third time synchronization information.

[0062] In this way, through the real-time fault detection and automatic backup switching mechanism of the second master clock node 2, the seamless connection between the master clock source and the backup clock source is realized, effectively avoiding the interruption of global time synchronization caused by communication abnormalities in the first chain connection structure, thereby improving the redundancy and reliability of clock synchronization in the vehicle's electronic and electrical system.

[0063] In some embodiments, the first master clock node 1 is also connected to the tail domain controller of the second subset; communication failures in the first chain connection structure include failures in the first master clock node;

[0064] The second master clock node 2 is also used to send third time synchronization information to the first master clock node 1 through the second chain connection structure;

[0065] The first master clock node 1 is also used to calibrate the local time based on the latest received third time synchronization information after a fault restart, so as to synchronize the first subset based on the calibrated time when the preset synchronization period arrives.

[0066] Specifically, after generating the third time synchronization information based on the local time, the second master clock node 2 simultaneously sends the third time synchronization information to the first master clock node 1 through the second chain connection structure.

[0067] It should be noted that if the first master clock node 1 is operating normally, it will only receive the third time synchronization information and will not calibrate its own local time based on this information, continuing to use itself as the global reference clock for time synchronization. When the first master clock node 1 fails and restarts, it will calibrate its local time based on the latest received third time synchronization information, thereby eliminating the time delay deviation caused during its abnormal period and quickly aligning its local time with the current system time reference, avoiding the impact of time jumps or inconsistencies in the reference on synchronization stability.

[0068] Furthermore, after calibration, the first master clock node 1 can restore normal synchronization function. In subsequent preset synchronization cycles, time synchronization information is reissued to the first subset based on the calibrated time, realizing seamless recovery and resynchronization after the master clock node failure.

[0069] Thus, through proactive backup switching in the event of a failure of the first master clock node, and automatic time calibration and synchronization recovery mechanisms after a failure and restart of the first master clock node 1, seamless switching between master and backup clocks is achieved, effectively improving the reliability and stability of system operation. Furthermore, this mechanism requires no additional hardware, further reducing system deployment costs.

[0070] In some embodiments, each slave controller 4 is specifically configured to complete time synchronization according to the time synchronization information sent by the second master clock node 2 when a target abnormal event is detected during the reception process of the first time synchronization information; wherein, the target abnormal event includes the first time synchronization information being in an abnormal reception state and / or the transmission link of the first time synchronization information being in a disconnected state; the first time synchronization information being in an abnormal reception state when the number of consecutive times the first time synchronization information times out is greater than the first threshold, and / or the number of consecutive times the first time synchronization information time jumps is greater than the second threshold.

[0071] Specifically, each controller 4 continuously monitors the reception process of the first-time synchronization information in real time according to a preset monitoring frequency to determine whether a target abnormal event has occurred during the reception process. For example, the preset monitoring frequency is no less than 100Hz to ensure that synchronization abnormalities can be detected within 10ms and trigger a synchronization source switch, with a switching delay of less than 10μS.

[0072] The condition that the number of consecutive timeouts of the first-time synchronization information exceeds the first-time threshold means that the controller 4 fails to receive the corresponding first-time synchronization information on time for multiple consecutive synchronization cycles, and the number of consecutive timeouts exceeds the first-time threshold. For example, the first-time threshold can be set to 2, meaning that if the controller 4 fails to receive the first-time synchronization information normally for 3 consecutive synchronization cycles, it is determined to be a timeout anomaly.

[0073] The condition that the number of consecutive times a time jump occurs in the first time synchronization information exceeds the second threshold means that the timestamps carried in the first time synchronization information received from controller 4 in multiple consecutive sessions exhibit abnormal jumps, and the number of consecutive abnormal jumps exceeds the second threshold. For example, the second threshold can be set to 4, and the jump threshold can be set to 500ms. That is, when the difference between the timestamp of the first time synchronization information in a single frame and the previous frame is greater than 500ms, it is determined to be a time jump. If this abnormal jump occurs 5 times consecutively, it is determined to be a time jump anomaly.

[0074] The first time synchronization information transmission link is in a disconnected state, which means that the communication link carrying the first time synchronization information transmission is interrupted or abnormal, resulting in the first time synchronization information being unable to be transmitted normally to the slave controller 4.

[0075] It should be noted that when each slave controller 4 detects any of the above-mentioned target abnormal events during the reception of the first time synchronization information, it switches the time synchronization source from the first master clock node 1 to the second master clock node 2, and completes time synchronization according to the time synchronization information sent by the second master clock node 2.

[0076] In addition, each slave controller 4 is also used to switch the time synchronization source from the second master clock node 2 back to the first master clock node 1 after completing time synchronization according to the time synchronization information sent by the second master clock node 2, if the received time synchronization information sent by the first master clock node 1 is in a normal receiving state.

[0077] For example, in one embodiment, when the number of consecutive times the time synchronization information received from the first master clock node 1 is in a normal reception state exceeds a threshold number (the third time threshold), the controller 4 performs a time synchronization source re-switching operation, re-synchronizing based on the time synchronization information received from the first master clock node 1. Specifically, if the time synchronization information does not time out and does not undergo a time jump, it is determined that the time synchronization information is in a normal reception state.

[0078] In this way, by monitoring the reception process of the first-time synchronization information in real time, and realizing bidirectional seamless switching of the time synchronization source based on the monitoring situation, the system's fault tolerance and synchronization continuity are significantly improved to adapt to the dynamic operation scenarios of complex multi-domain systems. Furthermore, automatic switching back after the global master clock recovers stability effectively avoids frequent switching, thereby improving the reliability of system time synchronization.

[0079] This embodiment also provides a time synchronization method, which is applied to the electronic and electrical system of the aforementioned vehicle. Figure 5 This is a flowchart of a time synchronization method according to this embodiment, such as... Figure 5 As shown, the method includes the following steps:

[0080] Step S501: When the preset synchronization period arrives, the first master clock node generates first time synchronization information based on the local time, and sends the first time synchronization information to the first subset and the second master clock node through the first chain connection structure formed by the domain controllers in the first subset within the domain controller set, so that the domain controllers in the first subset and the second master clock node can complete time synchronization according to the first time synchronization information.

[0081] In step S502, after the second master clock node completes time synchronization based on the first time synchronization information, it generates second time synchronization information based on the synchronized time, and sends the second time synchronization information to the second subset through the second chain connection structure formed by the domain controllers in the second subset within the domain controller set, so that the domain controllers in the second subset complete time synchronization based on the second time synchronization information.

[0082] In some embodiments, the electronic and electrical system further includes at least one slave controller; each slave controller is communicatively connected to any one of the first domain controllers in the first chain connection structure, and each slave controller is also communicatively connected to any one of the second domain controllers in the second chain connection structure;

[0083] When either the first domain controller or the second domain controller receives time synchronization information, it forwards the time synchronization information to the slave controller.

[0084] Each slave controller completes time synchronization based on the first time synchronization information from the first chain connection structure and the second time synchronization information from the second chain connection structure.

[0085] In some embodiments, when the second master clock node detects a communication failure in the first chain connection structure, it generates third time synchronization information based on the local time and sends the third time synchronization information to the second subset and each slave controller through the second chain connection structure, so that each domain controller in the second subset and each slave controller can complete time synchronization according to the third time synchronization information.

[0086] In some embodiments, the first master clock node is also connected to the tail domain controller of the second subset; communication failures in the first chain connection structure include failures of the first master clock node;

[0087] The second master clock node sends the third time synchronization information to the first master clock node through the second chain connection structure;

[0088] After a fault restart, the first master clock node calibrates its local time based on the latest received third time synchronization information, so that when the preset synchronization period arrives, it can synchronize the first subset based on the calibrated time.

[0089] In some embodiments, when each slave controller detects a target abnormal event during the reception process of the first time synchronization information, it completes time synchronization according to the time synchronization information sent by the second master clock node; wherein, the target abnormal event includes the first time synchronization information being in an abnormal reception state and / or the transmission link of the first time synchronization information being in a disconnected state; the first time synchronization information being in an abnormal reception state when the number of consecutive timeouts of the first time synchronization information is greater than the first threshold, and / or the number of consecutive time jumps of the first time synchronization information is greater than the second threshold.

[0090] In some embodiments, after each slave controller completes time synchronization according to the time synchronization information sent by the second master clock node, if the number of consecutive times the received time synchronization information sent by the first master clock node is in a normal receiving state is greater than the third threshold, then time synchronization is completed according to the time synchronization information sent by the first master clock node; when the time synchronization information does not time out and the time synchronization information does not jump, the time synchronization information is in a normal receiving state.

[0091] It should be noted that the technical solution of this time synchronization method is based on the same concept as the technical solution of the electronic and electrical system of the aforementioned vehicle. For details not described in detail in the technical solution of the time synchronization method, please refer to the description of the technical solution of the aforementioned electronic and electrical system.

[0092] This embodiment also provides a vehicle that includes the electronic and electrical systems described above.

[0093] It should be understood that the specific embodiments described herein are merely illustrative of the application and not intended to limit it. All other embodiments derived by those skilled in the art based on the embodiments provided in this application without inventive effort are within the scope of protection of this application.

[0094] Obviously, the accompanying drawings are merely some examples or embodiments of this application. Those skilled in the art can apply this application to other similar situations based on these drawings without any creative effort. Furthermore, it is understood that although the work done in this development process may be complex and lengthy, for those skilled in the art, certain design, manufacturing, or production modifications made based on the technical content disclosed in this application are merely conventional technical means and should not be considered as insufficient disclosure of this application.

[0095] The term "embodiment" in this application refers to a specific feature, structure, or characteristic described in connection with an embodiment that may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily imply the same embodiment, nor does it imply that it is mutually exclusive with or independent of other embodiments. It will be clearly or implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0096] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of patent protection. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the appended claims.

Claims

1. An electronic and electrical system for a vehicle, characterized in that, The electronic and electrical system includes a first master clock node, a second master clock node, and a set of domain controllers; wherein... The set of domain controllers includes a first subset and a second subset; the domain controllers in the first subset form a first chain connection structure; the domain controllers in the second subset form a second chain connection structure. The first master clock node is connected to the head domain controller of the first subset, and the second master clock node is connected to the tail domain controller of the first subset and the head domain controller of the second subset. The first master clock node is used to generate first time synchronization information based on local time when the preset synchronization period arrives, and send the first time synchronization information to the first subset and the second master clock node through the first chain connection structure, so that each domain controller in the first subset and the second master clock node can complete time synchronization according to the first time synchronization information. The second master clock node is used to generate second time synchronization information based on the synchronized time after completing time synchronization according to the first time synchronization information, and send the second time synchronization information to the second subset through the second chain connection structure, so that each domain controller in the second subset can complete time synchronization according to the second time synchronization information.

2. The electronic and electrical system according to claim 1, characterized in that, The electronic and electrical system further includes at least one slave controller; each slave controller is communicatively connected to any one of the first domain controllers in the first chain connection structure, and each slave controller is also communicatively connected to any one of the second domain controllers in the second chain connection structure; Either the first domain controller or the second domain controller is further configured to forward the time synchronization information to the slave controller upon receiving the time synchronization information; Each of the slave controllers is configured to perform time synchronization based on first time synchronization information from the first chain connection structure and second time synchronization information from the second chain connection structure.

3. The electronic and electrical system according to claim 2, characterized in that, The second master clock node is also configured to generate third time synchronization information based on local time when a communication failure of the first chain connection structure is detected, and send the third time synchronization information to the second subset and each of the slave controllers through the second chain connection structure, so that each domain controller in the second subset and each of the slave controllers can complete time synchronization according to the third time synchronization information.

4. The electronic and electrical system according to claim 3, characterized in that, The first master clock node is also connected to the tail domain controller of the second subset; communication failures in the first chain connection structure include failures in the first master clock node; The second master clock node is also used to send the third time synchronization information to the first master clock node through the second chain connection structure; The first master clock node is also used to calibrate the local time according to the latest received third time synchronization information after a fault restart, so as to synchronize the first subset based on the calibrated time when the preset synchronization period arrives.

5. The electronic and electrical system according to claim 2, characterized in that, Each of the slave controllers is specifically configured to complete time synchronization according to the time synchronization information sent by the second master clock node when a target abnormal event is detected during the reception process of the first time synchronization information; wherein, the target abnormal event includes the first time synchronization information being in an abnormal reception state and / or the transmission link of the first time synchronization information being in a disconnected state; wherein, the first time synchronization information is in an abnormal reception state when the number of consecutive timeouts of the first time synchronization information is greater than a first threshold, and / or the number of consecutive time jumps of the first time synchronization information is greater than a second threshold.

6. The electronic and electrical system according to claim 5, characterized in that, Each of the slave controllers is further configured to, after completing time synchronization according to the time synchronization information sent by the second master clock node, complete time synchronization according to the time synchronization information sent by the first master clock node if the number of consecutive times the received time synchronization information sent by the first master clock node is in a normal receiving state is greater than the third threshold; wherein, when the time synchronization information has not timed out and the time synchronization information has not timed out, the time synchronization information is in a normal receiving state.

7. The electronic and electrical system according to claim 1, characterized in that, The domain controller set includes at least a cockpit domain controller, an autonomous driving domain controller, a body domain controller, a powertrain domain controller, and a chassis domain controller.

8. The electronic and electrical system according to claim 1, characterized in that, Each domain controller in the set of domain controllers is equipped with an Ethernet switch.

9. A time synchronization method, characterized in that, The time synchronization method is applied to the vehicle's electronic and electrical system; the electronic and electrical system includes a first master clock node, a second master clock node, and a set of domain controllers; the time synchronization method includes: When the preset synchronization period arrives, the first master clock node generates first time synchronization information based on the local time, and sends the first time synchronization information to the first subset and the second master clock node through the first chain connection structure formed by the domain controllers in the first subset of the domain controller set, so that the domain controllers in the first subset and the second master clock node can complete time synchronization according to the first time synchronization information. After the second master clock node completes time synchronization based on the first time synchronization information, it generates second time synchronization information based on the synchronized time, and sends the second time synchronization information to the second subset through the second chain connection structure formed by the domain controllers in the second subset of the domain controller set, so that the domain controllers in the second subset complete time synchronization based on the second time synchronization information.

10. A vehicle, characterized in that, The vehicle includes the electronic and electrical system as described in any one of claims 1 to 8.

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