Automated test system and method for direct current converter testing

Abstract

The application discloses an automatic test system and method for direct current converter test, and particularly relates to the technical field of direct current converter test, and comprises an upper computer control unit, a high-voltage programmable direct current power supply unit, a bidirectional source load integrated test unit, a signal acquisition and processing unit, a bus communication and monitoring unit and a safety interlocking emergency stop unit. The application realizes high automation and intelligence of the test process, and has the technical effects of wiring simplification, test blind area elimination, multiple redundant safety protection, self-adaptive flexible test, dynamic characteristic precise evaluation and intelligent fault diagnosis.

Description

Technical Field

[0001] This invention relates to the field of DC-DC converter testing technology, and more specifically, to an automated testing system and method for testing DC-DC converters. Background Technology

[0002] DC-DC converters, as core components of power electronic systems, are widely used in fields such as communication power supplies, new energy vehicles, rail transportation, aerospace, and consumer electronics. Their main function is to realize the conversion of DC voltage levels (boost, buck, or buck-boost) and provide stable power to downstream loads. With the rapid development of the new energy industry, the power density of DC-DC converters is constantly increasing, the topology is becoming more and more complex, and the requirements for reliability, conversion efficiency, and electromagnetic compatibility are becoming more and more stringent.

[0003] In the research, development, production, and quality verification of DC-DC converters, testing is a crucial means to ensure that their performance meets standards and their operation is reliable. Traditional DC-DC converter testing mainly relies on the following methods: (1) Manual testing mode Traditional testing typically involves personnel operating multiple independent instruments (such as DC power supplies, electronic loads, oscilloscopes, multimeters, power analyzers, etc.) and manually wiring, adjusting parameters, and recording data. This approach has several inherent drawbacks: First, it is inefficient; for mass production or complex dynamic response testing, the repetitive labor is arduous, and the testing cycle is long. Second, it is prone to human error; manual reading and wiring switching easily introduce errors, and it is difficult to ensure consistency of test conditions across multiple tests. Third, it has poor safety; DC-DC converter testing often involves high voltage and high current, and frequent manual operation poses a risk of electric shock and equipment damage.

[0004] (2) Semi-automated testing system Some existing solutions use programmable power supplies and electronic loads in conjunction with simple script control to achieve automatic recording of some parameters. However, such systems are usually single-device control based on interfaces such as RS232, which has shortcomings such as low integration, lack of linkage, and scattered data management. Specifically, in semi-automatic test systems, the relationship between the test equipment and the device under test is one-way excitation: the test system is only responsible for applying voltage, current, and load, but cannot parse the internal status information (such as over-temperature, over-voltage, over-current, and other fault states) sent by the device under test through the communication bus (such as CAN bus). As a result, the device under test may already be in an abnormal state, but the test system continues to apply excitation according to the original script. This "blind test" phenomenon may lead to invalid test data, accelerated aging or damage to the device under test, and inability to accurately determine the cause of failure. In addition, test data is usually stored in the form of local files, lacking unified database management, making it difficult to perform quality traceability and big data statistical analysis.

[0005] (3) Limitations of existing automated testing systems While some automated testing systems have improved testing efficiency to some extent in recent years, they still have the following shortcomings: Test sequences are mostly fixed processes, unable to adapt to the real-time status of the device under test, making it difficult to balance test coverage and device safety; the means of evaluating the dynamic characteristics of the device under test are limited, typically only able to perform simple step response tests, unable to faithfully reproduce the complex load characteristics and input voltage disturbances in real-world application scenarios; after a fault occurs, the system can only record waveform data, and root cause analysis heavily relies on human experience, resulting in low troubleshooting efficiency; safety protection mechanisms mostly rely on single-level software or hardware protection, posing a theoretical risk of protection failure under extreme fault conditions. Summary of the Invention

[0006] To overcome the aforementioned deficiencies of the prior art, the present invention provides an automated testing system and method for testing DC-DC converters.

[0007] To achieve the above objectives, the present invention provides the following technical solution: an automated testing system for testing DC-DC converters, comprising: The host computer control unit runs the test sequence management engine, which is used to control the execution and monitoring of the test process. The test sequence management engine encapsulates control instructions for external devices through a hardware abstraction layer. A high-voltage programmable DC power supply unit is connected to the input terminal of the DC-DC converter under test to provide a programmable high-voltage DC input and includes an output-side DC contactor. The bidirectional source-load integrated test unit has a single physical port connected to the output terminal and the startup power supply terminal of the DC-DC converter under test. The bidirectional source-load integrated test unit includes an internal mode switching switch, which is used to realize low-voltage startup source mode and output load mode on the same port in a time-division multiplexing manner, with a switching time of less than 50 milliseconds. The signal acquisition and processing unit is used to synchronously acquire the external electrical parameters of the DC-DC converter under test and the bus communication messages reflecting its internal status with a unified timestamp, with a sampling rate of not less than 1MS / s; The bus communication and monitoring unit includes a protocol parsing module, which is used to acquire and parse the internal status information reported by the DC-DC converter under test in real time. The internal status information includes at least a fault status indication. The safety interlock emergency stop unit is connected to the output side DC contactor of the high voltage programmable DC power supply unit, the input side DC contactor of the bidirectional source-carrier integrated test unit, and the host computer control unit, respectively. The safety interlock emergency stop unit includes a logic decision unit and a solid-state relay array. The logic decision unit is configured to receive fault status signals from the bus communication and monitoring unit, electrical parameter over-limit signals from the signal acquisition and processing unit, and manual intervention signals from the external emergency stop button, and generate an emergency stop command according to a preset priority arbitration mechanism to drive the solid-state relay array to physically disconnect the output-side DC contactor and the input-side DC contactor to cut off the power circuit. As a further improvement to the technical solution of the present invention, the host computer control unit further includes: The digital twin model building module is used to dynamically build and update the digital twin model of the DC-DC converter under test based on the specifications, historical test data and real-time electrical and thermal parameters. The test sequence dynamic adjustment module interacts with the digital twin model construction module and is used to dynamically adjust the loading intensity, number of cycles, or parameter traversal step size of the test steps based on the response prediction of the digital twin model to the preset test stress before or during test execution.

[0008] As a further improvement to the technical solution of the present invention, the bidirectional source-load integrated test unit also includes a hardware-in-the-loop simulation control module. The hardware-in-the-loop simulation control module is configured to: acquire the output current and output voltage of the DC-DC converter under test in real time, calculate the target load value based on the preset load-end impedance network model, and control the bidirectional source-load integrated test unit to execute the target load value in order to simulate the dynamic response of the DC-DC converter under test under a non-ideal load environment. The high-voltage programmable DC power supply unit includes a waveform generation and playback module, configured to control the output of a predefined voltage disturbance waveform during the test to simulate the disturbance immunity of the DC converter under test in a non-ideal input power environment.

[0009] As a further improvement to the technical solution of the present invention, a fault diagnosis expert system module is also included, which is configured as follows: A multidimensional data association model is established and stored. The model defines the causal association rules between the electrical waveform data collected by the signal acquisition and processing unit, the internal status data collected by the bus communication and monitoring unit, and the test step information recorded by the host computer control unit before and after the fault is triggered. When the safety interlock emergency stop unit triggers an emergency stop, it automatically retrieves data associated with the current fault, performs inference based on the causal association rules, and generates a preliminary analysis report containing the root cause inference of the fault.

[0010] As a further improvement to the technical solution of the present invention, in the priority arbitration mechanism configured in the logic decision unit of the safety interlock emergency stop unit, the priorities from high to low are: manual intervention signal, hardware watchdog timeout signal, fault status signal from bus communication and monitoring unit, and electrical parameter over-limit signal from signal acquisition and processing unit.

[0011] As a further improvement to the technical solution of the present invention, both the high-voltage programmable DC power supply unit and the bidirectional source-carrier integrated test unit are equipped with autonomous protection modules; during the initialization phase, the host computer control unit sends independent protection threshold parameters to each of the autonomous protection modules; the autonomous protection module is configured to autonomously monitor its output terminal status in the event of host computer communication interruption or failure of the safety interlock emergency stop unit, and internally shut down power output when the status exceeds the limit, thereby constituting a device-level autonomous protection mechanism.

[0012] As a further improvement to the technical solution of the present invention, the low-voltage start-up source mode of the bidirectional source-load integrated test unit outputs a rated 12V / 0.07A to power the control circuit of the DC-DC converter under test, and the output load mode absorbs a rated 14V / 0-230A to simulate the downstream load.

[0013] As a further improvement to the technical solution of the present invention, the test sequence management engine of the host computer control unit is built based on TestStand, the hardware abstraction layer is implemented through LabVIEW VI model, and the test sequence management engine includes a custom step type library, which includes high voltage power supply control steps, bidirectional source load control steps, CAN monitoring steps, data acquisition steps, safety decision steps, and measurement calculation steps.

[0014] An automated testing method for testing DC-DC converters includes the following steps: Step 1: Control the bidirectional source-carrier integrated test unit to switch to low-voltage source mode, output the start-up voltage to provide auxiliary power to the DC converter under test, and confirm with the monitoring unit that the DC converter under test has entered standby mode through bus communication; Step 2: Control the high voltage programmable DC power supply unit to output the set high voltage, and confirm that the main power output voltage of the DC converter under test has been established through the signal acquisition and processing unit and the bus communication and monitoring unit. Step 3: Control the bidirectional source-load integrated test unit to switch to output load mode, execute the preset load point traversal test, and simultaneously collect external electrical parameters and internal status messages to calculate performance parameters; Step 4: During the test, the safety interlock emergency stop unit monitors the fault signal in real time. When a fault signal is detected, the logic decision unit drives the solid-state relay array to disconnect the contactors on the high-voltage power supply output side and the bidirectional source load input side according to the priority arbitration mechanism, and starts the discharge circuit. Step 5: Turn off all device outputs, generate a test report, and store the test data.

[0015] As a further improvement to the technical solution of the present invention, step three further includes at least one of the following: The digital twin model of the DC-DC converter under test is used to simulate and predict the preset load point traversal steps, and the load current step size, dwell time or number of test points are dynamically adjusted according to the prediction results. The hardware-in-the-loop simulation control module dynamically adjusts the load value based on the preset impedance network model to simulate the characteristics of the real load. When step four triggers an emergency stop, the fault diagnosis expert system module automatically extracts synchronous data within a preset time window before and after the fault, and generates an analysis report containing inferences about the root cause of the fault based on preset causal association rules.

[0016] The beneficial effects of this invention are: 1. This invention adopts a bidirectional source-load integrated test unit, which realizes low-voltage start-up source mode and output load mode through a single physical port time-division multiplexing. The internal mode switching time is less than 50 milliseconds. There is no need to configure a separate 12V auxiliary power supply for the DC-DC converter under test. The wiring is greatly simplified, avoiding the risk of equipment damage caused by wiring errors from the source. At the same time, the start-up and load-carrying stages are seamlessly connected, and the test efficiency is significantly improved. 2. The system collects communication messages reported by the DC-DC converter under test in real time through bus communication and monitoring unit. It uses DBC file parsing module to automatically extract key parameters such as internal fault status register, temperature, and working mode. The test system can perceive the internal operating status of the device under test in real time and trigger protection actions or adjust test strategies based on this. This changes the "blind test" situation in traditional testing where the test equipment and the status of the device under test are disconnected, effectively improving the effectiveness and safety of the test. 3. The system constructs a three-tiered defense-in-depth security protection system: The first tier is the hardware-level power circuit cutoff driven by the safety interlock emergency stop unit, with a response time of less than 10 milliseconds; the second tier is the upper computer software monitoring and emergency stop command; the third tier is the autonomous protection module built into each power device, which can autonomously shut down the output when communication is interrupted or system-level protection fails. The three-tiered protection works in concert to ensure that even in extreme cases such as any single point of failure or even upper computer software crash, the system can still reliably cut off the power circuit and discharge residual high voltage, ensuring the safety of operators and equipment, and enabling the system to operate unattended for 24 / 7. 4. By constructing a digital twin model of the DC-DC converter under test, the preset test stress is simulated and predicted before or during the test. Based on the prediction results, the loading intensity, number of cycles, or parameter traversal step size of the test steps are dynamically adjusted. This mechanism enables the test system to adaptively adjust the test plan according to the real-time health status and individual differences of each device under test. While ensuring test coverage and verification sufficiency, it minimizes the cumulative damage to the device under test during the test process, achieving true "flexible testing". 5. Through the hardware-in-the-loop simulation control module, the load value is dynamically adjusted according to the preset load impedance network model to simulate the dynamic load characteristics of the DC-DC converter under test in the real system with high fidelity; through the waveform generation and playback module, the input voltage disturbance waveform in the real application scenario is reproduced. These two functions enable the laboratory test environment to accurately evaluate the loop stability, load transient response and anti-input disturbance capability of the device under test, and provide more realistic and reliable experimental data for product optimization. 6. It integrates a fault diagnosis expert system module, which automatically extracts synchronous electrical waveform data, internal status message data and test step information within a preset time window before and after the fault is triggered. Based on preset causal association rules, it performs reasoning and automatically generates a preliminary analysis report containing fault root cause inference. This transforms fault analysis from relying on human experience to automatic system reasoning, which greatly shortens the time for R&D and testing personnel to locate the root cause of the fault and accelerates the product iteration process. 7. NI TestStand is used as the test sequence management engine, and a hardware abstraction layer is built in conjunction with LabVIEW VI models. The test process is divided into three stages: initialization, main test, and cleanup. TestStand provides graphical sequence editing, flow control, and report generation functions. The custom step type library significantly improves the efficiency of test sequence development. The design of the hardware abstraction layer means that when the device is replaced, only the underlying VI needs to be modified without changing the test sequence. The system has strong scalability and low maintenance cost. 8. Based on the PXI platform, the system synchronously acquires electrical parameters such as input and output voltage and current of the DC-DC converter under test and CAN bus messages at a sampling rate of not less than 1MS / s. All data are marked with a unified timestamp to ensure that the electrical behavior and the internal state of the device under test are accurately correlated in time. After a fault is triggered, the system automatically saves the complete waveform data and message records for a preset time period before and after the fault, providing a complete and reliable data foundation for fault tracing and performance analysis. Attached Figure Description

[0017] Figure 1 This is a system architecture diagram of the present invention.

[0018] Figure 2 This is a flowchart of the method of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] Please see Figure 1 The automated testing system for DC-DC converter testing provided in this embodiment of the invention mainly includes: a host computer control unit, a high-voltage programmable DC power supply unit, a bidirectional source-carrier integrated testing unit, a signal acquisition and processing unit, a bus communication and monitoring unit, a safety interlock emergency stop unit, and the DC-DC converter under test (hereinafter referred to as DUT) as the test object.

[0021] The host computer control unit, as the top-level control core of the system, builds a test sequence management engine based on NI TestStand test management software. TestStand is responsible for loading, executing, controlling the flow of test sequences, and managing results. The host computer control unit forms a hardware abstraction layer through a VI model written in LabVIEW, encapsulating all programmable instructions for external devices under a unified software interface, thus decoupling the test sequence from the underlying hardware driver. The host computer control unit also integrates a custom step type library, including high-voltage power supply control steps, bidirectional source-load control steps, CAN monitoring steps, data acquisition steps, safety decision steps, and measurement calculation steps, which significantly improves the development efficiency of the test process.

[0022] The high-voltage programmable DC power supply unit is connected to the high-voltage input terminal of the DUT to provide programmable main power high-voltage input to the DUT. In this embodiment, the output voltage range of the high-voltage power supply is 0 to 800V, the power level is 15kW, and it has an RS232 / GPIB communication interface. It is precisely controlled by the host computer LabVIEW VI. The high-voltage programmable DC power supply unit contains an output-side DC contactor and a pre-charge circuit. The pre-charge circuit is used to slowly charge the DUT input terminal support capacitor through the pre-charge resistor during the high-voltage establishment phase to avoid the inrush current generated by directly applying high voltage. When the voltage reaches the set value, the output-side DC contactor closes to bypass the pre-charge resistor and complete the soft-start process.

[0023] The bidirectional source-carrier integrated test unit is one of the core innovative components of this invention. It has a single physical output port that connects simultaneously to the DUT's output (14V main power output) and startup power supply (12V auxiliary power supply). Two distinct functions are achieved on the same port through a time-division multiplexing mechanism using an internal mode switch. Specifically, in the initial testing phase, the internal switch is in source mode, and the bidirectional source-carrier integrated test unit acts as a high-precision DC power supply, outputting 12V / 0.07A to power the DUT's internal control circuitry. Once the DUT has started up and the high voltage has been established, the internal switch... The switch transitions to load mode within 50 milliseconds. This unit also functions as a programmable electronic load, absorbing the 14V main power output from the DUT, with a load current range covering 0 to 230A. The bidirectional source-load integrated test unit also includes an input-side DC contactor and an energy feedback unit. In load mode, the absorbed electrical energy can be inverted and fed back to the grid, with a feedback efficiency of over 93%. Since the startup power supply and output load absorption share the same physical port, the entire test process does not require manual wiring changes, which not only simplifies operation and avoids wiring errors, but also achieves seamless connection from startup to load, significantly improving test efficiency.

[0024] The signal acquisition and processing unit is built on the NI PXI platform and is used to acquire various data during the testing process with high precision and synchronously. This includes the PXI chassis, PXI controller, high-precision voltage and current acquisition module, and CAN communication module. The PXI platform synchronously acquires external electrical parameters of the DUT, such as input voltage, input current, output voltage, and output current, at a sampling rate of no less than 1 MS / s. At the same time, it receives CAN bus messages reported by the DUT through the CAN communication module. All acquired data is timestamped to ensure that the electrical parameters are precisely aligned with the internal state of the DUT in terms of timing, providing a complete data foundation for subsequent fault analysis and performance evaluation.

[0025] The bus communication and monitoring unit includes a DBC file parsing module, which is used to acquire and parse the internal status information periodically reported by the DUT via the CAN bus in real time. The DBC file is a database file for CAN bus communication, which defines information such as message ID, signal name, bit length, and parsing formula. During the system initialization phase, the host computer control unit loads the DBC file that matches the DUT. Based on this, the bus communication and monitoring unit parses the received CAN messages in real time and extracts key parameters such as the fault status register flag bit, internal temperature, and current operating mode inside the DUT. This mechanism enables the test system to have the ability to "sense" the internal status of the device under test, completely eliminating the "blind test" problem of the test equipment being out of sync with the DUT status in traditional semi-automatic test systems.

[0026] The safety interlock emergency stop unit is the core safety protection module of this system, implementing a dual protection mechanism of software command emergency stop and hardware hard-wire disconnection. It consists of a logic decision unit, a solid-state relay array, a hardware watchdog timer, and an external emergency stop button. The logic decision unit can be implemented using an FPGA or PLC controller. Its input simultaneously receives three fault signals: the first from the bus communication and monitoring unit, which is the DUT fault status signal (such as over-temperature, over-voltage, over-current, etc.) extracted after DBC parsing; the second from the signal acquisition and processing unit, which is the over-limit signal indicating that the acquired electrical parameters exceed a preset threshold; and the third from the manually operated emergency stop button. When any fault signal is triggered, the logic decision unit... An emergency stop command is generated based on a preset priority arbitration mechanism, driving the solid-state relay array to physically disconnect the output DC contactor of the high-voltage programmable DC power supply unit and the input DC contactor of the bidirectional source-carrier integrated test unit within 10 milliseconds. This completely cuts off the power circuit at the hardware level. This hardware disconnection path is completely independent of the host computer software, and can still reliably execute protection actions even if TestStand or LabVIEW experiences a software crash. After the emergency stop is triggered, the system automatically starts the discharge circuit to discharge the residual voltage of the high-voltage capacitor inside the DUT to below the safe voltage of 36V, and saves the PXI waveform data and CAN messages for 5 seconds before and after the fault to the database, realizing complete fault tracing.

[0027] The internal structure of the bidirectional source-carrier integrated test unit is further explained below: The unit includes a bidirectional programmable power module, a single output port, an input-side DC contactor, an internal mode switching switch, and an energy feedback unit. The bidirectional programmable power module is the core execution component, which can act as a power source to output electrical energy (source mode) or as a load to absorb electrical energy (load mode). In source mode, the module's output parameters are adjustable voltage from 0 to 30V, current from 0 to 10A, and power from 0 to 120W. In load mode, the module's parameters are adjustable voltage from 0 to 30V, current from 0 to 300A, and power from 0 to 5kW, which fully meets the DUT's 12V / 0.07A startup power supply and 14V / 230A full-load test requirements in this embodiment. A single output port is connected to the output of the DUT via an input-side DC contactor. Since the DUT's startup power supply and main power output are usually reused in the same set of power terminals in the hardware design (or although physically separate, they can be electrically connected), this invention utilizes this feature to use a single port of the bidirectional source-load device as the connection point for both startup power supply and output load. The internal mode switching switch quickly and reliably switches between source mode and load mode under the command of the host computer control unit. The switching process is completed within 50 milliseconds, ensuring the continuity of the test process. In load mode, the energy feedback unit inverts the absorbed DC power into AC power that is in phase and frequency with the power grid and feeds it back to the power grid, which saves energy and reduces heat dissipation in the test environment.

[0028] To further enhance the intelligence and security of the testing, a digital twin model construction module and a test sequence dynamic adjustment module were built into the host computer control unit.

[0029] During the system initialization phase, the digital twin model building module first establishes an initial digital twin model based on the specifications of the DC-DC converter under test, including the rated input voltage range, rated output power, nominal efficiency curve, and thermal resistance model parameters. The digital twin model is a simulation model driven by a hybrid of physical mechanism and behavioral data, capable of simulating the electrical and thermal behavior of the DUT under different input voltages, load currents, and ambient temperatures. During test execution, the model continuously receives real-time electrical parameters (input voltage, input current, output voltage, and output current) from the signal acquisition and processing unit, as well as thermal parameters collected by temperature sensors placed near the power devices inside the DUT housing. The module employs state estimation algorithms such as Kalman filtering or extended Kalman filtering to use real-time acquired data to correct and update the internal state variables of the digital twin model (such as junction temperature of power switching devices, magnetic flux density of magnetic components, and equivalent series resistance of capacitors) online, ensuring that the dynamic response of the digital twin model is highly synchronized with the actual behavior of the physical DUT.

[0030] The test sequence dynamic adjustment module interacts closely with the digital twin model construction module. Before the TestStand engine executes the load test sequence (i.e., traversing each preset load point from 0 to 230A), the test sequence dynamic adjustment module inputs the preset test stress parameters (current value, residence time, load step change slope, etc. at each load point) into the currently updated digital twin model to perform a real-time simulation prediction. Based on the currently estimated internal state of the DUT, the digital twin model predicts its thermal stress response and electrical stress response under the preset test stress and determines whether there is a risk of exceeding the safe operating area (e.g., whether the junction temperature of the power device is close to the upper limit, whether the output ripple may exceed the standard due to capacitor aging, whether the inductor will saturate due to excessive current, etc.).

[0031] If the prediction results indicate a risk of exceeding limits, the test sequence dynamic adjustment module automatically adjusts the test steps. Adjustment strategies include, but are not limited to: appropriately reducing the loading current value at high-stress load points, shortening the dwell time at high-stress load points, inserting additional cooling waiting time between two adjacent high-stress load points, or skipping extreme load point tests for prototypes with high aging levels. Conversely, if the prediction results indicate that the DUT is currently in good condition and has sufficient thermal margin, the module can also appropriately increase the density of test load points, for example, by conducting tests with smaller current steps within the estimated high-efficiency range to obtain a more refined efficiency curve. Through this adaptive testing strategy based on digital twins, the system can "tailor-make" test plans according to the real-time status and individual differences of each DUT, minimizing the cumulative damage to the DUT during the testing process while ensuring test coverage and verification adequacy, thus achieving true "flexible testing."

[0032] To enable the laboratory testing environment to more realistically reproduce the operating conditions of the DUT in actual application systems, this system integrates a hardware-in-the-loop simulation control module in the bidirectional source-carrier integrated test unit, and a waveform generation and playback module in the high-voltage programmable DC power supply unit.

[0033] In practical electric vehicle, communication power supply, or industrial power supply systems, the load connected to the back end of the DC-DC converter is not an ideal constant current or constant resistance load. The actual load usually includes the distributed inductance of the wiring harness, the contact resistance of the connector, the input capacitance of the downstream equipment, and the dynamically changing power demand. These factors together constitute a complex impedance network, which will have a significant impact on the output voltage stability and loop dynamic response of the DC-DC converter. Traditional electronic loads can only simulate simple constant current, constant resistance, or constant power characteristics and cannot accurately reproduce such real load impedance characteristics.

[0034] The hardware-in-the-loop simulation control module is designed to solve this problem. This module has a pre-configured load impedance network model, such as an RLC series-parallel hybrid network model, which can be flexibly configured by the user through a host computer interface. During load testing, the module acquires the DUT's output voltage and current in real time at microsecond intervals. These two real-time variables are used as input boundary conditions for the impedance network model to solve for the target load voltage or current value under the actual load characteristics. This target value is then immediately sent as an instruction to the bidirectional programmable power module for execution. Through this high-speed closed-loop control, the volt-ampere characteristics presented by the ports of the bidirectional source-load integrated test unit are no longer a simple ideal load, but accurately simulate the real load characteristics composed of wiring harnesses, connectors, and downstream equipment. This allows the test system to accurately induce loop oscillations and transient load drops that may occur in the DUT in a real system, providing a reliable experimental means for optimizing the DUT control loop parameters and verifying robustness.

[0035] Meanwhile, the waveform generation and playback module in the high-voltage programmable DC power supply unit is used to simulate input voltage disturbances in the actual power supply environment. In practical applications, the input bus voltage of the DC converter is not ideally constant and may experience complex disturbances such as voltage drops, surges, and increased ripple due to front-end power supply fluctuations, load changes, motor regenerative braking, etc. The waveform generation and playback module allows users to import real voltage disturbance waveform data files collected by field recording equipment (such as oscilloscopes or power analyzers) into the system. In the anti-input disturbance test, the host computer control unit no longer sends a constant voltage value to the high-voltage programmable DC power supply, but instead sends the imported disturbance waveform data points to the arbitrary waveform generation function module of the high-voltage power supply in chronological order, controlling its output voltage to accurately follow the changes of the disturbance waveform. At the same time, the signal acquisition and processing unit synchronously monitors the output voltage and current of the DUT, quantitatively evaluating its output maintenance capability, anti-interference capability, and dynamic recovery characteristics under complex input voltage disturbance conditions.

[0036] The host computer control unit also deploys a fault diagnosis expert system module, which is used to automatically perform root cause analysis after a fault occurs, improving the efficiency of fault diagnosis. The fault diagnosis expert system module maintains a multi-dimensional data association model library. Each association rule in the model library defines the causal relationship between the electrical waveform data characteristics collected by the signal acquisition and processing unit, the internal state data of the DUT (such as fault codes, state machine jump records, and temperature change curves) collected and parsed by the bus communication and monitoring unit, and the test step information (such as the currently executed load point and operation sequence) recorded by the host computer control unit within a specific time window before and after the fault is triggered.

[0037] For example, a typical causal relationship rule can be defined as follows: If the fault type is "output overcurrent protection triggered", and within 100 milliseconds before the fault trigger, the output current waveform has a positive step with a slope exceeding the set threshold, and the CAN message shows that the DUT state machine changes from "constant voltage mode" to "constant current mode", while the internal temperature of the DUT is within the normal range at the time of the fault, then the system infers that the possible root cause of the fault is "the transient load change exceeds the DUT loop response capability, which may be caused by excessive output capacitor equivalent series resistance or insufficient control loop phase margin".

[0038] When the safety interlock emergency stop unit triggers an emergency stop due to any fault signal, the fault diagnosis expert system module is automatically activated. The module uses the fault trigger time as a benchmark to extract all synchronous PXI waveform data and CAN message data within a preset time window before and after the fault (e.g., 5 seconds before and 1 second after). Subsequently, the module uses a pattern matching and rule reasoning engine to compare the extracted data features with the preconditions of each rule in the model library one by one. When one or more rules are matched, the module generates a preliminary analysis report containing the fault trigger time, fault type, related data snapshots, and possible root cause inferences, which is displayed in real time on the HMI interface and saved to the database for subsequent in-depth analysis. This function upgrades the test system from a passive data recording device to an active intelligent diagnostic platform, greatly shortening the time for R&D and testing personnel to locate the root cause of faults and accelerating the product iteration process.

[0039] This invention constructs a three-tiered defense-in-depth security protection system, consisting of system-level hardware interlocking, system-level software monitoring, and device-level autonomous protection, ensuring the safety of the testing system and operators under various fault conditions. The first and second levels of protection are jointly implemented by a safety interlock emergency stop unit and host computer software. The logic decision unit in the safety interlock emergency stop unit has a built-in explicit priority arbitration mechanism, with priorities from high to low as follows: The first priority is the manual intervention signal, which is the hard-wired signal generated by the operator pressing the external emergency stop button. It has the highest priority and will immediately and unconditionally execute an emergency stop once triggered. The second priority is the hardware watchdog timeout signal. The safety interlock emergency stop unit has a built-in hardware watchdog that continuously monitors the communication status sent by the host computer control unit through periodic heartbeat messages. If the heartbeat signal is interrupted for more than a preset threshold (e.g., 500 milliseconds) due to reasons such as host computer software crash, operating system crash, or communication cable disconnection, the hardware watchdog generates a timeout signal to trigger an emergency stop, preventing the system from losing control in the absence of upper-level monitoring. The third priority is the DUT fault status signal from the bus communication and monitoring unit. When the DBC parsing module recognizes that the corresponding bit of the fault status register in the CAN message reported by the DUT has changed, indicating that a fault has occurred inside the DUT, the signal is sent to the logic decision unit. The fourth priority is the electrical parameter over-limit signal from the signal acquisition and processing unit. When the voltage, current and other parameters acquired by the PXI exceed the software protection threshold preset by the host computer, the signal is sent to the logic decision unit.

[0040] Triggering any of the four priority signals will drive the solid-state relay array to disconnect the power circuit contactor within 10 milliseconds, achieving system-level fast protection.

[0041] The third level of protection is an equipment-level autonomous protection mechanism. Both the high-voltage programmable DC power supply unit and the bidirectional source-carrier integrated test unit have independent autonomous protection modules composed of microcontrollers or digital signal processors. During system initialization, in addition to configuring the normal operating parameters of the equipment, the host computer control unit also sends independent hardware protection threshold parameters to the autonomous protection modules within each device via the communication interface. For example, it sets a hardware overcurrent protection point and overpower protection point slightly higher than the maximum set value of the test sequence. During test operation, these autonomous protection modules operate completely independently of the host computer and safety interlock unit, continuously monitoring their own output voltage, current, and power. Once an output state exceeding the limit is detected—whether due to DUT abnormality, test equipment failure, host computer communication interruption, or safety interlock unit failure—the autonomous protection module will directly block the drive pulses of the internal power switching devices within microseconds and disconnect the internal output relay, cutting off energy output from the device source. This mechanism does not rely on any external control signals, forming the last independent line of defense for safety.

[0042] Through the aforementioned three-tiered defense-in-depth architecture, this testing system can ensure that the power circuit is reliably disconnected under extreme conditions of any single or even multiple point failures, thus protecting the safety of the equipment under test, testing instruments, and operators.

[0043] Please see Figure 2 The present invention provides an automated testing method for testing DC-DC converters, which is applied to the aforementioned automated testing system and mainly includes the following steps.

[0044] Step 1: The operator connects the DUT to the test system, and after connecting the high-voltage input cable, low-voltage output / startup multiplex cable, and CAN communication cable, clicks "Start Test" on the host computer HMI interface. The TestStand engine in the host computer control unit loads the test sequence and first executes the initialization process. TestStand initializes the high-voltage programmable DC power supply unit and the bidirectional source-carrier integrated test unit via RS232 / GPIB / Ethernet communication interfaces by calling LabVIEW VI, setting their outputs to zero. Simultaneously, the PXI controller of the signal acquisition and processing unit configures the range, sampling rate, and other parameters of each acquisition channel. The bus communication and monitoring unit loads the DBC file corresponding to the DUT and begins subscribing to status messages on the CAN bus. The logic decision unit of the safety interlock emergency stop unit completes its self-test and enters continuous monitoring mode.

[0045] After initialization, the host computer control unit controls the internal mode switching switch of the bidirectional source-carrier integrated test unit to be set to source mode, outputting 12V / 0.07A to power the control circuit of the DUT. The bus communication and monitoring unit continuously receives the CAN messages reported by the DUT and parses its operating status through the DBC file. The system waits in a loop until it parses the DUT's status register to indicate that it has entered the "standby ready" state.

[0046] Step Two: After confirming that the DUT is ready, the host computer control unit controls the high-voltage programmable DC power supply unit to start the pre-charge circuit. The high-voltage power output slowly rises, charging the supporting capacitor at the DUT input terminal through the pre-charge resistor. The signal acquisition and processing unit synchronously acquires the input voltage waveform and monitors the rise slope. When the voltage reaches the set value (e.g., 400V) and stabilizes, the host computer control unit closes the DC contactor on the output side of the high-voltage programmable DC power supply unit through a hard-wired IO signal, bypassing the pre-charge resistor and completing the soft start. Afterward, the system confirms through the CAN bus that the 14V main power output voltage of the DUT has been established normally.

[0047] Step 3: After the high voltage is established and the output voltage stabilizes, the host computer control unit controls the internal mode switching switch of the bidirectional source-load integrated test unit to switch to load mode within 50 milliseconds. The TestStand engine enters the main test sequence and begins to execute the load test cycle. The system sets the load current of the bidirectional source-load device in sequence according to the preset order or dynamically adjusted load points (such as 20A, 50A, 100A, 150A, 200A, 230A). At each load point, the system stays for a certain period of time. After the electrical parameters stabilize, the signal acquisition and processing unit synchronously acquires the input voltage and current and output voltage and current of the DUT. The bus communication and monitoring unit synchronously acquires and parses the internal temperature and status information in the CAN message. The system calculates the conversion efficiency, voltage regulation rate and other performance parameters at each load point in real time and records them to the database.

[0048] During this stage, if the digital twin function is enabled, the test sequence dynamic adjustment module will use the digital twin model to predict the load before each load point is executed, and dynamically adjust the current step size, dwell time, or number of test points based on the prediction results. If the hardware-in-the-loop simulation function is enabled, the HIL simulation control module will dynamically adjust the load value according to the preset impedance network model to simulate the dynamic characteristics of the real load.

[0049] Step Four: Throughout the entire test, the safety interlock emergency stop unit is constantly under monitoring. Once the logic decision unit receives any fault trigger signal (internal fault of DUT, electrical parameter over-limit, or manual emergency stop), it immediately executes an emergency stop action according to the preset priority: driving the solid-state relay array to simultaneously disconnect the output side DC contactor of the high-voltage programmable DC power supply unit and the input side DC contactor of the bidirectional source-carrier integrated test unit within 10 milliseconds, physically cutting off the electrical connection between DUT and all power sources. At the same time, the system automatically starts the discharge circuit to discharge the residual charge of the high-voltage capacitor inside DUT to below the 36V safe voltage.

[0050] After an emergency stop is triggered, the fault diagnosis expert system module automatically extracts synchronous PXI waveform data and CAN message data within a preset time window before and after the fault, performs inference based on preset causal association rules, generates a preliminary analysis report containing fault root cause inference, and displays it on the HMI interface. The TestStand engine interrupts the current test sequence and automatically jumps to the cleanup phase.

[0051] Step 5: After the test sequence is completed or enters the cleanup phase due to a fault, the host computer control unit shuts down the output of the high-voltage programmable DC power supply unit and the bidirectional source-carrier integrated test unit via LabVIEW VI. Based on all the data collected during the test, the system automatically generates a PDF test report containing efficiency curves, voltage regulation characteristics, temperature change curves, etc. All raw data, CAN message records, test results, and fault analysis reports are written to the SQL Server or MySQL database through the database interface module. The system closes the database connection, the HMI interface displays "Test Completed", and returns to the standby state, waiting for the next test task.

[0052] By combining the above system architecture and testing methods, the present invention achieves significant technical advantages over existing technologies.

[0053] First, the bidirectional source-load integrated test unit realizes the functions of power supply and output load absorption through time-division multiplexing of a single physical port. The internal mode switching time is less than 50 milliseconds, which makes the two test stages of low-voltage start-up and high-voltage load seamlessly connected. No manual wiring replacement is required throughout the process, which simplifies the construction and maintenance of the test bench and fundamentally avoids the risk of equipment damage caused by wiring errors, thus significantly improving test efficiency. Secondly, the system collects DUT internal status messages in real time via CAN bus and automatically parses key information such as fault status register, internal temperature, and operating mode using DBC file parsing module. This completely changes the "blind test" mode in traditional testing where the test equipment and the status of the DUT are disconnected. The test system can perceive the internal operating status of the DUT in real time and trigger protection actions or adjust test strategies based on this, greatly improving the effectiveness and safety of the test. Third, the safety interlock emergency stop unit achieves hardware-level power circuit disconnection with a response time of less than 10 milliseconds through logic decision unit and solid-state relay array, and is supplemented by software-level emergency stop and equipment-level autonomous protection, forming a three-level in-depth defense safety system. This architecture ensures that even in extreme cases of any single point of failure or even a crash of the host computer software, the system can still reliably disconnect the power circuit and discharge residual high voltage, ensuring the safety of operators and equipment, and enabling the system to operate unattended 24 / 7.

[0054] Fourth, the test sequence dynamic adjustment function based on the digital twin model enables the test system to adaptively adjust the test stress according to the real-time health status and individual differences of each DUT. While ensuring test coverage and verification adequacy, it minimizes the cumulative damage to the DUT during the test process, thus achieving "flexible testing". Fifth, the hardware-in-the-loop simulation control module and the input disturbance waveform playback module enable the testing in the laboratory environment to reproduce the dynamic load characteristics and complex input voltage disturbances of the DUT in the real application system with high fidelity, providing a more realistic and reliable experimental means for the loop stability assessment and anti-interference capability verification of the DUT. Sixth, the fault diagnosis expert system module automatically associates multi-dimensional data such as electrical waveforms, CAN messages and test steps after a fault occurs, and performs reasoning based on preset causal association rules to generate a preliminary analysis report containing root cause inference. This transforms fault analysis from relying on human experience to automatic system reasoning, significantly shortening the R&D and debugging cycle. Seventh, the signal acquisition and processing unit synchronously acquires all electrical parameters and CAN messages based on the PXI platform at a sampling rate of no less than 1MS / s, and marks all data with a unified timestamp, ensuring the precise time-series correspondence between electrical behavior and the internal state of the DUT, providing a complete and reliable data foundation for performance analysis and fault tracing.

[0055] The above description is merely a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent structural or procedural transformations made based on the content of the present invention's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. An automated testing system for testing DC-DC converters, characterized in that: include: The host computer control unit runs the test sequence management engine, which is used to control the execution and monitoring of the test process. The test sequence management engine encapsulates control instructions for external devices through a hardware abstraction layer. A high-voltage programmable DC power supply unit is connected to the input terminal of the DC-DC converter under test to provide a programmable high-voltage DC input and includes an output-side DC contactor. The bidirectional source-load integrated test unit has a single physical port connected to the output terminal and the startup power supply terminal of the DC-DC converter under test. The bidirectional source-load integrated test unit includes an internal mode switching switch, which is used to realize low-voltage startup source mode and output load mode on the same port in a time-division multiplexing manner, with a switching time of less than 50 milliseconds. The signal acquisition and processing unit is used to synchronously acquire the external electrical parameters of the DC-DC converter under test and the bus communication messages reflecting its internal status with a unified timestamp, with a sampling rate of not less than 1MS / s; The bus communication and monitoring unit includes a protocol parsing module, which is used to acquire and parse the internal status information reported by the DC-DC converter under test in real time. The internal status information includes at least a fault status indication. The safety interlock emergency stop unit is connected to the output side DC contactor of the high voltage programmable DC power supply unit, the input side DC contactor of the bidirectional source-carrier integrated test unit, and the host computer control unit, respectively. The safety interlock emergency stop unit includes a logic decision unit and a solid-state relay array. The logic decision unit is configured to receive fault status signals from the bus communication and monitoring unit, electrical parameter over-limit signals from the signal acquisition and processing unit, and manual intervention signals from the external emergency stop button. It generates an emergency stop command according to a preset priority arbitration mechanism, driving the solid-state relay array to physically disconnect the output-side DC contactor and the input-side DC contactor to cut off the power circuit.

2. The automated test system for testing DC-DC converters according to claim 1, characterized in that: The host computer control unit also includes: The digital twin model building module is used to dynamically build and update the digital twin model of the DC-DC converter under test based on the specifications, historical test data and real-time electrical and thermal parameters. The test sequence dynamic adjustment module interacts with the digital twin model construction module and is used to dynamically adjust the loading intensity, number of cycles, or parameter traversal step size of the test steps based on the response prediction of the digital twin model to the preset test stress before or during test execution.

3. The automated test system for testing DC-DC converters according to claim 1, characterized in that: The bidirectional source-load integrated test unit also includes a hardware-in-the-loop simulation control module. The hardware-in-the-loop simulation control module is configured to: acquire the output current and output voltage of the DC-DC converter under test in real time, calculate the target load value based on the preset load-side impedance network model, and control the bidirectional source-load integrated test unit to execute the target load value in order to simulate the dynamic response of the DC-DC converter under test under non-ideal load conditions. The high-voltage programmable DC power supply unit includes a waveform generation and playback module, configured to control the output of a predefined voltage disturbance waveform during the test to simulate the disturbance immunity of the DC converter under test in a non-ideal input power environment.

4. The automated test system for testing DC-DC converters according to claim 1, characterized in that: It also includes a fault diagnosis expert system module, which is configured as follows: A multidimensional data association model is established and stored. The model defines the causal association rules between the electrical waveform data collected by the signal acquisition and processing unit, the internal status data collected by the bus communication and monitoring unit, and the test step information recorded by the host computer control unit before and after the fault is triggered. When the safety interlock emergency stop unit triggers an emergency stop, it automatically retrieves data associated with the current fault, performs inference based on the causal association rules, and generates a preliminary analysis report containing the root cause inference of the fault.

5. The automated test system for testing DC-DC converters according to claim 1, characterized in that: In the priority arbitration mechanism configured in the logic decision unit of the safety interlock emergency stop unit, the priorities from high to low are: manual intervention signal, hardware watchdog timeout signal, fault status signal from bus communication and monitoring unit, and electrical parameter over-limit signal from signal acquisition and processing unit.

6. The automated test system for testing DC-DC converters according to claim 1, characterized in that: Both the high-voltage programmable DC power supply unit and the bidirectional source-carrier integrated test unit have built-in autonomous protection modules. During the initialization phase, the host computer control unit sends independent protection threshold parameters to each of the autonomous protection modules. The autonomous protection modules are configured to autonomously monitor their output status in the event of host computer communication interruption or failure of the safety interlock emergency stop unit, and internally shut down power output when the status exceeds the limit, thereby forming a device-level autonomous protection mechanism.

7. The automated test system for testing DC-DC converters according to claim 1, characterized in that: The bidirectional source-load integrated test unit outputs a rated 12V / 0.07A in low-voltage start-up source mode to power the control circuit of the DC-DC converter under test, and absorbs a rated 14V / 0-230A in output load mode to simulate the downstream load.

8. The automated test system for testing DC-DC converters according to claim 1, characterized in that: The test sequence management engine of the host computer control unit is built based on TestStand, and the hardware abstraction layer is implemented through the LabVIEW VI model. The test sequence management engine includes a custom step type library, which includes high-voltage power supply control steps, bidirectional source-load control steps, CAN monitoring steps, data acquisition steps, safety decision steps, and measurement calculation steps.

9. An automated testing method for testing DC-DC converters, applied to the automated testing system described in any one of claims 1-8, characterized in that, Includes the following steps: Step 1: Control the bidirectional source-carrier integrated test unit to switch to low-voltage source mode, output the start-up voltage to provide auxiliary power to the DC converter under test, and confirm with the monitoring unit that the DC converter under test has entered standby mode through bus communication; Step 2: Control the high voltage programmable DC power supply unit to output the set high voltage, and confirm that the main power output voltage of the DC converter under test has been established through the signal acquisition and processing unit and the bus communication and monitoring unit. Step 3: Control the bidirectional source-load integrated test unit to switch to output load mode, execute the preset load point traversal test, and simultaneously collect external electrical parameters and internal status messages to calculate performance parameters; Step 4: During the test, the safety interlock emergency stop unit monitors the fault signal in real time. When a fault signal is detected, the logic decision unit drives the solid-state relay array to disconnect the contactors on the high-voltage power supply output side and the bidirectional source load input side according to the priority arbitration mechanism, and starts the discharge circuit. Step 5: Turn off all device outputs, generate a test report, and store the test data.

10. The automated test method for testing DC-DC converters according to claim 9, characterized in that: Step three also includes at least one of the following: The digital twin model of the DC-DC converter under test is used to simulate and predict the preset load point traversal steps, and the load current step size, dwell time or number of test points are dynamically adjusted according to the prediction results. The hardware-in-the-loop simulation control module dynamically adjusts the load value based on the preset impedance network model to simulate the characteristics of the real load. When step four triggers an emergency stop, the fault diagnosis expert system module automatically extracts synchronous data within a preset time window before and after the fault, and generates an analysis report containing inferences about the root cause of the fault based on preset causal association rules.

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