An under-voltage protection circuit with radiation resistance

Abstract

The application provides an anti-radiation under-voltage protection circuit, which comprises a bias circuit, a comparison circuit, a threshold voltage adjustment circuit, a hysteresis / output circuit and a voting selector, the bias circuit generates stable bias current for the hysteresis / output circuit to resist the influence of total dose on the hysteresis / output circuit, the comparison circuit generates small under-voltage threshold changing with total dose through a transistor and a resistor to stabilize the transistor conduction voltage in a radiation environment and increase the threshold voltage setting range, the threshold voltage adjustment circuit adjusts the resistance value through an inverter to prevent false flipping, the hysteresis / output circuit generates hysteresis function and performs shaping, improves the anti-radiation property, the three-mode redundancy and the voting selector can effectively improve the single event upset resistance of the circuit; the under-voltage threshold provided by the application changes little with total dose, has certain single event upset resistance, the circuit structure has universality and is suitable for most processes.

Description

Technical Field

[0001] This invention relates to the field of electronic components technology, and specifically to an undervoltage protection circuit that is resistant to radiation. Background Technology

[0002] Undervoltage protection circuitry is a crucial module in chip functional modules. When the power supply voltage falls below a set threshold, this module automatically cuts off the power supply to the circuit, preventing damage to the power-consuming modules due to low voltage. In a radiation environment, as the total dose accumulates, the device parameters in the chip change, causing the set threshold to shift. This can prevent the chip from turning on and off in a timely manner, leading to a malfunction in the entire electronic system. Furthermore, high-energy particles in radiation may cause a brief flip in the output of a device in the undervoltage protection circuitry, also resulting in a temporary shutdown of the chip and causing a malfunction in the entire electronic system.

[0003] The circuit diagram of Chinese patent CN118630696B, "An Anti-radiation High Voltage and Undervoltage Protection Circuit," is as follows: Figure 1 As shown, a transistor, MOSFET, and Zener diode are used to implement undervoltage protection. Transistor Q will only conduct when its base voltage exceeds the sum of the Zener diode's voltage regulation value and the threshold voltage of transistor Q. Therefore, this patent not only uses Zener diodes, increasing the variety of devices, but also relies primarily on the performance of the devices themselves for radiation protection. This leads to significant differences in radiation protection performance under different manufacturing processes. Furthermore, the undervoltage threshold is related to the type of device, the voltage regulation value is limited, and the single-event immunity is poor, resulting in insufficient radiation protection.

[0004] Therefore, an undervoltage protection circuit with strong radiation resistance and high process adaptability is needed. Summary of the Invention

[0005] This invention addresses the issues of radiation resistance and process adaptability in undervoltage protection circuits by providing a radiation-resistant undervoltage protection circuit. The undervoltage threshold varies little with the total dose and has a certain resistance to single-event upsets. The circuit structure is versatile and applicable to most processes.

[0006] This invention provides a radiation-resistant undervoltage protection circuit, including a bias circuit, a comparator circuit, and a hysteresis / output circuit; The bias circuit consists of a PMOS transistor M1 and a resistor R1. The source of transistor M1 is connected to the input voltage VIN, and the gate and drain are connected to the upper end of resistor R1. The lower end of resistor R1 is grounded. The upper end of resistor R1 is connected to the gate of PMOS transistor M4 in the hysteresis / output circuit. The comparator circuit includes a PMOS transistor M2, an NPN transistor Q1, and resistors R3, R4, and R5. The gate input voltage Vbias of transistor M2 is connected to the source VIN, and the drain is connected to the collector of transistor Q1 and the gate of the PMOS transistor M7 in the hysteresis / output circuit. The upper end of resistor R5 is connected to VIN, and the lower end is connected in series with resistors R4 and R3. The other end of resistor R3 is grounded. The base of transistor Q1 is connected between resistors R4 and R3, and the emitter is connected to resistor R2. The other end of resistor R2 is grounded. The bias circuit outputs current to transistor M4 in the hysteresis / output circuit; the comparator circuit divides the input voltage VIN and compares it with the base voltage of transistor Q1, and transmits the comparison result to transistor M7 in the hysteresis / output circuit; the hysteresis / output circuit shapes the comparison result and enables the hysteresis function, outputting voltage UVLO.

[0007] The radiation-resistant undervoltage protection circuit of the present invention, in a preferred embodiment, includes a hysteresis / output circuit comprising PMOS transistors M3, M4, M5, M6, M7, NMOS transistors M8, M9, M10, M11, M12, resistor R6, inverter INV1, and capacitor C1. The source of transistor M3 is connected to VIN, the drain is connected to resistor R6, and the gate is connected to the output of inverter INV1. The drain of transistor M4 is connected to the drain of transistor M8. The drain and gate of transistor M8 are connected to the gate of transistor M9. The sources of transistors M8 and M9 are both grounded. The source of transistor M5 is connected to VIN, and the gate and drain are connected to the source of transistor M6. The gate and drain of transistor M6 are connected to the gate of transistor M7. The source of transistor M7 is connected to VIN, and the drain is connected to the drain of transistor M9. One end of capacitor C1 is connected to the drain of transistor M9 and the input of inverter INV1, and the other end is grounded. The source of transistor M12 is connected to VIN, the gate input voltage Vbias is connected, and the drain is connected to the source of transistor M11. The gate of transistor M11 is connected to the gate of transistor M10 and then connected to the output of inverter INV1. The drain of transistor M11 is connected to the drain of transistor M10 and then outputs UVLO. The source of transistor M10 is grounded.

[0008] In a preferred embodiment of the radiation-resistant undervoltage protection circuit described in this invention, transistors M5, M6, and M7 are of the same type of MOS transistor so that transistor M7 remains on under radiation conditions and does not turn off due to radiation. M8 and M9 are MOS transistors of the same type and size. Under radiation conditions, the threshold voltage of M8 and M9 drops by the same amount to keep the current of M9 constant. Tubes M10, M11, and M12 form an inverter for shaping; During the power-on process of VIN, transistor M3 is cut off and does not conduct. When VIN exceeds the threshold voltage, transistor M3 conducts, connecting resistors R5 and R6 in parallel, increasing the voltage drop across resistor R3. When VIN drops to a value lower than the conduction threshold, the chip shuts down.

[0009] The radiation-resistant undervoltage protection circuit of the present invention, in a preferred embodiment, further includes a threshold voltage adjustment circuit. When the total radiation dose increases, the threshold voltage adjustment circuit adjusts the voltage at the upper end of the resistor R4 adaptively by reducing the resistance connected in parallel with the resistor R3, so as to adjust the base voltage V3 of the transistor Q1. .

[0010] The radiation-resistant undervoltage protection circuit of the present invention, in a preferred embodiment, includes a threshold voltage adjustment circuit comprising a resistor R3a connected in parallel with a resistor R3, a PMOS transistor M14 whose source is connected to the other end of the resistor R3a, and a hysteresis inverter INV2 connected to the gate of the transistor M14, the other end of the inverter INV2 being connected to the lower end of a resistor R6, and the drain of the transistor M14 being grounded. When the undervoltage protection circuit is working normally, the upper end of resistor R4 is connected to the input terminal of hysteresis inverter INV2, and the output of INV2 is low. Resistors R3 and R3a are connected in parallel. The resistance value of resistor R4 is less than the resistance value of resistor R5. When the total dose increases, the base current I of transistor Q1... B The increase causes the voltage at the upper end of resistor R4 to decrease, the output of inverter INV2 to be high, resistor R3a is no longer connected in parallel with resistor R3, and the voltage V3 is adjusted to stabilize the undervoltage threshold of transistor Q1.

[0011] In a preferred embodiment of the radiation-resistant undervoltage protection circuit described in this invention, the threshold voltage adjustment circuit further includes a resistor R3b connected in parallel with both resistors R3 and R3a, a PMOS transistor M13 whose source is connected to the other end of resistor R3b, and a hysteresis inverter INV3 connected to the gate of transistor M13. The other end of inverter INV3 is also connected to the lower end of resistor R6, and the drain of transistor M13 is grounded. The threshold voltage of inverter INV2 is higher than that of inverter INV3. When the undervoltage protection circuit is working normally, the upper end of resistor R4 is connected to the input terminal of the hysteresis inverter INV2, and the outputs of INV2 and INV3 are low. Resistors R3, R3a, and R3b are connected in parallel. When the total dose increases, the base current I of transistor Q1 increases. B The increase causes the voltage across resistor R4 to decrease, the output of inverter INV2 to be high, the output of inverter INV3 to be low, and resistor R3b to be connected in parallel with resistor R3. With the increase of total dose I BThe increase causes the voltage at the upper end of resistor R4 to decrease again. When it is less than the threshold voltage of inverter INV3, inverter INV3 outputs a high level, transistor M13 is turned off, and resistors R3a and R3b are not connected in parallel with resistor R3. Adjust voltage V3 to stabilize the undervoltage threshold of transistor Q1. The undervoltage threshold adjustment accuracy of transistor Q1 is changed by altering the values ​​of resistors R3a and R3.

[0012] In a preferred embodiment of the radiation-resistant undervoltage protection circuit described in this invention, under radiation conditions, the threshold voltage of transistor M1 in the bias circuit decreases, causing the voltage at the upper end of resistor R1 to decrease. However, the decrease in the threshold voltage of transistor M1 also causes the current in transistor M1 to increase, thereby increasing the voltage at the upper end of resistor R1, and ultimately keeping the current of transistor M4 stable.

[0013] In a preferred embodiment of the radiation-resistant undervoltage protection circuit described in this invention, the transistor Q1 is turned on when the base voltage of the transistor Q1 is greater than the voltage at the upper end of the resistor R2 and the threshold voltage of the transistor Q1.

[0014] In a preferred embodiment of the radiation-resistant undervoltage protection circuit described in this invention, transistor Q1 and resistor R2 form a source negative feedback to stabilize the conduction voltage of transistor Q1; transistor M1 and resistor R1 form a negative feedback, and when the temperature increases, the current in transistor M1 increases, which leads to an increase in the voltage at the upper end of resistor R1, thereby reducing the current in transistor M1 and the voltage at the upper end of resistor R1, and reducing the gate voltage change of transistor M4.

[0015] The radiation-resistant undervoltage protection circuit of the present invention, as a preferred embodiment, is characterized in that: it further includes a voting selector, and the number of undervoltage protection circuits is 3, which respectively output voltages UVLO1, UVLO2, and UVLO3, and UVLO1, UVLO2, and UVLO3 are all output to the voting selector. When any one of UVLO1, UVLO2, and UVLO3 causes an output error due to a single-event flip, the voting selector outputs a normal result. When at least two of UVLO1, UVLO2, and UVLO3 cause an output error due to a single-event flip at the same time, the voting selector outputs an abnormal result.

[0016] The present invention has the following advantages: The bias circuit of this invention generates a stable bias current for the hysteresis / output circuit to resist the influence of the total radiation dose on the hysteresis / output circuit. The comparator circuit generates an undervoltage threshold that varies little with the total dose through a transistor and a resistor to stabilize the transistor's on-state voltage under radiation conditions and increase the threshold voltage setting range. The threshold voltage adjustment circuit adjusts the resistor value through an inverter to prevent false flips. The hysteresis / output circuit generates a hysteresis function and performs shaping to improve radiation resistance. Triple redundancy and a voting device can effectively improve the circuit's resistance to single-event upsets. This invention provides an undervoltage threshold that varies little with the total dose and has a certain resistance to single-event upsets. The circuit structure is universal and applicable to most processes. Attached Figure Description

[0017] Figure 1 This is a circuit diagram of an existing undervoltage protection circuit; Figure 2 A circuit block diagram of a radiation-resistant undervoltage protection circuit; Figure 3 This is a detailed circuit diagram of a radiation-resistant undervoltage protection circuit. Figure 4 This is a schematic diagram of a radiation-resistant undervoltage protection circuit with triple mode redundancy. Detailed Implementation

[0018] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Example 1

[0019] like Figures 2-4 As shown, a radiation-resistant undervoltage protection circuit is described. This circuit exhibits a small change in undervoltage threshold with varying total radiation dose, strong resistance to single-event effects, and certain versatility. It includes a bias circuit, a comparator circuit, a threshold voltage adjustment circuit, and a hysteresis / output circuit. The circuit block diagram is shown below. Figure 2 As shown, the specific circuit diagram is as follows: Figure 3 As shown, the bias generation circuit generates a bias current that varies little with the total dose and provides this bias current to M4 in the hysteresis / output circuit module. The comparator circuit module divides the input voltage and then compares it with the base voltage of the transistor, transmitting the comparison result to the hysteresis / output circuit. When the total radiation dose increases, the threshold voltage adjustment circuit adaptively adjusts the threshold voltage based on the voltage across R4. The hysteresis / output circuit shapes the comparison result and enables the hysteresis function. Through the design of these three modules, the function of resisting total dose can be achieved. Figure 4 It is a triple-modular redundancy plus voting selector topology, which has the ability to resist single-event upsets. The internal circuits of UVLO1, UVLO2, and UVLO3 are... Figure 3 The outputs of UVLO1, UVLO2, and UVLO3 in the circuit are connected to a voting selector. When one of them causes an output error due to a single-event upset, the voting selector outputs normally. Only when two of them cause output errors due to a single-event upset at the same time will the voting selector output abnormally. Therefore, this circuit topology has a certain degree of resistance to single-event upsets.

[0020] The circuit diagram of this invention is as follows: Figure 3 As shown, the bias circuit consists of M1 and R1. M1 is connected as a diode and connected to R1. Under radiation conditions, the threshold voltage of M1 decreases, causing the voltage across R1 to drop. However, when the threshold voltage of M1 decreases, the current in M1 increases, thus increasing the voltage across R1. Therefore, under the influence of total dose, the voltage across R2 does not drop significantly, keeping the current in M4 of the hysteresis / output circuit stable. The comparator circuit first divides the input voltage and then compares it with the base voltage of transistor Q1, generating a comparison result at the collector of Q1. The emitter of transistor Q1 is connected to resistor R2. Under radiation conditions, a current is generated at the base of Q1, causing the voltage across R4 to drop, resulting in a decrease in the current flowing through R2. Therefore, the voltage across R2 decreases, and the base and emitter voltages of transistor Q1 remain essentially unchanged, ultimately resulting in a nearly constant forward voltage for Q1. In the hysteresis / output circuit, M8 and M9 are MOSFETs of the same type and size. Therefore, under radiation conditions, their threshold voltage drops at the same rate, keeping the current of M9 constant. M5, M6, and M7 are also of the same type. Under radiation conditions, their threshold voltage increases at almost the same rate, so M7 will remain on and will not turn off due to radiation. During VIN power-up, M3 is off and does not conduct. When VIN exceeds the threshold voltage, the gate of M3 is low, and M3 conducts. Connecting R5 and R6 in parallel increases the voltage drop across R3. The chip can only turn off when VIN drops below the conduction threshold, thus preventing frequent switching at the undervoltage threshold. The flip voltage of inverter INV1 is half of VIN. The inverter composed of M10, M11, and M12 has a shaping effect, which is better than that of an inverter composed of two ordinary transistors. Through the above circuit design, the undervoltage protection circuit can be made to withstand total dose.

[0021] In the threshold voltage adjustment circuit, the threshold voltage of the hysteresis inverter INV2 is greater than the threshold voltage of the hysteresis inverter INV3 and both are higher than the base voltage of the transistor Q1. The threshold voltage adjustment circuit works as follows: When the undervoltage protection circuit is working normally, the upper end of R4 is connected to the input of the hysteresis inverter INV2, and the outputs of INV2 and INV3 are low. At this time, R3, R3a, and R3b are connected in parallel. When the total dose increases, I...B The increase in voltage causes a decrease in the voltage across R4. At this point, INV2 outputs a high level, and INV3 outputs a low level. This is because INV2 and INV3 have different threshold voltages, so only R3b and R3 are connected in parallel. As the total dose increases, I... B Increasing the voltage across R4 will cause the voltage across R4 to decrease again. When it falls below the threshold voltage of INV3, INV3 outputs a high level, and M13 is turned off. At this time, there is no resistor connected in parallel with R3. The hysteresis voltage of the hysteresis inverter is set according to actual requirements, and the adjustment accuracy is changed by changing the values ​​of R3a, R3b, and R3.

[0022] like Figure 4 The diagram shows a triple-redundant voting selector. The voting selector only outputs an incorrect logic level when two or more undervoltage protection modules experience a single-event flip simultaneously; otherwise, it outputs a normal level.

[0023] The undervoltage threshold of this invention changes little with temperature. Q1 and R2 form a source negative feedback, stabilizing the conduction voltage of Q1; the negative feedback formed by M1 and R1 causes the current in M1 to increase as the temperature increases, leading to an increase in the voltage at the upper end of R1, which in turn reduces the current in M1. The decrease in the voltage at the upper end of R1 results in a small change in the gate voltage of M4, thus minimizing the change in the current of M4 and improving the accuracy of the undervoltage threshold.

[0024] The principle by which this invention can replace the Zener diode is as follows: Figure 1 The existing voltage regulation principle is as follows: transistor Q will only conduct when its base voltage is greater than the sum of the Zener diode's voltage regulation value and the transistor Q's threshold voltage. This invention uses a transistor and a resistor instead of a transistor and Zener diode. When the base voltage of Q1 is greater than the voltage across R2 and Q1's threshold voltage, Q1 conducts. The threshold voltage setting range is wider because the types of Zener diodes available in a given process are limited, thus limiting the voltage regulation value. This invention allows changing the value of R2 to alter the undervoltage threshold.

[0025] Under total dose radiation conditions, the undervoltage threshold of this invention remains stable. As shown in the following equation, the base voltage V3 of transistor Q1 is obtained from the following formula: ; R3 is variable, and R3a, R3b, and R3 can be connected in parallel. As the total dose increases, the transistor base current I... B The increase causes the voltage of V3 to drop. When the voltage drops to a certain level, the voltage of V3 becomes less than the voltage of transistor Q1. BE The voltage causes Q1 to stop conducting, resulting in the undervoltage output flipping to an error level, causing the chip to stop working.

[0026] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A radiation-resistant undervoltage protection circuit, characterized in that: Includes bias circuits, comparator circuits, and hysteresis / output circuits; The bias circuit consists of a PMOS transistor M1 and a resistor R1. The source of transistor M1 is connected to the input voltage VIN, and the gate and drain are connected to the upper end of resistor R1. The lower end of resistor R1 is grounded. The upper end of resistor R1 is connected to the gate of PMOS transistor M4 in the hysteresis / output circuit. The comparator circuit includes a PMOS transistor M2, an NPN transistor Q1, and resistors R3, R4, and R5. The gate input voltage Vbias of transistor M2 is connected to the source VIN, and the drain is connected to the collector of transistor Q1 and the gate of the PMOS transistor M7 in the hysteresis / output circuit. The upper end of resistor R5 is connected to VIN, and the lower end is connected in series with resistors R4 and R3. The other end of resistor R3 is grounded. The base of transistor Q1 is connected between resistors R4 and R3, and the emitter is connected to resistor R2. The other end of resistor R2 is grounded. The bias circuit outputs current to transistor M4 in the hysteresis / output circuit; the comparator circuit divides the input voltage VIN and compares it with the base voltage of transistor Q1, and transmits the comparison result to transistor M7 in the hysteresis / output circuit; the hysteresis / output circuit shapes the comparison result and enables the hysteresis function, outputting voltage UVLO.

2. The radiation-resistant undervoltage protection circuit according to claim 1, characterized in that: The hysteresis / output circuit includes PMOS transistors M3, M4, M5, M6, M7, NMOS transistors M8, M9, M10, M11, and M12, resistor R6, inverter INV1, and capacitor C1. The source of transistor M3 is connected to VIN, the drain is connected to resistor R6, and the gate is connected to the output of inverter INV1. The drain of transistor M4 is connected to the drain of transistor M8. The drain and gate of transistor M8 are connected to the gate of transistor M9. The sources of transistors M8 and M9 are both grounded. The source of transistor M5 is connected to VIN, and the gate and drain are connected to the source of transistor M6. The gate and drain of transistor M6 are connected to the gate of transistor M7. The source of transistor M7 is connected to VIN, and the drain is connected to the drain of transistor M9. One end of capacitor C1 is connected to the drain of transistor M9 and the input of inverter INV1, and the other end is grounded. The source of transistor M12 is connected to VIN, the gate input voltage Vbias is connected, and the drain is connected to the source of transistor M11. The gate of transistor M11 is connected to the gate of transistor M10 and then connected to the output of inverter INV1. The drain of transistor M11 is connected to the drain of transistor M10 and then outputs UVLO. The source of transistor M10 is grounded.

3. The radiation-resistant undervoltage protection circuit according to claim 2, characterized in that: Transistors M5, M6, and M7 are of the same type of MOSFET so that transistor M7 remains on under radiation conditions and does not turn off due to radiation. M8 and M9 are MOS transistors of the same type and size. Under radiation conditions, the threshold voltage of M8 and M9 drops by the same amount to keep the current of M9 constant. Tubes M10, M11, and M12 form an inverter for shaping; During the power-on process of VIN, transistor M3 is cut off and does not conduct. When VIN exceeds the threshold voltage, transistor M3 conducts, connecting resistors R5 and R6 in parallel, increasing the voltage drop across resistor R3. When VIN drops to a value lower than the conduction threshold, the chip shuts down.

4. The radiation-resistant undervoltage protection circuit according to claim 2, characterized in that: It also includes a threshold voltage adjustment circuit. When the total radiation dose increases, the threshold voltage adjustment circuit adjusts the voltage at the upper end of resistor R4 by reducing the resistance in parallel with resistor R3, so as to adjust the base voltage V3 of transistor Q1. 。 5. The radiation-resistant undervoltage protection circuit according to claim 4, characterized in that: The threshold voltage adjustment circuit includes a resistor R3a connected in parallel with resistor R3, a PMOS transistor M14 whose source is connected to the other end of resistor R3a, and a hysteresis inverter INV2 connected to the gate of transistor M14. The other end of inverter INV2 is connected to the lower end of resistor R6, and the drain of transistor M14 is grounded. When the undervoltage protection circuit is working normally, the upper end of resistor R4 is connected to the input terminal of hysteresis inverter INV2, and the output of INV2 is low. Resistors R3 and R3a are connected in parallel. The resistance value of resistor R4 is less than the resistance value of resistor R5. When the total dose increases, the base current I of transistor Q1... B The increase causes the voltage at the upper end of resistor R4 to decrease, the output of inverter INV2 to be high, resistor R3a is no longer connected in parallel with resistor R3, and the voltage V3 is adjusted to stabilize the undervoltage threshold of transistor Q1.

6. The radiation-resistant undervoltage protection circuit according to claim 5, characterized in that: The threshold voltage adjustment circuit also includes a resistor R3b connected in parallel with resistors R3 and R3a, a PMOS transistor M13 whose source is connected to the other end of resistor R3b, and a hysteresis inverter INV3 connected to the gate of transistor M13. The other end of inverter INV3 is also connected to the lower end of resistor R6, and the drain of transistor M13 is grounded. The threshold voltage of inverter INV2 is higher than that of inverter INV3. When the undervoltage protection circuit is working normally, the upper end of resistor R4 is connected to the input terminal of the hysteresis inverter INV2, and the outputs of INV2 and INV3 are low. Resistors R3, R3a, and R3b are connected in parallel. When the total dose increases, the base current I of transistor Q1 increases. B The increase causes the voltage across resistor R4 to decrease, the output of inverter INV2 to be high, the output of inverter INV3 to be low, and resistor R3b to be connected in parallel with resistor R3. With the increase of total dose I B The increase causes the voltage at the upper end of resistor R4 to decrease again. When it is less than the threshold voltage of inverter INV3, inverter INV3 outputs a high level, transistor M13 is turned off, and resistors R3a and R3b are not connected in parallel with resistor R3. Adjust voltage V3 to stabilize the undervoltage threshold of transistor Q1. The undervoltage threshold adjustment accuracy of transistor Q1 is changed by altering the values ​​of resistors R3a and R3.

7. The radiation-resistant undervoltage protection circuit according to claim 1, characterized in that: In a radiated environment, the threshold voltage of transistor M1 in the bias circuit decreases, causing the voltage at the upper end of resistor R1 to drop. However, the decrease in the threshold voltage of transistor M1 also increases the current in transistor M1, thereby increasing the voltage at the upper end of resistor R1, and ultimately keeping the current of transistor M4 stable.

8. The radiation-resistant undervoltage protection circuit according to claim 1, characterized in that: In the comparison circuit, when the base voltage of transistor Q1 is greater than the voltage at the upper end of resistor R2 and the threshold voltage of transistor Q1, transistor Q1 is turned on.

9. The radiation-resistant undervoltage protection circuit according to claim 1, characterized in that: Transistor Q1 and resistor R2 form source negative feedback, stabilizing the conduction voltage of transistor Q1; transistor M1 and resistor R1 form negative feedback. When the temperature increases, the current in transistor M1 increases, which leads to an increase in the voltage across resistor R1. This causes the current in transistor M1 to decrease and the voltage across resistor R1 to decrease, thus reducing the gate voltage change of transistor M4.

10. A radiation-resistant undervoltage protection circuit according to any one of claims 1 to 9, characterized in that: It also includes a voting selector, and the number of undervoltage protection circuits is 3, which output voltages UVLO1, UVLO2 and UVLO3 respectively, and UVLO1, UVLO2 and UVLO3 are all output to the voting selector; When any one of UVLO1, UVLO2, and UVLO3 causes an output error due to a single-event upset, the voting selector outputs a normal result. When at least two of UVLO1, UVLO2, and UVLO3 cause an output error due to a single-event upset at the same time, the voting selector outputs an abnormal result.

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