Silicon carbide device and ion implantation method thereof

Abstract

The application discloses a silicon carbide device and an ion implantation method thereof, and belongs to the technical field of silicon carbide devices. The ion implantation method of the silicon carbide device comprises the following steps: providing a substrate, growing a silicon layer with a certain thickness on the substrate, and forming a patterned barrier layer on the silicon layer; processing the silicon layer exposed through the barrier layer to form silicon oxide; and performing ion implantation on the area exposed through the barrier layer to form a required ion implantation area. By growing a silicon layer on the substrate first, silicon oxide can be directly formed in the ion implantation process, and it is not necessary to grow silicon oxide separately, so that the consumption and damage of the substrate surface caused by etching are reduced, the leakage of the silicon carbide power device is reduced, the wafer yield is improved, and the reliability is improved.

Description

Technical Field

[0001] This invention relates to the field of silicon carbide device technology, and in particular to a silicon carbide device and its ion implantation method. Background Technology

[0002] Silicon carbide (SiC), as a third-generation semiconductor material, has garnered widespread market attention due to its high-temperature, high-voltage, and high-power resistance characteristics. In recent years, SiC power devices have gradually become the preferred choice for high-voltage, high-frequency, and high-efficiency applications. While SiC devices have attracted considerable attention in terms of applications, their wafer yield and the reliability of subsequent devices have remained the biggest obstacles to their rapid development.

[0003] When performing ion implantation on silicon carbide devices, an auxiliary mask structure needs to be formed on the substrate. Etching the mask will damage and consume the substrate, which can easily lead to defects in the device.

[0004] It should be noted that the information disclosed in the background section of this invention is intended only to enhance the understanding of the general background of this invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a silicon carbide device and its ion implantation method to solve the problem of substrate damage.

[0006] To address the aforementioned technical problems, this invention provides an ion implantation method for silicon carbide devices, comprising:

[0007] A substrate is provided, on which a silicon layer of a certain thickness is grown, and a patterned barrier layer is formed on the silicon layer;

[0008] The silicon layer exposed through the barrier layer is processed to form silicon oxide;

[0009] Ion implantation is performed on the area exposed through the barrier layer to form the desired ion implantation region.

[0010] Preferably, the thickness of the silicon layer is 20nm to 100nm.

[0011] Preferably, forming the patterned barrier layer on the silicon layer includes: forming a barrier layer on the silicon layer, forming a photoresist pattern on the barrier layer, etching the barrier layer through the photoresist pattern, and removing the photoresist pattern.

[0012] Preferably, the barrier layer comprises a first oxide layer, a polycrystalline silicon layer, and a second oxide layer disposed sequentially from bottom to top.

[0013] Preferably, the barrier layer is removed directly after the desired ion implantation region is formed.

[0014] Preferably, the silicon oxide is removed after the barrier layer is removed.

[0015] Preferably, the ion implantation region is a JFET implantation region, and the shape of the silicon oxide matches the shape of the JFET implantation region.

[0016] The present invention also provides a silicon carbide device manufactured using the ion implantation method for silicon carbide devices described above.

[0017] In the ion implantation method for silicon carbide devices provided by this invention, a silicon layer is first grown on the substrate, and silicon oxide can be directly formed during the ion implantation process without the need for separate silicon oxide growth. This reduces the consumption and damage to the substrate surface caused by etching, thereby reducing leakage current of silicon carbide power devices, improving wafer yield, and enhancing reliability.

[0018] The silicon carbide device provided by this invention and the ion implantation method for the silicon carbide device provided by this invention belong to the same inventive concept. Therefore, the silicon carbide device provided by this invention has at least all the advantages of the ion implantation method for the silicon carbide device provided by this invention, which will not be repeated here. Attached Figure Description

[0019] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0020] Figure 1 This is a schematic diagram of a patterned barrier layer structure according to an embodiment of the present invention;

[0021] Figure 2 This is a schematic diagram of a silicon oxide structure according to an embodiment of the present invention;

[0022] Figure 3 This is a schematic diagram of the structure after removing silicon oxide according to an embodiment of the present invention;

[0023] Figure 4 This is a flowchart of an embodiment of the present invention.

[0024] In the attached image:

[0025] 1. Substrate; 2. Silicon layer; 3. Barrier layer; 4. Silicon oxide. Detailed Implementation

[0026] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.

[0027] As used in this invention, the singular forms “a,” “an,” and “the” include plural objects; the term “or” is generally used to mean “and / or”; the term “a number” is generally used to mean “at least one”; the term “at least two” is generally used to mean “two or more”; furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, features defined with "first," "second," and "third" may explicitly or implicitly include one or at least two of those features. The term "proximal" typically refers to the end closer to the operator, and the term "distal" typically refers to the end closer to the patient. "One end" and "the other end," as well as "proximal" and "distal," generally refer to two corresponding parts, including not only endpoints. The terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can be fixed connections, detachable connections, or integral connections; they can be mechanical connections or electrical connections; they can be direct connections or indirect connections through an intermediate medium; they can be internal connections between two elements or interactions between two elements. Furthermore, as used in this invention, the placement of one element on another element generally only indicates a connection, coupling, cooperation, or transmission relationship between the two elements, and the connection, coupling, cooperation, or transmission between the two elements can be direct or indirect through an intermediate element. It should not be construed as indicating or implying a spatial positional relationship between the two elements, i.e., one element can be located arbitrarily inside, outside, above, below, or to one side of another element, unless otherwise explicitly stated. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0028] Research has found that when ion implanting silicon carbide devices, an auxiliary mask structure needs to be formed on the substrate. Etching the mask will damage and consume the substrate, which can easily lead to defects in the device.

[0029] Based on this, the core idea of ​​this invention is that by first growing a silicon layer on the substrate, silicon oxide can be directly formed during the ion implantation process without the need for separate silicon oxide growth, thereby reducing the consumption and damage to the substrate surface caused by etching, thus reducing the probability of leakage current in silicon carbide power devices, improving wafer yield and reliability.

[0030] For details, please refer to Figures 1-4 This is a schematic diagram of an embodiment of the present invention. Figure 4 As shown, an ion implantation method for a silicon carbide device includes:

[0031] A substrate 1 is provided, a silicon layer 2 of a certain thickness is grown on the substrate 1, and a patterned barrier layer 3 is formed on the silicon layer 2;

[0032] The silicon layer 2 exposed through the barrier layer 3 is processed to form silicon oxide 4;

[0033] Ion implantation is performed on the area exposed through the barrier layer 3 to form the desired ion implantation region (not shown).

[0034] During ion implantation, an oxide layer can be formed directly without the need to grow silicon oxide 4 separately. This reduces the consumption and damage to the substrate 1 surface caused by etching, reduces leakage current in silicon carbide power devices, improves wafer yield and reliability, and works in conjunction with the barrier layer 3 to ensure the angle of ion implantation and the absence of defects at the bottom.

[0035] In one embodiment, substrate 1 is, for example, an epitaxial layer on a silicon carbide substrate.

[0036] For example, the thickness of the silicon layer 2 is 20nm to 100nm.

[0037] Specifically, forming the patterned barrier layer 3 on the silicon layer 2 includes: forming the barrier layer 3 on the silicon layer 2, forming a photoresist pattern on the barrier layer 3, etching the barrier layer 3 through the photoresist pattern, and removing the photoresist pattern. The barrier layer 3 includes a first oxide layer (not shown), a polysilicon layer (not shown), and a second oxide layer (not shown) arranged sequentially from bottom to top.

[0038] Understandably, by sequentially forming a first oxide layer, polysilicon, and a second oxide layer on top of the silicon layer 2, a barrier layer 3 is formed, and a certain portion of the silicon layer 2 is exposed by etching the barrier layer 3, thereby further processing of the silicon layer 2 through the barrier layer 3, forming silicon oxide 4 at least in the exposed area of ​​the barrier layer 3, thereby performing ion implantation on the substrate 1 through the silicon oxide 4.

[0039] The patterned barrier layer 3 formed on the silicon layer 2 is mainly to ensure the ion implantation angle and the absence of defects at the bottom.

[0040] Specifically, after the required ion implantation region is formed, the barrier layer 3 is removed directly. Performing the barrier layer 3 removal process after the ion implantation process is complete allows for a more efficient removal time or increased cleaning intensity, effectively reducing substrate defect formation and minimizing damage to the silicon carbide substrate surface, since the substrate 1 is protected by the silicon layer 2.

[0041] Specifically, after removing the barrier layer 3, the silicon oxide 4 is removed.

[0042] The ion implantation region is a JFET implantation region, and the shape of the silicon oxide 4 matches the shape of the JFET implantation region. After growing the barrier layer 3 on the substrate 1, the area to be retained by the barrier layer 3 is defined by a photoresist layer, and the barrier layer 3 is dry etched, such as... Figure 1 As shown, due to the material difference between silicon layer 2 and barrier layer 3, silicon layer 2 is almost not damaged when the barrier layer 3 is etched, which helps to control the injection angle of JFET more accurately.

[0043] Understandably, after forming the patterned barrier layer 3, silicon oxide 4 is formed above the desired JFET implantation region, such as... Figure 2 As shown, JFET implantation is then performed, and the thickness of silicon layer 2 is 20nm to 100nm.

[0044] Optionally, after forming the JFET implantation region, the barrier layer 3, silicon layer 2, and silicon oxide 4 are removed, and then gate oxide and polysilicon are grown. Conventional process flows are then performed, such as growing the field plate, etching to form the polysilicon gate, etching contact holes (CT), and continuing to form ohmic metal, Schottky metal, and other structures, before performing back-side processing to form the desired silicon carbide device. During ion implantation, no sacrificial oxide layer process is performed, reducing damage to the silicon carbide wafer, which helps reduce the leakage probability of the silicon carbide device and improves wafer yield and reliability.

[0045] Based on the same technical concept, this disclosure also provides a silicon carbide device manufactured using the ion implantation method for silicon carbide devices described above.

[0046] In the silicon carbide device and its ion implantation method provided by the present invention, an oxide layer can be directly formed during the ion implantation process without the need to grow silicon oxide 4 separately. This reduces the consumption and damage to the surface of the substrate 1 caused by etching, reduces the probability of leakage current in silicon carbide power devices, improves wafer yield and reliability, and works in conjunction with the barrier layer 3 to ensure the angle of ion implantation and the absence of defects at the bottom.

[0047] The above description is only a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the present invention.

Claims

1. An ion implantation method for a silicon carbide device, characterized in that, include: A substrate is provided, on which a silicon layer of a certain thickness is grown, and a patterned barrier layer is formed on the silicon layer; The silicon layer exposed through the barrier layer is processed to form silicon oxide; Ion implantation is performed on the area exposed through the barrier layer to form the desired ion implantation region.

2. The ion implantation method for silicon carbide devices according to claim 1, characterized in that, The thickness of the silicon layer is 20nm to 100nm.

3. The ion implantation method for silicon carbide devices according to claim 1, characterized in that, Forming the patterned barrier layer on the silicon layer includes: forming a barrier layer on the silicon layer, forming a photoresist pattern on the barrier layer, etching the barrier layer through the photoresist pattern, and removing the photoresist pattern.

4. The ion implantation method for silicon carbide devices according to claim 1, characterized in that, The barrier layer comprises a first oxide layer, a polycrystalline silicon layer, and a second oxide layer arranged sequentially from bottom to top.

5. The ion implantation method for silicon carbide devices according to claim 1, characterized in that, After the desired ion implantation region is formed, the barrier layer is removed directly.

6. The ion implantation method for silicon carbide devices according to claim 1, characterized in that, After removing the barrier layer, the silicon oxide is removed.

7. The ion implantation method for silicon carbide devices according to claim 1, characterized in that, The ion implantation region is a JFET implantation region, and the shape of the silicon oxide matches the shape of the JFET implantation region.

8. A silicon carbide device, characterized in that, The silicon carbide device is manufactured using the ion implantation method as described in any one of claims 1-7.

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