High speed full wave rectifier circuit using mosfet

Abstract

In an embodiment of the invention, a full-wave rectifier circuit includes an EC resonance circuit including an inductor and a first capacitor in parallel, a first end of which is connected to a power supply voltage VDD; a first transistor and a second transistor, the drains of which are connected to a second end of the EC resonance circuit; a third transistor, the source of which is connected to a source of the first transistor and a first current source, the gate of which is connected to a gate of the second transistor and through a first resistor to a bias signal VBN and through a second capacitor to an input signal VINN, and the drain of which is connected to VDD; and a fourth transistor, the source of which is connected to a source of the second transistor and a second current source, the gate of which is connected to a gate of the first transistor and through a second resistor to the bias signal VBN and through a third capacitor to the input signal VINP, and the drain of which is connected to VDD.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 578236, filed August 23, 2023, entitled “Systems and Methods for CurrentReuse Rectifiers and Current Steering Rectifiers,” the disclosure of which is incorporated herein by reference. Technical Field

[0003] This invention relates to rectifier circuits, and more specifically, to full-wave rectifiers utilizing transistors. Background Technology

[0004] A rectifier is a circuit that converts alternating current (AC) signals into direct current (DC) signals or generates an input AC signal that is an even multiple (2×, 4×, 6×, 8×, etc.). There are two types of rectifiers: half-wave rectifiers and full-wave rectifiers. Half-wave rectifiers are generally inefficient and only utilize half of the input AC cycle, blocking the other half. Full-wave rectifiers utilize both the positive and negative half-cycles of the AC input to produce the output, making them more efficient.

[0005] Some common architectures used to implement full-wave rectifiers include center-tapped rectifiers and bridge rectifiers. Center-tapped rectifiers (such as...) Figure 1 The rectifier shown in the diagram utilizes a center-tapped transformer and two diodes. During each half-cycle of the AC input, one diode is on while the other is reverse-biased. Full-wave bridge rectifiers (such as...) Figure 2 The full-wave bridge rectifier shown uses four or more diodes to form a closed-loop bridge structure with a resistive load. During each half-cycle of the AC input, two diodes are in series and conduct, while the other two are reverse biased. A smoothing capacitor connected in parallel with the load across the output improves the average DC output while reducing AC variation.

[0006] Full-wave rectifiers can also be implemented using transistors. Figure 3An example is shown. One transistor, M0, is driven by a positive input and generates current when the input is above a threshold, while another transistor, M1, is driven by a negative input and generates current when the negative input is above a threshold. Typically, transistors are either all NMOS (N-type Metal-Oxide-Semiconductor) or all PMOS (p-channel Metal-Oxide-Semiconductor), not a mixture of both. A spiral inductor L0 and a capacitor C2 are connected in parallel between the transistor's output voutp and ground. The output is single-ended, and an additional stage (active or passive commutator) will be needed to convert the single-ended output to differential for most high-frequency applications. Summary of the Invention

[0007] In some embodiments of the present invention, a full-wave rectifier circuit includes: an LC resonant circuit comprising an inductor and a first capacitor connected in parallel, the first terminal of which is connected to a power supply voltage VDD; a first transistor and a second transistor, the drain of which is connected to a second terminal of the LC resonant circuit; a third transistor, the source of which is connected to the source of the first transistor and a first current source, the gate of which is connected to the gate of the second transistor and connected to a bias signal VBN through a first resistor and connected to an input signal VINN through a second capacitor, and the drain of which is connected to VDD; and a fourth transistor, the source of which is connected to the source of the second transistor and a second current source, the gate of which is connected to the gate of the first transistor and connected to the bias signal VBN through a second resistor and connected to an input signal VINP through a third capacitor, and the drain of which is connected to VDD.

[0008] In other embodiments of the invention, the transistor is a MOSFET.

[0009] In another embodiment of the invention, the transistor is an NMOS transistor.

[0010] In further embodiments of the invention, the transistor is a PMOS transistor.

[0011] In other embodiments of the invention, the first transistor and the second transistor have the same value.

[0012] In other embodiments of the invention, the third transistor and the fourth transistor have the same value.

[0013] In other embodiments of the invention, the third and fourth transistors have values ​​larger than those of the first and second transistors.

[0014] In other embodiments of the invention, the values ​​of the third and fourth transistors are at least four times the values ​​of the first and second transistors.

[0015] In further embodiments of the invention, the third and fourth transistors have values ​​larger than those of the first and second transistors.

[0016] Other embodiments of the invention include the output terminal at the second end of the LC resonant circuit.

[0017] In other embodiments of the invention, a balanced-unbalanced tuned load replaces the inductor and provides a differential output.

[0018] In other embodiments of the present invention, a full-wave rectifier circuit includes: an LC resonant circuit comprising an inductor and a first capacitor connected in parallel; a first PMOS transistor, wherein the drain of the first PMOS transistor is connected to a first terminal of the LC resonant circuit, the source of the first PMOS transistor is connected to a power supply signal VDD, and the gate of the first PMOS transistor is connected to an input signal VINP through a second capacitor and to a bias signal VBP through a first resistor; a second PMOS transistor, wherein the drain of the second PMOS transistor is connected to the first terminal of the LC resonant circuit, the source of the second PMOS transistor is connected to the power supply signal VDD, and the gate of the second PMOS transistor is connected to an input signal VINN through a third capacitor and to the bias signal VBP through a second resistor; and a first NMOS transistor, wherein the first NMOS transistor... The drain of the first NMOS transistor is connected to the second terminal of the LC resonant circuit. The source of the first NMOS transistor is connected to ground, and the gate of the first NMOS transistor is connected to the input signal VINP through a fourth capacitor and to the bias signal VBN through a third resistor. The second NMOS transistor has its drain connected to the second terminal of the LC resonant circuit, its source connected to ground, and its gate connected to the input signal VINN through a fifth capacitor and to the bias signal VBN through a fourth resistor. An operational amplifier has a non-inverting input terminal connected to the drains of the first and second PMOS transistors through a fifth resistor and to the drains of the first and second NMOS transistors through a sixth resistor. The output terminal of the operational amplifier provides the bias signal VBP.

[0019] In another embodiment of the invention, the values ​​of the first transistor and the second transistor are the same.

[0020] In further embodiments of the invention, the values ​​of the third transistor and the fourth transistor are the same.

[0021] In other embodiments of the invention, the passive transformer has a first input terminal connected to a first terminal of an LC resonant circuit and a second input terminal connected to a second terminal of the LC resonant circuit.

[0022] Further embodiments of the present invention include an active differential amplifier having a first input terminal connected to a first terminal of an LC resonant circuit and a second input terminal connected to a second terminal of the LC resonant circuit.

[0023] In other embodiments of the invention, the operational amplifier has an inverting input connected to a voltage source providing 0.5 × VDD.

[0024] In another embodiment of the invention, the value of inductor L is selected for the circuit so as to produce a stronger output at an even multiple of the frequencies of the input signals VINP and VINN.

[0025] Further embodiments of the invention also include filters configured to allow even multiples of the frequencies of the input signals VINP and VINN to pass through. Attached Figure Description

[0026] Figure 1 The diagram shows the circuit of a center-tapped full-wave rectifier.

[0027] Figure 2 The diagram shows the circuit diagram of a bridge full-wave rectifier.

[0028] Figure 3 The diagram illustrates a circuit of a transistor-based full-wave rectifier.

[0029] Figure 4 This is a circuit diagram illustrating a current multiplexing full-wave rectifier according to an embodiment of the present invention.

[0030] Figure 5 This is a circuit diagram illustrating a current-multiplexed full-wave rectifier and a subsequent passive transformer according to an embodiment of the present invention.

[0031] Figure 6 The diagram illustrates a current-multiplexed full-wave rectifier and a subsequent active differential amplifier according to an embodiment of the present invention.

[0032] Figure 7 This is a graph illustrating the change of current over time in a component of a current-multiplexing full-wave rectifier according to an embodiment of the present invention.

[0033] Figure 8 It is a graph illustrating the peak intensity of the frequency output of a current-multiplexed full-wave rectifier according to an embodiment of the present invention.

[0034] Figure 9 This is a circuit diagram illustrating a current-directing full-wave rectifier according to an embodiment of the present invention.

[0035] Figure 10This is a circuit diagram illustrating a current-directing full-wave rectifier of a load tuned by a PMOS and LC resonant circuit according to an embodiment of the present invention.

[0036] Figure 11 This is a circuit diagram illustrating a current-directing full-wave rectifier utilizing a PMOS and a balancer (balanced-unbalanced) tuned load according to an embodiment of the present invention.

[0037] Figure 12 This is a circuit diagram illustrating a current-directing full-wave rectifier that utilizes an NMOS and a balancing load tuned according to an embodiment of the present invention.

[0038] Figure 13 This is a graph illustrating the voltage change over time of a component of a current-multiplexed full-wave rectifier according to an embodiment of the present invention.

[0039] Figure 14 It is a graph illustrating the peak intensity of the frequency output of a current-directed full-wave rectifier according to an embodiment of the present invention.

[0040] Figure 15 This is a graph illustrating the peak intensity (dB) of a signal across different temperatures in a current-directed full-wave rectifier according to an embodiment of the present invention.

[0041] Figure 16 It is a graph illustrating the peak intensity of the frequency output of a current-directed full-wave rectifier according to an embodiment of the present invention. Detailed Implementation

[0042] Turning now to the accompanying drawings, a high-speed full-wave rectifier circuit utilizing MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) is disclosed. As discussed above, full-wave rectifiers offer many advantages over half-wave rectifiers and are used in many common electronic applications, such as those involving radio signals, motor control, power supplies, and battery charging. Current full-wave rectifiers are limited in their operation at high gigahertz (GHz) speeds.

[0043] Various embodiments of the present invention include two types of full rectifiers utilizing MOSFET transistors: current multiplexing rectifiers and current steering rectifiers.

[0044] Current multiplexing rectifier

[0045] In some embodiments of the invention, the current-multiplexed rectifier utilizes both PMOS and NMOS transistors for rectification. Current from the PMOS resonant circuit is multiplexed using the NMOS rectifier resonant circuit. An operational amplifier, acting as a common-mode feedback amplifier, can be used to balance the common-mode of the PMOS and NMOS resonant circuits. In this architecture, the same output swing as a conventional rectifier can be achieved using half the current. Furthermore, compared to prior art rectifiers (… Figure 3 Unlike other implementations, the current multiplexing implementation can automatically generate differential outputs.

[0046] Figure 4 The figure illustrates a circuit diagram of a current-multiplexing rectifier 400 according to several embodiments of the present invention. Using common-mode feedback, a pair of PMOS transistors M0 402 and M1 404 can be stacked with a pair of NMOS transistors M2 406 and M3 408. The drains of each pair of transistors are connected to each other—M0 402 and M1 404 are connected to the output terminal voutp, and M2 406 and M3 408 are connected to the output terminal voutn. The output terminal voutp of the pair of transistors M0 402 and M1 404 is connected to the output terminal voutn of another pair of transistors M2 406 and M3 408 via an LC resonant circuit. The LC resonant circuit includes an inductor 410 and a capacitor C2 412 connected in parallel. The drains of M0 402 and M1 404 are connected to the first terminal of the LC resonant circuit. The drains of M2 406 and M3 408 are connected to the second terminal of the LC resonant circuit. In some embodiments of the invention, differential inductors with center taps, denoted by L0 and L1, are used, wherein magnetic flux flows at 180 degrees to each other.

[0047] The sources of M0 402 and M1 404 are connected to the power supply voltage VDD. The sources of M2 406 and M3 408 are connected to ground. The gate of M0 402 is connected to the input signal VINP through capacitor C0 414 and to the bias signal VBP through resistor R0 416. The gate of M1 404 is connected to the input signal VINN through capacitor C1 418 and to the bias signal VBP through resistor R1 420. The gate of M2 406 is connected to the input signal VINP through capacitor C5 422 and to the bias signal VBN through resistor R3 424. The gate of M3 408 is connected to the input signal VINN through capacitor C3 428 and to the bias signal VBN through resistor R2 426.

[0048] The resistor and capacitor pairs connected to the gate of each transistor (R0 and C0 connected to M0, R1 and C1 connected to M1, R3 and C5 connected to M2, and R2 and C3 connected to M3) can serve as a bias circuit. Those skilled in the art will recognize that, according to embodiments of the invention, components other than these specific resistors and capacitors and other connections can be utilized.

[0049] In some embodiments of the present invention, transistors M0 and M1 are PMOS transistors. In further embodiments, the values ​​of M0 and M1 are matched with each other. In some embodiments of the present invention, transistors M2 and M3 are NMOS transistors. In further embodiments, the values ​​of M2 and M3 are matched with each other.

[0050] Operational amplifier 430 provides common-mode feedback by introducing a common-mode voltage (the average of Voutp and Voutn, averaged through resistors R4 and R5) to its non-inverting input. Its inverting input achieves the desired common-mode voltage, set to 0.5 × Vdd. The output of operational amplifier 430 is VBP supplied to the above circuit. The bias voltage VBP can be maintained by an effect known as DC bias or AC coupling. Those skilled in the art will recognize that other circuit systems for common-mode feedback can be utilized according to embodiments of the invention.

[0051] In some embodiments of the present invention, VINP and VINN are a first differential input signal and a second differential input signal, and voutp and voutn are a first differential output signal and a second differential output signal.

[0052] In some embodiments of the invention, the output of the current multiplexed rectifier is generated at an even multiple of the input frequency, with the strongest being twice the input frequency. Changing the value of the inductor L can produce a stronger output at different multiples, and this multiple can be obtained using a filter. The frequency can be determined by… To determine.

[0053] Figure 5 The illustration shows a current-multiplexed full-wave rectifier and a subsequent passive transformer according to an embodiment of the present invention.

[0054] Figure 6 The illustration shows a current-multiplexed full-wave rectifier and a subsequent active differential amplifier according to an embodiment of the present invention.

[0055] Figure 7 This is a graph illustrating the change of current over time in a component of a current-multiplexing full-wave rectifier according to an embodiment of the present invention.

[0056] Figure 8This is a graph illustrating the peak intensity of the frequency output of the current-multiplexed full-wave rectifier according to an embodiment of the present invention. The strongest frequency is 3.6 GHz, which is twice the input frequency.

[0057] While a specific circuit for a current-multiplexing rectifier has been described above, those skilled in the art will recognize that any circuit system of a wide variety of circuit systems can be utilized according to embodiments of the invention. In view of the above description, those skilled in the art can select appropriate values ​​for components for the desired output.

[0058] Current redirection rectifier

[0059] The output voltage swing in conventional rectifiers varies significantly with PVT (process, voltage, temperature). Furthermore, leakage in modern technology leads to inefficiency. Switches can remain on even when the input voltage is below a threshold, requiring high current to achieve a good output swing. A significant amount of power is often consumed to achieve low noise. The total power consumed in the circuit depends on the input swing—the higher the input signal, the greater the current consumption. Operation near the subthreshold limits the operating speed of MOS devices, making designs more difficult to implement at microwave frequencies (greater than 25 GHz).

[0060] In another embodiment of the invention, the current-straightening rectifier overcomes the aforementioned shortcomings and enables high-speed full-wave rectification without the use of common-mode feedback in current-multiplexing designs. The advantages of the current-straightening design include tighter control, lower noise, and the ability to achieve higher speeds compared to conventional rectifiers. Current-straightening rectifiers according to embodiments of the invention can achieve speeds up to 100 GHz or higher, which is difficult to achieve with conventional rectifiers.

[0061] Figure 9 The diagram illustrates a current-directing rectifier circuit according to some embodiments of the present invention. The current-directing rectifier 900 utilizes four transistors of the same type. In the illustrated embodiment, NMOS transistors are used. In other embodiments, other types of transistors, such as PMOS, may be used, as long as they are of the same type.

[0062] The current-directing rectifier 900 includes an LC resonant circuit with an inductor L4 902 and a capacitor C6 904 connected in parallel. The first terminal of the LC resonant circuit is connected to the drains of NMOS transistors M6 910 906 and M7 912. The second terminal of the LC resonant circuit is connected to the power supply voltage VDD. The sources of transistors M6 910 and M8 906 are connected together to current source I39 914. The sources of transistors M7 912 and M9 908 are connected together to current source I40 916. The gate of transistor M7 912 is connected to the gate of transistor M8 906, and the gate of transistor M8 906 is in turn connected to the bias signal VBN via resistor R2 918 and to the input signal VINN via capacitor C3 920. The gate of transistor M6 is connected to the gate of transistor M9, which in turn is connected to the bias signal VBN via resistor R3 922 and to the input signal VINP via capacitor C5 924. The drains of transistors M8 906 and M9 908 are connected to the power supply voltage VDD.

[0063] In some embodiments of the present invention, VINP and VINN are the first differential input signal and the second differential input signal. In some embodiments of the present invention, the vout output signal is taken from the first terminal of the LC resonant circuit.

[0064] Transistors M6 910 and M7 912 act as current-directing switches, while all transistors are DC-biased to saturation. This allows the circuit to operate at significantly higher frequencies. Current consumption is independent of the input voltage signal and is determined by I39 914 and I40 916 set via reference current sources. In some embodiments of the invention, the values ​​of the transistors in the discharge paths of M8 906 and M9 908 are larger than those of transistors M6 910 and M7 912, in a ratio of N:1 (e.g., 4:1 to 10:1), which can be used to reduce the conduction angle. Those skilled in the art can determine and use different ratios depending on design trade-offs such as speed, efficiency, etc. In several embodiments, transistors M8 906 and M9 908 should have the same value, while transistors M6 910 and M7 912 should have the same value.

[0065] Figure 10 This is a circuit diagram illustrating a current-directing full-wave rectifier of a load tuned by a PMOS and LC resonant circuit according to an embodiment of the present invention.

[0066] Figure 11 The illustration shows a current-directing full-wave rectifier utilizing a PMOS and a switching load tuned according to an embodiment of the present invention. This circuit can be used to generate differential signals vop / von.

[0067] Figure 12 The illustration shows a current-directing full-wave rectifier utilizing an NMOS and a switching load tuned according to an embodiment of the present invention. This circuit can be used to generate differential signals vop / von.

[0068] Figure 13 This is a graph illustrating the voltage change over time of a component of a current-multiplexed full-wave rectifier according to an embodiment of the present invention.

[0069] Figure 14 This is a graph illustrating the peak intensity of the frequency at which the current is directed to the output of the full-wave rectifier according to an embodiment of the present invention. The significant frequency is 3.6 GHz, which is twice the input frequency of 1.8 GHz.

[0070] Figure 15 It is a graph illustrating the peak strength (dB) of the signal across different temperatures in a current-directed full-wave rectifier.

[0071] Figure 16 This is a graph illustrating the peak intensity of the frequency of the current-directed full-wave rectifier output according to an embodiment of the present invention. The input provided to the rectifier is 43.2 GHz, and the main output is 86.4 GHz.

[0072] While a specific circuit for a current-directing rectifier has been described above, those skilled in the art will recognize that any circuit system of a wide variety of circuit systems can be utilized according to embodiments of the invention. In view of the above description, those skilled in the art can select appropriate values ​​for the components for the desired output.

[0073] While the above description contains some specific details, these should not be construed as limiting the scope of the invention, but merely as illustrations of some currently preferred embodiments of the invention. Various other embodiments are possible within its scope. Therefore, the scope of the invention should not be determined by the illustrated embodiments, but by the appended claims and their equivalents.

Claims

1. A full-wave rectifier circuit, comprising: An LC resonant circuit, comprising an inductor and a first capacitor connected in parallel, wherein the first terminal of the LC resonant circuit is connected to a power supply voltage VDD; A first transistor, wherein the drain of the first transistor is connected to the second terminal of the LC resonant circuit; The second transistor, wherein the drain of the second transistor is connected to the second terminal of the LC resonant circuit; A third transistor, wherein the source of the third transistor is connected to the source of the first transistor and a first current source, the gate of the third transistor is connected to the gate of the second transistor and is connected to the bias signal VBN through a first resistor and to the input signal VINN through a second capacitor, and the drain of the third transistor is connected to the power supply voltage VDD. as well as A fourth transistor, wherein the source of the fourth transistor is connected to the source of the second transistor and a second current source, the gate of the fourth transistor is connected to the gate of the first transistor and connected to the bias signal VBN through the second resistor and connected to the input signal VINP through the third capacitor, and the drain of the fourth transistor is connected to the power supply voltage VDD.

2. The full-wave rectifier circuit according to claim 1, wherein the transistor is a MOSFET.

3. The full-wave rectifier circuit according to claim 2, wherein the transistor is an NMOS transistor.

4. The full-wave rectifier circuit according to claim 2, wherein the transistor is a PMOS transistor.

5. The full-wave rectifier circuit according to claim 1, wherein the first transistor and the second transistor have the same value.

6. The full-wave rectifier circuit according to claim 1, wherein the third transistor and the fourth transistor have the same value.

7. The full-wave rectifier circuit according to claim 1, wherein, The third transistor and the fourth transistor have values ​​larger than those of the first transistor and the second transistor.

8. The full-wave rectifier circuit of claim 6, wherein the values ​​of the third transistor and the fourth transistor are at least four times the values ​​of the first transistor and the second transistor.

9. The full-wave rectifier circuit according to claim 1, wherein, The third transistor and the fourth transistor have values ​​larger than those of the first transistor and the second transistor.

10. The full-wave rectifier circuit according to claim 1, further comprising an output terminal at the second terminal of the LC resonant circuit.

11. The full-wave rectifier circuit according to claim 1, wherein, Replace the inductor with a balanced-unbalanced tuned load and provide a differential output.

12. A full-wave rectifier circuit, comprising: An LC resonant circuit, comprising an inductor and a first capacitor connected in parallel; A first PMOS transistor, wherein the drain of the first PMOS transistor is connected to the first terminal of the LC resonant circuit, the source of the first PMOS transistor is connected to the power supply signal VDD, and the gate of the first PMOS transistor is connected to the input signal VINP through a second capacitor and to the bias signal VBP through a first resistor. The second PMOS transistor has its drain connected to the first terminal of the LC resonant circuit, its source connected to the power supply signal VDD, and its gate connected to the input signal VINN via a third capacitor and to the bias signal VBP via a second resistor. A first NMOS transistor, wherein the drain of the first NMOS transistor is connected to the second terminal of the LC resonant circuit, the source of the first NMOS transistor is connected to ground, and the gate of the first NMOS transistor is connected to the input signal VINP through a fourth capacitor and to the bias signal VBN through a third resistor; The second NMOS transistor has its drain connected to the second terminal of the LC resonant circuit, its source connected to ground, and its gate connected to the input signal VINN via a fifth capacitor and to the bias signal VBN via a fourth resistor. as well as An operational amplifier, wherein the non-inverting input terminal of the operational amplifier is connected to the drain of the first PMOS transistor and the second PMOS transistor via a fifth resistor and to the drain of the first NMOS transistor and the second NMOS transistor via a sixth resistor, and the output terminal of the operational amplifier provides a bias signal VBP.

13. The full-wave rectifier circuit of claim 12, wherein the first transistor and the second transistor have the same value.

14. The full-wave rectifier circuit of claim 12, wherein the third transistor and the fourth transistor have the same value.

15. The full-wave rectifier circuit according to claim 12 further includes a passive transformer having a first input terminal connected to the first terminal of the LC resonant circuit and a second input terminal connected to the second terminal of the LC resonant circuit.

16. The full-wave rectifier circuit according to claim 12 further includes an active differential amplifier having a first input terminal connected to the first terminal of the LC resonant circuit and a second input terminal connected to the second terminal of the LC resonant circuit.

17. The full-wave rectifier circuit according to claim 12, wherein, The operational amplifier has an inverting input connected to a voltage source providing 0.5 × VDD.

18. The full-wave rectifier circuit according to claim 12, wherein, The value of the inductor L is selected for the circuit to produce a stronger output at an even multiple of the frequencies of the input signals VINP and VINN.

19. The full-wave rectifier circuit of claim 12, further comprising a filter configured to allow even multiples of the frequencies of the input signals VINP and VINN to pass through.

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