Awareness of uplink synchronization transmission delay

Abstract

Various aspects of the present disclosure relate to awareness of uplink synchronization transmission delays. In one aspect, a UE receives an indication from a base station indicating that delay information for at least one synchronization transmission set is to be reported. Each of the at least one synchronization transmission set includes packets from a plurality of QoS flows. The UE then determines one or more of the at least one synchronization transmission set. In turn, the UE triggers reporting of delay information for the one or more synchronization transmission sets based on the first indication.

Description

Technical Field

[0001] This disclosure relates to wireless communications, and more particularly to user equipment (UE), base stations, and methods for supporting awareness of uplink (UL) synchronization transmission delays. Background Technology

[0002] A wireless communication system may include one or more network communication devices (such as base stations), which may also be referred to as eNodeB (eNB), next-generation NodeB (gNB), or other suitable terms. Each network communication device (such as a base station) may support wireless communication with one or more user communication devices, which may also be referred to as UE, or other suitable terms. The wireless communication system may support wireless communication with one or more user communication devices by utilizing the resources of the wireless communication system (e.g., time resources (e.g., symbols, time slots, subframes, frames, etc.) or frequency resources (e.g., subcarriers, carriers)). Furthermore, the wireless communication system may support wireless communication across a variety of radio access technologies, including third-generation (3G) radio access technology, fourth-generation (4G) radio access technology, fifth-generation (5G) radio access technology, and other suitable radio access technologies beyond 5G (e.g., sixth-generation (6G)).

[0003] Haptic and multimodal communication services can be applied across a wide range of fields, including industry, robotics and telepresence, virtual reality, augmented reality, healthcare, road transportation, serious gaming, education, culture, and smart grids. These services enable applications that can more effectively communicate information from more than one source input and / or output to more than one destination. Inputs and outputs can be different modalities, which may include at least one of the following: video / audio media; information about the environment received by sensors, such as brightness, temperature, humidity, etc.; or tactile (or sensory) data, which can be sensations upon touching a surface (such as pressure, texture, vibration, temperature), or kinesthetic sensations (such as gravity, tension, position awareness).

[0004] For immersive multimodal virtual reality (VR) applications, synchronization between different media components is crucial to avoid negative impacts on the user experience (i.e., viewers detect a lack of synchronization), especially when the synchronization threshold between two or more modalities is less than the application's latency key performance indicator (KPI). Summary of the Invention

[0005] This disclosure relates to a UE, base station, and method that supports awareness of UL synchronization transmission delay. Through this UE, base station, and method, the base station can optimize radio resource utilization for multimodal Quality of Service (QoS) streams, ensuring the synchronization transmission requirements of UL multimodal transmissions are guaranteed.

[0006] Some implementations of a UE described herein may include a processor and a transceiver coupled to the processor, wherein the processor is configured to: receive a first indication from a base station via the transceiver, the first indication indicating that: delay information of at least one synchronization transmission set will be reported, wherein each synchronization transmission set in the at least one synchronization transmission set includes packets from multiple QoS flows; determine one or more synchronization transmission sets in the at least one synchronization transmission set; and trigger the reporting of delay information for the one or more synchronization transmission sets based on the first indication.

[0007] In some implementations, the processor is configured to trigger a report of first delay information for a first synchronous transmission set by: starting a timer based on determining one of the following: the initial packet in the first synchronous transmission set is sent or successfully sent; all packets in the packet set of the first synchronous transmission set are sent or successfully sent; or all packets from a QoS stream in a QoS stream are sent or successfully sent; and triggering a report of first delay information for the first synchronous transmission set based on determining that the remaining time of the timer is less than or equal to a threshold for the remaining time of the timer or that the timer has expired.

[0008] In some implementations, the first delay information for the first synchronization transmission set includes at least one of the following: a first remaining time of a timer when the first delay information for the first synchronization transmission set is sent to a base station; a second remaining time of a timer when a report of the first delay information is triggered; a first data amount of remaining data packets in the first synchronization transmission set when the first delay information for the first synchronization transmission set is sent to a base station; or a second data amount of remaining data packets in the first synchronization transmission set when a report of the first delay information is triggered.

[0009] In some implementations, the processor is also configured to receive, via a transceiver, a configuration for receiving a report of first delay information for a first synchronous transmission set from the base station, the configuration including a timer value and a threshold for the remaining time of the timer.

[0010] In some implementations, the first synchronous transmission set includes data packets from a first QoS stream and a second QoS stream. In such an implementation, the processor is configured to start one of a first timer and a second timer based on either the arrival order of data packets from the first QoS stream and the second QoS stream, or the transmission order of data packets from the first QoS stream and the second QoS stream.

[0011] In some implementations, the processor is configured to start one of the first and second timers by starting a first timer based on determining one of the following: the initial data packet comes from the first QoS stream; all data packets in the data packet set of the first synchronization transmission set come from the first QoS stream; or all data packets from the first QoS stream are sent or are successfully sent.

[0012] In some implementations, the processor is configured to start one of the first and second timers by determining that the second timer is started based on: the initial data packet originating from the second QoS stream; all data packets in the data packet set of the first synchronization transmission set originating from the second QoS stream; or all data packets from the second QoS stream being sent or successfully sent.

[0013] In some implementations, the processor is also configured to receive, via a transceiver, a report from the base station for first delay information for a first synchronization transmission set. This configuration includes a first value for a first timer, a first threshold for the remaining time of the first timer, a second value for a second timer, and a second threshold for the remaining time of the second timer.

[0014] In some implementations, the processor is also configured to send a second indication to the base station via a transceiver, the second indication indicating whether a data packet from the first QoS stream arrives or is sent before a data packet from the second QoS stream, or whether a data packet from the second QoS stream arrives or is sent before a data packet from the first QoS stream.

[0015] In some implementations, the second indication includes one of the following: a first identifier (ID) or first index of a first QoS flow, a second ID or second index of a second QoS flow, a third ID or third index of a first timer, or a fourth ID or fourth index of a second timer.

[0016] In some implementations, the processor is also configured to send a first Media Access Control (MAC) control element (CE) to the base station via a transceiver, the first MAC CE including delay information for one or more synchronous transport sets.

[0017] In some implementations, the first MAC CE also includes at least one of the following: synchronization association information for one or more synchronization transport sets, or the sequence number of each synchronization transport set in one or more synchronization transport sets.

[0018] In some implementations, the synchronization association information includes at least one of the following: a synchronization association identifier (ID) for a corresponding synchronization transport set in one or more synchronization transport sets, an ID of at least one data radio bearer (DRB) associated with a QoS flow, an ID of at least one logical channel (LCH) associated with a QoS flow, or an ID of the QoS flow.

[0019] In some implementations, the processor is also configured to receive, via a transceiver, a report from the base station for delay information for at least one set of synchronized transmissions, the configuration including synchronization association information.

[0020] In some implementations, the processor is configured to send a first MAC CE by: determining that the first MAC CE has a first priority higher than the second MAC CE and the third MAC CE has a third priority. In such an implementation, the second MAC CE includes a latency status report, and the third MAC CE includes a cache status report.

[0021] In some implementations, the processor is also configured to: determine the highest priority among at least one priority of at least one logical channel, for which delay information is provided; and determine the highest priority as the first priority of the first MAC CE.

[0022] In some implementations, the processor is configured to send the first MAC CE by prioritizing the transmission of the first MAC CE over the second and third MAC CEs. In such an implementation, the second MAC CE includes a latency status report, and the third MAC CE includes a cache status report.

[0023] In some implementations, the processor is configured to trigger a report of first delay information for a first synchronization transport set in at least one synchronization transport set based on one of the following: the initial data packet in the first synchronization transport set is sent or successfully sent; all data packets in the data packet set of the first synchronization transport set are sent or successfully sent; or all data packets from a QoS stream in a QoS stream are sent or successfully sent.

[0024] In some implementations, the first delay information for the first synchronization transmission set includes at least one of the following: a first remaining time for the synchronization threshold of a QoS flow with multiple modalities when the first delay information for the first synchronization transmission set is sent to the base station; a second remaining time for the synchronization threshold of a QoS flow with multiple modalities when a report of the first delay information is triggered; a first data amount of remaining data packets in the first synchronization transmission set when the first delay information for the first synchronization transmission set is sent to the base station; or a second data amount of remaining data packets in the first synchronization transmission set when a report of the first delay information is triggered.

[0025] In some implementations, the QoS flow includes a first QoS flow and a second QoS flow; packets from the first QoS flow arrive or are sent before packets from the second QoS flow; and the remaining time of the synchronization threshold includes: a first remaining time for a first synchronization threshold for a QoS flow with multiple modalities.

[0026] In some implementations, the QoS flow includes a first QoS flow and a second QoS flow; packets from the second QoS flow arrive or are sent before packets from the first QoS flow; and the remaining time of the synchronization threshold includes a second remaining time for a second synchronization threshold with multiple modalities.

[0027] In some implementations, one or more synchronization transport sets include at least a first synchronization transport set and a second synchronization transport set. In such an implementation, the processor is configured to trigger a report of delay information for one or more synchronization transport sets by: triggering a report of first delay information for the first synchronization transport set; and triggering a report of second delay information for the second synchronization transport set.

[0028] In some implementations, the first synchronization transport set includes data packets from a first plurality of QoS flows associated with a first logical channel (LCH), and the second synchronization transport set includes data packets from a second plurality of QoS flows associated with a second LCH. In such implementations, the processor is also configured to include first delay information and second delay information in the first MAC CE in descending order of priority of the first LCH and the second LCH.

[0029] In some implementations, the first delay information includes a first remaining time for data packets in a first synchronized transmission set, and the second delay information includes a second remaining time for data packets in a second synchronized transmission set. In such implementations, the processor is further configured to include the first delay information and the second delay information in a first MAC CE in ascending order of the first remaining time and the second remaining time.

[0030] Some implementations of a base station described herein may include: a processor and a transceiver coupled to the processor, wherein the processor is configured to: send a first indication to a UE via the transceiver, the first indication indicating that: delay information for at least one synchronization transmission set will be reported, wherein each synchronization transmission set in the at least one synchronization transmission set includes data packets from multiple QoS streams; and receive delay information from the UE via the transceiver for one or more synchronization transmission sets in the at least one synchronization transmission set.

[0031] In some implementations, the delay information includes: first delay information for a first synchronous transmission set, the first delay information including at least one of the following: a first remaining time of a timer when the first delay information for the first synchronous transmission set is sent to a base station; a second remaining time of a timer when a report of the first delay information is triggered; a first data amount of remaining data packets in the first synchronous transmission set when the first delay information for the first synchronous transmission set is sent to a base station; or a second data amount of remaining data packets in the first synchronous transmission set when a report of the first delay information is triggered.

[0032] In some implementations, the processor is also configured to send a report to the UE via a transceiver for a first delay information for a first synchronous transmission set, the configuration including a timer value and a threshold for the remaining time of the timer.

[0033] In some implementations, the processor is also configured to send a report to the UE via a transceiver for a first delay information for a first synchronization transmission set. This configuration includes a first value for a first timer, a first threshold for the remaining time of the first timer, a second value for a second timer, and a second threshold for the remaining time of the second timer.

[0034] In some implementations, the first synchronous transmission set includes data packets from a first QoS stream and a second QoS stream. In such an implementation, the processor is also configured to receive a second indication from the UE via a transceiver, the second indication indicating whether a data packet from the first QoS stream arrives or is transmitted before a data packet from the second QoS stream, or whether a data packet from the second QoS stream arrives or is transmitted before a data packet from the first QoS stream.

[0035] In some implementations, the second indication includes one of the following: a first identifier (ID) or first index of a first QoS flow, a second ID or second index of a second QoS flow, a third ID or third index of a first timer, or a fourth ID or fourth index of a second timer.

[0036] In some implementations, the processor is also configured to receive a first Media Access Control (MAC) CE from the UE via a transceiver, the first MAC CE including delay information for one or more synchronous transport sets.

[0037] In some implementations, the first MAC CE also includes at least one of the following: synchronization association information for one or more synchronization transport sets, or the sequence number of each synchronization transport set in one or more synchronization transport sets.

[0038] In some implementations, the synchronization association information includes at least one of the following: a synchronization association identifier (ID) for a corresponding synchronization transport set in one or more synchronization transport sets, an ID of at least one data radio bearer (DRB) associated with a QoS flow, an ID of at least one logical channel (LCH) associated with a QoS flow, or an ID of the QoS flow.

[0039] In some implementations, the processor is also configured to send a report to the UE via a transceiver for delay information for at least one set of synchronized transmissions, the configuration including synchronization association information.

[0040] In some implementations, the processor is configured to trigger a report of first delay information for a first synchronization transport set in at least one synchronization transport set based on one of the following: the initial data packet in the first synchronization transport set is sent or successfully sent; all data packets in the data packet set of the first synchronization transport set are sent or successfully sent; or all data packets from a QoS stream in a QoS stream are sent or successfully sent.

[0041] In some implementations, the first delay information for the first synchronization transmission set includes at least one of the following: a first remaining time for the synchronization threshold of a QoS flow with multiple modalities when the first delay information for the first synchronization transmission set is sent to the base station; a second remaining time for the synchronization threshold of a QoS flow with multiple modalities when a report of the first delay information is triggered; a first data amount of remaining data packets in the first synchronization transmission set when the first delay information for the first synchronization transmission set is sent to the base station; or a second data amount of remaining data packets in the first synchronization transmission set when a report of the first delay information is triggered.

[0042] In some implementations, the QoS flow includes a first QoS flow and a second QoS flow; packets from the first QoS flow arrive or are sent before packets from the second QoS flow; and the remaining time of the synchronization threshold includes: a first remaining time for a first synchronization threshold for a QoS flow with multiple modalities.

[0043] In some implementations, the QoS flow includes a first QoS flow and a second QoS flow; packets from the second QoS flow arrive or are sent before packets from the first QoS flow; and the remaining time of the synchronization threshold includes a second remaining time for a second synchronization threshold with multiple modalities.

[0044] Some implementations of a method described herein may include: receiving a first indication from a base station indicating that delay information for at least one synchronized transmission set will be reported, wherein each synchronized transmission set in the at least one synchronized transmission set includes packets from multiple QoS flows; identifying one or more synchronized transmission sets in the at least one synchronized transmission set; and triggering the reporting of delay information for the one or more synchronized transmission sets based on the first indication.

[0045] Some implementations of a method described herein may include: sending a first indication to the UE indicating that delay information for at least one synchronization transport set will be reported, wherein each synchronization transport set in the at least one synchronization transport set includes packets from multiple QoS flows; and receiving delay information from the UE via a transceiver for one or more synchronization transport sets in the at least one synchronization transport set.

[0046] Some implementations of a processor described herein may include: at least one memory and a controller coupled to at least one memory and configured such that the controller: receives from a base station a first indication indicating that delay information for at least one synchronization transmission set will be reported, wherein each synchronization transmission set in the at least one synchronization transmission set includes packets from multiple QoS streams; determines one or more synchronization transmission sets in the at least one synchronization transmission set; and, based on the first indication, triggers the reporting of delay information for the one or more synchronization transmission sets.

[0047] It should be understood that the summary portion is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0048] Figure 1 An example of a wireless communication system that supports the perception of UL synchronization transmission delay according to various aspects of this disclosure is illustrated;

[0049] Figure 2 The diagram illustrates a signaling process for perceiving UL synchronization transmission delay in accordance with various aspects of this disclosure.

[0050] Figure 3 Examples of synchronous transport sets according to some implementations of this disclosure are illustrated;

[0051] Figure 4 The diagram illustrates a flowchart of a method for sensing uplink synchronization transmission delay in accordance with various aspects of this disclosure;

[0052] Figure 5A and Figure 5B Examples of synchronization thresholds according to some implementations of this disclosure are illustrated respectively;

[0053] Figures 6 to 8 The flowcharts illustrate methods for sensing uplink synchronization transmission delays in accordance with various aspects of this disclosure.

[0054] Figure 9 An example of a first MAC CE according to some implementations of this disclosure is illustrated;

[0055] Figure 10 An example of a device for sensing UL synchronization transmission delay is illustrated in accordance with various aspects of this disclosure;

[0056] Figure 11 The illustration shows an example of a processor that supports the perception of UL synchronization transmission delay according to various aspects of this disclosure; and

[0057] Figure 12 and Figure 13 Flowcharts illustrating methods for sensing UL synchronization transmission delays according to various aspects of this disclosure are provided. Detailed Implementation

[0058] The principles of this disclosure will now be described with reference to some embodiments. It should be understood that these embodiments are described for illustrative purposes only and to assist those skilled in the art in understanding and implementing this disclosure, and do not impose any limitation on the scope of this disclosure. The disclosure described herein can be implemented in various ways other than those described below.

[0059] In the following description and claims, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains.

[0060] References to "an embodiment," "example embodiment," "embodiment," "some embodiments," etc., in this disclosure indicate that the described embodiments(s) may include a particular feature, structure, or characteristic, but not every embodiment must include that particular feature, structure, or characteristic. Furthermore, these phrases do not necessarily refer to the same(s) embodiments(s). Additionally, when a particular feature, structure, or characteristic is described in connection with an embodiment, those skilled in the art will recognize that in conjunction with other embodiments (whether explicitly described or not) such a feature, structure, or characteristic may affect such a feature, structure, or characteristic within the scope of their knowledge.

[0061] It should be understood that although the terms “first” and “second” may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may also be referred to as a second element without departing from the scope of the embodiments, and similarly, a second element may also be referred to as a first element. As used herein, the term “and / or” includes any and all combinations of one or more of the listed terms.

[0062] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” used herein also include the plural forms. Furthermore, it should be understood that the terms “comprises,” “comprising,” “has,” “having,” “includes,” and / or “including” as used herein specify the presence of the stated features, elements, and / or components, but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof.

[0063] As mentioned above, synchronization between different media components is crucial for immersive multimodal VR applications to avoid negatively impacting the user experience (i.e., the viewer detecting a lack of synchronization), especially when the synchronization threshold between two or more modalities is below the application's latency KPI. Table 1 provides examples of typical synchronization thresholds for immersive multimodal VR applications. Table 1

[0064] In Table 1, for each media component, "latency" refers to the delay of one media component compared to another. For example, a "visual latency" of 15 ms means that the haptic media arrives at the UE first (e.g., first at the UE's access layer (AS)) and the visual media is delayed by 15 ms compared to the haptic media. Alternatively, a "visual latency" of 15 ms means that the haptic media is transmitted to the base station first and the visual media is delayed by 15 ms compared to the haptic media.

[0065] Since each modality can have different QoS requirements, different QoS flows can carry different modalities. As mentioned above, synchronization between modalities is crucial. However, currently, the Radio Access Network (RAN) lacks synchronization information regarding QoS flows for different modalities. Due to the lack of synchronization information for multimodal communication services, the transmission performance of different QoS flows in the RAN is independent. We cannot guarantee that the transmission performance (such as packet error rate (PER)) of related QoS flows will be at the same level over a certain period of time. Therefore, the user experience of multimodal communication services cannot be guaranteed. Therefore, the RAN should be aware of synchronization information for different QoS flows for multimodal communication services.

[0066] For UL multimodal communication services, after the UE sends one modal QoS stream (multiple) PDUs, it is best to enable the base station to be aware of the remaining synchronization transmission time and buffer status of other modal QoS streams.

[0067] In view of the above, this disclosure provides a solution supporting awareness of UL synchronization transmission delay. In this solution, the UE receives from the base station an indication that delay information for at least one synchronization transmission set will be reported. Each synchronization transmission set includes data packets from multiple QoS flows. The UE then determines one or more synchronization transmission sets within the at least one synchronization transmission set. Subsequently, based on a first indication, the UE triggers the reporting of delay information for the one or more synchronization transmission sets. With this solution, the base station can optimize radio resource utilization for multimodal QoS flows, ensuring that synchronization transmission requirements for UL multimodal transmissions are guaranteed.

[0068] Various aspects of this disclosure are described in the context of wireless communication systems.

[0069] Figure 1An example of a wireless communication system 100 supporting UL synchronization transmission delay awareness is illustrated according to various aspects of this disclosure. The wireless communication system 100 may include one or more network entities 102 (also referred to as network devices (NEs)), one or more terminal devices or UEs 104, a core network 106, and a packet data network 108. The wireless communication system 100 may support various radio access technologies. In some implementations, the wireless communication system 100 may be a 4G network, such as an LTE network or an Advanced LTE (LTE-A) network. In some other implementations, the wireless communication system 100 may be a 5G network, such as an NR network. In other implementations, the wireless communication system 100 may be a combination of 4G and 5G networks, or other suitable radio access technologies, including IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), and IEEE 802.20. The wireless communication system 100 may support radio access technologies beyond 5G. In addition, the wireless communication system 100 can support technologies such as time division multiple access (TDMA), frequency division multiple access (FDMA), or code division multiple access (CDMA).

[0070] Network entity 102 can be collectively referred to as network entity 102, or it can be referred to as network entity 102 alone.

[0071] Network entities 102 can be distributed throughout a geographical area to form a wireless communication system 100. One or more of the network entities 102 described herein can be, include, or may be referred to as network nodes, base stations (BS), network elements, radio access network (RAN) nodes, base transceiver stations, access points, NodeBs, eNodeBs (eNBs), next-generation NodeBs (gNBs), or other suitable terms. Network entities 102 and UE 104 can communicate via communication link 110, which can be a wireless or wired connection. For example, network entities 102 and UE 104 can perform wireless communication (e.g., receive signaling, send signaling) via a Uu interface. Network entities 102 can be collectively referred to as network entity 102 or referred to as network entity 102 individually. In the following description, some implementations of this disclosure will be described using base stations as an example of network entity 102. Therefore, network entity 102 can be used interchangeably with base station 102.

[0072] Network entity 102 may provide a geographic coverage area 112 for which network entity 102 supports services (e.g., voice, video, packet data, messaging, broadcasting, etc.) for one or more UEs 104 within the geographic coverage area 112. For example, network entity 102 and UE 104 may support wireless communication of signals associated with services (e.g., voice, video, packet data, messaging, broadcasting, etc.) according to one or more radio access technologies. In some implementations, network entity 102 may be mobile, for example, a satellite associated with a non-terrestrial network. In some implementations, different geographic coverage areas 112 associated with the same or different radio access technologies may overlap, but different geographic coverage areas 112 may be associated with different network entities 102. The information and signals described herein may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the description may be represented by voltage, current, electromagnetic waves, magnetic fields or particles, light fields or particles, or any combination thereof.

[0073] One or more UEs 104 may be distributed throughout the geographic area of ​​the wireless communication system 100. UE 104 may include or be referred to as a mobile device, wireless device, remote device, remote unit, handheld device, subscriber device, or some other suitable term. In some implementations, UE 104 may be referred to as a unit, station, terminal, or client, etc. Alternatively or additionally, UE 104 may be referred to as an Internet of Things (IoT) device, an Internet of Everything (IoE) device, or a Machine Type Communication (MTC) device, etc. In some implementations, UE 104 may be stationary within the wireless communication system 100. In some other implementations, UE 104 may be mobile within the wireless communication system 100.

[0074] One or more UEs 104 can be devices of different forms or with different capabilities. Figure 1 The diagram illustrates some examples of UE 104. UE 104 is capable of communicating with various types of devices, such as network entity 102, other UEs 104, or network devices (e.g., core network 106, packet data network 108, relay equipment, integrated access and backhaul (IAB) node, or another network device). Figure 1 As shown. Alternatively or concurrently, UE 104 may support communication with other network entities 102 or UE 104 that may be used as relays in wireless communication system 100.

[0075] UE 104 can also support direct wireless communication with other UE 104s via communication link 114. For example, UE 104 can support direct wireless communication with another UE 104 via a device-to-device (D2D) communication link. In some implementations, such as vehicle-to-vehicle (V2V) deployments, vehicle-to-everything (V2X) deployments, or cellular V2X deployments, communication link 114 may be referred to as a sidechain. For example, UE 104 can support direct wireless communication with another UE 104 via a PC5 interface.

[0076] Network entity 102 may support communication with core network 106 or with another network entity 102, or both. For example, network entity 102 may interface with core network 106 via one or more backhaul links 116 (e.g., via S1, N2, N2, or another network interface). Network entities 102 may communicate with each other via backhaul links 116 (e.g., via X2, Xn, or another network interface). In some implementations, network entities 102 may communicate directly with each other (e.g., between network entities 102). In some other implementations, network entities 102 may communicate with each other or indirectly (e.g., via core network 106). In some implementations, one or more network entities 102 may include sub-components, such as access network entities, which may be examples of access node controllers (ANCs). An ANC may communicate with one or more UEs 104 via one or more other access network transport entities (which may be referred to as radio headends, smart radio headends, or transmit-receive points (TRPs)).

[0077] In some implementations, network entity 102 can be configured with a decomposed architecture that can utilize protocol stacks physically or logically distributed across two or more network entities 102, such as an Integrated Access Backhaul (IAB) network, an Open Radio Access Network (O-RAN) (e.g., a network configuration sponsored by the O-RAN Alliance), or a Virtualized RAN (vRAN) (e.g., a Cloud RAN (C-RAN)). For example, network entity 102 may include one or more of a Central Unit (CU), Distributed Unit (DU), Radio Unit (RU), RAN Intelligent Controller (RIC) (e.g., near real-time RIC, non-real-time RIC), Service Management and Orchestration (SMO) system, or any combination thereof.

[0078] An RU can also be referred to as a radio headend, intelligent radio headend, remote radio headend (RRH), remote radio unit (RRU), or transmit / receive point (TRP). In a decomposed RAN architecture, one or more components of network entity 102 can be co-located, or one or more components of network entity 102 can be located in distributed locations (e.g., separate physical locations). In some implementations, one or more network entities 102 in a decomposed RAN architecture can be implemented as virtual units (e.g., virtual CU (VCU), virtual DU (VDU), virtual RU (VRU)).

[0079] The functional decomposition between CU, DU, and RU can be flexible and can support different functions based on the functions performed at the CU, DU, or RU (e.g., network layer functions, protocol layer functions, baseband functions, radio frequency functions, and any combination thereof). For example, a protocol stack functional decomposition can be used between the CU and DU, allowing the CU to support one or more layers of the protocol stack and the DU to support one or more different layers of the protocol stack. In some implementations, the CU can host upper-layer protocol layer (e.g., Layer 3 (L3), Layer 2 (L2)) functions and signaling (e.g., Radio Resource Control (RRC), Serving Data Adaptation Protocol (SDAP), Packet Data Convergence Protocol (PDCP)). The CU can connect to one or more DUs or RUs, and one or more DUs or RUs can host lower-layer protocol layer functions and signaling, such as Layer 1 (L1) (e.g., Physical (PHY) layer) or L2 (e.g., Radio Link Control (RLC) layer, Media Access Control (MAC) layer), and each can be at least partially controlled by the CU 160.

[0080] Alternatively, a functional split of the protocol stack can be employed between the DU and RU, allowing the DU to support one or more layers of the protocol stack and the RU to support one or more different layers of the protocol stack. The DU can support one or more different cells (e.g., via one or more RUs). In some implementations, the functional split between the CU and DU, or between the DU and RU, can be within the protocol layer (e.g., some functions of the protocol layer can be performed by one of the CU, DU, or RU, while other functions of the protocol layer are performed by different items in the CU, DU, or RU).

[0081] The CU can be further functionally divided into CU control plane (CU-CP) and CU user plane (CU-UP) functions. The CU can be connected to one or more DUs via mid-range communication links (e.g., F1, F1-c, F1-u), and the DUs can be connected to one or more RUs via fronthaul communication links (e.g., open fronthaul (FH) interfaces). In some implementations, the mid-range or fronthaul communication links can be implemented based on interfaces (e.g., channels) between layers of a protocol stack supported by the respective network entity 102 communicating via such communication links.

[0082] Core network 106 can support user authentication, access authorization, tracking, connectivity, and other access, routing, or mobility functions. Core network 106 can be an evolved packet core (EPC) or a 5G core (5GC), which may include control plane entities that manage access and mobility (e.g., Mobility Management Entity (MME), Access and Mobility Management Function (AMF)) and user plane entities that route packets or interconnections to external networks (e.g., Serving Gateway (S-GW), Packet Data Network (PDN) Gateway (P-GW), or User Plane Function (UPF)). In some implementations, the control plane entities may manage non-access stratum (NAS) functions, such as mobility, authentication, and bearer management (e.g., data bearers, signaling bearers, etc.) of one or more UEs 104 served by one or more network entities 102 associated with core network 106.

[0083] Core network 106 can communicate with packet data network 108 via one or more backhaul links 116 (e.g., via S1, N2, N2, or another network interface). Packet data network 108 may include application server 118. In some implementations, one or more UEs 104 may communicate with application server 118. UE 104 may establish a session (e.g., Protocol Data Unit (PDU) session, etc.) with core network 106 via network entity 102. Core network 106 can use the established session (e.g., an established PDU session) to route services (e.g., control information, data, etc.) between UE 104 and application server 118. A PDU session may be an example of a logical connection between UE 104 and core network 106 (e.g., one or more network functions of core network 106).

[0084] In the wireless communication system 100, network entity 102 and UE 104 can use the resources of the wireless communication system 100 (e.g., time resources (e.g., symbols, time slots, subframes, frames, etc.) or frequency resources (e.g., subcarriers, carriers)) to perform various operations (e.g., wireless communication). In some implementations, network entity 102 and UE 104 can support different resource structures. For example, network entity 102 and UE 104 can support different frame structures. In some implementations, such as in 4G, network entity 102 and UE 104 can support a single frame structure. In some other implementations, such as in 5G and other suitable radio access technologies, network entity 102 and UE 104 can support various frame structures (i.e., multiple frame structures). Network entity 102 and UE 104 can support various frame structures based on one or more digital schemes.

[0085] The wireless communication system 100 may support one or more digital schemes, and the digital schemes may include subcarrier spacing and cyclic prefixes. A first digital scheme (e.g., μ =0) can be associated with the first subcarrier spacing (e.g., 15 kHz) and a normal cyclic prefix. In some implementations, the first digital scheme (e.g., ...) associated with the first subcarrier spacing (e.g., 15 kHz) is... μ =0) can utilize one time slot per subframe. The second digital scheme (e.g., μ =1) can be associated with the second subcarrier spacing (e.g., 30 kHz) and a normal cyclic prefix. The third digital scheme (e.g., μ =2) can be associated with a third subcarrier spacing (e.g., 60 kHz) and a normal cyclic prefix or an extended cyclic prefix. A fourth digital scheme (e.g., μ =3) can be associated with a fourth subcarrier spacing (e.g., 120 kHz) and a normal cyclic prefix. A fifth digital scheme (e.g., μ =4) can be associated with the fifth subcarrier spacing (e.g., 240 kHz) and the normal cyclic prefix.

[0086] The time intervals of resources (e.g., communication resources) can be organized according to frames (also called radio frames). Each frame can have a duration, for example, 10 milliseconds (ms). In some implementations, each frame can include multiple subframes. For example, each frame can include 10 subframes, and each subframe can have a duration, for example, 1 ms. In some implementations, each frame can have the same duration. In some implementations, each subframe of a frame can have the same duration.

[0087] Alternatively or concurrently, the time intervals of resources (e.g., communication resources) can be organized according to time slots. For example, a subframe may include a certain number (e.g., quantity) of time slots. The number of time slots in each subframe may also depend on one or more digital schemes supported in the wireless communication system 100. For example, a first digital scheme, a second digital scheme, a third digital scheme, a fourth digital scheme, and a fifth digital scheme (i.e., ...) associated with corresponding subcarrier intervals of 15 kHz, 30 kHz, 60 kHz, 120 kHz, and 240 kHz. μ =0、 μ =1、 μ =2、 μ =3、 μ =4) One time slot per subframe, two time slots per subframe, four time slots per subframe, eight time slots per subframe, and 16 time slots per subframe can be used, respectively. Each time slot can include a certain number (e.g., quantity) of symbols (e.g., OFDM symbols). In some implementations, the number (e.g., quantity) of time slots in a subframe can depend on the digital scheme. For a normal cyclic prefix, a time slot can include 14 symbols. For an extended cyclic prefix (e.g., for a 60kHz subcarrier spacing), a time slot can include 12 symbols. The relationship between the number of symbols per time slot, the number of time slots per subframe, and the number of time slots per frame for both normal and extended cyclic prefixes can depend on the digital scheme. It should be understood that for a first digital scheme (e.g., quantity) associated with a first subcarrier spacing (e.g., 15kHz), μ The reference of =0 can be used interchangeably between subframes and time slots.

[0088] In the wireless communication system 100, the electromagnetic (EM) spectrum can be divided into various categories, frequency bands, frequency channels, etc., based on frequency or wavelength. For example, the wireless communication system 100 can support one or more operating frequency bands, such as frequency range names FR1 (510MHz-7.125GHz), FR2 (24.25GHz-52.6GHz), FR3 (7.125GHz-24.25GHz), FR4 (52.6GHz-114.25GHz), FR4a or FR4-1 (52.6GHz-71GHz), and FR5 (114.25GHz-300GHz). In some implementations, network entity 102 and UE 104 can perform wireless communication on one or more operating frequency bands. In some implementations, FR1 can be used by network entity 102 and UE 104, along with other devices or apparatuses, for cellular communication services (e.g., control information, data). In some implementations, FR2 can be used by network entity 102 and UE 104, along with other devices or apparatuses, for short-range, high data rate capabilities.

[0089] FR1 can be associated with one or more number schemes (e.g., at least three number schemes). For example, FR1 can be associated with the following: a first number scheme (e.g., μ =0), which includes a 15kHz subcarrier spacing; the second digital scheme (e.g., μ =1), which includes a 30kHz subcarrier spacing; a third digital scheme (e.g., μ =2), which includes a subcarrier spacing of 60 kHz. FR2 can be associated with one or more digital schemes (e.g., at least two digital schemes). For example, FR2 can be associated with a third digital scheme (e.g., μ =2), which includes a 60kHz subcarrier spacing; the fourth digital scheme (e.g., μ =3), which includes a subcarrier spacing of 120kHz.

[0090] Figure 2 The diagram illustrates a signaling diagram of an example process 200 illustrating the perception of UL synchronization transmission delay according to various aspects of this disclosure. Process 200 may involve... Figure 1 UE 104 and base station 102 are shown in the diagram. For discussion purposes, references will be made to... Figure 1 Describe the process 200.

[0091] like Figure 2 As shown, UE 104 receives a first indication 210 from base station 102, which indicates that delay information for at least one synchronization transmission set will be reported. Each synchronization transmission set in the at least one synchronization transmission set includes data packets from multiple QoS streams.

[0092] In some implementations, UE 104 may receive a configuration from base station 102 for reporting delay information for at least one set of synchronous transmissions. This configuration may include a first indication.

[0093] In some implementations, at least one synchronous transport set may include a first synchronous transport set. The first synchronous transport set may include data packets from a first plurality of QoS streams. The first plurality of QoS streams may be targeted at a single multimodal service.

[0094] In some implementations, at least one synchronous transport set may also include a second synchronous transport set. The second synchronous transport set may include packets from a second plurality of QoS streams. The second plurality of QoS streams may be targeted at a single multimodal service.

[0095] In the following description, some implementations of this disclosure will be illustrated by employing a first synchronous transmission set comprising packets from two QoS streams. It should be understood that this disclosure can be applied to more than two QoS streams.

[0096] In some implementations, the first synchronization transport set may include one or more PDUs from a first QoS stream and one or more PDUs from a second QoS stream.

[0097] Alternatively, in some implementations, the first synchronization transport set may include one or more PDU sets from a first QoS stream and one or more PDUs from a second QoS stream.

[0098] Alternatively, in some implementations, the first synchronization transport set may include one or more PDU sets from a first QoS stream and one or more PDU sets from a second QoS stream.

[0099] In some implementations, a PDU set may include one or more PDUs carrying a payload of an information element generated at the application level. For example, the information element may be a frame or video slice from an XR service. In some implementations, the application layer of UE 104 requires all PDUs in the PDU set to use the corresponding information element. In other implementations, when some PDUs are lost, the application layer can still recover some or all of the information elements.

[0100] In some implementations, the first synchronous transmission set may include one or more data bursts from a first QoS stream and one or more data bursts from a second QoS stream. In some implementations, a data burst may be a collection of multiple PDUs generated and transmitted by an application within a short time period. Alternatively, in some implementations, a data burst may include one or more sets of PDUs.

[0101] In some implementations, the first synchronization transport set can be carried by a single data radio bearer (DRB) because the two QoS streams are mapped to one DRB. Alternatively, the first synchronization transport set can be carried by multiple DRBs because the two QoS streams are mapped to multiple DRBs, such as two DRBs.

[0102] In some implementations, the configuration for reporting delay information for at least one set of synchronized transports may include: synchronization association information for at least one set of synchronized transports.

[0103] In some implementations, the first synchronization association information for a first synchronization transport set may include: a first synchronization association identifier (ID) for the first synchronization transport set. Similarly, the second synchronization association information for a second synchronization transport set may include: a second synchronization association ID for the second synchronization transport set.

[0104] In some implementations, a first synchronization association ID can indicate the synchronous transmission of packets from a first plurality of QoS flows. A second synchronization association ID can indicate the synchronous transmission of packets from a second plurality of QoS flows.

[0105] In some implementations, the mapping between QoS flow IDs and synchronization association IDs can be configured by base station 102. Table 2 provides an example of the mapping between QoS flow IDs and synchronization association IDs. Table 2

[0106] In Table 2, Synchronization Association #1 can indicate the synchronous transmission of data packets from QoS stream #1 and QoS stream #2, and Synchronization Association #2 can indicate the synchronous transmission of data packets from QoS stream #3 and QoS stream #4.

[0107] Alternatively, in some implementations, the first synchronization association ID can indicate the synchronous transmission of packets on a first plurality of DRBs. The second synchronization association ID can indicate the synchronous transmission of packets on a second plurality of DRBs.

[0108] In some implementations, the mapping between the DRB ID and the synchronization association ID can be configured by the base station 102. Table 3 provides an example of the mapping between the DRB ID and the synchronization association ID. Table 3

[0109] In Table 3, Synchronization Association #1 can indicate the synchronous transmission of data packets on DRB #1 and DRB #2, and Synchronization Association #2 can indicate the synchronous transmission of data packets on DRB #3 and DRB #4.

[0110] Alternatively, in some implementations, the first synchronization association ID may indicate the synchronized transmission of packets on at least one first logical channel (LCH) associated with a first plurality of QoS flows or a first plurality of DRBs. The second synchronization association ID may indicate the synchronized transmission of packets on at least one second LCH associated with a second plurality of QoS flows or a second plurality of DRBs.

[0111] In some implementations, the mapping between at least one ID of at least one LCH and the synchronization association ID can be configured by base station 102.

[0112] Figure 3 Examples of synchronous transport sets according to some implementations of this disclosure are illustrated. For example... Figure 3 As shown, the synchronization transport set includes one or more PDU sets associated with a first QoS stream and one or more PDUs associated with a second QoS stream. The first QoS stream may be a video stream, and the second QoS stream may be a haptic stream. For example, the synchronization transport set 300 includes a PDU set 310 for the video stream and PDUs 320, 322, and 324 for the haptic stream. The PDU set 310 includes three PDUs.

[0113] return Figure 2 UE 104 identifies one or more synchronization transport sets in at least one synchronization transport set 220.

[0114] In some implementations, in order to determine the synchronization transport set, UE 104 can identify the data packets in the synchronization transport set from the upper layer.

[0115] For example, UE 104 can sense and identify the synchronization transmission information of data packets based on the packet header information of the application layer of UE 104. The synchronization transmission information indicates the PDU set sequence number (SN) of one or more PDU sets for each QoS flow, or the PDU SN of one or more PDUs for each QoS flow, wherein the PDU set and PDU belong to the synchronization transmission set.

[0116] In another example, UE 104 can identify the synchronization transmission information of data packets based on the gap between the arrival times of PDU sets. For example, if the interval between the arrival time of PDU set #1 and the arrival time of PDU set #2 is equal to or less than a threshold, then UE 104 can consider PDU set #1 and PDU set #2 as synchronous transmission sets. The maximum, minimum, or range of the gap can be configured by base station 102 or core network 106.

[0117] Subsequently, based on the first instruction, UE 104 triggers 230 to report delay information for one or more synchronous transmission sets.

[0118] Through process 200, base station 102 can optimize the radio resource utilization of multimodal QoS streams, thereby ensuring the synchronous transmission requirements of UL multimodal transmission.

[0119] In the following text, reference will be made to Figures 4 to 8 Describes some implementations of triggering reports for the first delay information of the first synchronous transmission set.

[0120] Figure 4 The diagram illustrates a flowchart of a method 400 for supporting uplink synchronization transmission delay awareness according to various aspects of this disclosure. Method 400 can be considered as... Figure 2 An example implementation of action 230 is provided. For discussion purposes, references will be made to... Figure 1 Method 400 is described from the perspective of UE 104.

[0121] At 410, UE 104 starts a timer for the first synchronization transport set.

[0122] In some implementations, UE 104 may start a timer when the initial data packet in the first synchronization transmission set is sent or successfully sent. The initial data packet in the first synchronization transmission set may be the first data packet to arrive at UE 104. For example, the initial data packet in the first synchronization transmission set may be the first data packet to arrive at UE 104's AS. The AS may include either UE 104's SDAP layer or PDCP layer. Therefore, the initial data packet in the first synchronization transmission set is also referred to as the first data packet in the first synchronization transmission set. In some implementations, if multiple segments of a data packet exist (e.g., when segmentation is performed in the RLC layer), UE 104 may consider the data packet to have been sent when all segments of the data packet have been sent. UE 104 may consider the data packet to have been successfully sent when all segments of the data packet have been successfully sent.

[0123] Alternatively, in some implementations, UE 104 may start a timer when all data packets in the packet set of the first synchronization transmission set are sent or successfully sent. For example, UE 104 may start a timer when all PDUs in the initial PDU set of the first synchronization transmission set are sent or successfully sent. The initial PDU set in the first synchronization transmission set may be the set of PDUs that first arrive at UE 104's AS. Therefore, the initial PDU set in the first synchronization transmission set is also referred to as the first PDU set in the first synchronization transmission set.

[0124] Alternatively, in some implementations, UE 104 may start a timer when all packets from one of the QoS flows have been sent or successfully transmitted. For example, as described above, the first synchronization transport set may include one or more PDUs from a first QoS flow and one or more PDUs from a second QoS flow. UE 104 may start a timer when all PDUs from the one or more PDUs from the first QoS flow have been sent or successfully transmitted.

[0125] Continue to refer to Figure 4 When the remaining time of the timer is less than or equal to a threshold for the remaining time of the timer, or when the timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 420. The remaining time of the timer is also referred to as the timer's remaining value.

[0126] In some implementations, the configuration for reporting delay information for at least one synchronization transmission set may include: a first configuration for reporting first delay information for a first synchronization transmission set. This first configuration includes a timer value and a threshold for the remaining time of the timer. For example, the timer value may be configured to 10 ms, and the threshold for the remaining time of the timer may be configured to 3 ms. The remaining time of the timer may be equal to or less than 3 ms.

[0127] In some implementations, the first delay information for the first synchronous transmission set may include at least one of the following: - When the first delay information for the first synchronous transmission set is sent to base station 102, the first remaining time of the timer, or - The first data amount of the remaining data packets in the first synchronous transmission set when the first delay information for the first synchronous transmission set is sent to the base station 102.

[0128] Alternatively, in some implementations, the first delay information for the first synchronous transmission set may include at least one of the following: - When the report of the first delay information is triggered, the second remaining time of the timer, or - When the report of the first delay information is triggered, the second amount of data in the remaining data packets in the first synchronous transmission set.

[0129] In the following text, the amount of data in the remaining data packets in the synchronization transfer set is also referred to as the buffer size of the remaining data packets in the synchronization transfer set.

[0130] In some implementations, the remaining data packets in the synchronization transport set may include at least one of the following: - RLC Service Data Units (SDUs) and RLC SDU segments that are not yet included in RLC data PDUs; - RLC data PDUs awaiting initial transmission; - RLC data PDUs awaiting retransmission (RLC Acknowledgment Mode (AM)); - PDCP data PDUs that have not yet been constructed as PDCP SDUs; or - PDCP data PDUs that have not yet been submitted to the lower layer of UE 104.

[0131] In some implementations, to ensure synchronization thresholds for multimodal VR applications, UE 104 can start one of different timers for the synchronization transmission set based on the arrival order of packets from multiple QoS streams or the (successful) transmission order of packets from multiple QoS streams. This will refer to... Figure 5A , Figure 5B , Figure 6 , Figure 7 and Figure 8 Describe it.

[0132] Figure 5A and Figure 5B Examples of synchronization thresholds according to some implementations of this disclosure are illustrated.

[0133] exist Figure 5A In the example, if PDU A from the first QoS flow is first sent to base station 102 or received at UE 104, then PDU B from the second QoS flow should be sent to base station 102 within the first synchronization threshold.

[0134] For example, the first QoS stream can be associated with the haptic stream, and the second QoS stream can be associated with the visual stream, and the first synchronization threshold can be equal to 15ms, as shown in Table 1. Therefore, if PDU A from the haptic stream is first sent to base station 102 or received at UE 104 (e.g., at AS of UE 104), then PDU B from the visual stream should be sent to base station 102 within 15ms.

[0135] exist Figure 5B In the example, if PDU B from the second QoS stream is first sent to base station 102 or received at UE 104, then PDU B from the first QoS stream should be sent to base station 102 within the second synchronization threshold.

[0136] For example, the first QoS stream can be associated with a haptic stream, and the second QoS stream can be associated with a visual stream, and the second synchronization threshold can be equal to 50 ms, as shown in Table 1. Therefore, if PDU B from the visual stream is first sent to base station 102 or received at UE 104 (e.g., at AS of UE 104), then PDU A from the haptic stream should be sent to base station 102 within 50 ms.

[0137] Figure 6 The diagram illustrates a flowchart of a method 600 for supporting uplink synchronization transmission delay awareness according to various aspects of this disclosure. Method 600 can be considered as... Figure 2 Another example implementation of action 230 in [the document]. For discussion purposes, [the document will refer to...]. Figure 1 Method 600 is described from the perspective of UE 104.

[0138] Typically, in method 600, the first synchronization transmission set may include data packets from a first QoS stream and a second QoS stream. UE 104 may start one of a first timer and a second timer based on the arrival order of data packets from the first QoS stream and the second QoS stream, or the (successful) transmission order of data packets from the first QoS stream and the second QoS stream.

[0139] At 610, UE 104 sends the initial data packet of the first synchronization transmission set to base station 102.

[0140] As referenced above Figure 4 As described, the initial data packet in the first synchronous transmission set may be the first data packet to arrive at UE104. In some implementations, if multiple segments of a data packet exist (e.g., when segmentation is performed in the RLC layer), UE104 may consider the data packet to have been sent when all segments of the data packet have been sent. UE104 may consider the data packet to have been successfully sent when all segments of the data packet have been successfully sent.

[0141] At 620, UE 104 determines whether the initial data packet in the first synchronization transmission set has been sent or successfully sent.

[0142] If the initial data packet in the first synchronous transport set is sent or successfully sent, UE 104 determines at 630 whether the initial data packet comes from the first QoS flow.

[0143] If the initial data packet comes from the first QoS stream, UE 104 starts the first timer at 640.

[0144] When the remaining time of the first timer is less than or equal to a first threshold for the remaining time of the first timer or when the first timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 650.

[0145] On the other hand, if UE 104 determines at 630 that the initial data packet does not come from the first QoS stream (i.e., the initial data packet comes from the second QoS stream), then UE 104 starts a second timer at 660.

[0146] When the remaining time of the second timer is less than or equal to the second threshold for the remaining time of the second timer or when the second timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 670.

[0147] Figure 7 The diagram illustrates a flowchart of a method 700 for supporting uplink synchronization transmission delay awareness according to various aspects of this disclosure. Method 700 can be considered as... Figure 2Another example implementation of action 230 in [the document]. For discussion purposes, reference will be made to [the document / document]. Figure 1 Method 700 is described from the perspective of UE 104.

[0148] Typically, similar to method 600, in method 700, the first synchronization transmission set may include data packets from the first QoS stream and the second QoS stream. UE 104 may start one of the first timer and the second timer based on the arrival order of data packets from the first QoS stream and the second QoS stream, or the (successful) transmission order of data packets from the first QoS stream and the second QoS stream.

[0149] At 710, UE 104 sends all data packets in the data packet set of the first synchronization transmission set to base station 102.

[0150] As referenced above Figure 4 As described, all data packets in the packet set of the first synchronization transmission set can be all PDUs in the initial PDU set of the first synchronization transmission set. The initial PDU set in the first synchronization transmission set can be the set of PDUs that arrive at the AS of UE 104 first. Therefore, the initial PDU set in the first synchronization transmission set is also referred to as the first PDU set in the first synchronization transmission set.

[0151] At 720, UE 104 determines whether the data packet set (e.g., the first PDU set) in the first synchronization transmission set has been sent or has been successfully sent.

[0152] If a data packet set in the first synchronous transmission set is sent or successfully sent, UE 104 determines at 730 whether the data packet set comes from the first QoS flow.

[0153] If the data packet set comes from the first QoS flow, UE 104 starts the first timer at 740.

[0154] When the remaining time of the first timer is less than or equal to a first threshold for the remaining time of the first timer, or when the first timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 750.

[0155] On the other hand, if UE 104 determines at 730 that the data packet set does not come from the first QoS flow (i.e., the data packet set comes from the second QoS flow), then UE 104 starts a second timer at 760.

[0156] When the remaining time of the second timer is less than or equal to the second threshold for the remaining time of the second timer, or when the second timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 770.

[0157] Figure 8 The diagram illustrates a flowchart of a method 800 for supporting uplink synchronization transmission delay awareness according to various aspects of this disclosure. Method 800 can be considered as... Figure 2 Another example implementation of action 230 in [the document]. For discussion purposes, reference will be made to [the document / document]. Figure 1 Method 800 is described from the perspective of UE 104.

[0158] Typically, similar to method 600, in method 800, the first synchronization transmission set may include data packets from the first QoS stream and the second QoS stream. UE 104 may start one of the first timer and the second timer based on the arrival order of data packets from the first QoS stream and the second QoS stream, or the (successful) transmission order of data packets from the first QoS stream and the second QoS stream.

[0159] At 810, UE 104 sends all data packets from one of the first QoS stream and the second QoS stream in the first synchronization transmission set to base station 102.

[0160] At 820, UE 104 determines whether all packets from one of the first QoS stream and the second QoS stream in the first synchronization transport set have been sent or have been successfully sent.

[0161] If all packets from one of the first QoS stream and the second QoS stream in the first synchronous transport set are sent or successfully sent, then UE 104 determines at 830 whether all packets are from the first QoS stream.

[0162] If all packets come from the first QoS stream, then UE 104 starts the first timer at 840.

[0163] When the remaining time of the first timer is less than or equal to a first threshold for the remaining time of the first timer, or when the first timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 850.

[0164] On the other hand, if UE 104 determines at 830 that all packets do not come from the first QoS stream (i.e., all packets come from the second QoS stream), then UE 104 starts a second timer at 860.

[0165] When the remaining time of the second timer is less than or equal to the second threshold for the remaining time of the second timer, or when the second timer expires, UE 104 triggers a report of the first delay information for the first synchronization transmission set at 870.

[0166] In some implementations, the first configuration for reporting first delay information for a first synchronous transmission set may include: a first value of a first timer, a first threshold for the remaining time of the first timer, a second value of a second timer, and a second threshold for the remaining time of the second timer.

[0167] In some implementations, the first value of the first timer can be different from the second value of the second timer.

[0168] In some implementations, the first threshold for the remaining time of the first timer may be different from the second threshold for the remaining time of the second timer.

[0169] In some implementations, UE 104 may send a second indication to base station 102, which indicates whether a data packet from the first QoS stream arrives or is sent before a data packet from the second QoS stream, or whether a data packet from the second QoS stream arrives or is sent before a data packet from the first QoS stream.

[0170] In some implementations, the second indication may include one of the following: a first ID or first index of a first QoS flow, a second ID or second index of a second QoS flow, a third ID or third index of a first timer, or a fourth ID or fourth index of a second timer. In some implementations, the first ID or first index of the first QoS flow and the third ID or third index of the first timer are used to indicate that packets from the first QoS flow arrive or are sent before packets from the second QoS flow. The second ID or second index of the second QoS flow and the fourth ID or fourth index of the second timer are used to indicate that packets from the second QoS flow arrive or are sent before packets from the first QoS flow.

[0171] In some implementations, it is not necessary to start a timer in order to trigger a report of the first delay information for the first synchronous transmission set.

[0172] In some implementations that do not require a timer, UE 104 may trigger a report of first delay information for the first synchronization set when the initial data packet in the first synchronization set is sent or successfully sent. The initial data packet in the first synchronization set may be the first data packet to arrive at UE 104. For example, the initial data packet in the first synchronization set may be the first data packet to arrive at UE 104's AS. The AS may include either UE 104's SDAP layer or PDCP layer. Therefore, the initial data packet in the first synchronization set is also referred to as the first data packet in the first synchronization set. In some implementations, if multiple segments of a data packet exist (e.g., when segmentation is performed in the RLC layer), UE 104 may consider the data packet to have been sent when all segments of the data packet have been sent. UE 104 may consider the data packet to have been successfully sent when all segments of the data packet have been successfully sent.

[0173] Alternatively, in some implementations that do not require starting a timer, UE 104 may trigger a report of first delay information for the first synchronous transmission set when all data packets in the packet set of the first synchronous transmission set are sent or successfully sent. For example, UE 104 may start a timer when all PDUs in the initial PDU set of the first synchronous transmission set are sent or successfully sent. The initial PDU set in the first synchronous transmission set may be the set of PDUs that arrive at UE 104's AS first. Therefore, the initial PDU set in the first synchronous transmission set is also referred to as the first PDU set in the first synchronous transmission set.

[0174] Alternatively, in some implementations that do not require starting a timer, UE 104 may trigger a report of first delay information for the first synchronous transmission set when all packets from one of the QoS flows are sent or successfully transmitted. For example, as described above, the first synchronous transmission set may include one or more PDUs from a first QoS flow and one or more PDUs from a second QoS flow. UE 104 may trigger a report of first delay information for the first synchronous transmission set when all PDUs from the one or more PDUs of the first QoS flow are sent or successfully transmitted.

[0175] In some implementations that do not require starting a timer, the first delay information for the first synchronous transmission set may include at least one of the following: - When the first delay information for the first synchronized transmission set is sent to base station 102, the first remaining time for the synchronization threshold of the QoS stream with multiple modalities, or - The first data amount of the remaining data packets in the first synchronous transmission set when the first delay information for the first synchronous transmission set is sent to the base station 102.

[0176] Alternatively, in some implementations that do not require starting a timer, the first delay information for the first synchronous transmission set may include at least one of the following: - When the report of the first delay information is triggered, the second remaining time for the synchronization threshold of the QoS flow with multiple modalities, or - When the report of the first delay information is triggered, the second amount of data in the remaining data packets in the first synchronous transmission set.

[0177] For example, as shown in Table 1, the synchronization threshold for a QoS flow with multiple modalities can be equal to 50 ms. When the first delay information for the first synchronization transmission set is sent to base station 102, the first remaining time of the synchronization threshold can be equal to 20 ms. When the reporting of the first delay information is triggered, the first remaining time of the synchronization threshold can be equal to 25 ms. It should be understood that the synchronization threshold for a QoS flow with multiple modalities can be equal to any suitable value, and the scope of this disclosure is not limited in this respect. For example, the synchronization threshold for a QoS flow with multiple modalities can be configured by base station 102 or core network 106. Alternatively, the synchronization threshold for a QoS flow with multiple modalities can be predefined.

[0178] In some implementations that do not require starting a timer, the first synchronous transmission set may include data packets from a first QoS stream and a second QoS stream. Based on the arrival order of data packets from the first QoS stream and the second QoS stream, or the (successful) transmission order of data packets from the first QoS stream and the second QoS stream, the first delay information for the first synchronous transmission set may include one of the following: - The first remaining time for a first synchronization threshold of a QoS flow with multiple modalities, or - The second remaining time for the second synchronization threshold of a QoS flow with multiple modalities.

[0179] In some implementations that do not require starting a timer, UE 104 can determine whether the initial data packet comes from the first QoS stream or the second QoS stream when the initial data packet in the first synchronous transmission set is sent or successfully sent.

[0180] If the initial data packet originates from a first QoS flow, the first delay information for the first synchronization transmission set may include: a first remaining time for a first synchronization threshold for a QoS flow with multiple modalities. For example, the first delay information for the first synchronization transmission set may include: the first remaining time for the first synchronization threshold when the first delay information for the first synchronization transmission set is sent to base station 102, or when a report of the first delay information is triggered.

[0181] If the initial data packet originates from the second QoS flow, the first delay information for the first synchronization transmission set may include a second remaining time for a second synchronization threshold for a QoS flow with multiple modalities. For example, the first delay information for the first synchronization transmission set may include the second remaining time for the second synchronization threshold when the first delay information for the first synchronization transmission set is sent to base station 102 or when a report of the first delay information is triggered.

[0182] Alternatively, in some implementations that do not require starting a timer, UE 104 can determine whether the packet set in the first synchronous transmission set comes from the first QoS stream or the second QoS stream when all packets in the packet set in the first synchronous transmission set are sent or successfully sent.

[0183] If the data packet set originates from a first QoS flow, the first delay information for the first synchronization transmission set may include: a first remaining time for a first synchronization threshold for a QoS flow having multiple modalities. For example, the first delay information for the first synchronization transmission set may include: the first remaining time for the first synchronization threshold when the first delay information for the first synchronization transmission set is sent to base station 102, or when a report of the first delay information is triggered.

[0184] If the data packet set originates from a second QoS flow, the first delay information for the first synchronization transmission set may include a second remaining time for a second synchronization threshold for a QoS flow with multiple modalities. For example, the first delay information for the first synchronization transmission set may include a second remaining time for the second synchronization threshold when the first delay information for the first synchronization transmission set is sent to base station 102 or when a report of the first delay information is triggered.

[0185] Alternatively, in some implementations that do not require starting a timer, UE 104 can determine whether all packets from one of the first QoS stream or the second QoS stream originate from the first QoS stream or the second QoS stream when all packets from one of the first QoS streams or the second QoS stream are sent or successfully sent.

[0186] If all data packets originate from the first QoS flow, the first delay information for the first synchronization transmission set may include: a first remaining time for a first synchronization threshold for a QoS flow with multiple modalities. For example, the first delay information for the first synchronization transmission set may include: the first remaining time for the first synchronization threshold when the first delay information for the first synchronization transmission set is sent to base station 102, or when a report of the first delay information is triggered.

[0187] If all data packets originate from the second QoS flow, the first delay information for the first synchronization transmission set may include: a second remaining time for a second synchronization threshold for a QoS flow with multiple modalities. For example, the first delay information for the first synchronization transmission set may include: the second remaining time for the second synchronization threshold when the first delay information for the first synchronization transmission set is sent to base station 102, or when a report of the first delay information is triggered.

[0188] In some implementations, UE 104 may send a first Media Access Control (MAC CE) to base station 102, the first MAC CE including delay information for one or more synchronous transmission sets.

[0189] In some implementations, if a first MAC CE is triggered, and if the uplink shared channel (UL-SCH) resource is available for a new transmission and the UL-SCH resource can accommodate the first MAC CE and its sub-header due to logical channel priority, then the MAC entity of UE 104 should instruct the multiplexing and reassembly process to generate the first MAC CE. If the UL-SCH resource is not available for transmitting the first MAC CE and its sub-header, then the MAC entity of UE 104 may trigger a scheduling request (SR) procedure.

[0190] In some implementations, after the first MAC CE is triggered, it is considered pending until it is cancelled. The MAC entity of UE 104 should cancel the pending first MAC CE when all PDUs associated with the synchronization transport set have been discarded, or when a MAC PDU is sent and includes all PDUs associated with the synchronization transport set.

[0191] In some implementations, the first MAC CE can be identified by a MAC subheader with an octet logical channel identifier (LCID) or an extended logical channel identifier (eLCID).

[0192] In some implementations, in addition to delay information for one or more synchronization transport sets, the first MAC CE may also include at least one of the following: synchronization association information for one or more synchronization transport sets, or the sequence number (SN) of each synchronization transport set in one or more synchronization transport sets.

[0193] Figure 9 An example of a first MAC CE according to some implementations of this disclosure is illustrated. Figure 9 In the example, the first MACCE includes synchronization association information 910 for one or more synchronization transport sets.

[0194] For example, the synchronization association information 910 for one or more synchronization transport sets may include: first synchronization association information for the first synchronization transport set.

[0195] As described above, the first synchronization association information for the first synchronization transmission set may include: a first synchronization association ID for the first synchronization transmission set. The first synchronization association ID may indicate the synchronization transmission of packets from a first plurality of QoS flows or a first plurality of DRBs.

[0196] The first MAC CE may optionally include: SN 920 for the first synchronous transfer set, remaining time 930 for the timer of the first synchronous transfer set, and buffer size 940 for the first synchronous transfer set.

[0197] The remaining time of the timer 930 may include a first remaining time of the timer when first delay information for the first synchronization transmission set is sent to the base station. For example, the remaining time of the timer 930 may include a first remaining time of the timer when the first symbol of the first PUSCH transmission includes a first MAC CE. Alternatively, the remaining time of the timer 930 may include a second remaining time of the timer when the first MAC CE is triggered.

[0198] In some implementations, the first MAC CE may include delay information for multiple synchronization transport sets. In such an implementation, synchronization association information 910 for one or more synchronization transport sets may include: synchronization association information for multiple synchronization transport sets.

[0199] For example, the first MAC CE may include: first delay information for a first synchronous transport set and second delay information for a second synchronous transport set.

[0200] In this example, the synchronization association information 910 for one or more synchronization transport sets may include: a first synchronization association ID for a first synchronization transport set and a second synchronization association ID for a second synchronization transport set.

[0201] In this example, the first MAC CE may optionally include: the SN of the second synchronization transport set, the remaining time of the timer for the second synchronization transport set, and the buffer size for the second synchronization transport set.

[0202] In this example, the remaining time of the timers for the first and second synchronization transport sets, as well as the buffer sizes for the first and second synchronization transport sets, can be arranged in the first MAC CE in ascending order of the synchronization association IDs.

[0203] In some implementations, if a first MAC CE, a second MAC CE including a Delayed State Report (DSR), and a third MAC CE including a Buffered State Report (BSR) are triggered, and the UL authorization is insufficient to accommodate the three MAC CEs, then UE 104 can prioritize the transmission of one of the three MAC CEs based on their priorities. If the first priority of the first MAC CE is higher than the second priority of the second MAC CE and the third priority of the third MAC CE, then UE 104 can prioritize the transmission of the first MAC CE.

[0204] In some implementations, UE 104 can determine the highest priority among at least one priority of at least one LCH for which its delay information is provided. Furthermore, UE 104 can determine the highest priority as the first priority of the first MAC CE. For example, delay information is provided for data on LCH #1 and LCH #2, and LCH #1 has a higher priority than LCH #2. Therefore, UE 104 can determine the priority of LCH #1 as the first priority of the first MAC CE.

[0205] Similarly, UE 104 can determine the highest priority among at least one priority of at least one LCH to which its DSR is provided. Furthermore, UE 104 can determine the highest priority as the second priority of the second MAC CE including the DSR.

[0206] Similarly, UE 104 can determine the highest priority among at least one priority of at least one LCH for which its BSR is provided. Furthermore, UE 104 can determine the highest priority as the third priority of the third MAC CE including the BSR.

[0207] Alternatively, in some implementations, a first priority of the first MAC CE can be predefined, taking precedence over the second priority of the second MAC CE and the third priority of the third MAC CE. In such an implementation, if the first MAC CE, the second MAC CE including the DSR, and the third MAC CE including the BSR are triggered, and the UL authorization is insufficient to accommodate the three MAC CEs, then UE 104 may prioritize the transmission of the first MAC CE.

[0208] In some implementations, UE 104 can trigger reports of delay information for multiple synchronization transmission sets. For example, UE 104 can trigger reports of first delay information for a first synchronization transmission set and reports of second delay information for a second synchronization transmission set.

[0209] In this implementation, the first synchronization transmission set includes data packets from a first plurality of QoS flows associated with the first LCH, and the second synchronization transmission set includes data packets from a second plurality of QoS flows associated with the second LCH. UE104 may include, in the first MAC CE, first delay information and second delay information in descending order of priority between the first LCH and the second LCH.

[0210] For example, if the first LCH has a higher priority than the second LCH, UE 104 may include the first delay information in the first MACCE. If the UL authorization is insufficient to accommodate both the first and second delay information, UE 104 may exclude the second delay information from the first MACCE.

[0211] For another example, if the priority of the first LCH is equal to the priority of the second LCH, then UE 104 may include, in the first MAC CE, first delay information and second delay information in ascending order of the first remaining time of data packets in the first synchronization transmission set and the second remaining time of data packets in the second synchronization transmission set. For example, the first remaining time of data packets in the first synchronization transmission set may be the remaining time of a timer for the first synchronization transmission set, as referenced... Figures 4 to 8 Similarly, the second remaining time for data packets in the second synchronous transmission set can be the remaining time of a timer for the second synchronous transmission set.

[0212] For another example, if the priority of the first LCH is equal to the priority of the second LCH, then UE 104 may include, in the first MAC CE, first delay information and second delay information in ascending order of a first threshold of the remaining time of the timer of the first synchronization transport set and a second threshold of the remaining time of the timer of the second synchronization transport set.

[0213] Alternatively, in some implementations, UE 104 may disregard the priority of the first LCH and the second LCH. In such an implementation, UE 104 may include, in the first MAC CE, first delay information and second delay information in ascending order of the first remaining time of data packets in the first synchronization transmission set and the second remaining time of data packets in the second synchronization transmission set.

[0214] Figure 10An example of a device 1000 supporting UL synchronization transmission delay awareness according to various aspects of this disclosure is illustrated. Device 1000 may be an example of a network entity 102 or a UE 104 as described herein. Device 1000 may support wireless communication with one or more network entities 102, UE 104, or any combination thereof. Device 1000 may include components for bidirectional communication, including components for transmitting and receiving communications (such as processor 1002, memory 1004, transceiver 1006, and optional I / O controller 1008). These components may communicate electronically or be otherwise coupled (e.g., operative ground, communication ground, functional ground, electronic ground, electrical ground) via one or more interfaces (e.g., bus).

[0215] Processor 1002, memory 1004, transceiver 1006, or various combinations thereof, or various components thereof, may be examples of components used to perform the various aspects of this disclosure described herein. For example, processor 1002, memory 1004, transceiver 1006, or various combinations thereof, or components thereof, may support methods for performing one or more of the operations described herein.

[0216] In some implementations, processor 1002, memory 1004, transceiver 1006, or various combinations or components thereof may be implemented in hardware (e.g., in a communication management circuitry system). The hardware may include a processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, configured to or otherwise supporting components for performing the functions described in this disclosure. In some implementations, processor 1002 and memory 1004 coupled to processor 1002 may be configured to perform one or more functions described herein (e.g., executing instructions stored in memory 1004 via processor 1002).

[0217] For example, according to the examples disclosed herein, processor 1002 may support wireless communication at device 1000. Processor 1002 may be configured to support components for performing the following: receiving a first indication from a base station, the first indication indicating that: delay information for at least one synchronized transmission set will be reported, wherein each of the at least one synchronized transmission set includes packets from multiple QoS streams; determining one or more synchronized transmission sets in the at least one synchronized transmission set; and triggering the reporting of delay information for the one or more synchronized transmission sets based on the first indication.

[0218] Alternatively, in some implementations, processor 1002 may be configured to support components for performing the following: sending a first indication to the UE indicating that delay information for at least one synchronization transmission set will be reported, wherein each synchronization transmission set in the at least one synchronization transmission set includes packets from multiple QoS streams; and receiving delay information from the UE for one or more synchronization transmission sets in the at least one synchronization transmission set.

[0219] Processor 1002 may include intelligent hardware devices (e.g., general-purpose processors, DSPs, CPUs, microcontrollers, ASICs, FPGAs, programmable logic devices, discrete gate or transistor logic components, discrete hardware components, or any combination thereof). In some implementations, processor 1002 may be configured to use a memory controller to operate a memory array. In some other implementations, the memory controller may be integrated into processor 1002. Processor 1002 may be configured to execute computer-readable instructions stored in memory (e.g., memory 1004) to cause device 1000 to perform various functions of this disclosure.

[0220] Memory 1004 may include random access memory (RAM) and read-only memory (ROM). Memory 1004 may store computer-readable, computer-executable code, including instructions that, when executed by processor 1002, cause device 1000 to perform the various functions described herein. The code may be stored in a non-transitory computer-readable medium such as system memory or another type of memory. In some implementations, the code may not be directly executed by processor 1002, but may cause a computer (e.g., when compiled and executed) to perform the functions described herein. In some implementations, memory 1004 may include a basic I / O system (BIOS) that controls basic hardware or software operations, such as interaction with peripheral components or devices.

[0221] I / O controller 1008 can manage the input and output signals of device 1000. I / O controller 1008 can also manage peripheral devices not integrated into device 1000. In some implementations, I / O controller 1008 can represent a physical connection or port to an external peripheral device. In some implementations, I / O controller 1008 can utilize an operating system such as iOS®, Android®, MS Windows®, OS / 2®, UNIX®, Linux®, or other known operating systems. In some implementations, I / O controller 1008 can be implemented as part of a processor, such as processor 1002. In some implementations, a user can interact with device 1000 via I / O controller 1008 or via hardware components controlled by I / O controller 1008.

[0222] In some implementations, device 1000 may include a single antenna 1010. However, in other implementations, device 1000 may have more than one antenna 1010 (i.e., multiple antennas), including multiple antenna panels or antenna arrays capable of concurrently transmitting or receiving multiple wireless transmissions. Transceiver 1006 may communicate bidirectionally via one or more antennas 1010, wired or wireless links, as described herein. For example, transceiver 1006 may represent a wireless transceiver and may communicate bidirectionally with another wireless transceiver. Transceiver 1006 may also include a modem for modulating data packets, providing modulated data packets to one or more antennas 1010 for transmission, and demodulating data packets received from one or more antennas 1010. Transceiver 1006 may include one or more transmit chains, one or more receive chains, or combinations thereof.

[0223] The transmission chain can be configured to generate and transmit signals (e.g., control information, data, data packets). The transmission chain may include at least one modulator for modulating data onto a carrier signal, preparing the signal for transmission over a wireless medium. The at least one modulator may be configured to support one or more techniques, such as amplitude modulation (AM), frequency modulation (FM), or digital modulation schemes such as phase shift keying (PSK) or quadrature amplitude modulation (QAM). The transmission chain may also include at least one power amplifier configured to amplify the modulated signal to an appropriate power level suitable for transmission over a wireless medium. The transmission chain may further include one or more antennas 1010 for transmitting the amplified signal into the air or wireless medium.

[0224] A receiver chain can be configured to receive signals (e.g., control information, data, data packets) via a wireless medium. For example, the receiver chain may include one or more antennas 1010 for receiving signals over the air or via a wireless medium. The receiver chain may include at least one amplifier (e.g., a low-noise amplifier (LNA)) configured to amplify the received signal. The receiver chain may include at least one demodulator configured to demodulate the received signal and acquire transmitted data by reversing the modulation technique applied during signal transmission. The receiver chain may include at least one decoder for decoding the demodulated signal to receive the transmitted data.

[0225] Figure 11An example of a processor 1100 supporting awareness of UL synchronization transmission delay according to various aspects of this disclosure is illustrated. Processor 1100 may be an example of a processor configured to perform various operations according to the examples described herein. Processor 1100 may include a controller 1102 configured to perform various operations according to the examples described herein. Processor 1100 may optionally include at least one memory 1104, such as an L1 / L2 / L3 cache. Additionally or alternatively, processor 1100 may optionally include one or more arithmetic logic units (ALUs) 1106. One or more of these components may be electronically communicated or otherwise coupled (e.g., operative ground, communicative ground, functional ground, electronic ground, electrical ground) via one or more interfaces (e.g., buses).

[0226] Processor 1100 may be a processor chipset and includes a protocol stack (e.g., a software stack) executed by the processor chipset to perform various operations (e.g., receive, acquire, retrieve, send, output, forward, store, determine, identify, access, write, read) according to the examples described herein. The processor chipset may include one or more cores, one or more caches (e.g., memory local to the processor chipset or included in the processor chipset (e.g., processor 1100)) or other memory (e.g., random access memory (RAM), read-only memory (ROM), dynamic RAM (DRAM), synchronous dynamic RAM (SDRAM), static RAM (SRAM), ferroelectric RAM (FeRAM), magnetic RAM (MRAM), resistive RAM (RRAM), flash memory, phase-change memory (PCM), etc.).

[0227] Controller 1102 can be configured to manage and coordinate various operations of processor 1100 (e.g., signaling, receiving, acquiring, retrieving, transmitting, outputting, forwarding, storing, determining, identifying, accessing, writing, and reading) such that processor 1100 supports these operations according to the examples described herein. For example, controller 1102 can operate as a control unit of processor 1100 to generate control signals for managing the operation of various components of processor 1100. These control signals include enabling or disabling functional units, selecting data paths, initiating memory accesses, and coordinating operation timing.

[0228] Controller 1102 may be configured to fetch (e.g., fetch, retrieve, receive) instructions from memory 1104 and determine subsequent instructions(s) to be executed, enabling processor 1100 to support various operations according to the examples described herein. Controller 1102 may be configured to track the memory addresses of instructions associated with memory 1104. Controller 1102 may be configured to decode instructions to determine the operations to be performed and the operands involved. For example, controller 1102 may be configured to interpret instructions and determine control signals to be output to other components of processor 1100, enabling processor 1100 to support various operations according to the examples described herein. Additionally or alternatively, controller 1102 may be configured to manage data flow within processor 1100. Controller 1102 may be configured to control data transfers between registers, arithmetic logic unit (ALU), and other functional units of processor 1100.

[0229] Memory 1104 may include one or more caches (e.g., memory or other memory, such as RAM, ROM, DRAM, SDRAM, SRAM, MRAM, flash memory, etc., local to or included in processor 1100). In some implementations, memory 1104 may reside within or on the processor chipset (e.g., local to processor 1100). In some other implementations, memory 1104 may reside outside the processor chipset (e.g., remote from processor 1100).

[0230] Memory 1104 may store computer-readable, computer-executable code, including instructions that, when executed by processor 1100, cause processor 1100 to perform the various functions described herein. The code may be stored in a non-transitory computer-readable medium, such as system memory or another type of memory. Controller 1102 and / or processor 1100 may be configured to execute computer-readable instructions stored in memory 1104 to cause processor 1100 to perform various functions. For example, processor 1100 and / or controller 1102 may be coupled to or coupled to memory 1104, and processor 1100, controller 1102, and memory 1104 may be configured to perform the various functions described herein. In some examples, processor 1100 may include multiple processors, and memory 1104 may include multiple memories. One or more of the multiple processors may be coupled to one or more of the multiple memories, which may be configured individually or collectively to perform the various functions described herein.

[0231] One or more ALUs 1106 can be configured to support a variety of operations as described in the examples herein. In some implementations, one or more ALUs 1106 may reside within or on a processor chipset (e.g., processor 1100). In some other implementations, one or more ALUs 1106 may reside outside the processor chipset (e.g., processor 1100). One or more ALUs 1106 can perform one or more calculations on data, such as addition, subtraction, multiplication, and division. For example, one or more ALUs 1106 can receive input operands and an opcode that determines the operation to be performed. One or more ALUs 1106 are configured with various logic and arithmetic circuitry, including adders, subtractors, shifters, and logic gates, to process and manipulate data according to the operations. Alternatively or concurrently, one or more ALU 1106 may support logical operations such as AND, OR, XOR, NOR, and NAND, enabling one or more ALU 1106 to handle conditional operations, comparisons, and bitwise operations.

[0232] Based on the examples disclosed herein, processor 1100 may support wireless communication. Processor 1100 may be configured or operable to support components for performing the following: receiving a first indication from a base station, the first indication indicating that: delay information for at least one synchronized transmission set will be reported, wherein each of the at least one synchronized transmission set includes packets from multiple QoS streams; determining one or more synchronized transmission sets in the at least one synchronized transmission set; and triggering the reporting of delay information for the one or more synchronized transmission sets based on the first indication.

[0233] Alternatively, in some implementations, processor 1100 may be configured or operable to support components for performing the following: sending a first indication to the UE, the first indication indicating that delay information for at least one synchronization transmission set will be reported, wherein each synchronization transmission set in the at least one synchronization transmission set includes packets from multiple QoS streams; and receiving delay information from the UE for one or more synchronization transmission sets in the at least one synchronization transmission set.

[0234] Figure 12 A flowchart illustrating a method 1200 for supporting UL synchronization transmission delay awareness according to various aspects of this disclosure is shown. Operation of method 1200 may be implemented by the device or components thereof described herein. For example, operation of method 1200 may be performed by the UE 104 described herein. In some implementations, the device may execute a set of instructions to control the functional elements of the device to perform the described functions. Alternatively or concurrently, the device may use dedicated hardware to perform aspects of the described functions.

[0235] At 1210, the method may include: receiving a first indication from a base station, the first indication indicating that delay information for at least one synchronization transmission set will be reported, wherein each synchronization transmission set in the at least one synchronization transmission set includes data packets from multiple QoS flows. The operation of 1210 can be performed according to the examples described herein. In some implementations, aspects of the operation of 1210 may be derived from references... Figure 1 The device described herein performs the operation.

[0236] At 1220, the method may include: determining one or more synchronization transport sets from at least one synchronization transport set. The operation of 1220 can be performed according to the examples described herein. In some implementations, aspects of the operation of 1220 may be derived from references... Figure 1 The device described herein performs the operation.

[0237] At 1230, the method may include: triggering a report of delay information for one or more synchronization transport sets based on a first indication. The operation at 1230 can be performed according to the examples described herein. In some implementations, aspects of the operation at 1230 may be derived from references... Figure 1 The device described herein performs the operation.

[0238] Figure 13 A flowchart illustrating a method 1300 for supporting UL synchronization transmission delay awareness according to various aspects of this disclosure is shown. Operation of method 1300 can be implemented by the device or components thereof described herein. For example, operation of method 1300 can be performed by the base station 102 described herein. In some implementations, the device can execute a set of instructions to control the functional elements of the device to perform the described functions. Alternatively or concurrently, the device can use dedicated hardware to perform aspects of the described functions.

[0239] At 1310, the method may include: sending a first indication to the UE, the first indication indicating that delay information for at least one synchronization transmission set will be reported. Each synchronization transmission set in the at least one synchronization transmission set includes packets from multiple QoS flows. The operation of 1310 can be performed according to the examples described herein. In some implementations, aspects of the operation of 1310 may be derived from references... Figure 1 The device described herein performs the operation.

[0240] At 1320, the method may include: receiving from the UE delay information for one or more synchronization transmission sets in at least one synchronization transmission set. The operation of 1320 can be performed according to the examples described herein. In some implementations, aspects of the operation of 1320 may be derived from references... Figure 1 The device described herein performs the operation.

[0241] It should be noted that, for reference Figures 1 to 9The implementation of this disclosure described herein is also applicable to device 1000, processor 1100, and methods 1200 and 1300.

[0242] It should be noted that the methods described in this paper describe possible implementations, and the operations and steps can be rearranged or otherwise modified, and other implementations are also possible. Furthermore, aspects from two or more methods can be combined.

[0243] The various illustrative boxes and components disclosed herein can be implemented or performed using a general-purpose processor, DSP, ASIC, CPU, FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware component or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, the processor may be any processor, controller, microcontroller or state machine. The processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration).

[0244] The functions described herein can be implemented in hardware, software executed by a processor, firmware, or any combination thereof. If implemented in software executed by a processor, the functions can be stored on or transmitted via a computer-readable medium as one or more instructions or code. Other examples and implementations are within the scope of this disclosure and the appended claims. For example, due to the nature of software, the functions described herein can be implemented using software executed by a processor, hardware, firmware, hardwiring, or any combination thereof. Features implementing the functions can also be physically located in various locations, including being distributed such that portions of the functions are implemented in different physical locations.

[0245] Computer-readable media include both non-transitory computer storage media and communication media, with communication media including any medium that facilitates the transfer of a computer program from one place to another. Non-transitory storage media can be any available medium that can be accessed by a general-purpose or special-purpose computer. For example, non-transitory computer-readable media can include RAM, ROM, electrically erasable programmable ROM (EEPROM), flash memory, optical disc (CD) ROM or other optical disc storage, magnetic disk storage or other magnetic storage devices, or any other non-transitory medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor.

[0246] As used herein, including in the claims, the article “a” preceding an element is unrestricted and should be understood to mean “at least one” or “one or more” of those elements. The terms “a,” “at least one,” “one or more,” and “at least one of one or more” are interchangeable. As used herein, including in the claims, the use of “or” in a list of items (e.g., a list of items beginning with phrases such as “at least one of…” or “one or more of…” or “one or both of…”) indicates an inclusive list, such that, for example, a list of at least one of A, B, or C means A or B or C or AB or AC or BC or ABC (i.e., A and B and C). Furthermore, as used herein, the phrase “based on” should not be construed as a reference to a closed set of conditions. For example, an example step described as “based on condition A” without departing from the scope of this disclosure could be based on both condition A and condition B. In other words, as used herein, the phrase “based on” should be interpreted in the same manner as the phrase “at least partially based on.” Furthermore, as used herein, including in the claims, “set” can include one or more elements.

[0247] The description provided herein is intended to enable those skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the scope of this disclosure. Therefore, this disclosure is not limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A user equipment (UE), comprising: processor; as well as The transceiver is coupled to the processor. The processor is configured as follows: The transceiver receives a first indication from the base station, the first indication indicating that delay information for at least one synchronous transmission set will be reported, wherein each synchronous transmission set in the at least one synchronous transmission set includes data packets from multiple Quality of Service (QoS) streams; Determine one or more synchronization transmission sets within the at least one synchronization transmission set; as well as Based on the first instruction, a report of the delay information for the one or more synchronous transmission sets is triggered.

2. The UE of claim 1, wherein the processor is configured to trigger a report of first delay information for a first synchronization transmission set in the one or more synchronization transmission sets by: The timer is started based on one of the following: The initial data packet in the first synchronous transmission set is sent or successfully sent. All data packets in the data packet set of the first synchronous transmission set have been sent or have been successfully sent, or All packets from one of the QoS flows were sent or successfully sent; and The report of the first delay information for the first synchronization transmission set is triggered based on the determination that the remaining time of the timer is less than or equal to a threshold for the remaining time of the timer, or the timer has expired.

3. The UE of claim 2, wherein the first delay information for the first synchronization transmission set includes at least one of the following: When the first delay information for the first synchronous transmission set is sent to the base station, the first remaining time of the timer, When the report of the first delay information is triggered, the second remaining time of the timer... When the first delay information for the first synchronization transmission set is sent to the base station, the first data volume of the remaining data packets in the first synchronization transmission set, or When the report of the first delay information is triggered, the second data amount of the remaining data packets in the first synchronous transmission set.

4. The UE according to claim 2, wherein the processor is further configured to: The configuration for receiving a report of the first delay information for the first synchronization transmission set from the base station via the transceiver includes the value of the timer and the threshold for the remaining time of the timer.

5. The UE of claim 2, wherein the first synchronization transmission set comprises data packets from a first QoS stream and a second QoS stream; and The processor is configured to start the timer via the following: One of the first timer and the second timer is started based on the arrival order of the data packets from the first QoS stream and the second QoS stream, or based on the transmission order of the data packets from the first QoS stream and the second QoS stream.

6. The UE according to claim 1, wherein the processor is further configured to: A first Media Access Control (MAC) CE is sent to the base station via the transceiver, the first MAC CE including the delay information for the one or more synchronous transmission sets.

7. The UE of claim 6, wherein the first MAC CE further comprises at least one of the following: Synchronization association information for the one or more synchronization transmission sets, or The sequence number of each synchronization transmission set in the one or more synchronization transmission sets.

8. The UE according to claim 7, wherein the synchronization association information includes at least one of the following: Synchronization association identifier (ID) for the corresponding synchronization transmission set in one or more of the synchronization transmission sets. The ID of at least one data radio bearer (DRB) associated with the QoS flow. The ID of at least one logical channel (LCH) associated with the QoS flow, or The ID of the QoS stream.

9. The UE according to claim 7, wherein the processor is further configured to: A configuration for receiving, via the transceiver, a report of delay information for the at least one set of synchronized transmissions from the base station, the configuration including the synchronization association information.

10. The UE of claim 6, wherein the processor is configured to send the first MACCE via: Based on the determination that the first priority of the first MAC CE is higher than the second priority of the second MAC CE and the third priority of the third MAC CE, the first MAC CE is sent, wherein the second MAC CE includes a delay status report and the third MAC CE includes a cache status report.

11. The UE of claim 1, wherein the processor is configured to trigger a report of first delay information for a first synchronization transmission set in the one or more synchronization transmission sets based on one of the following: The initial data packet in the first synchronous transmission set is sent or successfully sent. All data packets in the data packet set of the first synchronous transmission set have been sent or have been successfully sent, or All packets from one of the QoS flows are sent or successfully sent.

12. The UE of claim 11, wherein the first delay information for the first synchronization transmission set includes at least one of the following: When the first delay information for the first synchronized transmission set is sent to the base station, the first remaining time for the synchronization threshold of the QoS stream having multiple modalities, When the report of the first delay information is triggered, the second remaining time for the synchronization threshold of the QoS stream having the multiple modalities, When the first delay information for the first synchronization transmission set is sent to the base station, the first data volume of the remaining data packets in the first synchronization transmission set, or When the report of the first delay information is triggered, the second data amount of the remaining data packets in the first synchronous transmission set.

13. The user equipment according to claim 12, wherein: The QoS stream includes a first QoS stream and a second QoS stream; Data packets from the first QoS stream arrive or are sent before data packets from the second QoS stream; and The remaining time of the synchronization threshold includes a first remaining time for a first synchronization threshold for the QoS flow having multiple modalities.

14. The UE of claim 6, wherein the one or more synchronization transmission sets include at least a first synchronization transmission set and a second synchronization transmission set; and The processor is configured to trigger a report of the delay information for the one or more synchronous transmission sets by: Trigger a report of the first delay information for the first synchronized transmission set; and Trigger a report of the second delay information for the second synchronous transmission set.

15. A base station, comprising: processor; as well as The transceiver is coupled to the processor. The processor is configured as follows: A first indication is sent to the user equipment (UE) via the transceiver, the first indication indicating that delay information for at least one synchronous transmission set will be reported, wherein each synchronous transmission set in the at least one synchronous transmission set includes data packets from multiple quality of service (QoS) streams; as well as The delay information for one or more synchronization transmission sets in the at least one synchronization transmission set is received from the UE via the transceiver.

16. The base station of claim 15, wherein the delay information includes first delay information for a first synchronous transmission set, the first delay information including at least one of the following: When the first delay information for the first synchronous transmission set is sent to the base station, the first remaining time of the timer... When the report of the first delay information is triggered, the second remaining time of the timer... When the first delay information for the first synchronization transmission set is sent to the base station, the first data volume of the remaining data packets in the first synchronization transmission set, or When the report of the first delay information is triggered, the second data amount of the remaining data packets in the first synchronous transmission set.

17. The base station according to claim 16, wherein the processor is further configured to: A configuration for sending a report of the first delay information for the first synchronization transmission set to the UE via the transceiver, the configuration including the value of the timer and the threshold for the remaining time of the timer.

18. The base station according to claim 15, wherein the processor is further configured to: The transceiver receives a first Media Access Control (MAC) CE from the UE, the first MAC CE including the delay information for the one or more synchronous transport sets.

19. The base station of claim 18, wherein the first MAC CE further comprises at least one of the following: Synchronization association information for the one or more synchronization transmission sets, or The sequence number of each synchronization transmission set in the one or more synchronization transmission sets.

20. The base station of claim 15, wherein the processor is configured to trigger a report of first delay information for a first synchronization transmission set in the one or more synchronization transmission sets based on one of the following: The initial data packet in the first synchronous transmission set is sent or successfully sent. All data packets in the data packet set of the first synchronous transmission set have been sent or have been successfully sent, or All packets from one of the QoS flows are sent or successfully sent.

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