Adaptive FPGA license plate recognition system in bad weather

By utilizing an adaptive anti-interference FPGA license plate recognition system, which employs hardware parallel computing and adaptive circuit selection, the problem of low license plate recognition accuracy under adverse weather conditions is solved, achieving low-cost and high-efficiency license plate recognition.

CN122473778APending Publication Date: 2026-07-28GUILIN UNIV OF ELECTRONIC TECH
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Patent Information

Application Number
CN202610678332.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-05-18
Publication Date
2026-07-28

AI Technical Summary

Technical Problem

Existing FPGA license plate recognition systems have low recognition accuracy in severe weather conditions, and are expensive and power-consuming, making them unable to adapt to changes in different weather conditions.

Method used

Employing an FPGA main control chip, image acquisition module, weather feature discrimination module, adaptive anti-interference preprocessing module, license plate positioning and correction module, character segmentation and recognition module, and on-chip cache module, the system achieves sensorless condition discrimination and image optimization by hardware parallel computing of image features and adaptively selecting anti-interference processing circuits.

Benefits of technology

Significantly improves license plate recognition accuracy in adverse weather conditions, reduces hardware costs and power consumption, and meets the requirements for real-time outdoor recognition.

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Abstract

This invention discloses an adaptive FPGA license plate recognition system and anti-interference method for severe weather, belonging to the field of embedded digital image processing technology. To address the technical shortcomings of traditional FPGA license plate recognition systems, such as fixed image processing parameters, low recognition accuracy in severe weather, and reliance on external weather sensors, this invention sets up a weather feature discrimination module and an adaptive anti-interference preprocessing module. The weather feature discrimination module constructs an 8×8 pixel hardware sliding sampling window based on a shift register, extracting four types of features in parallel using pure hardware: average image brightness, gray-level squared cumulative dispersion, noise quantity, and highlight pixel ratio. It also distinguishes character edges from noise by combining gradient direction, and outputs a 3-bit binary weather code through a four-channel hardware comparator, achieving automatic judgment of sensorless weather conditions. The adaptive anti-interference preprocessing module integrates four mutually exclusive hardware circuits: a fog enhancement circuit, a rain filtering circuit, a strong light suppression circuit, and a nighttime noise reduction and brightness enhancement circuit. It adaptively switches the corresponding anti-interference processing link according to the weather code and uses clock gating technology to shut down idle circuits to reduce dynamic power consumption. This invention uses addition, subtraction, and shift operations to implement hardware logic, avoiding floating-point operations. It is compatible with low-end and mid-range FPGA chips, with a single-frame image processing latency of ≤6ms. Under harsh working conditions, the license plate recognition accuracy can reach over 95%, making it suitable for outdoor traffic checkpoints and embedded capture devices.
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Description

Technical Field

[0001] This invention relates to the fields of FPGA hardware logic design, embedded digital image processing, and intelligent traffic license plate recognition technology, specifically to an FPGA license plate recognition system based on pure hardware image feature discrimination and adaptive anti-interference. Background Technology

[0002] Against the backdrop of the rapid development of intelligent transportation systems, license plate recognition technology, as a core means of vehicle identification, is widely used in scenarios such as community access control, parking lot management, and traffic checkpoint image capture. FPGA-based embedded license plate recognition systems have become the mainstream solution for low-end embedded recognition devices due to their advantages of simple logic structure, low hardware cost, and strong real-time performance.

[0003] Existing technologies generally employ a fixed pipeline processing architecture, with the process consisting of image acquisition, grayscale conversion, fixed-parameter filtering, edge detection, character segmentation, and template matching recognition. While this architecture is simple in logic, has low resource consumption, and is compatible with low- to mid-range FPGA chips, it exhibits significant technical shortcomings in practical outdoor applications.

[0004] Traditional FPGA license plate recognition systems have fixed image processing logic, with filter parameters and image enhancement thresholds set at the factory. This makes it impossible to adjust the processing logic according to changes in outdoor weather, and they are only suitable for sunny conditions with uniform lighting. In adverse weather conditions, images appear washed out and have reduced contrast in foggy weather; rainy weather presents dotted raindrops and horizontal water streaks; strong light causes white spots on the license plate paint due to reflections; and nighttime environments are noisy. These interferences can easily cause characters to break or stick together, resulting in a significant drop in recognition accuracy.

[0005] In addition, existing intelligent recognition devices require external light and humidity sensors to collect environmental parameters, which makes hardware wiring complex and increases costs, and does not meet the lightweight design requirements of small embedded devices; moreover, traditional image processing circuits are always on, with no idle circuit shutdown logic, and logic resources are constantly flipped, resulting in high dynamic power consumption of the system. Summary of the Invention

[0006] To address the problems existing in the background technology, this invention proposes an FPGA license plate recognition system and anti-interference method that adapts to adverse weather conditions, so as to achieve sensorless working condition discrimination and targeted image anti-interference processing, while taking into account hardware cost, recognition accuracy and real-time performance.

[0007] An adaptive FPGA license plate recognition system for severe weather is characterized by comprising an FPGA main control chip, an image acquisition module, a weather feature discrimination module, an adaptive anti-interference preprocessing module, a license plate positioning and correction module, a character segmentation and recognition module, an on-chip cache module, and an output display module. The image acquisition module is used to acquire vehicle license plate images in real time and output grayscale data streams. The weather feature discrimination module is electrically connected to the image acquisition module and constructs an 8×8 pixel sliding sampling window through a shift register, extracting four image parameters in parallel: average brightness, grayscale squared cumulative dispersion, noise quantity, and highlight pixel ratio. The system identifies features and distinguishes noise from character edges based on gradient direction, outputting a 3-bit binary weather code. The adaptive anti-interference preprocessing module is electrically connected to the weather feature discrimination module and incorporates four mutually exclusive anti-interference hardware circuits: a fog enhancement circuit, a rain filtering circuit, a strong light suppression circuit, and a nighttime noise reduction and brightness enhancement circuit. These circuits selectively activate the corresponding processing circuits based on the weather code. The license plate positioning and correction module is used for license plate area extraction and tilt correction. The character segmentation and recognition module combines dynamic binarization and template matching to complete character recognition. The on-chip cache module is used to cache the image data stream. The output display module is used to display the recognition results.

[0008] An adaptive FPGA license plate recognition anti-interference method for adverse weather conditions, characterized by the following steps: S1, Image acquisition: The image acquisition module acquires outdoor license plate images, performs grayscale processing, and caches the grayscale image data stream to on-chip block random access memory; S2, Weather feature extraction: The weather feature discrimination module uses an 8×8 pixel sliding window to calculate the average brightness of the image, the cumulative grayscale square dispersion, the number of noise points in the eight-neighbor area, and the proportion of highlight pixels in hardware parallel processing; S3, Operating condition discrimination coding: The four types of feature parameters are compared with preset calibration thresholds, and when counting the number of noise points, the gradient direction of the eight-neighbor area of ​​the pixel is judged to filter out those with continuous vertical gradients. Alternatively, pixels in the horizontal gradient direction are used to distinguish character edges, and the hardware ultimately generates a 3-digit unique weather code; S4, Adaptive link switching: Based on the weather code, the operating condition priority is determined, the corresponding anti-interference hardware circuit is activated, and the clocks of other idle circuits are turned off; S5, Image preprocessing: Image optimization is completed through the matched anti-interference circuit to eliminate image interference caused by severe weather; S6, License plate processing and recognition: After preprocessing, the license plate area is locked by edge detection, tilt correction is completed, local dynamic binarization is used to segment characters, and the license plate recognition is completed by combining template matching algorithm; S7, Result output: The recognition result is transmitted to the output display module to complete the single frame image recognition process.

[0009] This invention uses pure hardware logic to implement weather discrimination and image anti-interference processing. It does not require embedded soft cores or floating-point operations, has a simple structure, high real-time performance, and significantly improves the accuracy of license plate recognition under harsh working conditions. It is suitable for outdoor traffic capture and embedded access control recognition equipment. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the overall system of the present invention;

[0011] Figure 2 This is a block diagram of the overall hardware architecture of the system of the present invention, labeled as follows: 101-FPGA main control chip, 102-image acquisition camera, 103-LCD display module, 104-serial communication module;

[0012] Figure 3 This is a schematic diagram of the signal connections of the internal functional modules of the FPGA, labeled: 201-Weather Feature Discrimination Module, 202-Adaptive Anti-interference Preprocessing Module, 203-License Plate Positioning Correction Module;

[0013] Figure 4 Hardware logic flowchart for weather feature discrimination;

[0014] Figure 5 Comparison images of the effects before and after image processing for four types of severe weather;

[0015] Figure 6 This is a flowchart of the overall system operation sequence. Detailed Implementation

[0016] To make the above-mentioned objectives, features, and advantages of the present invention clearer and easier to understand, an outdoor traffic capture application using CycloneIVE series FPGA chips is taken as an example. This application is mainly used in community access control, parking lot management, and short-distance traffic checkpoint scenarios. The present invention will be further described in detail with reference to the accompanying drawings and specific embodiments.

[0017] Figure 1 This is a schematic diagram of the overall system of the present invention; Figure 2 This is a block diagram of the overall hardware architecture of the system of the present invention. Figure 3 This is a schematic diagram of the signal connections of the internal functional modules of an FPGA; combined with Figure 1 The present invention discloses an FPGA license plate recognition system adapted to adverse weather conditions, comprising an FPGA main control chip (101), an image acquisition camera (102), an LCD display module (103), and a serial communication module (104). The system operates at a clock speed of 50MHz, and all logic is written in VerilogHDL hardware description language.

[0018] Hardware connection relationship: The OV5640 image acquisition camera (102) is connected to the FPGA main control chip (101) through the SCCB communication protocol to complete image acquisition; the FPGA has a built-in on-chip cache module (specifically implemented by block random access memory) to cache the image data stream; the FPGA output is connected to the LCD display module (103) and the serial communication module (104) respectively to realize image visualization and data upload.

[0019] Combination Figure 3 The FPGA's internal functional modules include a weather feature discrimination module (201), an adaptive anti-interference preprocessing module (202), a license plate positioning and correction module (203), a character segmentation and recognition module, and an on-chip cache module. The weather feature discrimination module (201) receives the grayscale data stream output from the image acquisition module and outputs weather codes to the adaptive anti-interference preprocessing module (202); the adaptive anti-interference preprocessing module (202) outputs the preprocessed image to the license plate positioning and correction module (203); the license plate positioning and correction module (203) outputs the corrected license plate image to the character segmentation and recognition module. To clearly illustrate the technical principles of this invention, the core modules, circuits, and discrimination logic are described in detail below.

[0020] The weather feature discrimination module adopts an 8×8 pixel rectangular sliding sampling window, uses the FPGA's built-in shift register array to cache image pixels row by row, completes window column sliding in a single clock cycle, and collects local image features in real time. The sampled data is cached in on-chip block random access memory and does not occupy external storage resources.

[0021] The feature parameters of the weather feature discrimination module are calculated as follows: average brightness, calculated using the following formula: Used to distinguish between day and night and strong light environments, the FPGA hardware implementation performs a lossless division operation by right-shifting by 6 bits, saving logic resources; the grayscale discrete feature value is calculated using the following formula: It is used to characterize image sharpness, avoiding complex operations such as square root calculations throughout the process; Eight-neighbor noise count: with the current pixel as the center, the gray-level difference of eight neighboring pixels is determined, and the difference is marked as noise if it is greater than 30; At the same time, edge filtering logic is added: only when the gradient direction is disordered and there is no continuous vertical or horizontal gradient is it judged as raindrop noise, and the interference of straight character edges of license plates is eliminated; Highlight pixel ratio: count the number of saturated pixels with a gray-level value of 255, calculate the ratio, and determine the strong light reflection condition of the license plate.

[0022] This invention acquires 200 outdoor images taken in severe weather, statistically analyzes the extreme values ​​of feature parameters to determine thresholds, and generates a 3-bit one-hot code using a four-channel hardware comparator. The threshold is stored in the FPGA's internal read-only memory. The discrimination logic is shown in the table below: Table 1 Discriminant Logic Table Weather conditions Average brightness Gray-scale discrete eigenvalues Noise Count Highlight pixel ratio Hardware coding sunny 60~180 ≥1200 ≤12 ≤15% 001 Dense fog 90~160 <1200 ≤12 ≤15% 010 rain 70~170 ≥1200 >12 ≤15% 100 glare >180 ≥1500 ≤12 >15% 011 at night <60 <1000 >8 ≤5% 110

[0023] The fog enhancement circuit adopts a four-stage pipelined dark channel enhancement architecture, and the hardware implementation steps are as follows:

[0024] Minimum value extraction: The minimum grayscale value in the neighborhood is extracted by parallel comparison using a 5×5 shift register array to generate a dark channel grayscale image;

[0025] Atmospheric base grayscale A hardware statistics: A 16-level grayscale histogram statistics circuit is set up to uniformly divide the grayscale from 0 to 255 into 16 brightness intervals; the image flows through the statistics circuit pixel by pixel, and the number of pixels in each interval is accumulated in real time; after a single frame image is acquired, a priority encoder that accumulates from high to low bits is used. When the accumulated number of pixels first exceeds 0.1% of the total number of pixels in the whole frame, the upper limit of the corresponding brightness interval is taken as the atmospheric base grayscale A;

[0026] Substrate subtraction: Combinatorial logic subtraction is used to remove hazy, white substrates. Formula: ;

[0027] Hardware dynamic stretching: A simple, hardware-implementable amplification factor is used, with a magnification factor of 2.5 selected, employing a shift combination formula: The formula has simple hardware logic, no floating-point operations, and an equivalent magnification factor of 2.5 times, which is used to stretch the contrast of foggy images. Finally, the output grayscale range is limited to 0~255 by truncation logic.

[0028] The rain filtering circuit uses a cross-shaped 5-pixel filter core to filter out dotted raindrops through hardware comparison and sorting; a line differential detection circuit is built to identify horizontal watermark areas, and the damage is repaired by up and down pixel interpolation; at the same time, edge judgment logic is added to shield character areas with continuous vertical gradients to avoid blurring of character strokes.

[0029] The strong light suppression circuit employs a three-segment nonlinear grayscale mapping, using a hardware comparator for parallel partitioning, with fixed mapping rules and no floating-point operations. The mapping relationship is as follows: Dark area (0~85): linear grayscale brightening, mapping formula: Transition zone (86~170): Straight-through retention, Highlight area (171~255): Inverse proportional compression, forcibly compressing the maximum highlight pixel size of 255 to 190. Compression formula: .

[0030] The nighttime noise reduction and brightness enhancement circuit adopts a two-stage cascaded noise reduction architecture, with 4×4 mean filtering to smooth background noise and eight-neighbor differential discrimination to remove isolated salt and pepper noise. Gray-scale compensation is only performed on the license plate area of ​​interest, with a fixed increment of 12 gray levels to avoid global brightness enhancement and noise amplification, thus optimizing the character recognition at night.

[0031] The system sets the operating conditions as follows: rainy day > heavy fog > strong light > night > sunny day. The FPGA's internal priority encoder receives the weather code and only one anti-interference circuit is activated at a time. The remaining idle circuits trigger the clock gating to turn off the clock signal, thus preventing image distortion caused by the superposition of multiple circuits and reducing the power consumption of logic resource switching.

[0032] S1. Image Acquisition: The image acquisition module acquires outdoor license plate images, performs grayscale processing, and caches the grayscale image data stream to on-chip block random access memory.

[0033] S2. Weather Feature Extraction: The weather feature discrimination module starts an 8×8 sliding window and performs parallel hardware calculations of four types of image features.

[0034] S3, Operating Condition Discrimination Coding: The four types of feature parameters are compared with the preset calibration thresholds to filter out interference pixels at the character edges, and finally the hardware generates a 3-bit unique hot weather code.

[0035] S4. Adaptive Link Switching: Determines operating condition priority based on weather codes, activates corresponding anti-interference hardware circuits, and deactivates clocks in other idle circuits.

[0036] S5. Image preprocessing: Image optimization is completed through a matched anti-interference circuit to eliminate image interference caused by severe weather.

[0037] S6. License Plate Processing and Recognition: After preprocessing, the image is used to lock the rectangular area of ​​the license plate using the Canny edge detection algorithm. Hardware perspective transformation is used to correct the tilt of the license plate within ±25°. The license plate characters are segmented using a local dynamic binarization algorithm, filtering out interference from rivets and stains. Parallel comparison and recognition are completed by calling the built-in character template library.

[0038] S7. Result Output: The recognition result is displayed in real time through the LCD display module, and the data is transmitted to the outside via the serial communication module. After the single frame image processing is completed, it waits for the next frame acquisition command.

[0039] Under identical hardware conditions, 50 samples from each of four types of severe weather were selected for testing. The test environment was the Quartus 18.0 simulation platform, and power consumption analysis was performed using the Quartus PowerAnalyzer tool. Compared to the traditional architecture where all circuits are always on, this design reduces dynamic power consumption by 28%; the recognition rate is 94.2% in foggy weather, 95.1% in rainy weather, 96.3% in bright sunlight, and 97.2% at night, with an average recognition accuracy of 95.7%; the average processing latency per frame is 5.2ms, meeting the requirements for real-time outdoor recognition.

[0040] It is understood that, based on the technical solution of this invention, which is implemented entirely using basic logic units such as addition, subtraction, and shift operations, those skilled in the art can easily port it to other mid-to-low-end FPGA chips such as Artix-7 and Spartan-6, and expect to obtain the same technical effect.

[0041] The above description is merely a preferred embodiment of the present invention. Furthermore, those skilled in the art can make various modifications and variations to the invention while maintaining its principles. If such modifications and variations fall within the scope of the claims of the present invention and their equivalents, then these modifications and variations should also be considered within the protection scope of the present invention.

Claims

1. A weather-adaptive FPGA license plate recognition system, characterized in that, The system includes an FPGA main control chip, an image acquisition module, a weather feature discrimination module, an adaptive anti-interference preprocessing module, a license plate positioning and correction module, a character segmentation and recognition module, an on-chip cache module, and an output display module. The image acquisition module is used to acquire vehicle license plate images in real time, perform grayscale processing, and output a grayscale data stream. The weather feature discrimination module is electrically connected to the image acquisition module. It constructs an 8×8 pixel sliding sampling window through a shift register and extracts four types of features in parallel: average image brightness, grayscale squared cumulative dispersion, noise quantity, and highlight pixel ratio. It also combines gradient direction to distinguish character edges from noise. The system outputs a 3-bit unique thermal weather code via a four-channel hardware comparator; the adaptive anti-interference preprocessing module incorporates four mutually exclusive hardware circuits: a fog enhancement circuit, a rain filtering circuit, a strong light suppression circuit, and a nighttime noise reduction and brightness enhancement circuit, selectively activating the corresponding processing circuit based on the weather code; the license plate positioning and correction module extracts the region of interest from the license plate and performs tilt correction; the character segmentation and recognition module uses a local dynamic binarization algorithm combined with template matching to complete license plate character recognition; the on-chip cache module uses a block random access memory to cache the image data stream; and the output display module visualizes the recognition results.

2. The FPGA license plate recognition system for adverse weather conditions according to claim 1, characterized in that, The weather feature discrimination module completes a single-pixel sliding update in a single clock cycle, without the need for an external meteorological sensor; it uses the cumulative sum of squared pixel grayscale differences to characterize the image dispersion, and there are no square root or floating-point division operations throughout the process, only addition, subtraction and shift operations to achieve feature calculation.

3. The FPGA license plate recognition system for adverse weather conditions according to claim 1, characterized in that, The noise determination method uses the grayscale difference of eight neighboring pixels to determine the noise level, filters out pixels with continuous vertical or horizontal gradient directions, and eliminates false noise caused by the edges of license plate characters.

4. The FPGA license plate recognition system for adverse weather conditions according to claim 1, characterized in that, The four anti-interference circuits are clock-gated, so that only one circuit works at a time, while the clocks of the other circuits are turned off, thereby reducing the dynamic power consumption of the system.

5. The FPGA license plate recognition system for adverse weather conditions according to claim 1, characterized in that, The rain filtering circuit uses a cross-shaped 5-pixel filter core, combined with a line differential interpolation circuit, to achieve the filtering of dotted raindrops and the repair of horizontal watermarks, while preserving the gradient features of character edges.

6. A weather-adaptive FPGA license plate recognition anti-interference method, characterized in that, The identification system applied to any one of claims 1-5 includes the following steps: S1. Image Acquisition: The image acquisition module acquires outdoor license plate images, performs grayscale processing, and caches the grayscale image data stream to on-chip block random access memory. S2. Weather feature extraction: The weather feature discrimination module uses an 8×8 pixel sliding window to calculate the average brightness of the image, the cumulative gray-level square dispersion, the number of noise points in the eight-neighbor area, and the proportion of highlight pixels in parallel in hardware. S3, Working Condition Discrimination Coding: The four types of feature parameters are compared with the preset calibration threshold. When counting the number of noise points, the gradient direction of the eight neighborhood of the pixel is judged, and the pixels with continuous vertical or horizontal gradient directions are filtered to distinguish the character edges. Finally, the hardware generates a 3-bit unique hot weather code. S4. Adaptive Link Switching: Determines the operating condition priority based on weather codes, activates the corresponding anti-interference hardware circuit, and shuts down the clocks of other idle circuits. S5. Image preprocessing: Image optimization is completed through a matched anti-interference circuit to eliminate image interference caused by severe weather. S6. License Plate Processing and Recognition: After preprocessing, the license plate area is locked by edge detection of the image, tilt correction is completed, local dynamic binarization is used to segment characters, and the license plate recognition is completed by combining template matching algorithm. S7. Result Output: Transmit the recognition result to the output display module to complete the single-frame image recognition process.