A gallium arsenide triple-junction solar cell and a method of manufacturing the same

Abstract

This invention provides a gallium arsenide triple-junction solar cell and its fabrication method, relating to the field of solar cell technology. It replaces the existing technology's self-forming Ge substrate with a low-cost N-type GaAs substrate and a thinner N-type Ge epitaxial layer. The thickness of the N-type Ge epitaxial layer ranges from 1 μm to 3 μm, reducing material costs by more than 40%. A two-step growth method is used to form a stacked low-temperature nucleation layer and a high-temperature host layer to form the N-type Ge epitaxial layer, which serves as the base cell of the gallium arsenide triple-junction solar cell. The epitaxial quality is high, with a dislocation density of the N-type Ge epitaxial layer less than or equal to 5 × 10⁻⁶. 6 cm ‑2 This effectively suppresses the problem of Ga / Ge interdiffusion; the photoelectric conversion efficiency of this gallium arsenide triple junction solar cell has been verified to be greater than 30%, which is comparable to the photoelectric conversion efficiency of gallium arsenide triple junction solar cells with Ge substrates forming their own bottom cells in existing technologies.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to a gallium arsenide triple-junction solar cell and its fabrication method. Background Technology

[0002] Gallium arsenide (GaAs)-based multijunction solar cells are the preferred choice for spacecraft power supplies and ground-based concentrated photovoltaic systems due to their high photoelectric conversion efficiency, excellent radiation resistance, and good temperature characteristics.

[0003] Traditional high-efficiency triple-junction solar cells typically use germanium (Ge) substrates, on which lattice-matched GaInP top cells and InGaAs middle cells are epitaxially grown, while the Ge substrate itself forms the bottom cell. However, this traditional structure has two major bottlenecks: First, Ge is a scarce element in the Earth's crust, making Ge substrates extremely expensive, accounting for a large portion of the total cost of solar cells and limiting their wider application; second, if other substrates (such as Si or GaAs substrates) are used to reduce costs, severe lattice mismatch and thermal expansion coefficient mismatch problems are encountered. Especially when directly growing Ge epitaxial layers on GaAs substrates, intense Ga / Ge atomic interdiffusion at the interface forms high-density defects, severely degrading the performance of the bottom cell. Complex and thick gradient buffer layers are usually required to mitigate this, which further increases the complexity and cost of the process.

[0004] Therefore, how to provide a triple-junction solar cell structure that can achieve high-quality epitaxy on low-cost substrates (such as GaAs substrates) and has a simple and controllable process has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] In view of the above problems, this application provides a gallium arsenide triple-junction solar cell and its fabrication method to solve the problems of high cost of traditional Ge substrates and poor epitaxial quality and complex processes on GaAs substrates. The specific solution is as follows:

[0006] The first aspect of this application provides a gallium arsenide triple-junction solar cell, the gallium arsenide triple-junction solar cell comprising:

[0007] N-type GaAs substrate;

[0008] In the first direction, an N-type Ge epitaxial layer, a first tunnel junction, and an In layer are sequentially stacked on one side of the N-type GaAs substrate. 0.01 GaAs cells, second tunnel junctions, and Ga 0.5 In 0.5P-type top cell; the N-type Ge epitaxial layer serves as the bottom cell of the gallium arsenide triple junction solar cell, with the first direction perpendicular to the plane of the N-type GaAs substrate and pointing from the N-type GaAs substrate to the N-type Ge epitaxial layer;

[0009] The N-type Ge epitaxial layer comprises a low-temperature nucleation layer and a high-temperature host layer sequentially stacked in the first direction; the thickness of the N-type Ge epitaxial layer ranges from 1 μm to 3 μm, and the dislocation density of the N-type Ge epitaxial layer is less than or equal to 5 × 10⁻⁶. 6 cm -2 .

[0010] Preferably, in the above-mentioned gallium arsenide triple junction solar cell, the crystal orientation (100) deflection angle of the N-type GaAs substrate is less than or equal to 0.5°.

[0011] Preferably, in the above-mentioned gallium arsenide triple-junction solar cell, the doping concentration of the N-type Ge epitaxial layer is in the range of 1×10⁻⁶. 18 cm -3 -5×10 18 cm -3 ;

[0012] The surface roughness RMS of the N-type Ge epitaxial layer is less than or equal to 0.5 nm;

[0013] The thickness of the low-temperature nucleation layer ranges from 50 nm to 100 nm.

[0014] The thickness of the high-temperature main body layer ranges from 0.95μm to 2.9μm.

[0015] Preferably, in the above-mentioned gallium arsenide triple-junction solar cell, the In 0.01 The lattice mismatch between the GaAs cell and the N-type Ge epitaxial layer is less than or equal to 0.1%.

[0016] The Ga 0.5 In 0.5 P-top battery and the In 0.01 The lattice mismatch of GaAs cells is less than or equal to 0.1%.

[0017] Preferably, in the above-described gallium arsenide triple-junction solar cell, the first tunnel junction includes a first N-junction array sequentially stacked in the first direction. + -GaAs layer and first P + -GaAs layer;

[0018] The second tunnel junction includes a second N-shaped structure sequentially stacked in the first direction. + -GaAs layer and second P + -GaAs layer.

[0019] Preferably, in the above-mentioned gallium arsenide triple-junction solar cell, the In 0.01 The GaAs battery includes N-type In batteries stacked sequentially in the first direction. 0.01 GaAs window layer, unintentionally doped In 0.01 GaAs base region and P-type In 0.01 GaAs emitter region;

[0020] The N-type In 0.01 The thickness of the GaAs window layer ranges from 0.05 μm to 0.2 μm, and the N-type In... 0.01 The doping concentration range of the GaAs window layer is 5 × 10⁻⁶. 18 cm -3 -1×10 19 cm -3 ;

[0021] The unintentional doping of In 0.01 The thickness of the GaAs base region ranges from 1 μm to 2 μm;

[0022] The P-type In 0.01 The thickness of the GaAs emitter region ranges from 0.3 μm to 0.8 μm, and the P-type In... 0.01 The doping concentration range of the GaAs emitter region is 1×10⁻⁶. 17 cm -3 -5×10 17 cm -3 .

[0023] Preferably, in the above-mentioned gallium arsenide triple-junction solar cell, the Ga 0.5 In 0.5 The P-top battery includes N-type Ga batteries stacked sequentially in the first direction. 0.5 In 0.5 P-window layer, unintentionally doped Ga 0.5 In 0.5 P-based region and P-type Ga 0.5 In 0.5 P-launch zone;

[0024] The N-type Ga 0.5 In 0.5 The thickness of the P-window layer ranges from 0.05 μm to 0.2 μm, and the N-type Ga... 0.5 In 0.5 The doping concentration range of the P-window layer is 5 × 10⁻⁶. 18 cm -3 -1×10 19 cm -3 ;

[0025] The unintentional doping of Ga 0.5 In 0.5 The thickness of the P-based region ranges from 1 μm to 2 μm;

[0026] The P-type Ga 0.5 In 0.5 The thickness of the P-emitter region ranges from 0.3 μm to 0.8 μm, and the P-type Ga... 0.5 In 0.5 The doping concentration range of the P-emitter region is 1×10⁻⁶. 17 cm -3 -5×10 17 cm -3 .

[0027] A second aspect of this application provides a method for fabricating a gallium arsenide triple-junction solar cell, the method comprising:

[0028] Provide an N-type GaAs substrate;

[0029] A low-temperature nucleation layer and a high-temperature host layer are stacked and formed on one side of the N-type GaAs substrate using a two-step growth method to form an N-type Ge epitaxial layer, which serves as the base cell of the gallium arsenide triple-junction solar cell. The thickness of the formed N-type Ge epitaxial layer ranges from 1 μm to 3 μm, and the dislocation density of the formed N-type Ge epitaxial layer is less than or equal to 5 × 10⁻⁶. 6 cm -2 ;

[0030] A first tunnel junction is formed on the side of the high-temperature main layer away from the low-temperature nucleation layer;

[0031] In is formed on the side of the first tunnel junction away from the high-temperature main layer. 0.01 Batteries in GaAs;

[0032] In 0.01 In GaAs, a second tunnel junction is formed on the side of the cell away from the first tunnel junction;

[0033] In the second tunnel junction away from In 0.01 GaAs forms on one side of the battery. 0.5 In 0.5 P-top battery.

[0034] Preferably, in the above-described method for fabricating gallium arsenide triple-junction solar cells, forming the low-temperature nucleation layer includes:

[0035] Under the conditions of reaction chamber pressure range of 50mbar-100mbar, growth temperature range of 300℃-400℃, GeH4 as source, and flow rate range of 5sccm-10sccm, a low-temperature nucleation layer with a thickness range of 50nm-100nm is grown.

[0036] The high-temperature main body layer includes:

[0037] Under the conditions of reaction chamber pressure ranging from 50 mbar to 100 mbar, growth temperature ranging from 550°C to 650°C, using GeH4 as the source, a flow rate ranging from 15 sccm to 30 sccm, and introducing H2S or Sn(CH3)4 as the N-type doping source, a high-temperature host layer with a thickness ranging from 0.95 μm to 2.9 μm is grown.

[0038] Preferably, in the above-described method for fabricating a gallium arsenide triple-junction solar cell, the method further includes:

[0039] In the Ga 0.5 In 0.5 On the side of the P-top cell away from the second tunnel junction, an N-type GaAs ohmic contact layer and an anti-reflection film layer are sequentially stacked.

[0040] By means of the above technical solution, this application provides a gallium arsenide triple-junction solar cell and its fabrication method. The gallium arsenide triple-junction solar cell includes: an N-type GaAs substrate; and, in a first direction, an N-type Ge epitaxial layer, a first tunnel junction, and an In layer sequentially stacked on one side of the N-type GaAs substrate. 0.01 GaAs cells, second tunnel junctions, and Ga 0.5 In 0.5 The P-type top cell; the N-type Ge epitaxial layer serves as the bottom cell of the gallium arsenide triple-junction solar cell, with the first direction perpendicular to the plane of the N-type GaAs substrate and pointing from the N-type GaAs substrate to the N-type Ge epitaxial layer; wherein, the N-type Ge epitaxial layer includes a low-temperature nucleation layer and a high-temperature host layer sequentially stacked in the first direction; the thickness of the N-type Ge epitaxial layer ranges from 1 μm to 3 μm, and the dislocation density of the N-type Ge epitaxial layer is less than or equal to 5 × 10⁻⁶. 6 cm -2 .

[0041] This gallium arsenide triple-junction solar cell replaces the existing technology's self-formed bottom cell Ge substrate with a low-cost N-type GaAs substrate and a thinner N-type Ge epitaxial layer. The thickness of the N-type Ge epitaxial layer ranges from 1μm to 3μm, reducing material costs by more than 40%, thus significantly lowering the fabrication cost of the gallium arsenide triple-junction solar cell. Furthermore, a two-step growth method is used on the N-type GaAs substrate to form a stacked low-temperature nucleation layer and a high-temperature host layer, respectively, to form the N-type Ge epitaxial layer, which serves as the bottom cell of the gallium arsenide triple-junction solar cell. The epitaxial quality is high, with a dislocation density of the N-type Ge epitaxial layer less than or equal to 5 × 10⁻⁶. 6 cm -2 This effectively suppresses the problem of Ga / Ge interdiffusion; the photoelectric conversion efficiency of this gallium arsenide triple junction solar cell has been verified to be greater than 30% (based on AM0 spectrum), which is comparable to the photoelectric conversion efficiency of gallium arsenide triple junction solar cells with Ge substrates forming their own bottom cells in existing technologies. Attached Figure Description

[0042] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.

[0043] Figure 1 This is a schematic diagram of a gallium arsenide triple-junction solar cell provided in an embodiment of the present invention;

[0044] Figure 2 A schematic diagram of the illumination IV curve of a gallium arsenide triple-junction solar cell provided in an embodiment of the present invention;

[0045] Figure 3 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention;

[0046] Figure 4 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention;

[0047] Figure 5 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention;

[0048] Figure 6 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention;

[0049] Figure 7 This is a schematic flowchart illustrating a method for fabricating a gallium arsenide triple-junction solar cell according to an embodiment of the present invention. Detailed Implementation

[0050] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments and is not intended to limit the application. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0051] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] It should be noted that the directional terms appearing in this invention are based on the relative positional relationships shown in the accompanying drawings and should not be taken as absolute limitations on this application.

[0053] Various modifications and variations can be made to this invention without departing from its spirit or scope, as will be apparent to those skilled in the art. Therefore, this invention is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this invention can be combined with each other without contradiction.

[0054] refer to Figure 1 , Figure 1 This is a schematic diagram of a gallium arsenide triple-junction solar cell provided in an embodiment of the present invention. The gallium arsenide triple-junction solar cell provided in this embodiment of the present invention includes: an N-type GaAs substrate 11.

[0055] In the first direction X, an N-type Ge epitaxial layer 12, a first tunnel junction 13, and an In layer are sequentially stacked on one side of the N-type GaAs substrate 11. 0.01 In GaAs, battery 14, second tunnel junction 15, and Ga 0.5 In 0.5 P-type top cell 16; the N-type Ge epitaxial layer 12 serves as the bottom cell of the gallium arsenide triple junction solar cell, with the first direction X perpendicular to the plane of the N-type GaAs substrate 11 and pointing from the N-type GaAs substrate 11 to the N-type Ge epitaxial layer 12.

[0056] The N-type Ge epitaxial layer 12 includes a low-temperature nucleation layer 121 and a high-temperature host layer 122, which are sequentially stacked in the first direction X. The thickness of the N-type Ge epitaxial layer 12 ranges from 1 μm to 3 μm, and the dislocation density of the N-type Ge epitaxial layer 12 is less than or equal to 5 × 10⁻⁶. 6 cm -2 .

[0057] Specifically, in this embodiment of the invention, a low-cost N-type GaAs substrate 11 and a thinner N-type Ge epitaxial layer 12 are used to replace the Ge substrate that forms the bottom cell in the prior art. The thickness of the N-type Ge epitaxial layer 12 ranges from 1μm to 3μm, and the material cost can be reduced by more than 40%, thereby greatly reducing the manufacturing cost of gallium arsenide triple junction solar cells.

[0058] Furthermore, a low-temperature nucleation layer 121 and a high-temperature host layer 122 are formed on the N-type GaAs substrate 11 using a two-step growth method to form an N-type Ge epitaxial layer 12, which serves as the base cell of the gallium arsenide triple-junction solar cell. The epitaxial quality is high, and the dislocation density of the N-type Ge epitaxial layer 12 is less than or equal to 5 × 10⁻⁶. 6 cm -2 This can effectively suppress the problem of Ga / Ge interdiffusion.

[0059] refer to Figure 2 , Figure 2 This is a schematic diagram of the illumination IV curve of a gallium arsenide triple-junction solar cell provided in an embodiment of the present invention. Verification showed that the open-circuit voltage of this gallium arsenide triple-junction solar cell is 2.74V, and the short-circuit current is 18.45mA / cm². 2 The photoelectric conversion efficiency is 31.0%; the photoelectric conversion efficiency of this gallium arsenide triple junction solar cell is greater than 30% (based on AM0 spectrum), which is comparable to the photoelectric conversion efficiency of gallium arsenide triple junction solar cells with Ge substrates forming their own bottom cells in existing technologies.

[0060] In an optional embodiment of the present invention, the crystal orientation (100) of the N-type GaAs substrate 11 is less than or equal to 0.5°.

[0061] Specifically, in this embodiment of the invention, using an N-type GaAs substrate 11 with a crystal orientation (100) angle less than or equal to 0.5° can improve the quality of subsequent epitaxy, thereby improving the photoelectric performance of the prepared gallium arsenide triple junction solar cell.

[0062] In an optional embodiment of the present invention, the doping concentration range of the N-type Ge epitaxial layer 12 is 1×10⁻⁶. 18 cm -3 -5×10 18 cm -3 .

[0063] The surface roughness RMS of the N-type Ge epitaxial layer 12 is less than or equal to 0.5 nm.

[0064] The thickness of the low-temperature nucleation layer 121 ranges from 50 nm to 100 nm.

[0065] The thickness of the high-temperature main body layer 122 ranges from 0.95μm to 2.9μm.

[0066] In an optional embodiment of the present invention, in order to further improve the photoelectric performance of the prepared gallium arsenide triple-junction solar cell, the In... 0.01 The lattice mismatch between the GaAs cell 14 and the N-type Ge epitaxial layer 12 is less than or equal to 0.1%; the GaAs cell 14... 0.5 In 0.5 P-top battery 16 and the In 0.01 The lattice mismatch of cell 14 in GaAs is less than or equal to 0.1%.

[0067] In an optional embodiment of the present invention, reference is made to... Figure 3 , Figure 3 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention. In the gallium arsenide triple-junction solar cell provided in this embodiment of the present invention, the first tunnel junction 13 includes a first N junction sequentially stacked in the first direction X. + -GaAs layer 131 and the first P + -GaAs layer 132.

[0068] The second tunnel junction 15 includes a second N-shaped structure arranged in sequence along the first direction X. + -GaAs layer 151 and the second P + -GaAs layer 152.

[0069] Specifically, in the embodiments of the present invention, N + Indicates N-type heavy doping, P + This indicates P-type heavy doping; the first tunnel junction 13 and the second tunnel junction 15 are N-type. + -GaAs layer / P + -A heterojunction of GaAs layers, the first tunnel junction 13 has a thickness ranging from 30nm to 80nm, and the second tunnel junction 15 has a thickness ranging from 30nm to 80nm. The N in the first tunnel junction 13 and the second tunnel junction 15... + - The doping concentration of the GaAs layer is greater than 1×10⁻⁶ 19 cm -3 P in the first tunnel junction 13 and the second tunnel junction 15 + - The doping concentration of the GaAs layer is greater than 1×10⁻⁶ 19 cm -3 .

[0070] In an optional embodiment of the present invention, reference is made to... Figure 4 , Figure 4 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention. The In in the gallium arsenide triple-junction solar cell provided in this embodiment of the present invention... 0.01The GaAs battery 14 includes N-type In batteries that are sequentially stacked in the first direction X. 0.01 GaAs window layer 141, unintentionally doped with In 0.01 GaAs base region 142 and P-type In 0.01 GaAs emitter region 143.

[0071] The N-type In 0.01 The thickness of the GaAs window layer 141 ranges from 0.05 μm to 0.2 μm, and the N-type In 0.01 The doping concentration range of GaAs window layer 141 is 5 × 10⁻⁶. 18 cm -3 -1×10 19 cm -3 .

[0072] The unintentional doping of In 0.01 The thickness of the GaAs base region 142 ranges from 1 μm to 2 μm.

[0073] The P-type In 0.01 The thickness of the GaAs emitter region 143 ranges from 0.3 μm to 0.8 μm, and the P-type In... 0.01 The doping concentration range of GaAs emitter region 143 is 1×10⁻⁶. 17 cm -3 -5×10 17 cm -3 .

[0074] In an optional embodiment of the present invention, reference is made to... Figure 5 , Figure 5 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention. The gallium arsenide triple-junction solar cell provided in this embodiment of the present invention uses Ga… 0.5 In 0.5 The P-top battery 16 includes N-type Ga batteries stacked sequentially in the first direction X. 0.5 In 0.5 P-window layer 161, unintentionally doped with Ga 0.5 In 0.5 P-base region 162 and P-type Ga 0.5 In 0.5 Launch Zone 163.

[0075] The N-type Ga 0.5 In 0.5 The thickness of the P-window layer 161 ranges from 0.05 μm to 0.2 μm, and the N-type Ga 0.5 In 0.5 The doping concentration range of the P-window layer 161 is 5 × 10⁻⁶. 18 cm-3 -1×10 19 cm -3 .

[0076] The unintentional doping of Ga 0.5 In 0.5 The thickness of the P-based region 162 ranges from 1 μm to 2 μm.

[0077] The P-type Ga 0.5 In 0.5 The thickness of the P-emitting region 163 ranges from 0.3 μm to 0.8 μm, and the P-type Ga... 0.5 In 0.5 The doping concentration range of P-emitter region 163 is 1×10⁻⁶. 17 cm -3 -5×10 17 cm -3 .

[0078] In an optional embodiment of the present invention, reference is made to... Figure 6 , Figure 6 This is a schematic diagram of another gallium arsenide triple-junction solar cell provided in an embodiment of the present invention. The gallium arsenide triple-junction solar cell provided in this embodiment of the present invention further includes:

[0079] Located in the Ga 0.5 In 0.5 The P-top battery 16 is located away from the side of the second tunnel junction 15, and an N-type GaAs ohmic contact layer 17 and an anti-reflection film layer are sequentially formed in the first direction X.

[0080] Specifically, in this embodiment of the invention, an N-type GaAs ohmic contact layer 17 is provided to improve the stability of the gallium arsenide triple junction solar cell, and an anti-reflection film layer is provided to improve the photoelectric performance of the gallium arsenide triple junction solar cell.

[0081] It should be noted that, Figure 6 The anti-reflective coating is not visible in the image.

[0082] Based on the above embodiments of the present invention, another embodiment of the present invention also provides a method for fabricating a gallium arsenide triple-junction solar cell, referencing... Figure 7 , Figure 7 This is a schematic flowchart illustrating a method for fabricating a gallium arsenide triple-junction solar cell according to an embodiment of the present invention. The method for fabricating a gallium arsenide triple-junction solar cell provided in this embodiment includes, but is not limited to, using MOCVD (Metal-organic Chemical Vapor Deposition) equipment to fabricate a gallium arsenide triple-junction solar cell. The method for fabricating this gallium arsenide triple-junction solar cell includes:

[0083] S101: Provides an N-type GaAs substrate 11.

[0084] Specifically, this step includes, but is not limited to, chemical cleaning and high-temperature activation of the N-type GaAs substrate 11.

[0085] The chemical cleaning process includes ultrasonic cleaning with acetone and isopropanol in sequence, followed by corrosion with HCl:H2O (1:1 ratio) solution to remove surface oxides, rinsing with deionized water, and drying with nitrogen.

[0086] High-temperature activation involves placing the N-type GaAs substrate 11 into the MOCVD reaction chamber, heating it to approximately 650°C in an H2 atmosphere, and holding it therefore for about 10 minutes.

[0087] Optionally, the doping concentration of the N-type GaAs substrate 11 can be 2 × 10⁻⁶. 17 cm -3 .

[0088] S102: A low-temperature nucleation layer 121 and a high-temperature host layer 122 are formed on one side of the N-type GaAs substrate 11 using a two-step growth method to form an N-type Ge epitaxial layer 12, which serves as the bottom cell of the gallium arsenide triple-junction solar cell; wherein the thickness of the formed N-type Ge epitaxial layer 12 ranges from 1μm to 3μm, and the dislocation density of the formed N-type Ge epitaxial layer 12 is less than or equal to 5×10⁻⁶. 6 cm -2 .

[0089] Specifically, forming the low-temperature nucleation layer 121 in this step includes: growing a low-temperature nucleation layer 121 with a thickness range of 50nm-100nm under the conditions of a reaction chamber pressure range of 50mbar-100mbar, a growth temperature range of 300℃-400℃, using GeH4 as the source, and a flow rate range of 5sccm-10sccm.

[0090] The formation of the high-temperature host layer 122 includes: growing a high-temperature host layer 122 with a thickness range of 0.95μm-2.9μm under the following conditions: reaction chamber pressure range of 50mbar-100mbar, growth temperature range of 550℃-650℃, using GeH4 as the source, flow rate range of 15sccm-30sccm, and introducing H2S or Sn(CH3)4 as the N-type doping source.

[0091] Optionally, the low-temperature nucleation stage of the low-temperature nucleation layer 121 can be achieved by setting the reaction chamber pressure to 75 mbar, lowering the growth temperature to 350°C, introducing GeH4 at a flow rate of 8 sccm, and using H2 carrier gas at a flow rate of 8 L / min, for approximately 10 minutes to form a Ge nucleation layer with a thickness of approximately 80 nm. This low-temperature condition effectively suppresses the problem of Ga / Ge inter-diffusion.

[0092] The high-temperature growth stage of the high-temperature host layer 122 can be achieved by maintaining the reaction chamber pressure at 75 mbar, raising the temperature to 600°C at a rate of 5°C / min, increasing the GeH4 flow rate to 20 sccm, and simultaneously introducing H2S (flow rate of 0.3 sccm) for N-type doping. After approximately 5.8 hours of growth, a Ge epitaxial host layer with a thickness of approximately 2.92 μm and a doping concentration of approximately 3 × 10⁻⁶ is obtained. 18 cm -3 In-situ PL testing showed that the emission peak had a full width at half maximum (FWHM) of 18 meV, indicating good crystal quality; AFM testing showed that the surface RMS roughness was 0.3 nm.

[0093] S103: A first tunnel junction 13 is formed on the side of the high-temperature main body layer 122 away from the low-temperature nucleation layer 121.

[0094] Specifically, one possible way to form the first tunnel junction 13 in this step is as follows:

[0095] The reaction chamber conditions were a temperature of 650℃ and a pressure of 75 mbar; the first N2 was generated. + -GaAs layer 131: TMGa (flow rate 5 sccm), AsH3 (flow rate 50 sccm), and SiH4 (flow rate 1 sccm) are introduced, with a growth thickness of 40 nm and a doping concentration of approximately 5 × 10⁻⁶. 19 cm -3 ; Post-growth first P + -GaAs layer 132: SiH4 is turned off, Zn(CH3)2 is introduced (flow rate of 0.5 sccm), other gas flows are maintained, the growth thickness is 30 nm, and the doping concentration is approximately 3 × 10⁻⁶. 19 cm -3 .

[0096] S104: An In is formed on the side of the first tunnel junction 13 opposite to the high-temperature main body layer 122. 0.01 GaAs battery 14.

[0097] Specifically, in this step, In is formed 0.01 One possible implementation of battery 14 in GaAs is as follows:

[0098] The reaction chamber pressure was increased to 100 mbar; first, N-type In was grown. 0.01GaAs window layer 141: grown at 680℃, with TMGa (flow rate 99 sccm), TMIn (flow rate 1 sccm), AsH3 (flow rate 60 sccm), and SiH4 (flow rate 0.5 sccm) introduced, a growth thickness of 0.1 μm, and a doping concentration of 8 × 10⁻⁶. 18 cm -3 ; Subsequently, unintentionally doped In was grown. 0.01 GaAs base region 142: Temperature reduced to 630℃, SiH4 shut off, group III and group V source fluxes maintained, unintentionally doped In grown. 0.01 GaAs with a thickness of 1.5 μm; finally, P-type In is grown. 0.01 GaAs emitter region 143: Temperature 630℃, Zn(CH3)2 introduced (flow rate 0.2 sccm), growing p-type In 0.01 GaAs with a thickness of 0.5 μm and a doping concentration of 3 × 10⁻⁶. 17 cm -3 .

[0099] The flow ratio of trimethylindium (TMIn) to trimethylgallium (TMGa) is 1:99.

[0100] S105: In 0.01 In GaAs, the side of the cell 14 facing away from the first tunnel junction 13 forms a second tunnel junction 15.

[0101] Specifically, one possible way to form the second tunnel junction 15 in this step is as follows:

[0102] The reaction chamber conditions were a temperature of 650℃ and a pressure of 75 mbar; the second N2 was first grown. + -GaAs layer 151: TMGa (flow rate 5 sccm), AsH3 (flow rate 50 sccm), and SiH4 (flow rate 1 sccm) are introduced, with a growth thickness of 40 nm and a doping concentration of approximately 5 × 10⁻⁶. 19 cm -3 ; Post-growth second P + -GaAs layer 152: SiH4 is turned off, Zn(CH3)2 is introduced (flow rate of 0.5 sccm), other gas flows are maintained, the growth thickness is 30 nm, and the doping concentration is approximately 3 × 10⁻⁶. 19 cm -3 .

[0103] S106: At the second tunnel junction 15, away from the In 0.01 GaAs is formed on one side of cell 14. 0.5 In 0.5 P-top battery 16.

[0104] Specifically, Ga is formed in this step. 0.5 In 0.5 One possible implementation of the P-top battery 16 is as follows:

[0105] Mr. Long N-type Ga 0.5 In 0.5 P-window layer: Temperature 700℃, pressure 100mbar, TMGa (flow rate 25 sccm), TMIn (flow rate 25 sccm), PH3 (flow rate 40 sccm), Zn(CH3)2 (flow rate 0.5 sccm), growth thickness 0.1μm, doping concentration 5×10⁻⁶ 18 cm -3 .

[0106] Subsequently, unintentionally doped Ga was grown. 0.5 In 0.5 P-based region: Temperature reduced to 680℃, Zn(CH3)2 shut off, group III and group V source fluxes maintained, unintentionally doped Ga grown. 0.5 In 0.5 P, with a thickness of 1μm.

[0107] Finally, P-type Ga was grown. 0.5 In 0.5 P-emitter region: Temperature 680℃, SiH4 (flow rate 0.3 sccm) introduced, p-type Ga grown. 0.5 In 0.5 The P-emitter region has a thickness of 0.5 μm and a doping concentration of 2 × 10⁻⁶. 17 cm -3 .

[0108] In an optional embodiment of the present invention, the method for fabricating a gallium arsenide triple-junction solar cell provided in this embodiment further includes:

[0109] In the Ga 0.5 In 0.5 On the side of the P-top battery 16 away from the second tunnel junction 15, an N-type GaAs ohmic contact layer 17 and an anti-reflection film layer are sequentially formed.

[0110] Specifically, in the embodiments of the present invention, the Ga 0.5 In 0.5 The P-top cell 16 has a growth thickness of approximately 0.3 μm on the side opposite to the second tunnel junction 15, with a doping concentration greater than 1 × 10⁻⁶. 19 cm -3 17. N-type GaAs ohmic contact layer.

[0111] Furthermore, standard chip processes can be carried out subsequently, including photolithography, electrode evaporation, and antireflection film deposition, ultimately completing the fabrication of gallium arsenide triple-junction solar cells.

[0112] like Figure 2 As shown, the open-circuit voltage of this gallium arsenide triple-junction solar cell is verified to be 2.74V, and the short-circuit current is 18.45mA / cm. 2 The photoelectric conversion efficiency is 31.0%; the photoelectric conversion efficiency of this gallium arsenide triple junction solar cell is greater than 30% (based on AM0 spectrum), which is comparable to the photoelectric conversion efficiency of gallium arsenide triple junction solar cells with Ge substrates forming their own bottom cells in existing technologies.

[0113] The above provides a detailed description of a gallium arsenide triple-junction solar cell and its fabrication method provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

[0114] It should be noted that each embodiment in this specification focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0115] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0116] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A gallium arsenide triple-junction solar cell, characterized in that, The gallium arsenide triple-junction solar cell includes: N-type GaAs substrate; In the first direction, an N-type Ge epitaxial layer, a first tunnel junction, and an In layer are sequentially stacked on one side of the N-type GaAs substrate. 0.01 GaAs cells, second tunnel junctions, and Ga 0.5 In 0.5 P-type top cell; the N-type Ge epitaxial layer serves as the bottom cell of the gallium arsenide triple junction solar cell, with the first direction perpendicular to the plane of the N-type GaAs substrate and pointing from the N-type GaAs substrate to the N-type Ge epitaxial layer; The N-type Ge epitaxial layer comprises a low-temperature nucleation layer and a high-temperature host layer sequentially stacked in the first direction; the thickness of the N-type Ge epitaxial layer ranges from 1 μm to 3 μm, and the dislocation density of the N-type Ge epitaxial layer is less than or equal to 5 × 10⁻⁶. 6 cm -2 .

2. The gallium arsenide triple-junction solar cell according to claim 1, characterized in that, The crystal orientation (100) of the N-type GaAs substrate is less than or equal to 0.5°.

3. The gallium arsenide triple-junction solar cell according to claim 1, characterized in that, The doping concentration range of the N-type Ge epitaxial layer is 1×10⁻⁶. 18 cm -3 -5×10 18 cm -3 ; The surface roughness RMS of the N-type Ge epitaxial layer is less than or equal to 0.5 nm; The thickness of the low-temperature nucleation layer ranges from 50 nm to 100 nm. The thickness of the high-temperature main body layer ranges from 0.95μm to 2.9μm.

4. The gallium arsenide triple-junction solar cell according to claim 1, characterized in that, The In 0.01 The lattice mismatch between the GaAs cell and the N-type Ge epitaxial layer is less than or equal to 0.1%. The Ga 0.5 In 0.5 P-top battery and the In 0.01 The lattice mismatch of GaAs cells is less than or equal to 0.1%.

5. The gallium arsenide triple-junction solar cell according to claim 1, characterized in that, The first tunnel junction includes N first layers stacked sequentially in the first direction. + -GaAs layer and first P + -GaAs layer; The second tunnel junction includes a second N-shaped structure sequentially stacked in the first direction. + -GaAs layer and second P + -GaAs layer.

6. The gallium arsenide triple-junction solar cell according to claim 1, characterized in that, The In 0.01 The GaAs battery includes N-type In batteries stacked sequentially in the first direction. 0.01 GaAs window layer, unintentionally doped In 0.01 GaAs base region and P-type In 0.01 GaAs emitter region; The N-type In 0.01 The thickness of the GaAs window layer ranges from 0.05 μm to 0.2 μm, and the N-type In... 0.01 The doping concentration range of the GaAs window layer is 5 × 10⁻⁶. 18 cm -3 -1×10 19 cm -3 ; The unintentional doping of In 0.01 The thickness of the GaAs base region ranges from 1 μm to 2 μm; The P-type In 0.01 The thickness of the GaAs emitter region ranges from 0.3 μm to 0.8 μm, and the P-type In... 0.01 The doping concentration range of the GaAs emitter region is 1×10⁻⁶. 17 cm -3 -5×10 17 cm -3 .

7. The gallium arsenide triple-junction solar cell according to claim 1, characterized in that, The Ga 0.5 In 0.5 The P-top battery includes N-type Ga batteries stacked sequentially in the first direction. 0.5 In 0.5 P-window layer, unintentionally doped Ga 0.5 In 0.5 P-based region and P-type Ga 0.5 In 0.5 P-launch zone; The N-type Ga 0.5 In 0.5 The thickness of the P-window layer ranges from 0.05 μm to 0.2 μm, and the N-type Ga... 0.5 In 0.5 The doping concentration range of the P-window layer is 5 × 10⁻⁶. 18 cm -3 -1×10 19 cm -3 ; The unintentional doping of Ga 0.5 In 0.5 The thickness of the P-based region ranges from 1 μm to 2 μm; The P-type Ga 0.5 In 0.5 The thickness of the P-emitter region ranges from 0.3 μm to 0.8 μm, and the P-type Ga... 0.5 In 0.5 The doping concentration range of the P-emitter region is 1×10⁻⁶. 17 cm -3 -5×10 17 cm -3 .

8. A method for fabricating a gallium arsenide triple-junction solar cell, characterized in that, The method for fabricating the gallium arsenide triple-junction solar cell includes: Provide an N-type GaAs substrate; A low-temperature nucleation layer and a high-temperature host layer are stacked and formed on one side of the N-type GaAs substrate using a two-step growth method to form an N-type Ge epitaxial layer, which serves as the base cell of the gallium arsenide triple-junction solar cell. The thickness of the formed N-type Ge epitaxial layer ranges from 1 μm to 3 μm, and the dislocation density of the formed N-type Ge epitaxial layer is less than or equal to 5 × 10⁻⁶. 6 cm -2 ; A first tunnel junction is formed on the side of the high-temperature main layer away from the low-temperature nucleation layer; In is formed on the side of the first tunnel junction away from the high-temperature main layer. 0.01 Batteries in GaAs; In 0.01 In GaAs, a second tunnel junction is formed on the side of the cell away from the first tunnel junction; In the second tunnel junction away from In 0.01 GaAs forms on one side of the battery. 0.5 In 0.5 P-top battery.

9. The method for fabricating a gallium arsenide triple-junction solar cell according to claim 8, characterized in that, Forming the low-temperature nucleation layer includes: Under the conditions of reaction chamber pressure range of 50mbar-100mbar, growth temperature range of 300℃-400℃, GeH4 as source, and flow rate range of 5sccm-10sccm, a low-temperature nucleation layer with a thickness range of 50nm-100nm is grown. The high-temperature main body layer includes: Under the conditions of reaction chamber pressure ranging from 50 mbar to 100 mbar, growth temperature ranging from 550°C to 650°C, using GeH4 as the source, a flow rate ranging from 15 sccm to 30 sccm, and introducing H2S or Sn(CH3)4 as the N-type doping source, a high-temperature host layer with a thickness ranging from 0.95 μm to 2.9 μm is grown.

10. The method for fabricating a gallium arsenide triple-junction solar cell according to claim 8, characterized in that, The method for fabricating the gallium arsenide triple-junction solar cell further includes: In the Ga 0.5 In 0.5 On the side of the P-top cell away from the second tunnel junction, an N-type GaAs ohmic contact layer and an anti-reflection film layer are sequentially stacked.

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