A frequency modulation system and method for a memory subsystem

Abstract

The application discloses a frequency adjustment system and method for a memory subsystem, relates to the technical field of frequency adjustment, and is suitable for adapting layers to receive performance level requests of current application scenes, generating frequency adjustment configuration information according to the performance level requests, and delivering the frequency adjustment configuration information to control layers; the control layers are used for acquiring bandwidth monitoring signals and safety window signals transmitted by execution layers, and in an automatic frequency adjustment mode, if it is determined that the current frequency adjustment condition is met, corresponding automatic frequency adjustment instructions are generated by calling the frequency adjustment configuration information, and the automatic frequency adjustment instructions are sent to the execution layers; the execution layers are used for collecting bandwidth monitoring signals and safety window signals of the memory subsystem, sending the bandwidth monitoring signals and the safety window signals to the control layers, and when the automatic frequency adjustment instructions sent by the control layers are received, hardware solidified frequency adjustment sequences are executed based on the automatic frequency adjustment instructions, and the memory subsystem is frequency-adjusted. The above technical features improve the frequency adjustment efficiency, precision and reliability, and reduce the frequency adjustment execution cost.

Description

Technical Field

[0001] This invention relates to the field of frequency regulation technology, and in particular to a frequency regulation system and method for a memory subsystem. Background Technology

[0002] With the continuous advancement of semiconductor technology, the integration and complexity of System-on-Chips (SoCs) are constantly increasing, leading to their widespread application in various real-time systems. In consumer edge computing SoCs that strive for a balance between high performance and low power consumption, the power consumption of the memory subsystem accounts for a significant proportion, making Dynamic Frequency Scaling (DFS) technology a core means of optimizing energy efficiency.

[0003] Currently, the industry generally adopts a software / firmware-dominated architecture. The core idea is that upper-layer software (such as operating system drivers) or firmware (FW) on a dedicated power management microcontroller unit (MCU) monitors system load, determines the target frequency, executes frequency adjustment timing, and completes the DFS (Dynamic Frequency Optimization) process. However, the firmware layer, by acquiring and processing bandwidth information in software, suffers from inherent latency and insufficient accuracy, failing to respond promptly to load changes. Furthermore, the software logic is complex, error-prone, and unreliable. The dynamic frequency adjustment sequence is entirely completed by the firmware layer through the execution of multiple instructions, which is time-consuming and significantly impacts system performance. Summary of the Invention

[0004] This invention provides a frequency modulation system and method for a memory subsystem, which improves frequency modulation efficiency, accuracy and reliability, and reduces frequency modulation execution overhead.

[0005] In a first aspect, the present invention provides a frequency modulation system for a memory subsystem, comprising: an adaptation layer, a control layer, and an execution layer, wherein the control layer is connected to the adaptation layer and the execution layer respectively; The adaptation layer is used to receive the performance level request of the current application scenario, generate frequency modulation configuration information according to the performance level request, and send the frequency modulation configuration information to the control layer. The control layer is used to acquire the bandwidth monitoring signal and safety window signal transmitted by the execution layer. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and safety window signal, the control layer calls the frequency modulation configuration information to generate a corresponding automatic frequency modulation command and sends the automatic frequency modulation command to the execution layer. The execution layer is used to collect the bandwidth monitoring signal and the safety window signal of the memory subsystem, and send the bandwidth monitoring signal and the safety window signal to the control layer. When it receives the automatic frequency adjustment command sent by the control layer, it switches the operating frequency of the memory subsystem based on the automatic frequency adjustment command.

[0006] Secondly, the present invention provides a frequency modulation method for a memory subsystem, comprising: Through the adaptation layer, the performance level request of the current application scenario is received, frequency modulation configuration information is generated according to the performance level request, and the frequency modulation configuration information is sent to the control layer; Through the control layer, the bandwidth monitoring signal and safety window signal transmitted by the execution layer are obtained. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and safety window signal, the frequency modulation configuration information is called to generate the corresponding automatic frequency modulation command, and the automatic frequency modulation command is sent to the execution layer. The execution layer collects the bandwidth monitoring signal and safety window signal of the memory subsystem and sends them to the control layer. Upon receiving the automatic frequency adjustment command from the control layer, the operating frequency of the memory subsystem is switched based on the automatic frequency adjustment command.

[0007] The technical solution of this invention includes an adaptation layer, a control layer, and an execution layer. The control layer is connected to both the adaptation layer and the execution layer. The adaptation layer receives a performance level request for the current application scenario, generates frequency modulation configuration information based on the performance level request, and sends the frequency modulation configuration information to the control layer. The control layer acquires the bandwidth monitoring signal and safety window signal transmitted by the execution layer. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and safety window signal, it calls the frequency modulation configuration information to generate a corresponding automatic frequency modulation command and sends the automatic frequency modulation command to the execution layer. The execution layer collects the bandwidth monitoring signal and safety window signal of the memory subsystem and sends them to the control layer. Upon receiving the automatic frequency modulation command sent by the control layer, it switches the operating frequency of the memory subsystem based on the automatic frequency modulation command. The above-mentioned technical features propose a hardware-led, software-configurable dynamic frequency modulation system and method for the memory subsystem. Key, real-time-critical functions such as load monitoring, timing judgment, and sequence execution are embedded in the hardware register transfer level (RTL), while functions with high flexibility requirements, such as strategy parameters and scenario selection, are reserved for software configuration. This reduces software complexity, improves response speed, retains necessary flexibility, improves frequency modulation efficiency, accuracy, and reliability, and reduces frequency modulation execution overhead.

[0008] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0009] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0010] Figure 1 This is a schematic diagram of the structure of a frequency modulation system for a memory subsystem provided in an embodiment of the present invention; Figure 2 This is an execution diagram of a frequency modulation system for a memory subsystem provided in an embodiment of the present invention; Figure 3 This is a flowchart of a frequency modulation method for a memory subsystem provided in an embodiment of the present invention. Detailed Implementation

[0011] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0012] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0013] In one embodiment, Figure 1This is a schematic diagram of a frequency modulation system for a memory subsystem provided in an embodiment of the present invention. This embodiment can be applied to situations where the frequency of a memory subsystem is dynamically adjusted.

[0014] like Figure 1 As shown, a frequency modulation system for a memory subsystem includes an adaptation layer 1, a control layer 2, and an execution layer 3, wherein the control layer 2 is connected to the adaptation layer 1 and the execution layer 3 respectively. The adaptation layer 1 is used to receive the performance level request of the current application scenario, generate frequency modulation configuration information according to the performance level request, and send the frequency modulation configuration information to the control layer 2. Control layer 2 is used to acquire the bandwidth monitoring signal and safety window signal transmitted by execution layer 3. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and safety window signal, the frequency modulation configuration information is called to generate the corresponding automatic frequency modulation command, and the automatic frequency modulation command is sent to execution layer 3. Execution layer 3 is used to collect the bandwidth monitoring signal and safety window signal of the memory subsystem and send them to control layer 2. When it receives the automatic frequency adjustment command sent by control layer 2, it executes the hardware-fixed frequency adjustment sequence based on the automatic frequency adjustment command to switch the operating frequency of the memory subsystem.

[0015] This invention provides a hardware-led, software-configurable frequency modulation system for a memory subsystem, consisting of an adaptation layer 1, a control layer 2, and an execution layer 3. It is used to achieve dynamic frequency adjustment of the memory subsystem or Network-on-Chip (NoC). The adaptation layer 1 is a hardware unit with integrated firmware, acting as a software configuration unit. It is only responsible for converting the performance intent of the application scenario into hardware-recognizable frequency modulation configuration information and does not participate in real-time frequency modulation decisions and execution. The control layer 2 is a hardware main control module, a hardware-led decision-making unit. Based on parameters issued by the adaptation layer 1 and status signals collected by the execution layer 3 (such as bandwidth monitoring signals and safety window signals), it automatically completes frequency modulation condition judgment and instruction generation. The execution layer 3 is a hardware acquisition and execution module, responsible for real-time acquisition of status signals and completing frequency switching in a hardware-fixed manner, further demonstrating the low-latency characteristics of hardware-led operation.

[0016] In this embodiment, the current application scenario can be understood as the business scenario currently running in the system, such as video playback, gaming, standby, office work, etc. The performance level request can be understood as a performance requirement instruction determined based on the current application scenario, used to inform the hardware system of the required performance level. Frequency modulation configuration information can be understood as a set of hardware parameters generated by adaptation layer 1 to control frequency modulation behavior, including one or more of the following: frequency modulation mode, frequency modulation threshold, hysteresis parameter, filtering algorithm, and target frequency. The bandwidth monitoring signal can be understood as a hardware monitoring signal reflecting the real-time bandwidth utilization of the memory subsystem. The safety window signal can be understood as a signal indicating whether frequency modulation is safe, preventing increased memory access latency due to frequency modulation, which could cause abnormalities in latency-sensitive modules. The automatic frequency modulation mode can be understood as a working mode where the hardware automatically determines whether to modulate the frequency based on the load and the safety window; this is the default frequency modulation mode of this system. The frequency modulation conditions can be understood as the comprehensive conditions that control layer 2 must meet to determine whether to allow frequency modulation, typically including bandwidth conditions and safety window conditions. The bandwidth condition is used to determine whether frequency adjustment is needed. When the bandwidth monitoring signal reaches a preset threshold, it indicates that the current load requires frequency adjustment to balance performance and power consumption. The safety window condition is used to determine whether frequency adjustment is possible, allowing it only during periods insensitive to memory access latency, such as the vertical blanking period (VBlank). The automatic frequency adjustment instruction can be understood as a hardware instruction generated by control layer 2 after the frequency adjustment condition is met, used to execute frequency adjustment. The frequency adjustment sequence is a series of ordered hardware operation steps pre-embedded in the sequencer module to complete the frequency switching of the memory subsystem, ensuring that the switching process is standardized and stable. The memory subsystem includes a Double Data Rate Controller (DDRC) and / or an on-chip network.

[0017] Specifically, Adaptation Layer 1, acting as the entry point for software configuration, first receives the performance level request for the current application scenario. This request is generated by the interaction layer (such as the operating system / driver) after perceiving the business scenario, representing the system's current performance requirement level. Based on its built-in scenario configuration conversion logic, Adaptation Layer 1 maps the abstract performance level request to specific frequency modulation configuration information (including one or more of the following: frequency modulation mode, frequency modulation threshold, hysteresis parameters, filtering algorithm, and target frequency), and then sends this configuration information to Control Layer 2 via the hardware register interface. Throughout this process, Adaptation Layer 1 only performs the conversion and configuration from intent to parameters, without intervening in subsequent real-time monitoring, decision-making, or execution.

[0018] As a hardware-driven decision-making unit, Control Layer 2 first receives and stores the frequency modulation configuration information issued by Adaptation Layer 1. Simultaneously, it continuously acquires bandwidth monitoring signals and safety window signals transmitted by Execution Layer 3. The bandwidth monitoring signal reflects the real-time bandwidth utilization of the memory subsystem. The safety window signal is generated by Execution Layer 3 based on the operating status of latency-sensitive intellectual property cores (IP cores) (such as the Display Processing Unit (DPU)), representing the period during which frequency modulation can be safely initiated. In automatic frequency modulation mode, Control Layer 2 automatically determines based on hardware logic. If the bandwidth monitoring signal meets the preset threshold in the frequency modulation configuration information, and the safety window signal is valid (e.g., the DPU is in the vertical blanking period VBLank), it calls the stored frequency modulation configuration information, generates the corresponding automatic frequency modulation command, and sends it to Execution Layer 3. The entire decision-making process is completed entirely by hardware, without real-time intervention from firmware or software, achieving hardware-driven low latency and high reliability.

[0019] Execution Layer 3, as the hardware-driven execution and acquisition unit, first continuously acquires the bandwidth monitoring signal of the memory subsystem (by statistically analyzing memory bandwidth utilization in real time through the bandwidth monitoring module) and the security window signal (by identifying the secure switching period of the IP Core through the status recognition module), and transmits both types of signals to Control Layer 2 in real time. Upon receiving the automatic frequency modulation command from Control Layer 2, Execution Layer 3, through the sequencer module, uses a frequency modulation sequence fixed in the hardware at the register transfer level to complete the switching of the operating frequency of the memory subsystem. The entire acquisition and execution process is completed by hardware circuitry, resulting in a switching latency far lower than that of firmware-driven methods. This hardware-driven, software-configured architecture complements each other, achieving a balance between high performance and low power consumption.

[0020] This invention provides a frequency modulation system for a memory subsystem, comprising an adaptation layer, a control layer, and an execution layer. The control layer is connected to both the adaptation layer and the execution layer. The adaptation layer receives performance level requests for the current application scenario, generates frequency modulation configuration information based on the performance level requests, and sends the frequency modulation configuration information to the control layer. The control layer acquires bandwidth monitoring signals and safety window signals transmitted by the execution layer. In automatic frequency modulation mode, if the frequency modulation conditions are met based on the bandwidth monitoring signals and safety window signals, it calls the frequency modulation configuration information to generate corresponding automatic frequency modulation instructions and sends the automatic frequency modulation instructions to the execution layer. The execution layer collects the bandwidth monitoring signals and safety window signals of the memory subsystem and sends them to the control layer. Upon receiving the automatic frequency modulation instructions from the control layer, it executes a hardware-defined frequency modulation sequence based on the automatic frequency modulation instructions to switch the operating frequency of the memory subsystem. The above technical solution proposes a hardware-led, software-configurable dynamic frequency modulation system and method for the memory subsystem. It embeds key, real-time-critical functions such as load monitoring, timing judgment, and sequence execution into the hardware RTL, while reserving functions with high flexibility requirements, such as strategy parameters and scenario selection, for software configuration. This reduces software complexity, improves response speed, retains necessary flexibility, improves frequency modulation efficiency, accuracy, and reliability, and reduces frequency modulation execution overhead.

[0021] The frequency modulation system of the memory subsystem includes the interaction layer, adaptation layer, control layer, execution layer, and underlying memory subsystem. Figure 2 This is an execution diagram of a frequency modulation system for a memory subsystem provided in an embodiment of the present invention.

[0022] like Figure 2 As shown, the interaction layer (operating system / driver) serves as the entry point for interaction between upper-layer applications and system hardware. Its core function is to perceive the current application scenario and generate corresponding performance level requests.

[0023] The adaptation layer (firmware) serves as the carrier of software configuration, managing the mapping relationship between scenarios and frequency modulation configuration information, loading corresponding configuration sets according to different application scenarios; handling urgent performance requests and quickly responding to sudden performance demands from the upper layer; and writing frequency modulation configuration information (including bandwidth thresholds, hysteresis parameters, filtering algorithms, one or more frequency modulation modes, etc.) into the configuration register of the control layer (hardware dynamic frequency adjustment master controller) through the on-chip network interface to complete the policy configuration of the hardware layer, without participating in real-time monitoring, decision-making, and execution processes.

[0024] The control layer is the hardware-driven decision-making center and the main control module for Hardware Dynamic Frequency Scaling (HW DFS). It connects to and receives bandwidth monitoring signals from the bandwidth monitoring module and safety window signals from the status recognition module. Based on configuration information, it manages the switching window and triggers the sequencer to execute. The control layer integrates configurable registers for firmware to write configuration information, such as: high and low thresholds for bandwidth utilization (with hysteresis to prevent frequent switching), filtering algorithms (e.g., moving average window size), and operating modes (automatic frequency tuning mode, forced high / low frequency mode, frequency tuning prohibited mode, etc.). The control layer has built-in decision logic. In automatic frequency tuning mode, it determines whether frequency tuning is needed based on the bandwidth monitoring signal (after thresholding and filtering) provided by the bandwidth monitoring module, and simultaneously determines whether it is currently within a safe window based on the safety window signal provided by the status recognition module. Only when both conditions are met simultaneously (i.e., frequency tuning is needed and it is currently within a valid safe window) will the sequencer module be immediately triggered to execute the DFS operation. The control layer provides a configuration interface for the firmware. The firmware only needs to load different parameter configuration sets into the registers of the main control module according to the application scenario passed by the operating system, or send a simple "up / down / hold" request, without having to worry about the specific monitoring, timing judgment and execution details.

[0025] The execution layer consists of a Double Data Rate (DDR) bandwidth monitoring module, an IP core status identification module, and a Hardware Dynamic Frequency Adjustment (HW DFS) sequencer module. The DDR bandwidth monitoring module is deployed between the NoC and the DDRC (DDR controller) data path, providing real-time statistics on memory access traffic and bandwidth utilization, generating bandwidth monitoring signals, and transmitting them to the control layer (HW DFS main control module) to provide load data support for frequency adjustment decisions. The IP status identification module is designed for IP cores such as the display processing unit that are sensitive to memory subsystem access latency. By monitoring their internal status signals (such as the DPU's vertical blanking period VBLank signal), it generates a safety window signal and transmits it to the control layer, ensuring that frequency adjustment is only performed during safe periods that do not affect critical functions. The HW DFS sequencer module is implemented using a hardware state machine with register-transfer level RTL (RTL) embedded. It has a built-in complete operation sequence and timing control logic for dynamic frequency adjustment. After receiving trigger commands from the control layer, it automatically completes the frequency adjustment process with extremely low latency, without firmware intervention, ensuring switching efficiency and stability. The underlying hardware (HW), namely DDRC / NoC, serves as the execution terminal of the memory subsystem. It receives control commands sent by the HW DFS sequencer module, completes the switching of the operating frequency, and achieves a dynamic balance between performance and power consumption. After the switching is completed, it feeds back the execution status to the sequencer module through a simplified control interface.

[0026] As a first optional embodiment of this example, the control layer is specifically used for: a. Receive the frequency modulation configuration information sent by the adaptation layer and store the frequency modulation configuration information in the register. The frequency modulation configuration information includes at least the frequency modulation mode, frequency modulation threshold, hysteresis parameter, filtering algorithm and target frequency.

[0027] In this embodiment, the frequency modulation mode can be understood as the system's operating mode, including at least automatic frequency modulation mode, forced frequency modulation mode, and frequency modulation prohibited mode. The frequency modulation threshold can be understood as a bandwidth utilization threshold used to determine whether frequency boosting / downsampling is necessary; the hysteresis parameter can be understood as a hysteresis parameter to avoid frequent frequency switching and prevent oscillations near the threshold; the filtering algorithm can be understood as the logic for smoothing the bandwidth monitoring signal (e.g., using a moving average filtering algorithm, adjusting the smoothness by configuring its window size) to filter out noise; the target frequency can be understood as the operating frequency the system should switch to when current performance requirements are met. The register can be understood as a configurable storage unit at the hardware level, used to persistently store frequency modulation configuration information for real-time reading by the control layer.

[0028] Specifically, the control layer first receives the frequency modulation configuration information from the adaptation layer through a hardware communication interface, and then writes these parameters one by one into internal registers for storage. The adaptation layer only generates and sends parameters and does not participate in subsequent real-time logic; the control layer stores the parameters in registers, providing a stable configuration basis for subsequent automated frequency modulation decisions. The entire parameter receiving and storage process is completed by hardware circuitry without software intervention.

[0029] b. Obtain the bandwidth monitoring signal and safety window signal transmitted by the execution layer. In automatic frequency modulation mode, when the bandwidth monitoring signal meets the preset frequency modulation threshold in the frequency modulation configuration information and the safety window signal is in a valid state, determine that the current frequency modulation condition is met.

[0030] In this embodiment, the control layer continuously acquires the bandwidth monitoring signal and safety window signal transmitted from the execution layer during operation. First, it calls the filtering algorithm stored in the register to smooth the bandwidth monitoring signal, filtering out noise interference and ensuring the accuracy of the bandwidth data. When the system operates in automatic frequency modulation mode, the control layer uses built-in decision logic to compare the processed bandwidth monitoring signal with the preset frequency modulation threshold in the frequency modulation configuration information in real time. It also combines this with hysteresis parameters for judgment. If the bandwidth monitoring signal reaches the frequency modulation threshold and frequent judgments within the hysteresis hysteresis range are not triggered (avoiding repeated frequency switching near the threshold), and the safety window signal is valid (e.g., the DPU is in the VBLank period), then the frequency modulation condition is determined to be met. The entire judgment process is completed entirely by hardware circuitry, requiring no real-time firmware or software intervention, achieving hardware-driven low latency and high reliability. The synergistic effect of the filtering algorithm and hysteresis parameters further ensures the accuracy and stability of the frequency modulation judgment. If the safety window signal is invalid, the control layer waits until it becomes valid before triggering, confirming that the frequency modulation condition is met and ensuring that switching does not affect critical functions.

[0031] c. Generate an automatic frequency modulation command based on the target frequency in the frequency modulation configuration information, and send the automatic frequency modulation command to the execution layer.

[0032] In this embodiment, after determining that the frequency modulation conditions are met, the control layer reads the target frequency from the stored frequency modulation configuration information. Combining this with the bandwidth data processed by the filtering algorithm and the hysteresis logic corresponding to the hysteresis parameters, it further confirms the rationality of the target frequency (avoiding switching anomalies due to parameter deviations). Subsequently, it encapsulates and generates an automatic frequency modulation command based on this target frequency. The command includes the target frequency and the adapted switching timing, ensuring accurate execution by the execution layer. The control layer sends the automatic frequency modulation command to the execution layer through a hardware interface. The entire command generation and distribution process is completed entirely by hardware logic, without software intervention. The execution layer executes the frequency switching based on this command using a register-transfer-level fixed method, ensuring the stability and accuracy of the frequency switching.

[0033] As a second optional embodiment of this example, the execution layer includes a bandwidth monitoring module and a status recognition module, both of which are connected to the control layer. The bandwidth monitoring module is used to monitor the bandwidth utilization of the memory subsystem in real time, generate corresponding bandwidth monitoring signals, and transmit the bandwidth monitoring signals to the control layer.

[0034] The status recognition module is used to identify the working status of associated devices related to the memory subsystem access latency. When the associated device is in the vertical blanking period, it generates a safety window signal for a valid status. When the associated device is in the vertical active display period, it generates a safety window signal for an invalid status and transmits the safety window signal to the control layer.

[0035] In this embodiment, the bandwidth monitoring module is a signal acquisition module at the execution layer, used to monitor the bandwidth utilization of the memory subsystem in real time and generate and transmit bandwidth monitoring signals. The status recognition module is also a signal acquisition module at the execution layer, used to identify the working status of associated devices related to the memory subsystem access latency and generate and transmit safety window signals. Bandwidth utilization can be understood as the ratio of the actual bandwidth used by the memory subsystem per unit time to the maximum available bandwidth, reflecting the current load of the memory subsystem. Associated devices can be understood as hardware devices that interact with the memory subsystem and are sensitive to the access latency of the memory subsystem (or DDRC within the memory subsystem), such as the Display Processing Unit (DPU) and the Image Signal Processor (ISP). The Vertical Blanking Period (VBlank) is the period after an associated device completes a frame scan, during which the electron beam scans back from the bottom to the top of the screen. During this period, the associated device is not sensitive to the access latency of the memory subsystem and is a safe time for frequency switching. The Vertical Active Display Period (VActive) is the period during which the associated device scans and outputs pixel data and displays images. During this period, the associated device is sensitive to the access latency of the memory subsystem and cannot switch frequencies.

[0036] The bandwidth monitoring module, as a hardware acquisition unit in the execution layer, is directly connected to the data path between the system chip network (NoC) and the DDRC. It is used to monitor, in real-time and with high precision, the traffic, bandwidth utilization, and Quality of Service (QoS) information of access requests sent to the memory subsystem. Its output is directly connected to the control layer, which acts as the main controller. First, the bandwidth monitoring module establishes a hardware connection with the memory subsystem (such as the DDRC or NoC) in real time, continuously collecting bandwidth usage data and calculating the bandwidth utilization per unit time to reflect the current load of the memory subsystem. The calculated bandwidth utilization is converted into a hardware-recognizable bandwidth monitoring signal, which is continuously transmitted to the control layer through a preset hardware interface. This provides load data support for the control layer to determine whether frequency modulation conditions are met and to generate automatic frequency modulation commands.

[0037] The status recognition module is also a hardware acquisition unit at the execution layer, designed for specific IPs (such as DPUs and ISP processing units) that are sensitive to memory subsystem (or DDRC) access latency. This module monitors key status signals within the IP (e.g., for a DPU, monitoring its field synchronization signal to accurately determine the VBLank and VActive cycles) to generate a signal indicating whether a safe time window for DFS switching is currently allowed. This signal output is also directly connected to the control layer, which acts as the master controller. First, the status recognition module captures the working timing signals of associated devices in real time to identify the current working period of the associated device. When it detects that the associated device is in the vertical blanking period (i.e., the retrace period after completing a frame of image scanning), it determines that the access latency to the memory subsystem is not sensitive at this time, and frequency switching can be safely performed, thus generating a safe window signal for a valid status. When it detects that the associated device is in the vertical effective display period (i.e., the period of pixel scanning output and image display), it determines that the access latency to the memory subsystem is sensitive at this time, and frequency switching would cause display abnormalities, thus generating a safe window signal for an invalid status. Finally, the status recognition module transmits the generated safety window signal to the control layer in real time through the hardware interface, which, together with the bandwidth monitoring signal, serves as the basis for the control layer to determine the frequency modulation conditions.

[0038] The entire process of identification, acquisition, signal generation and transmission is completed autonomously by hardware logic without software intervention. It has low acquisition latency and high data accuracy. It does not rely on the software configuration of the adaptation layer or external software intervention. It only serves as a hardware acquisition unit to provide reliable data for subsequent frequency modulation decisions.

[0039] As a third optional embodiment of this example, the execution layer further includes a sequencer module, which is connected to the control layer; The sequencer module is used to receive automatic frequency modulation commands sent by the control layer, and according to the target frequency in the automatic frequency modulation command, executes the fixed frequency modulation sequence through the hardware state machine to control the switching of the operating frequency of the memory subsystem.

[0040] The sequencer module is the frequency modulation execution module of the execution layer. It receives automatic frequency modulation commands from the control layer and executes the fixed frequency modulation sequence through a hardware state machine to complete the frequency modulation of the memory subsystem. The hardware state machine is the state logic fixed in the hardware circuit. It can automatically execute operations according to the preset sequence without software intervention, ensuring low latency and high reliability of frequency switching.

[0041] The sequencer module is the execution hardware of the execution layer. It is a sequence generator implemented by a hardware state machine, which internally stores all the operation sequences and timing controls required for DFS switching with a specific DDR controller IP. Upon receiving a trigger command from the control layer, the sequencer module executes the frequency modulation sequence stored in the hardware state machine using RTL, automatically completing the entire DFS process with extremely low latency, without the need for software intervention during the switching process. First, the sequencer module receives the automatic frequency modulation command issued by the control layer in real time through the hardware interface. This command explicitly includes the target frequency (i.e., the target operating frequency pre-configured in the frequency modulation configuration information that meets the current performance requirements) and the corresponding switching timing information. The sequencer module calls the internally stored hardware state machine, parses the target frequency and switching timing in the automatic frequency modulation command according to the preset frequency modulation sequence, and initiates the hardware-level frequency switching operation. The entire switching sequence is stored in the hardware using RTL, requiring no software intervention, and can execute the frequency switching steps quickly and efficiently. Finally, the sequencer module controls the memory subsystem to gradually switch to the target frequency specified in the automatic frequency adjustment instruction according to the frequency modulation sequence. After the switch is completed, it automatically maintains the operation at that frequency and sends back a switch completion signal. The entire process is completed autonomously by hardware, with low switching latency and high stability, ensuring accurate, efficient, and safe frequency switching.

[0042] As a fourth optional embodiment of this example, the system further includes an interaction layer, which is connected to the adaptation layer.

[0043] The interaction layer is used to perceive the current application scenario, determine the performance level request for the current application scenario, and send the performance level request to the adaptation layer.

[0044] In this embodiment, the interaction layer is located at the upper layer of the system. It uses hardware as a carrier and the kernel as a software-aware scene recognition and request issuing unit. The hardware layer provides the running carrier, and the kernel completes application scene awareness and performance level request generation through software logic, such as the OS / Driver. The performance level request is a performance requirement instruction generated by the interaction layer based on the current application scenario, used to characterize the system's requirement level for indicators such as bandwidth, frequency, and latency.

[0045] The interaction layer, acting as the scene awareness and performance request delivery unit, is hardware-based. Its core awareness and decision-making functions are implemented by the kernel software logic, connecting with the upper-layer standard software interface layer to jointly reflect the system's hardware-driven, software-configured, and hardware-software decoupled architecture. The operating system and drivers transmit performance intent downwards through standard power management interfaces (such as the System Control and Management Interface (SCMI)) without needing to be aware of the underlying DFS implementation. The interaction layer receives this upper-layer intent and completes its transmission. First, the interaction layer establishes a standardized connection with the upper-layer system, perceiving the current business load and operating status through the kernel software logic, and identifying the current application scenario, such as a high-load game rendering scenario, a normal-load office scenario, or a low-load standby scenario. Based on preset scene-performance-level mapping rules, the interaction layer generates a performance-level request matching the current application scenario to represent the system's current required computing power, bandwidth level, and power consumption strategy, completing the standardized parsing of the upper-layer performance intent. Finally, the interaction layer sends the generated performance-level request to the adaptation layer through a preset communication interface, completing the transmission of upper-layer software configuration intent to the lower-layer hardware configuration unit.

[0046] Throughout the process, the hardware carrier of the interaction layer is responsible for providing stable communication support and operating environment, while the kernel software is only responsible for scene perception and performance request generation. It does not intervene in the real-time monitoring, frequency adjustment decision and frequency switching execution of the underlying hardware, which not only ensures the stability of the interaction link, but also achieves complete decoupling between the upper-layer software and the lower-layer hardware.

[0047] As a fifth optional embodiment of this example, the adaptation layer integrates firmware, which has built-in scene configuration conversion logic. The adaptation layer is specifically used for: The system receives the performance level request for the current application scenario from the interaction layer through a preset communication interface. Based on the performance level request, it calls the preset scenario configuration conversion logic to generate frequency modulation configuration information and sends the frequency modulation configuration information to the control layer.

[0048] In this embodiment, the scene configuration conversion logic is a preset mapping rule built into the firmware, used to convert abstract performance level requests into specific hardware frequency tuning parameters. The preset communication interface is a communication channel for data transmission between the interaction layer and the adaptation layer, and between the adaptation layer and the control layer.

[0049] Specifically, the adaptation layer is an intermediate layer connecting software configuration and hardware-driven execution. It is an integrated firmware unit that only performs parameter conversion and does not participate in real-time frequency modulation or status acquisition. First, the adaptation layer receives performance level requests from the interaction layer through a preset communication interface, thus receiving the upper-layer software requirements. Then, it calls the scene configuration conversion logic built into the firmware, parsing and converting the abstract performance level request into frequency modulation configuration information that the control layer can directly recognize and use, according to preset mapping rules. This includes one or more of the following: frequency modulation mode, frequency modulation threshold, hysteresis parameters, filtering algorithm, and target frequency. Finally, the adaptation layer sends the generated frequency modulation configuration information to the control layer and stores it in the control layer's registers, providing a configuration basis for subsequent automatic frequency modulation decisions by the hardware.

[0050] The entire configuration conversion is completed with the assistance of firmware, without involving real-time signal acquisition, condition judgment and frequency switching. It is independent of the processing logic of the control layer and execution layer, and together they form a closed loop of hardware-led and software-configured system, ensuring that the system has both configuration flexibility, real-time operation and stability.

[0051] As a sixth optional embodiment of this example, the frequency modulation mode includes at least automatic frequency modulation mode, forced frequency modulation mode, and frequency modulation prohibition mode.

[0052] The control layer is used to call the frequency modulation configuration information, generate the corresponding forced frequency modulation command, and send the forced frequency modulation command to the execution layer in forced frequency modulation mode. The forced frequency modulation command includes forced high frequency command and forced low frequency command. The control layer is used to prevent the generation of frequency modulation instructions in the frequency modulation disabled mode, so that the memory subsystem maintains the current operating frequency. The execution layer is used to switch the operating frequency of the memory subsystem based on the forced frequency adjustment instruction sent by the control layer.

[0053] In this embodiment, the forced frequency adjustment mode ignores real-time load and bandwidth conditions and directly performs frequency switching according to the configured target frequency; the disabled frequency adjustment mode stops all frequency adjustment judgments and instruction generation, allowing the memory subsystem to maintain its current operating frequency. The forced frequency adjustment instruction is a frequency switching instruction generated by the control layer in the forced frequency adjustment mode, including forced high-frequency instructions and forced low-frequency instructions. The forced high-frequency instruction is a hardware instruction used to switch the memory subsystem to a higher operating frequency, containing a target frequency that is higher than the current frequency. The forced low-frequency instruction is a hardware instruction used to switch the memory subsystem to a lower operating frequency, containing a target frequency that is lower than the current frequency.

[0054] The frequency modulation mode is configured by the adaptation layer through software, and the control layer reads and executes it in a hardware-driven manner. During system operation, the control layer selects the corresponding execution path based on the configured frequency modulation mode. When operating in automatic frequency modulation mode, the control layer automatically determines whether to modulate the frequency based on the bandwidth monitoring signal and the safety window signal; when operating in forced frequency modulation mode, the control layer directly generates forced frequency modulation instructions based on the preset target frequency parameters, without performing bandwidth and safety window load judgments; when operating in disabled frequency modulation mode, the control layer disables all frequency modulation-related judgments and instruction generation logic, keeping the memory subsystem frequency unchanged. All three modes are executed autonomously by the hardware, relying solely on the initial software configuration.

[0055] In forced frequency modulation mode, the control layer directly calls the stored frequency modulation configuration information, reads the target frequency and forced configuration from it, generates the corresponding forced frequency modulation command, including forced high-frequency command or forced low-frequency command, and sends the command to the execution layer. This process does not rely on bandwidth monitoring signals, but is determined only by the mode and parameters, achieving fast and deterministic frequency switching.

[0056] In the frequency modulation disabled mode, the control layer stops all frequency modulation condition judgments and does not generate any frequency modulation instructions, so that the memory subsystem maintains its current operating frequency, thereby ensuring the stability of the system operation and preventing it from being interrupted by frequency modulation.

[0057] The entire process of mode determination, instruction generation, or prohibition of instruction generation is completed autonomously by the control layer hardware circuit, without the need for real-time involvement of firmware or software.

[0058] As a hardware execution unit, the execution layer only responds to valid frequency modulation instructions issued by the control layer. When the execution layer receives a forced frequency modulation instruction from the control layer, it directly parses the target frequency information in the instruction: if it is a forced high-frequency instruction, it switches the memory subsystem to a higher operating frequency; if it is a forced low-frequency instruction, it switches the memory subsystem to a lower operating frequency. In forced frequency modulation mode, the execution layer also executes the frequency modulation sequence embedded in the hardware based on the forced frequency modulation instruction to achieve forced frequency modulation.

[0059] The execution layer switches between internal hardware state machines and fixed frequency modulation sequences, without relying on software. It executes operations solely based on hardware instructions, forming a hardware-dominated frequency modulation execution path together with the control layer. It also forms a complete closed-loop link with the mode configuration of the adaptation layer, ensuring that the system can operate stably, reliably, and with low latency in multiple modes.

[0060] Compared with existing technologies, this invention, through the aforementioned systematic architecture design, achieves a hardware-led, software-configured, and hardware-software decoupled hardware dynamic frequency adjustment (HW DFS) mechanism, possessing significant technical advantages and beneficial effects. It adopts a holistic hardware-software collaborative architecture design, rather than isolated algorithms or circuit modules, and clearly defines the functional responsibilities of each layer through a layered architecture, forming a complete and efficient frequency modulation control system from the underlying hardware to the upper-level software. The hardware execution layer consists of three main hardware modules: a bandwidth monitoring module, a status recognition module, and a sequencer module. It is specifically responsible for critical operations with high real-time requirements, such as bandwidth acquisition, security window recognition, and frequency switching execution, providing the hardware foundation for the system's high-performance, low-latency, and high-reliability operation. The hardware control layer, as the core control module of HW DFS, implements programmable hardware frequency modulation judgment and instruction generation logic, and completes automated frequency modulation decisions based on software configuration strategies and real-time status signals. The firmware configuration layer (adaptation layer) only serves as a strategy configuration and scenario mapping unit. It converts performance level requests into hardware-recognizable frequency modulation configuration information through a simplified register interface and does not participate in real-time monitoring, decision-making, and execution processes. The standard software interface layer (interaction layer) enables the operating system and drivers to communicate with the firmware through SCMI. They only need to express performance scenario or level intentions without needing to be aware of the complex DFS implementation details at the bottom layer, truly achieving decoupling between the upper-layer software and the lower-layer hardware.

[0061] Based on the above architecture, this invention significantly reduces firmware complexity and CPU overhead. High-real-time, high-complexity monitoring, decision-making, and execution tasks are handled by dedicated hardware circuits. The firmware of the power management microcontroller (MCU) is only responsible for policy configuration and parameter conversion, effectively simplifying code logic, reducing code volume, and decreasing dependence on MCU performance and reliability. Simultaneously, hardware bandwidth monitoring provides real-time bandwidth data with microsecond-level accuracy. Combined with hardware decision-making and safety window recognition logic, frequency adjustment judgment and instruction issuance can be completed within microseconds, overcoming the latency issues caused by traditional software polling and scheduling. This allows memory frequency to more accurately and promptly follow actual load changes, significantly improving system energy efficiency. This invention, through native hardware integration of a safety window judgment mechanism, ensures that frequency adjustment for the memory subsystem is only performed during latency-insensitive safe periods such as the vertical blanking period. This fundamentally avoids display anomalies and image acquisition frame drops caused by software coordination errors, greatly improving the reliability and stability of system operation. Furthermore, the sequencer module executes the fixed frequency modulation sequence through a hardware state machine, which significantly reduces the performance interruption time caused by frequency switching, minimizes the software execution overhead during memory access blocking, and reduces overall system performance jitter. This invention achieves high-efficiency, low-latency frequency modulation through hardware while retaining sufficient flexibility and scenario adaptability after chip mass production through configurable registers. The software can flexibly adjust the frequency modulation threshold, hysteresis parameters, filtering algorithms, and other configurations during product development or in different application scenarios, achieving a perfect combination of hardware execution efficiency and software configuration flexibility.

[0062] In one embodiment, Figure 3 This is a flowchart of a frequency modulation method for a memory subsystem provided in an embodiment of the present invention. It is applicable to situations where the operating frequency of a target device is switched. This method can be executed by a frequency modulation system for the memory subsystem.

[0063] like Figure 3 As shown, the method includes: S101. Through the adaptation layer, receive the performance level request of the current application scenario, generate frequency modulation configuration information according to the performance level request, and send the frequency modulation configuration information to the control layer.

[0064] S102. Through the control layer, obtain the bandwidth monitoring signal and safety window signal transmitted by the execution layer. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and safety window signal, call the frequency modulation configuration information to generate the corresponding automatic frequency modulation command, and send the automatic frequency modulation command to the execution layer.

[0065] S103. Through the execution layer, the bandwidth monitoring signal and safety window signal of the memory subsystem are collected and sent to the control layer. When the automatic frequency adjustment command sent by the control layer is received, the hardware-fixed frequency adjustment sequence is executed based on the automatic frequency adjustment command to switch the operating frequency of the memory subsystem.

[0066] This invention provides a frequency modulation method for a memory subsystem, comprising: receiving a performance level request for the current application scenario through an adaptation layer; generating frequency modulation configuration information based on the performance level request; and sending the frequency modulation configuration information to a control layer; acquiring bandwidth monitoring signals and safety window signals transmitted by an execution layer through the control layer; in automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signals and safety window signals, generating a corresponding automatic frequency modulation instruction by calling the frequency modulation configuration information, and sending the automatic frequency modulation instruction to the execution layer; acquiring bandwidth monitoring signals and safety window signals of the memory subsystem through the execution layer, and sending the bandwidth monitoring signals and safety window signals to the control layer; and upon receiving the automatic frequency modulation instruction sent by the control layer, executing a hardware-defined frequency modulation sequence based on the automatic frequency modulation instruction to switch the operating frequency of the memory subsystem. This technical solution improves frequency modulation efficiency, accuracy, and reliability, and reduces frequency modulation execution overhead.

[0067] Optionally, the step of acquiring the bandwidth monitoring signal and safety window signal transmitted by the execution layer, in automatic frequency modulation mode, if it is determined that the frequency modulation conditions are currently met based on the bandwidth monitoring signal and safety window signal, calling the frequency modulation configuration information to generate a corresponding automatic frequency modulation command, and sending the automatic frequency modulation command to the execution layer, includes: The system receives frequency modulation configuration information sent by the adaptation layer and stores the frequency modulation configuration information in a register. The frequency modulation configuration information includes at least the frequency modulation mode, frequency modulation threshold, hysteresis parameter, filtering algorithm and target frequency. The bandwidth monitoring signal and safety window signal transmitted by the execution layer are obtained. In automatic frequency modulation mode, when the bandwidth monitoring signal meets the preset frequency modulation threshold in the frequency modulation configuration information and the safety window signal is in a valid state, it is determined that the current frequency modulation condition is met. An automatic frequency modulation command is generated based on the target frequency in the frequency modulation configuration information, and the automatic frequency modulation command is sent to the execution layer.

[0068] Optionally, the step of collecting the bandwidth monitoring signal and safety window signal of the memory subsystem and sending the bandwidth monitoring signal and safety window signal to the control layer, and upon receiving the automatic frequency adjustment command sent by the control layer, executing the hardware-fixed frequency adjustment sequence based on the automatic frequency adjustment command to switch the operating frequency of the memory subsystem, including: The bandwidth monitoring module monitors the bandwidth utilization of the memory subsystem in real time, generates a corresponding bandwidth monitoring signal, and transmits the bandwidth monitoring signal to the control layer. The status recognition module identifies the working status of associated devices related to memory subsystem access latency. When the associated device is in the vertical blanking period, a safe window signal for the valid status is generated. When the associated device is in the vertical valid display period, a safe window signal for the invalid status is generated. The safe window signal is then transmitted to the control layer. The sequencer module receives the automatic frequency tuning command sent by the control layer, and executes the fixed frequency tuning sequence through the hardware state machine according to the target frequency in the automatic frequency tuning command to control the switching of the operating frequency of the memory subsystem.

[0069] Optionally, the method further includes: Through the interaction layer, the current application scenario is perceived, and the performance level request for the current application scenario is determined. The performance level request is then sent to the adaptation layer.

[0070] Optionally, the adaptation layer integrates firmware, and the firmware has built-in scene configuration conversion logic. Accordingly, the method further includes: The adaptation layer receives the performance level request for the current application scenario from the interaction layer through a preset communication interface. Based on the performance level request, it calls the preset scenario configuration conversion logic to generate frequency modulation configuration information and sends the frequency modulation configuration information to the control layer.

[0071] Optionally, the frequency modulation mode includes at least an automatic frequency modulation mode, a forced frequency modulation mode, and a frequency modulation-disabled mode; correspondingly, the method further includes: Through the control layer, in forced frequency modulation mode, the frequency modulation configuration information is invoked to generate a corresponding forced frequency modulation command, and the forced frequency modulation command is sent to the execution layer. The forced frequency modulation command includes a forced high frequency command and a forced low frequency command. By controlling the frequency modulation layer, no frequency modulation instructions are generated in the frequency modulation disabled mode, so that the memory subsystem maintains the current operating frequency. Upon receiving a forced frequency adjustment instruction from the control layer, the execution layer switches the operating frequency of the memory subsystem based on the forced frequency adjustment instruction.

[0072] It should be understood that the various forms of the process shown above can be used to reorder, add, or delete steps. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this invention does not impose any limitations on them.

[0073] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A frequency modulation system for a memory subsystem, characterized in that, It includes an adaptation layer, a control layer, and an execution layer, wherein the control layer is connected to the adaptation layer and the execution layer respectively; The adaptation layer is used to receive the performance level request of the current application scenario, generate frequency modulation configuration information according to the performance level request, and send the frequency modulation configuration information to the control layer. The control layer is used to acquire the bandwidth monitoring signal and the safety window signal transmitted by the execution layer. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and the safety window signal, the control layer calls the frequency modulation configuration information to generate a corresponding automatic frequency modulation command and sends the automatic frequency modulation command to the execution layer. The execution layer is used to collect the bandwidth monitoring signal and the safety window signal of the memory subsystem, and send the bandwidth monitoring signal and the safety window signal to the control layer. When the automatic frequency adjustment command sent by the control layer is received, the execution layer executes the hardware-fixed frequency adjustment sequence based on the automatic frequency adjustment command to switch the operating frequency of the memory subsystem.

2. The system according to claim 1, characterized in that, The control layer is specifically used for: The system receives frequency modulation configuration information sent by the adaptation layer and stores the frequency modulation configuration information in a register. The frequency modulation configuration information includes at least the frequency modulation mode, frequency modulation threshold, hysteresis parameter, filtering algorithm and target frequency. The bandwidth monitoring signal and the safety window signal transmitted by the execution layer are obtained. In the automatic frequency modulation mode, when the bandwidth monitoring signal meets the preset frequency modulation threshold in the frequency modulation configuration information and the safety window signal is in a valid state, it is determined that the current frequency modulation condition is met. The automatic frequency modulation command is generated based on the target frequency in the frequency modulation configuration information, and the automatic frequency modulation command is sent to the execution layer.

3. The system according to claim 2, characterized in that, The frequency modulation modes include at least automatic frequency modulation mode, forced frequency modulation mode, and frequency modulation disabled mode; The control layer is specifically used to call the frequency modulation configuration information in the forced frequency modulation mode, generate a corresponding forced frequency modulation command, and send the forced frequency modulation command to the execution layer. The forced frequency modulation command includes a forced high frequency command and a forced low frequency command. The control layer is specifically used to prevent the generation of frequency modulation instructions in the frequency modulation prohibition mode, so that the memory subsystem maintains the current operating frequency. The execution layer is specifically used to switch the operating frequency of the memory subsystem based on the forced frequency adjustment instruction sent by the control layer when it receives the forced frequency adjustment instruction.

4. The system according to claim 1, characterized in that, The execution layer includes a bandwidth monitoring module and a status recognition module, both of which are connected to the control layer. The bandwidth monitoring module is used to monitor the bandwidth utilization of the memory subsystem in real time, generate the corresponding bandwidth monitoring signal, and transmit the bandwidth monitoring signal to the control layer. The state recognition module is used to identify the working state of associated devices related to the memory subsystem access latency, generate a valid security window signal when the associated device is in the vertical blanking period, generate an invalid security window signal when the associated device is in the vertical valid display period, and transmit the security window signal to the control layer.

5. The system according to claim 4, characterized in that, The execution layer further includes a sequencer module, which is connected to the control layer; The sequencer module is used to receive the automatic frequency tuning command sent by the control layer, and according to the target frequency in the automatic frequency tuning command, execute the fixed frequency tuning sequence through the hardware state machine to control the switching of the operating frequency of the memory subsystem.

6. The system according to claim 1, characterized in that, It also includes: an interaction layer, which is connected to the adaptation layer; The interaction layer is used to perceive the current application scenario, determine the performance level request of the current application scenario, and send the performance level request to the adaptation layer.

7. The system according to claim 6, characterized in that, The adaptation layer integrates firmware, which contains built-in scene configuration conversion logic. Specifically, the adaptation layer is used for: The system receives the performance level request for the current application scenario from the interaction layer through a preset communication interface. Based on the performance level request, it calls the preset scenario configuration conversion logic to generate frequency modulation configuration information and sends the frequency modulation configuration information to the control layer.

8. A frequency modulation method for a memory subsystem, characterized in that, Applied to the system according to any one of claims 1-7, comprising: Through the adaptation layer, the performance level request of the current application scenario is received, frequency modulation configuration information is generated according to the performance level request, and the frequency modulation configuration information is sent to the control layer; Through the control layer, the bandwidth monitoring signal and safety window signal transmitted by the execution layer are obtained. In automatic frequency modulation mode, if it is determined that the frequency modulation conditions are met based on the bandwidth monitoring signal and the safety window signal, the frequency modulation configuration information is called to generate the corresponding automatic frequency modulation command, and the automatic frequency modulation command is sent to the execution layer. The execution layer collects the bandwidth monitoring signal and the safety window signal of the memory subsystem and sends them to the control layer. Upon receiving the automatic frequency adjustment command sent by the control layer, the control layer executes the hardware-defined frequency adjustment sequence based on the automatic frequency adjustment command to switch the operating frequency of the memory subsystem.

9. The method according to claim 8, characterized in that, The acquisition of the bandwidth monitoring signal and safety window signal transmitted by the execution layer, in automatic frequency modulation mode, if it is determined that the current frequency modulation conditions are met based on the bandwidth monitoring signal and the safety window signal, the generation of a corresponding automatic frequency modulation command by calling the frequency modulation configuration information, and the sending of the automatic frequency modulation command to the execution layer, includes: The system receives frequency modulation configuration information sent by the adaptation layer and stores the frequency modulation configuration information in a register. The frequency modulation configuration information includes at least the frequency modulation mode, frequency modulation threshold, hysteresis parameter, filtering algorithm and target frequency. The bandwidth monitoring signal and the safety window signal transmitted by the execution layer are obtained. In the automatic frequency modulation mode, when the bandwidth monitoring signal meets the preset frequency modulation threshold in the frequency modulation configuration information and the safety window signal is in a valid state, it is determined that the current frequency modulation condition is met. The automatic frequency modulation command is generated based on the target frequency in the frequency modulation configuration information, and the automatic frequency modulation command is sent to the execution layer.

10. The method according to claim 8, characterized in that, The method acquires the bandwidth monitoring signal and the safety window signal of the memory subsystem, and sends the bandwidth monitoring signal and the safety window signal to the control layer. Upon receiving the automatic frequency adjustment command sent by the control layer, it executes a hardware-defined frequency adjustment sequence based on the automatic frequency adjustment command to switch the operating frequency of the memory subsystem, including: The bandwidth monitoring module monitors the bandwidth utilization of the memory subsystem in real time, generates a corresponding bandwidth monitoring signal, and transmits the bandwidth monitoring signal to the control layer. The status recognition module identifies the working status of associated devices related to the memory subsystem access latency, generates a valid security window signal when the associated device is in the vertical blanking period, generates an invalid security window signal when the associated device is in the vertical valid display period, and transmits the security window signal to the control layer. The sequencer module receives the automatic frequency tuning command sent by the control layer, and executes the fixed frequency tuning sequence through the hardware state machine according to the target frequency in the automatic frequency tuning command to control the switching of the operating frequency of the memory subsystem.

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