A wideband radio frequency pulse signal detection shaping system

Abstract

The broadband radio frequency pulse signal detection shaping system of the present application comprises: an envelope detection circuit using a radio frequency detection diode to perform envelope detection on a broadband radio frequency pulse signal with a carrier frequency lower than 10 GHz, and output a voltage signal consistent with the envelope waveform of the pulse signal; a preamplification circuit using a high-speed operational amplifier chip to amplify the pulse envelope voltage signal output by the envelope detection circuit; a high-speed comparator circuit shaping the pulse envelope voltage amplified and output by the preamplification circuit into a digital logic level signal suitable for an FPGA or embedded processor based on a reference voltage. The beneficial effects are that the technical solution of the present application can perform detection shaping on a radio frequency pulse signal with a set carrier frequency and pulse width, and then directly send it into an FPGA or embedded processor for pulse width measurement; the system has the advantages of high shaping precision, high sensitivity, simple circuit, fast response, good stability, etc.

Description

Technical Field

[0001] This invention relates to the field of radio frequency signal processing technology, and in particular to a broadband radio frequency pulse signal detection and shaping system that converts broadband radio frequency pulse signals into broadband radio frequency pulse signals adapted to FPGAs or embedded processors. Background Technology

[0002] In radar, electronic countermeasures, and communication systems, it is often necessary to accurately measure the time-domain parameters of radio frequency (RF) pulse signals (such as pulse width, period, and rise / fall time). A common measurement method is to extract the RF pulse envelope using a detector, and then shape it using an analog-to-digital converter or comparator before sending it to a digital processing unit (such as an FPGA) for timing analysis.

[0003] In the existing technology, the shaping circuit for radio frequency pulse signals has the following shortcomings: First, for radio frequency pulses with center frequencies reaching tens of GHz, ordinary detector diodes have large junction capacitances and poor high-frequency response, leading to envelope waveform distortion and consequently affecting pulse width measurement accuracy. Furthermore, commonly used microstrip line impedance matching methods place high demands on PCB material and wiring accuracy, increasing design and manufacturing costs.

[0004] Secondly, in the existing technology, the reference voltage of the comparator is usually provided directly by a fixed resistor divider, which cannot be dynamically adjusted to adapt to RF pulse signals with different input power; or an adjustable resistor divider is used but without impedance transformation, which causes the transient current at the comparator input to be coupled to the reference voltage divider network, introducing additional jitter and false triggering.

[0005] Third, the dynamic range of the input RF pulse signal is relatively small, and the signal-to-noise ratio requirement for the RF pulse signal is relatively high. When the power or signal-to-noise ratio of the input RF pulse signal changes, the duty cycle of the pulse signal output by the shaping circuit may also change, affecting the pulse width measurement of the input RF pulse signal.

[0006] Fourth, when the duty cycle of the input RF pulse signal is small, or when the duty cycle changes, it is difficult to ensure that the duty cycle of the pulse signal output by the shaping circuit is always consistent with the duty cycle of the input RF pulse signal, thus resulting in a large error in the pulse width measurement of the input RF pulse signal. Summary of the Invention

[0007] To address the shortcomings and difficulties in the aforementioned background technology, this invention provides a broadband radio frequency pulse signal detection and shaping system, specifically implemented through the following technical solution: The broadband radio frequency pulse signal detection and shaping system is characterized by comprising: The envelope detection circuit uses a radio frequency detection diode to perform envelope detection on broadband radio frequency pulse signals with a carrier frequency below 10 GHz, and outputs a voltage signal that is consistent with the envelope waveform of the pulse signal. The preamplifier circuit amplifies the pulse envelope voltage signal output by the envelope detector circuit; The high-speed comparator circuit shapes the pulse envelope voltage amplified by the preamplifier circuit into a signal with a constant duty cycle, adapting it to the digital logic level signal of the FPGA or embedded processor, based on the reference voltage.

[0008] A further design of the broadband radio frequency pulse signal detection and shaping system is that the reference voltage is an external reference voltage or generated by a reference voltage generation circuit.

[0009] A further design of the broadband radio frequency pulse signal detection and shaping system is that the reference voltage generation circuit consists of a resistor divider network and a voltage follower. The resistor divider network includes a fixed resistor connected in series between the power supply and ground and an adjustable potentiometer. The sliding end of the adjustable potentiometer outputs an adjustable DC voltage. This DC voltage is input to the voltage follower and, after impedance transformation by the operational amplifier, serves as the reference voltage for the high-speed comparator circuit.

[0010] A further design feature of the broadband radio frequency pulse signal detection and shaping system is that the voltage follower is composed of a unity-gain stable operational amplifier.

[0011] A further design of the broadband radio frequency pulse signal detection and shaping system is that the preamplifier circuit is a two-stage in-phase amplification structure, and a bypass switch is provided between the input and output terminals of the circuit. When the output voltage signal of the envelope detection circuit is large, the bypass switch is closed, and the preamplifier circuit forms a direct circuit with a gain of 1, which is used to improve the input dynamic range of the detection and shaping system.

[0012] A further design of the broadband radio frequency pulse signal detection and shaping system is that the high-speed comparator circuit provides a preset voltage hysteresis window through a positive feedback resistor network.

[0013] Beneficial technical effects: 1. The broadband radio frequency pulse signal detection and shaping system of the present invention adopts a system structure of envelope detection circuit plus preamplifier circuit. For radio frequency pulse signals with low input power or low signal-to-noise ratio, the pulse envelope signal output by the detection circuit is further amplified to improve the signal-to-noise ratio of the envelope signal. At the same time, the amplitude of the envelope signal can meet the input level requirements of the comparator, ensuring reliable switching of the comparator circuit, preventing false triggering and missed triggering, and improving the detection sensitivity and dynamic range of the broadband radio frequency pulse signal detection and shaping system.

[0014] 2. Using the TLV3502 dual-channel high-speed comparator chip, the output current can reach up to 74mA. It has strong driving capability, and the output rise and fall times are both in the nanosecond range. The minimum pulse width of the shaped output pulse signal can be as low as 20ns. The time-domain waveform has virtually no overshoot or ringing. The pulse envelope signal level of the shaped output is adapted to the digital logic level of the FPGA or embedded processor.

[0015] 3. The comparator circuit in the system uses a built-in adjustable reference voltage to form a hysteresis comparator, which has strong anti-interference capability and eliminates threshold jitter caused by the transient current of comparator switching. When the pulse width varies within the range of 20ns-100ns, by adjusting the reference voltage, it can be ensured that the pulse width of the shaped output is always completely consistent with the pulse width of the input signal. The output level meets both LVCMOS and LVTTL level standards and can be adapted to the I / O Bank voltage standard of FPGA. It can be directly fed into the FPGA or embedded processor for pulse width measurement, significantly improving the pulse width measurement accuracy. Attached Figure Description

[0016] Figure 1 This is a system circuit structure block diagram according to an embodiment of the present invention.

[0017] Figure 2 This is a schematic diagram of a high-speed comparator circuit in an embodiment of the present invention.

[0018] Figure 3 This is a schematic diagram of the reference voltage generation circuit in an embodiment of the present invention.

[0019] Figure 4 This is a schematic diagram of the preamplifier circuit in an embodiment of the present invention.

[0020] Figure 5 The waveform of the input radio frequency pulse signal in this embodiment of the invention is shown (carrier power 0dBm, carrier frequency 1GHz, pulse width 20ns).

[0021] Figure 6 The waveform of the input radio frequency pulse signal in this embodiment of the invention is shown (carrier power -5dBm, carrier frequency 1GHz, pulse width 200ns).

[0022] Figure 7 The voltage waveform output by the envelope detection circuit in this embodiment of the invention is shown (carrier power 0dBm, carrier frequency 1GHz, pulse width 20ns).

[0023] Figure 8 This is a voltage waveform output by the envelope detector circuit in an embodiment of the present invention. (Carrier power -5dBm, carrier frequency 3GHz, pulse width 200ns).

[0024] Figure 9The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power 0dBm, carrier frequency 1GHz, pulse width 20ns).

[0025] Figure 10 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power 0dBm, carrier frequency 1GHz, pulse width 80ns).

[0026] Figure 11 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power 0dBm, carrier frequency 1GHz, pulse width 200ns).

[0027] Figure 12 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power 0dBm, carrier frequency 3GHz, pulse width 20ns).

[0028] Figure 13 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power 0dBm, carrier frequency 3GHz, pulse width 80ns).

[0029] Figure 14 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power 0dBm, carrier frequency 3GHz, pulse width 200ns).

[0030] Figure 15 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is shown. The high level is about 3.3V and the low level is about 0V (carrier power -5dBm, carrier frequency 1GHz, pulse width 20ns).

[0031] Figure 16 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is approximately 3.3V at high level and approximately 0V at low level (carrier power -5dBm, carrier frequency 1GHz, pulse width 80ns).

[0032] Figure 17 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is approximately 3.3V at high level and approximately 0V at low level (carrier power -5dBm, carrier frequency 1GHz, pulse width 200ns).

[0033] Figure 18The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is approximately 3.3V at high level and approximately 0V at low level (carrier power -5dBm, carrier frequency 3GHz, pulse width 20ns).

[0034] Figure 19 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is approximately 3.3V at high level and approximately 0V at low level (carrier power -5dBm, carrier frequency 3GHz, pulse width 80ns).

[0035] Figure 20 The waveform of the pulse envelope signal output by the system shaping in this embodiment of the invention is approximately 3.3V at high level and approximately 0V at low level (carrier power -5dBm, carrier frequency 3GHz, pulse width 200ns).

[0036] Figure 21 The rise time of the pulse envelope signal shaped and output by the measurement system in this embodiment of the invention is approximately 0.8 ns (carrier power 0 dBm, carrier frequency 1 GHz, pulse width 20 ns).

[0037] Figure 22 shows the fall time of the pulse envelope signal shaped by the measurement system in this embodiment of the invention, which is approximately 1 ns (carrier power 0 dBm, carrier frequency 1 GHz, pulse width 20 ns).

[0038] Figure 23 The rise time of the pulse envelope signal shaped and output by the measurement system in this embodiment of the invention is approximately 0.76 ns (carrier power 0 dBm, carrier frequency 3 GHz, pulse width 20 ns).

[0039] Figure 24 The drop time of the pulse envelope signal shaped and output by the measurement system in this embodiment of the invention is approximately 0.56 ns (carrier power 0 dBm, carrier frequency 3 GHz, pulse width 20 ns).

[0040] Figure 25 The rise time of the pulse envelope signal shaped and output by the measurement system in this embodiment of the invention is approximately 0.74 ns (carrier power -5 dBm, carrier frequency 3 GHz, pulse width 20 ns).

[0041] Figure 26 shows the fall time of the pulse envelope signal shaped by the measurement system in this embodiment of the invention, which is approximately 0.69 ns (carrier power -5 dBm, carrier frequency 3 GHz, pulse width 20 ns). Detailed Implementation

[0042] The following will refer to the appendices in the embodiments of the present invention. Figures 1-26 The technical solutions in the embodiments of the present invention will be clearly and completely described.

[0043] In this embodiment, the broadband radio frequency pulse signal detection and shaping system mainly consists of an envelope detection circuit, a preamplifier circuit, a high-speed comparator circuit, and a reference voltage generation circuit.

[0044] The envelope detection circuit in this embodiment uses a radio frequency detection diode, specifically a zero-bias Schottky barrier diode of model GDEC000180-S, with a junction capacitance not exceeding 0.2pF. The input power of the envelope detection circuit is -5 to 20dBm. The anode of the diode is connected to the externally input radio frequency pulse signal via an SMA connector, eliminating the need for series or parallel matching resistors. It directly performs square-law envelope detection on broadband radio frequency pulse signals with carrier frequencies below 10GHz, outputting a voltage signal with the same envelope waveform as the pulse signal.

[0045] The schematic diagram of the preamplifier circuit is attached. Figure 4 It consists of a two-stage amplifier circuit and uses a high-speed operational amplifier chip. The OPA847, with a gain-bandwidth product of 3.9 GHz and a slew rate of 950 V / μs, can linearly amplify mV-level envelope pulse signals output from the detector circuit at frequencies up to tens of megahertz. In this embodiment, both stages are configured as in-phase amplifiers, with a single-pole voltage gain of approximately 10 times (20 dB) and a total voltage gain of approximately 100 times (40 dB). The preamplifier circuit further amplifies the mV-level pulse envelope signal output from the detector circuit (when the amplitude of the pulse envelope signal output from the detector circuit is large, the preamplifier circuit can be set to pass-through without providing gain), improving the signal-to-noise ratio of the envelope signal. Simultaneously, it ensures that the amplitude of the envelope signal meets the input level requirements of the comparator, ensuring reliable switching of the comparator circuit, preventing false triggering and missed triggering, and improving the detection sensitivity and dynamic range of the broadband RF pulse signal detection and shaping system.

[0046] like Figure 2 The schematic diagram of the high-speed comparator circuit in this embodiment shows that the circuit uses a dual-channel high-speed comparator chip, TLV3502, which integrates approximately 6mV of hysteresis. The minimum rise time and fall time of the high-level signal output by the comparator are both approximately 1.5ns, the propagation delay time is approximately 4.5ns, and the maximum output pulse frequency can reach 80MHz. With a 3.3V power supply, the typical output high-level value is 3.25V~3.35V, and the maximum output current is approximately 74mA. The high-speed comparator compares the envelope voltage signal amplified by the preamplifier circuit with a preset reference voltage, and outputs a digital logic level signal adapted to the FPGA or embedded processor, which can be directly input to the I / O pins of the back-end FPGA for pulse width measurement.

[0047] like Figure 3The reference voltage generation circuit diagram consists of a power supply voltage, a resistor divider network, and a voltage follower. The resistor divider network includes a fixed resistor connected in series between the power supply and ground, and an adjustable potentiometer. The potentiometer's sliding contact outputs an adjustable DC voltage. This DC voltage is input to the voltage follower, which is composed of a unity-gain stable operational amplifier. After impedance transformation by the op-amp, it can be used as the reference voltage for a high-speed comparator circuit. The circuit features low output impedance, which can suppress transient current spikes at the input of the high-speed comparator. Connecting pins 2 and 4 with jumpers and adjusting the potentiometer generates the threshold voltage required by the high-speed comparator, thus adjusting the duty cycle of the shaped output pulse. If an external input reference voltage is selected, it is applied between pins 1 and 3.

[0048] In this embodiment, the input signal is a radio frequency pulse signal. Due to the limitations of the test instrument, the carrier frequency is limited to a maximum of 3 GHz; the carrier power is limited to a maximum of 0 dBm; and the pulse widths are 20 ns, 80 ns, and 200 ns, respectively. The modulation periods corresponding to the three pulse widths are 100 ns, 300 ns, and 1000 ns, respectively.

[0049] The envelope detector circuit, preamplifier circuit, high-speed comparator circuit, and reference voltage generation circuit are connected in sequence to form a broadband radio frequency pulse signal detection and shaping system, as shown in the attached figure. Figure 1 As shown.

[0050] The waveform of the input RF pulse signal is shown in the attached figure when the carrier power is set to 0dBm, the carrier frequency to 1GHz, and the pulse width to 20ns. Figure 5 As shown in the attached figure, with carrier power set to -5dBm, carrier frequency to 1GHz, and pulse width to 20ns, the waveform of the input RF pulse signal is as follows. Figure 6 As shown in the waveform diagram, the input is a typical radio frequency carrier modulated pulse signal, verifying the correctness of the input signal.

[0051] When the carrier power of the input RF pulse signal is set to 0dBm, the carrier frequency to 1GHz, and the pulse width to 20ns, the voltage waveform output by the envelope detector circuit is shown in the attached figure. Figure 7 As shown, the envelope voltage waveform of the pulse signal output by the detector circuit has a maximum amplitude of approximately 10mV, and many high-frequency noise signals are superimposed on the envelope, making it impossible to directly input it into the FPGA or MCU for pulse width measurement. When the carrier power of the input signal is set to -5dBm, the carrier frequency to 3GHz, and the pulse width to 20ns, the voltage waveform output by the envelope detector circuit is shown in the attached figure. Figure 8 As shown, the envelope voltage waveform of the output pulse signal of the detector circuit is further reduced, with a maximum amplitude of about 7mV. In addition, many high-frequency noise signals are superimposed on the envelope, and there are obvious overshoot signals at the edges (rising edge and falling edge) of the envelope voltage. Therefore, it is also impossible to directly input the pulse width into the FPGA or MCU for pulse width measurement.

[0052] When testing the output pulse envelope signal, i.e., the pulse width signal waveform, of the broadband RF pulse signal detection and shaping system of this invention, if an oscilloscope is connected using a coaxial line with a 50-ohm characteristic impedance and the oscilloscope's input impedance is set to 50 ohms, the high-speed comparator circuit will have a lower output level due to the 50-ohm load impedance, approximately one-third of the output level under a high-impedance load. Therefore, a high-impedance probe is used to test the output pulse envelope signal, i.e., the pulse width signal waveform. The approximately 10 pF input capacitance in the oscilloscope probe will cause a small overshoot and ringing signal at the edges (rising and falling edges) of the measured detected and shaped output pulse envelope signal, i.e., the pulse width signal waveform. This is hereby noted.

[0053] When the carrier power of the input RF pulse signal is set to 0dBm, the carrier frequency to 1GHz, and the pulse width to 20ns, the broadband RF pulse signal detection and shaping system of this invention, after adjusting the reference voltage, outputs the pulse envelope signal, i.e., the pulse width signal waveform, as shown in the attached figure. Figure 9 As shown, the pulse width signal is stable, and there is no obvious overshoot signal on its edges (rising edge and falling edge). The high level is about 3.3V, the low level is about 0V, and the pulse width measurement value is about 20ns, which is completely consistent with the pulse width of the input radio frequency pulse signal.

[0054] Increase the pulse width of the input RF pulse signal to 80ns, keeping other parameters unchanged, and adjust the reference voltage. The waveform of the pulse envelope signal (i.e., the pulse width signal) output by the broadband RF pulse signal detection and shaping system is shown in the attached figure. Figure 10 As shown, the same pulse width signal is stable, with only a small overshoot signal at its edge (the overshoot signal mainly occurs due to the input capacitance of the oscilloscope probe). The high level is about 3.3V, the low level is about 0V, and the pulse width measurement is about 80.4ns, which is consistent with the pulse width of the input RF pulse signal, with very small error.

[0055] Increase the pulse width of the input RF pulse signal to 200ns, keeping other parameters unchanged, and adjust the reference voltage. The waveform of the pulse envelope signal (i.e., the pulse width signal) output by the broadband RF pulse signal detection and shaping system is shown in the attached figure. Figure 11 As shown, the pulse width signal is stable. The small overshoot signal is mainly caused by the input capacitance of the oscilloscope probe. The high level is about 3.3V and the low level is about 0V. The pulse width measurement is about 200ns, which is completely consistent with the pulse width of the input RF pulse signal.

[0056] The carrier frequency of the input RF pulse signal is increased to 3GHz, while the carrier power remains constant at 0dBm. Pulse widths are set to 20ns, 80ns, and 200ns respectively. The reference voltage is adjusted, and the waveforms of the pulse envelope signal (i.e., the pulse width signal) output by the broadband RF pulse signal detection and shaping system are shown in the attached figures. Figure 12-14As shown, the pulse width signal waveform is similar to the previous one. Figure 9-11 The overshoot signal with a small edge is mainly caused by the input capacitance of the oscilloscope probe. The high level is about 3.3V and the low level is about 0V. The pulse width measurements are 20.4nS, 81.4nS and 200nS, respectively, which are completely consistent with or have very small error with the pulse width of the input RF pulse signal.

[0057] The carrier frequency of the input RF pulse signal is set to 1 GHz, the carrier power is reduced to -5 dBm, and the pulse widths are 20 ns, 80 ns, and 200 ns respectively. The reference voltage is adjusted, and the waveforms of the pulse envelope signal (i.e., the pulse width signal) output by the broadband RF pulse signal detection and shaping system are shown in the attached figures. Figure 15-17 As shown, the pulse width signal waveform is similar to the previous one. Figure 12-14 The overshoot signal with a small edge is mainly caused by the input capacitance of the oscilloscope probe. The high level is about 3.3V and the low level is about 0V. The pulse width measurements are 20.4nS, 80.4nS and 200nS, respectively, which are completely consistent with or have very small error with the pulse width of the input RF pulse signal.

[0058] The carrier frequency of the input RF pulse signal is set to 3GHz, the carrier power remains constant at -5dBm, and the pulse widths are 20ns, 80ns, and 200ns respectively. The reference voltage is adjusted, and the waveforms of the pulse envelope signal (i.e., the pulse width signal) output by the broadband RF pulse signal detection and shaping system are shown in the attached figures. Figure 18-20 As shown, the pulse width signal waveform is similar to the previous one. Figure 15-17 The overshoot signal with a small edge is mainly caused by the input capacitance of the oscilloscope probe. The high level is about 3.3V and the low level is about 0V. The pulse width measurements are 20nS, 82nS and 200nS respectively, which are completely consistent with or have very small error with the pulse width of the input RF pulse signal.

[0059] Finally, the rise and fall times of the output pulse envelope signal, i.e., the pulse width signal waveform, of the broadband RF pulse signal detection and shaping system proposed in this invention were measured. The test used a coaxial line with a 50-ohm characteristic impedance connected to an oscilloscope. When the oscilloscope's input impedance was set to 50 ohms, the high-speed comparator circuit, due to its 50-ohm load impedance, had a lower output level, approximately one-third of the output level under a high-impedance load. Therefore, the rise and fall times of the pulse width signal under a high-impedance load should be multiplied by three. The test results are as follows: The carrier frequency of the input RF pulse signal was set to 1 GHz, the carrier power to 0 dBm, and the pulse width to 20 ns. The rise time of the shaped output pulse envelope signal was measured to be approximately 0.8 ns, and the waveform is shown in the attached figure. Figure 21 As shown, the rise time of the pulse width signal corresponding to a high impedance load is approximately 2.4 ns.

[0060] The carrier frequency of the input RF pulse signal was set to 1 GHz, the carrier power to 0 dBm, and the pulse width to 20 ns. The measured fall time of the shaped output pulse envelope signal was approximately 1 ns. The waveform is shown in the attached figure. Figure 21 As shown, the pulse width signal fall time corresponding to a high impedance load is approximately 3 ns.

[0061] The carrier frequency of the input RF pulse signal was set to 3 GHz, the carrier power to 0 dBm, and the pulse width to 20 ns. The rise time of the shaped output pulse envelope signal was measured to be approximately 0.76 ns, and the waveform is shown in the attached figure. Figure 21 As shown, the rise time of the pulse width signal corresponding to a high impedance load is approximately 2.28 ns.

[0062] The carrier frequency of the input RF pulse signal was set to 3 GHz, the carrier power to 0 dBm, and the pulse width to 20 ns. The measured fall time of the shaped output pulse envelope signal was approximately 0.56 ns, and the waveform is shown in the attached figure. Figure 21 As shown, the pulse width signal fall time corresponding to a high impedance load is approximately 1.68 ns.

[0063] The carrier frequency of the input RF pulse signal was set to 3 GHz, the carrier power to -5 dBm, and the pulse width to 20 ns. The rise time of the shaped output pulse envelope signal was measured to be approximately 0.74 ns, and the waveform is shown in the attached figure. Figure 21 As shown, the rise time of the pulse width signal corresponding to a high impedance load is approximately 2.22 ns.

[0064] The carrier frequency of the input RF pulse signal was set to 3 GHz, the carrier power to -5 dBm, and the pulse width to 20 ns. The measured fall time of the shaped output pulse envelope signal was approximately 0.69 ns, and the waveform is shown in the attached figure. Figure 21 As shown, the pulse width signal fall time corresponding to a high impedance load is approximately 2.07 ns.

[0065] In summary, when the carrier frequency of the input RF pulse signal varies within the range of 1-3 GHz, the carrier power varies within the range of -5-0 dBm, and the pulse width varies within the range of 20-200 ns, the output pulse envelope signal level after passing through the broadband RF pulse signal detection and shaping system proposed in this invention meets both LVCMOS and LVTTL level standards, adapting to the digital logic levels of FPGAs or embedded processors. The minimum pulse width of the shaped output pulse signal can reach 20 ns, with rise and fall times both in the ns range. The time-domain waveform has virtually no overshoot or ringing (the small overshoot and ringing signals observed on the oscilloscope are mainly caused by the input capacitance of the oscilloscope probe). By adjusting the reference voltage, it can be ensured that the pulse width of the shaped output is always completely consistent with or has very little error with the pulse width of the input signal, allowing it to be directly fed into the FPGA or embedded processor for pulse width measurement, significantly improving the accuracy of pulse width measurement.

[0066] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.

Claims

1. A broadband radio frequency pulse signal detection and shaping system, characterized in that... include: The envelope detection circuit uses a radio frequency detection diode to perform envelope detection on broadband radio frequency pulse signals with a carrier frequency below 10 GHz, and outputs a voltage signal that is consistent with the envelope waveform of the pulse signal. The preamplifier circuit amplifies the pulse envelope voltage signal output by the envelope detector circuit; The high-speed comparator circuit shapes the pulse envelope voltage amplified by the preamplifier circuit into a signal with a constant duty cycle, adapting it to the digital logic level signal of the FPGA or embedded processor, based on the reference voltage.

2. The broadband radio frequency pulse signal detection and shaping system according to claim 1, characterized in that... The reference voltage is an external reference voltage or is generated by a reference voltage generation circuit.

3. The broadband radio frequency pulse signal detection and shaping system according to claim 2, characterized in that... The reference voltage generation circuit consists of a resistor divider network and a voltage follower. The resistor divider network includes a fixed resistor connected in series between the power supply and ground and an adjustable potentiometer. The sliding terminal of the adjustable potentiometer outputs an adjustable DC voltage. This DC voltage is input to the voltage follower and, after impedance transformation by the operational amplifier, serves as the reference voltage for the high-speed comparator circuit.

4. The broadband radio frequency pulse signal detection and shaping system according to claim 3, characterized in that... The voltage follower is composed of a unity-gain stable operational amplifier.

5. The broadband radio frequency pulse signal detection and shaping system according to claim 4, characterized in that... The preamplifier circuit is a two-stage in-phase amplifier structure. A bypass switch is provided between the input and output terminals of the circuit. When the output voltage signal of the envelope detector circuit is large, the bypass switch is closed, and the preamplifier circuit forms a direct circuit with a gain of 1, which is used to improve the input dynamic range of the detector shaping system.

6. The broadband radio frequency pulse signal detection and shaping system according to claim 1, characterized in that... The high-speed comparator circuit provides a preset voltage hysteresis window through a positive feedback resistor network.

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