Method for manufacturing grating coupler, grating coupler, chip and device

Abstract

This application provides a method for fabricating a grating coupler, a grating coupler, a chip, and a device. The method includes: providing a semiconductor substrate, the semiconductor substrate including an optical waveguide material layer; forming a mask layer on the upper surface of the optical waveguide material layer; using a patterning process, forming a mask structure in the mask layer and a first grating structure in the optical waveguide material layer, the first grating structure including a plurality of first gate lines, the mask structure including a plurality of mask lines, the plurality of mask lines corresponding one-to-one covering the plurality of first gate lines; forming a fill layer, the first grating structure and the mask structure being located in the fill layer, with the upper surface of the mask structure exposed; removing the mask structure to form a plurality of trenches in the fill layer; and filling the plurality of trenches with optical waveguide material to form a second grating structure. The technical solution provided by this application can reduce the fabrication cost of the grating coupler.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for fabricating a grating coupler, the grating coupler, the chip, and the device. Background Technology

[0002] Grating couplers are an important component of silicon photonic integrated circuit chips (referred to as silicon photonic chips). Grating couplers are used to realize vertical optical coupling between on-chip waveguides and optical fibers.

[0003] Currently, silicon photonics chips are mainly fabricated based on silicon-on-insulator (SOI). SOI consists of a top silicon layer, a silicon substrate, and a buried oxide layer of silicon dioxide between the top silicon layer and the silicon substrate. The top silicon layer is monocrystalline silicon. In SOI, the top silicon layer is relatively thin, typically around 220 nm. If the grating coupler is fabricated solely based on the top silicon layer, the coupling loss of the grating coupler will be relatively high. To reduce the coupling loss of the grating coupler, existing fabrication methods increase the thickness of the silicon layer by growing an additional polycrystalline silicon layer. The main fabrication process is as follows: first, the top silicon layer (i.e., monocrystalline silicon) is etched to obtain a monocrystalline silicon grating structure; then, silicon dioxide is filled; after chemical mechanical polishing, a polycrystalline silicon layer is grown; finally, the polycrystalline silicon layer is etched to obtain a polycrystalline silicon grating structure, thus obtaining the grating coupler. The grating region of this grating coupler consists of both a monocrystalline silicon grating structure and a polycrystalline silicon grating structure.

[0004] It is evident that the existing fabrication method requires two photolithography etching processes to obtain the grating coupler, which results in high fabrication costs. Summary of the Invention

[0005] In view of the above problems, this application is made to provide a method for fabricating a grating coupler, a grating coupler, a chip, and an apparatus that solves or at least partially solves the above problems.

[0006] Therefore, in one embodiment of this application, a method for fabricating a grating coupler is provided, comprising:

[0007] A semiconductor substrate is provided, the semiconductor substrate including an optical waveguide material layer;

[0008] A mask layer is formed on the upper surface of the optical waveguide material layer;

[0009] Using a patterning process, a mask structure is formed in the mask layer and a first grating structure is formed in the optical waveguide material layer. The first grating structure includes a plurality of first grating lines, and the mask structure includes a plurality of mask lines, with the plurality of mask lines corresponding to and covering the plurality of first grating lines.

[0010] A filling layer is formed, in which the first grating structure and the mask structure are located, and the upper surface of the mask structure is exposed.

[0011] Remove the mask structure to form a plurality of trenches in the filler layer;

[0012] Optical waveguide material is filled into the plurality of trenches to form a second grating structure;

[0013] The grating coupler includes the first grating structure and the second grating structure.

[0014] In another embodiment of this application, a grating coupler is provided, which is prepared by the above-described preparation method.

[0015] In another embodiment of this application, a photonic integrated circuit chip is provided, including a grating coupler prepared by the above-described preparation method.

[0016] In another embodiment of this application, a computing device is provided, comprising: the above-described photonic integrated circuit chip.

[0017] In the technical solution provided by this application embodiment, after patterning the optical waveguide material layer using a mask layer to obtain a first grating structure, the mask structure located above the first grating structure in the mask layer is retained, and a filling layer is prepared. This filling layer fills the gaps between the patterned mask layer and the optical waveguide material layer. Essentially, the mask structure predefines the pattern of the second grating structure in the filling layer. Subsequently, the mask structure is removed from the filling layer, and the optical waveguide material is filled into the multiple trenches formed after removing the mask structure, thus automatically forming the second grating structure in the filling layer. In other words, the technical solution provided by this application embodiment only requires the preparation of a photolithographic mask for forming the first grating structure, without the need to prepare a photolithographic mask for forming the second grating structure, and also eliminates the need for photolithography and etching of the subsequently deposited optical waveguide material. This achieves patterning of the subsequently deposited optical waveguide material, thereby reducing the fabrication cost of the grating coupler. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic flowchart of a preparation method provided in an embodiment of this application;

[0020] Figure 2 A cross-sectional view of a first semiconductor structure prepared according to an embodiment of this application;

[0021] Figure 3 A top view of the second semiconductor structure prepared according to an embodiment of this application;

[0022] Figure 4 A cross-sectional view of the third semiconductor structure prepared according to an embodiment of this application;

[0023] Figure 5 A cross-sectional view of the fourth semiconductor structure prepared according to an embodiment of this application;

[0024] Figure 6 A cross-sectional view of the fifth semiconductor structure prepared according to an embodiment of this application;

[0025] Figure 7 A cross-sectional view of the sixth semiconductor structure prepared according to an embodiment of this application;

[0026] Figure 8 A cross-sectional view of the seventh semiconductor structure prepared according to an embodiment of this application;

[0027] Figure 9 This is a cross-sectional view of an eighth semiconductor structure prepared according to an embodiment of this application. Detailed Implementation

[0028] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort are within the scope of protection of the present application.

[0029] Furthermore, some processes described in the specification, claims, and accompanying drawings of this application include multiple operations that appear in a specific order. These operations may be performed out of order or in parallel. Operation numbers such as 201, 202, etc., are merely used to distinguish different operations and do not represent any execution order. Additionally, these processes may include more or fewer operations, and these operations may be performed sequentially or in parallel. It should be noted that the terms "first," "second," etc., used herein are used to distinguish different messages, devices, modules, etc., and do not represent a chronological order, nor do they limit "first" and "second" to different types.

[0030] Currently, the conventional fabrication process for silicon photonics chips follows the manufacturing process of Complementary Metal Oxide Semiconductor (CMOS). The CMOS manufacturing process is as follows:

[0031] 1. Patterning of single-crystal silicon is achieved through a series of processes such as photolithography and etching.

[0032] 2. After the monocrystalline silicon is patterned, it is filled with oxide.

[0033] 3. After oxide filling, polycrystalline silicon deposition is performed.

[0034] 4. Polycrystalline silicon is patterned through a series of processes such as photolithography and etching.

[0035] It is evident that this manufacturing process requires two photolithography etching steps to obtain the grating coupler.

[0036] Furthermore, in this manufacturing process, in order to ensure the etching effect, silicon oxide needs to be placed between polysilicon and monocrystalline silicon as an etching stop layer for polysilicon etching. However, in silicon photonic chips, grating couplers require silicon and polysilicon to couple incident light, and the silicon oxide between the two is unnecessary. In fact, due to its different refractive index from silicon, it affects the coupling efficiency of the grating coupler.

[0037] To solve or partially solve the above-mentioned technical problems, embodiments of this application provide a self-aligned deposition method for fabricating polysilicon for grating couplers, saving a photomask for polysilicon, and allowing polysilicon to be patterned without photolithography and etching processes.

[0038] The following will combine Figures 1 to 9 This application describes a method for fabricating a grating coupler according to an embodiment. For example... Figure 1 As shown, the method may include the following steps:

[0039] 101. Provide semiconductor substrates.

[0040] The semiconductor substrate includes an optical waveguide material layer.

[0041] For example, the optical waveguide material layer includes a silicon layer or a silicon nitride (SiN) layer.

[0042] For example, the optical waveguide material layer is a single-crystal silicon layer.

[0043] In some embodiments, such as Figure 2As shown, the semiconductor substrate 200 includes: a supporting substrate 21, an insulating layer 22 disposed on the upper surface of the supporting substrate 21, and an optical waveguide material layer 23 disposed on the upper surface of the insulating layer 22. The supporting substrate can be any suitable supporting material, such as silicon, ceramic, or quartz. The insulating layer 22 can be a silicon dioxide layer.

[0044] For example, the semiconductor substrate is an SOI substrate. The top silicon layer in the SOI substrate is an optical waveguide material layer, and the top silicon layer in the SOI substrate is single-crystal silicon.

[0045] 102. A mask layer is formed on the upper surface of the optical waveguide material layer.

[0046] like Figure 3 As shown, the mask layer 31 covers the upper surface of the optical waveguide material layer 23.

[0047] In some embodiments, the mask layer may be a hard mask layer. For example, the material of the hard mask layer may include silicon nitride, that is, the hard mask layer is a silicon nitride layer.

[0048] In some embodiments, the thickness of the mask layer is greater than or equal to 2000 angstroms. This ensures that the depth of the multiple trenches formed in subsequent step 105 is sufficiently large, thereby ensuring that the thickness of the second grating structure meets the optical coupling requirements.

[0049] In some embodiments, the mask layer may be formed using physical vapor deposition or chemical vapor deposition.

[0050] 103. Using a patterning process, a mask structure is formed in the mask layer and a first grating structure is formed in the optical waveguide material layer.

[0051] like Figure 4 As shown, the first grating structure 231 includes a plurality of first grating lines 231a, and the mask structure 311 includes a plurality of mask lines 311a, which cover the plurality of first grating lines 231a one by one.

[0052] The number of first gate lines 231a is the same as the number of mask lines 311a, and each first gate line 231a is covered by a mask line 311a.

[0053] like Figure 4 As shown, multiple first gate lines 231a are spaced apart, and multiple mask lines 311a are spaced apart.

[0054] For example, the plurality of first gate lines 231a are arranged parallel to each other and spaced apart, and the plurality of mask lines 311a are arranged parallel to each other and spaced apart.

[0055] For example, the first grating structure 231 has the same period and duty cycle as the mask structure 311.

[0056] In some embodiments, the step 103 above, "forming a mask structure in the mask layer and forming a first grating structure in the optical waveguide material layer using a patterning process," may include:

[0057] 1031. Using a patterning process, a first grating structure and a waveguide structure are formed in the optical waveguide material layer, and a mask structure is formed in the mask layer.

[0058] like Figure 4 As shown, the first grating structure 231 is located above the waveguide structure 232. The first grating structure 231 and the waveguide structure 232 are integrally formed.

[0059] In one optional implementation, a mask pattern can be etched onto the mask layer using two or more photolithography etching steps. The mask pattern defines the morphology of the first grating structure and the waveguide structure; that is, the mask pattern has two or more preset etching depths. Using the aforementioned mask pattern as the etching mask, the optical waveguide material layer and the mask layer are etched in a single etching process. The first grating structure and the waveguide structure are obtained in the optical waveguide material layer, and the mask structure is obtained in the mask layer.

[0060] For example, the process of preparing a mask pattern may include the following steps:

[0061] 1. A first photoresist layer is formed on the upper surface of the mask layer. A first photolithography step is performed on the first photoresist layer to form a first photoresist pattern for defining the morphology of the first grating structure.

[0062] 2. Using the first photoresist pattern, a first etching step is performed using plasma etching to etch the mask layer to a first depth, forming a first mask pattern used to define the morphology of the first grating structure. The first depth is less than the thickness of the mask layer. After the first etching step, the remaining first photoresist is removed.

[0063] 3. A second photoresist layer is formed on the mask layer having the first mask pattern. A second photolithography step is performed on the second photoresist layer to form a second photoresist pattern for defining the waveguide structure morphology.

[0064] 4. Using the second photoresist pattern, perform a second etching step using plasma etching to etch the mask layer to a second depth, forming a second mask pattern used to define the waveguide structure morphology. The second depth is equal to the thickness of the mask layer. After performing the second etching step, remove the remaining second photoresist.

[0065] It should be noted that the above-mentioned mask pattern is composed of the first mask pattern and the second mask pattern.

[0066] 104. Forming a filling layer.

[0067] like Figure 6 As shown, the first grating structure 231 and the mask structure 311 are located in the filling layer 61, and the upper surface of the mask structure 311 is exposed.

[0068] The filler layer is made of an insulating material, such as silicon dioxide. It fills the gaps between the patterned mask layer and the waveguide material layer, facilitating isolation between devices.

[0069] In some embodiments, physical vapor deposition or chemical vapor deposition may be used to form the filling layer.

[0070] In some embodiments, such as Figure 6 As shown, the upper surface of the mask structure 311 being exposed means that the upper surface of the mask line 311a is exposed while the other surfaces of the mask structure 311 are covered.

[0071] In some alternative implementations, the "forming a fill layer" in step 104 above can be achieved by the following steps:

[0072] 1041. After the first grating structure and the mask structure are formed, a filling material is deposited to obtain an initial filling layer.

[0073] The first grating structure and the mask structure are encapsulated in the initial filling layer.

[0074] like Figure 5 As shown, after the first grating structure and the mask structure are formed, a filling material can be deposited on the upper surface of the semiconductor substrate 200 to obtain an initial filling layer 51. The filling material can be silicon dioxide.

[0075] 1042. Grind the upper surface of the initial filling layer to expose the upper surface of the mask structure to obtain the filling layer.

[0076] After obtaining the initial filling layer 51, since the upper surface of the mask structure is covered by the initial filling layer 51, it is necessary to perform chemical mechanical polishing on the upper surface of the initial filling layer 51 to expose the upper surface of the mask structure, resulting in the following: Figure 6 The filling layer 61 shown.

[0077] 105. Remove the mask structure to form a plurality of trenches in the filler layer.

[0078] The mask structure can be removed through its exposed upper surface to form multiple trenches in the filler layer.

[0079] like Figure 7 As shown, after the mask structure is removed, multiple trenches 71 are formed in the filling layer.

[0080] Multiple grooves are used to define the morphology of the second grating structure.

[0081] like Figure 7 As shown, multiple trenches 71 are spaced apart.

[0082] For example, such as Figure 7 As shown, multiple trenches 71 are arranged in parallel and at intervals.

[0083] In one alternative embodiment, a wet etching process can be used to remove the mask structure to form multiple trenches in the filler layer. In this wet etching process, the ratio of the etching rate of the mask structure material to the etching rate of the filler layer material is greater than or equal to a preset threshold. That is, the mask structure material has a high etching selectivity in the wet etching process.

[0084] For example, a wet etching process may include a hot phosphoric acid wet etching process.

[0085] For example, the mask structure is made of silicon nitride and the filling layer is made of silicon dioxide. In the hot phosphoric acid wet etching process, the ratio of the etching rate of silicon nitride to the etching rate of silicon dioxide is greater than or equal to a preset threshold.

[0086] 106. Fill the plurality of trenches with optical waveguide material to form a second grating structure.

[0087] The grating coupler includes the first grating structure and the second grating structure.

[0088] For example, such as Figure 9 As shown, the grating coupler includes a first grating structure 231, a waveguide structure 232, and a second grating structure 82.

[0089] like Figure 7 and Figure 8 As shown, optical waveguide material is deposited in the plurality of trenches 71 to fill the waveguide material in each trench 71 to form a second grating line 82a. The second grating structure 82 includes the second grating line 82a formed in each of the plurality of trenches 71 and the gap between adjacent second grating lines 82a.

[0090] like Figure 8As shown, the second grating line 82a formed in each of the multiple trenches 71 and the gap between adjacent second grating lines 82a together constitute the second grating structure 82.

[0091] Among them, such as Figure 8 As shown, the shape of the second gate line 82a formed in each trench 71 is the same as the shape of the trench 71. That is, the thickness of the second gate line 82a (i.e., the distance between the upper and lower surfaces of the second gate line) is the same as the depth of the trench 71.

[0092] like Figure 8 and Figure 9 As shown, the number of multiple first gate lines 231a is the same as the number of multiple second gate lines 82a, and each first gate line 231a is covered by a second gate line 82a.

[0093] like Figure 8 As shown, multiple second gate lines 82a are spaced apart.

[0094] For example, a plurality of second gate lines 82a are arranged parallel to each other and spaced apart.

[0095] For example, the first grating structure 231 and the second grating structure 82 have the same period and duty cycle.

[0096] In an optional implementation, step 106 above, "filling the plurality of trenches with optical waveguide material to form a second grating structure," can be achieved by the following steps:

[0097] 1061. After the plurality of trenches are formed, optical waveguide material is deposited over the plurality of trenches and the filling layer to fill the plurality of trenches with optical waveguide material.

[0098] In practical applications, after executing step 1061, the following result is obtained: Figure 8 The structure shown has an upper surface of the filling layer 61 covered with an optical waveguide material 81.

[0099] In some embodiments, the material of the first grating structure includes monocrystalline silicon, and the material of the second grating structure includes polycrystalline silicon.

[0100] 1062. Remove the optical waveguide material located above the filling layer to expose the upper surface of the filling layer.

[0101] Optionally, excess optical waveguide material located above the filler layer can be removed using a chemical mechanical polishing process to expose the upper surface of the filler layer, thereby obtaining the desired result. Figure 9 The structure shown.

[0102] This application also provides a grating coupler, which is prepared by the preparation methods provided in the above embodiments.

[0103] This application also provides a photonic integrated circuit chip. This photonic integrated circuit chip may include a grating coupler fabricated by the methods provided in the above embodiments. For example, the photonic integrated circuit chip may be a photonic computing chip; for example, the photonic computing chip is a neural network-based photonic computing chip.

[0104] This application also provides a computing device. This computing device may include the photonic integrated circuit chip described in the above embodiments.

[0105] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application. In addition, if two or more features, systems, articles, materials and / or methods described herein do not contradict each other, then any combination of these features, systems, articles, materials and / or methods is included within the scope of this disclosure.

Claims

1. A method for fabricating a grating coupler, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate including an optical waveguide material layer; A mask layer is formed on the upper surface of the optical waveguide material layer; Using a patterning process, a mask structure is formed in the mask layer and a first grating structure is formed in the optical waveguide material layer. The first grating structure includes a plurality of first grating lines, and the mask structure includes a plurality of mask lines, with the plurality of mask lines corresponding to and covering the plurality of first grating lines. A filling layer is formed, in which the first grating structure and the mask structure are located, and the upper surface of the mask structure is exposed. Remove the mask structure to form a plurality of trenches in the filler layer; Optical waveguide material is filled into the plurality of trenches to form a second grating structure; The grating coupler includes the first grating structure and the second grating structure.

2. The method according to claim 1, characterized in that, Depositing optical waveguide material in the plurality of trenches to form a second grating structure includes: Optical waveguide material is deposited in the plurality of trenches to fill the waveguide material in each trench to form a second gate line; The second grating structure includes second grating lines formed in each of the plurality of trenches.

3. The method according to claim 2, characterized in that, The shape of the second grid line formed in each trench is the same as the shape of the trench.

4. The method according to any one of claims 1 to 3, characterized in that, The thickness of the mask layer is greater than or equal to 2000 angstroms.

5. The method according to any one of claims 1 to 3, characterized in that, The plurality of first gate lines are parallel to each other and spaced apart, and the plurality of mask lines are parallel to each other and spaced apart.

6. The method according to any one of claims 1 to 3, characterized in that, The first grating structure and the second grating structure have the same period and duty cycle.

7. The method according to any one of claims 1 to 3, characterized in that, Filling the plurality of trenches with optical waveguide material to form a second grating structure includes: After the plurality of trenches are formed, optical waveguide material is deposited over the plurality of trenches and the filling layer to fill the plurality of trenches with optical waveguide material; Remove the optical waveguide material located above the filler layer to expose the upper surface of the filler layer.

8. The method according to any one of claims 1 to 3, characterized in that, Forming a filler layer, including: After the first grating structure and the mask structure are formed, a filling material is deposited to obtain an initial filling layer, in which the first grating structure and the mask structure are encapsulated; The upper surface of the initial filling layer is ground to expose the upper surface of the mask structure, thus obtaining the filling layer.

9. The method according to any one of claims 1 to 3, characterized in that, Removing the mask structure to form a plurality of trenches in the filler layer includes: The mask structure is removed using a wet etching process to form multiple trenches in the filler layer; In the wet etching process, the ratio of the etching rate of the mask structure material to the etching rate of the filling layer material is greater than or equal to a preset threshold.

10. The method according to any one of claims 1 to 3, characterized in that, The first grating structure is made of monocrystalline silicon, and the second grating structure is made of polycrystalline silicon.

11. The method according to any one of claims 1 to 3, characterized in that, The mask layer is a hard mask layer.

12. The method according to any one of claims 1 to 3, characterized in that, The semiconductor substrate further includes: a supporting substrate and an insulating layer disposed on the upper surface of the supporting substrate; the optical waveguide material layer is disposed on the upper surface of the insulating layer.

13. A grating coupler, characterized in that, The grating coupler is prepared by the preparation method described in any one of claims 1 to 12.

14. A photonic integrated circuit chip, characterized in that, Includes a grating coupler prepared by the preparation method according to any one of claims 1 to 12.

15. A computing device, characterized in that, include: The photonic integrated circuit chip according to claim 14 above.

Images