A power system probabilistic electromagnetic transient simulation method and related device thereof

Abstract

The application discloses a power system probabilistic electromagnetic transient simulation method and a related device thereof, and the system comprises the following modules: a ring oscillator entropy source array module samples an oscillator output through a slow sampling clock to obtain an original random bit stream; a post-processing module performs deviation removal and whitening processing on the original random bit stream; a probability distribution transformation module transforms uniformly distributed random parameters into target probability distribution random parameters conforming to characteristics of various random factors of a power system; a parameter distribution interconnection network module distributes the random parameters to FPGA parallel simulation processing units for electromagnetic transient simulation; and a hardware statistical processing module executes a pipelined online statistical algorithm on simulation results to generate probability distribution characteristics and confidence intervals of various electrical quantities. The application utilizes internal physical noise sources of an FPGA to construct a true random number generator, thereby solving the problem of insufficient randomness quality of a software pseudo-random number generator; and a parallel simulation array is constructed on the FPGA, thereby improving simulation efficiency.

Description

Technical Field

[0001] This application relates to the field of power system technology, and in particular to a probabilistic electromagnetic transient simulation method for power systems and related devices. Background Technology

[0002] With the large-scale grid connection of new energy power generation, the proportion of stochastic power sources, represented by wind power and photovoltaics, in the power system continues to rise. The output power of these power sources is affected by random fluctuations in natural factors such as wind speed and sunlight, significantly increasing the uncertainty of power system operation. At the same time, the widespread application of power electronic converters has brought about complex electromagnetic transient phenomena. Traditional electromagnetic transient simulation based on deterministic parameters is no longer sufficient to comprehensively assess the safety and stability of the system under stochastic operating conditions, making the need for probabilistic electromagnetic transient simulation increasingly urgent.

[0003] The core idea of ​​probabilistic electromagnetic transient simulation is to combine the Monte Carlo method with electromagnetic transient simulation: a large number of random parameters in the system are sampled, and a complete electromagnetic transient simulation is run for each sample, with statistical analysis performed on all simulation results. However, electromagnetic transient simulation itself is extremely computationally intensive, with simulation steps typically on the order of microseconds, requiring a significant amount of computation time for a single simulation. The Monte Carlo method, on the other hand, requires hundreds or thousands of repeated simulations to obtain reliable statistical conclusions. The combination of these two approaches results in an extremely heavy computational burden, severely restricting the engineering application of probabilistic electromagnetic transient analysis.

[0004] The most common implementation scheme currently is software Monte Carlo electromagnetic transient simulation based on general-purpose CPU or GPU platforms. Its working principle is as follows: first, a software pseudo-random number generator is used to generate random parameter samples that follow a preset probability distribution; then, the electromagnetic transient simulation program is executed serially or in limited parallelism for each sample group; finally, statistical processing of all simulation results is performed at the software level. This scheme relies on commercial software tools such as PSCAD and EMTP, with simulation step sizes typically ranging from 1 to 50 microseconds, and each simulation requiring thousands to tens of thousands of time steps. Application scenarios are mainly concentrated in offline planning research and academic analysis. This scheme has the following drawbacks: (1) The computational efficiency is extremely low. It usually takes several hours or even days to complete more than a thousand Monte Carlo simulations, which cannot meet the needs of online analysis. (2) Software pseudo-random number generators are based on deterministic algorithms and have periodicity and correlation. When sampling in large-scale parallel processes, they may introduce statistical biases and affect the reliability of simulation results. (3) The parallel granularity under the CPU / GPU architecture is limited by the number of cores and memory bandwidth, making it difficult to achieve true large-scale simulation instances running synchronously in parallel. Summary of the Invention

[0005] To address the aforementioned issues, this application provides a probabilistic electromagnetic transient simulation method for power systems and related apparatus.

[0006] In view of this, the first aspect of this application provides a probabilistic electromagnetic transient simulation system for power systems, comprising: A ring oscillator entropy source array module, consisting of multiple ring oscillators instantiated within the FPGA, is used to sample the high-speed oscillation signal output by the ring oscillators using a slow sampling clock to obtain the original random bit stream. The random bit post-processing module is used to perform debiasing and whitening processing on the original random bit stream to obtain uniformly distributed random parameters; The probability distribution transformation module is used to transform the uniformly distributed random parameters into target probability distribution random parameters that conform to the characteristics of various random factors in the power system. The parameter allocation interconnection network module is used to allocate the random parameters of the target probability distribution to the parallel simulation processing units inside the FPGA according to a predetermined mapping rule. The simulation processing unit array module includes multiple parallel simulation processing units, which are used to perform electromagnetic transient simulations based on the random parameters of the target probability distribution and output simulation results. The hardware statistical processing module is used to execute a pipelined online statistical algorithm on the simulation results to generate the probability distribution characteristics and confidence intervals of each electrical quantity at the current time.

[0007] Optionally, the random bit post-processing module is specifically used for: Read adjacent raw random bit streams in pairs. If the adjacent raw random bit streams are 01, output 0; if the adjacent raw random bit streams are 10, output 1; if the adjacent raw random bit streams are 00 or 11, discard them. Perform an XOR operation on the debiased random bit stream to obtain uniformly distributed random parameters.

[0008] Optionally, the probability distribution transformation module is specifically used for: For a normal distribution, the Box-Muller transform is used to generate normal distribution random parameters using two independent uniform distribution random parameters; For Weibull distribution or exponential distribution, the inverse transformation method is used to transform the uniform distribution random parameters into Weibull distribution random parameters or exponential distribution random parameters; For the Beta distribution, obtain two independent uniformly distributed random parameters U1 and U2, calculate the intermediate parameters V1 = U1^(1 / α) and V2 = U2^(1 / β). If V1 + V2 ≤ 1, output the Beta distribution random parameter X = V1 / (V1 + V2); otherwise, regenerate.

[0009] Optionally, the simulation processing unit is specifically used for: At the start of the simulation step, the currently valid component parameters are read as the updated component parameters, which include the target probability distribution random parameters; The equivalent conductance and historical current source values ​​of each component are calculated based on the updated component parameters and the state variables saved from the previous simulation step, and the conductance matrix and injected current vector are generated; the state variables include inductor current and capacitor voltage. The voltages at each node are obtained by solving the linear equations using LU decomposition. The currents and power of each branch are then inferred from the voltages at each node, and the state variables are updated.

[0010] Optionally, the hardware statistical processing module is specifically used for: Welford's online algorithm is used to accumulate the simulation results output by each simulation processing unit in a pipeline manner and recursively update the mean and variance. The simulation results output by each simulation processing unit are assigned to the corresponding histogram bars according to the preset interval width, which are used to estimate the probability density function. A hardware sorting network or a hardware selection network is used to extract specified quantiles for a given number of parallel instances N, in order to calculate the upper and lower bounds of the confidence interval.

[0011] Optionally, the system may also include: The global control and synchronization module is used to generate simulation step clock signals and control enable signals for each stage, ensuring that the simulation processing unit executes in an orderly manner according to the simulation calculation process within each step, and takes a snapshot of the simulation results at the step boundary for the hardware statistical processing module to read.

[0012] Optionally, the system may also include: The high-speed communication interface module is used to receive configuration parameters and control commands from the host computer, as well as transmit the probability distribution characteristics and confidence intervals of each electrical quantity at the current moment to the host computer for waveform drawing, probability distribution curve display, and report generation.

[0013] The second aspect of this application provides a probabilistic electromagnetic transient simulation method for power systems, including: Multiple ring oscillators are instantiated inside the FPGA, and the high-speed oscillation signal output by the ring oscillators is sampled by a slow sampling clock to obtain the original random bit stream. The original random bitstream is debiased and whitened to obtain uniformly distributed random parameters; The uniformly distributed random parameters are transformed into target probability distribution random parameters that conform to the characteristics of various random factors in the power system; The random parameters of the target probability distribution are allocated to parallel simulation processing units on the FPGA according to a predetermined mapping rule for electromagnetic transient simulation. A pipelined online statistical algorithm is executed on the simulation results output by each simulation processing unit to generate the probability distribution characteristics and confidence intervals of each electrical quantity at the current moment.

[0014] A third aspect of this application provides an electronic device, the device including a processor and a memory; The memory is used to store program code and transmit the program code to the processor; The processor is used to execute the probabilistic electromagnetic transient simulation method for power systems as described in the second aspect, according to the instructions in the program code.

[0015] The fourth aspect of this application provides a computer-readable storage medium for storing program code that, when executed by a processor, implements the probabilistic electromagnetic transient simulation method for power systems described in the second aspect.

[0016] As can be seen from the above technical solutions, this application has the following advantages: The probabilistic electromagnetic transient simulation system for power systems provided in this application solves the problem of insufficient randomness quality of software pseudo-random number generators by constructing a true random number generator using the physical noise source inside the FPGA. By constructing a large-scale parallel simulation array on the FPGA, multiple simulation instances with different random disturbances are run simultaneously while ensuring the microsecond-level step-size solution accuracy of electromagnetic transient simulation, thus improving the computational efficiency of Monte Carlo simulation by several orders of magnitude. By summarizing the parallel simulation results in real time and outputting the probability distribution and confidence interval of electrical quantities, the probabilistic electromagnetic transient analysis is upgraded from an offline research tool to a practical tool that can be executed online. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 A schematic diagram of a probabilistic electromagnetic transient simulation system for a power system provided in this application embodiment; Figure 2 This application provides a schematic diagram illustrating the probability distribution transformation and parameter allocation principles in its embodiments. Figure 3 A schematic diagram of the working principle of the hardware statistical processing module provided in the embodiments of this application; Figure 4 This is a flowchart illustrating a probabilistic electromagnetic transient simulation method for a power system provided in an embodiment of this application. Detailed Implementation

[0019] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0020] Terminology Explanation: FPGA (Field Programmable Gate Array): A semiconductor integrated circuit device whose logic function can be configured by the user in the field through programming. It contains a large number of programmable logic units, configurable interconnect resources and distributed memory, and can realize highly parallel digital logic operations. It is widely used in real-time signal processing, hardware acceleration and embedded systems.

[0021] TRNG (True Random Number Generator): A hardware circuit that uses unpredictable noise in physical processes (such as thermal noise, jitter noise, etc.) as an entropy source to generate random bit sequences. Its output is unreproducible and statistically unpredictable, unlike pseudo-random number generators based on deterministic algorithms. It has important application value in scenarios with strict requirements for randomness quality, such as cryptography and Monte Carlo simulation.

[0022] EMT (Electromagnetic Transient): Rapid electrical changes in a power system caused by events such as switching operations, faults, and lightning strikes. The time scale is usually on the order of microseconds to milliseconds. Its simulation requires the use of small steps (usually on the order of microseconds) to solve the system differential equations step by step numerically in order to accurately capture the high-frequency components and transient transition processes in the voltage and current waveforms.

[0023] Monte Carlo simulation is a numerical computation method based on statistical sampling theory. It extracts the probability distribution characteristics of output variables from a large number of simulation results by randomly sampling a large number of input parameters and repeatedly executing a deterministic simulation model. It is suitable for analyzing the behavior of complex systems with uncertain parameters, but the traditional serial implementation method has an extremely large computational load.

[0024] Probabilistic simulation is an analytical method that differs from deterministic simulation. It treats system input parameters as random variables rather than fixed values, and quantifies the uncertainty of output results by introducing random disturbances during the simulation process. Finally, it gives simulation conclusions in the form of statistical quantities such as probability distributions and confidence intervals, which can more realistically reflect the randomness and uncertainty in the actual operation of power systems.

[0025] Existing technologies based on general-purpose CPU or GPU platforms for software Monte Carlo electromagnetic transient simulation have the following drawbacks: Disadvantage 1: Monte Carlo simulation has extremely low computational efficiency, making it unsuitable for online analysis. Specifically, electromagnetic transient simulations inherently involve small step sizes and large computational demands. Furthermore, the Monte Carlo method requires hundreds to thousands of repeated simulations. Even with multi-threaded parallelism on CPU / GPU platforms, completing a full probabilistic analysis still takes hours to days. This limits probabilistic electromagnetic transient simulations to offline research tools, making them unsuitable for integration into real-time power system operation control and online safety assessment processes, severely restricting their practical engineering value.

[0026] Disadvantage 2: The software pseudo-random number generator lacks sufficient randomness quality, affecting the reliability of statistical conclusions. Specifically, pseudo-random numbers are generated based on deterministic recursive formulas such as linear congruential methods or Mason tweening algorithms, exhibiting inherent periodicity. When providing independent random sequences for a large number of parallel simulation instances simultaneously, statistical correlations may appear between different sequences. This correlation prevents Monte Carlo sampling from fully covering the parameter space, leading to systematic biases in probability distribution estimation and reducing the accuracy of statistics such as confidence intervals.

[0027] Disadvantage 3: The scalability of the CPU / GPU parallel architecture is limited, making it difficult to achieve synchronous execution of large-scale simulation instances. Specifically, the number of CPU cores is limited, and while GPUs offer high parallelism, their SIMT architecture is unsuitable for handling electromagnetic transient simulation algorithms with conditional branches and irregular data access, and is constrained by shared memory bandwidth and thread synchronization overhead. This results in a limited ability to flexibly expand the number of parallel simulation instances, limiting improvements in Monte Carlo convergence speed.

[0028] To improve the above issues, please refer to Figure 1 This application provides a probabilistic electromagnetic transient simulation system for power systems, comprising: A ring oscillator entropy source array module, consisting of multiple ring oscillators instantiated within the FPGA, is used to sample the high-speed oscillation signal output by the ring oscillators using a slow sampling clock to obtain the original random bit stream. The random bit post-processing module is used to debias and whiten the original random bit stream to obtain uniformly distributed random parameters; The probability distribution transformation module is used to transform uniformly distributed random parameters into target probability distribution random parameters that conform to the characteristics of various random factors in the power system. The parameter allocation interconnection network module is used to allocate the random parameters of the target probability distribution to the parallel simulation processing units inside the FPGA according to a predetermined mapping rule. The simulation processing unit array module includes multiple parallel simulation processing units, which are used to perform electromagnetic transient simulations based on random parameters of the target probability distribution and output simulation results. The hardware statistical processing module is used to perform pipelined online statistical algorithms on the simulation results to generate the probability distribution characteristics and confidence intervals of each electrical quantity at the current moment.

[0029] This application utilizes the inherent physical noise sources within the FPGA chip to construct a True Random Number Generator (TRNG). The ring oscillator entropy source array module is the core of the TRNG's physical entropy source, consisting of multiple ring oscillators instantiated within the FPGA logic. Each ring oscillator is configured as an inverter using an odd number (typically 3 to 7) lookup tables (LUTs) and cascaded to form a ring structure. FPGA layout constraints ensure uniform trace delays between inverter stages. The free oscillation frequency of the ring oscillators is typically in the hundreds of MHz range, with period jitter in the picosecond range, caused by unpredictable transistor channel thermal noise. This module deploys multiple ring oscillators (typically 64 to 256 groups), with the output signal of each group sampled independently. The physical locations of the groups are dispersed as much as possible on the FPGA chip to reduce spatial correlation. The sampling clock frequency is set two orders of magnitude lower than the oscillation frequency (typically 1 to 10 MHz) to ensure sufficient jitter accumulation between adjacent sampling points to obtain high-entropy random bits.

[0030] The ring oscillator entropy source array module operates based on oscillator jitter caused by thermal noise in the FPGA's internal transistors. Each ring oscillator consists of an odd number of cascaded inverters forming a closed loop, oscillating self-excitedly without an external clock. The oscillation frequency is determined by the sum of the propagation delays of each inverter stage. Since the thermal noise generated by the thermal motion of charge carriers in the CMOS transistor channel has white noise characteristics, this noise is superimposed on the propagation delay of each inverter stage, resulting in a small random deviation in the duration of each oscillation cycle, i.e., clock jitter. This application uses a sampling clock with a frequency much lower than the oscillation frequency to sample the ring oscillator output using a D flip-flop. Due to the accumulation of a large number of oscillation cycles within the sampling interval, the cumulative effect of phase jitter makes the logic level (0 or 1) captured by the sampling point approximately equally probable randomness.

[0031] To further improve the randomness quality and eliminate potential bias and weak correlation in the ring oscillator output, the original random bitstream needs to undergo debiasing and whitening processing by a random bit post-processing module. The original outputs from multiple ring oscillators are first fed into a von Neumann corrector for debiasing. The von Neumann corrector works by treating two consecutive bits in the input bitstream as a pair; if the pair is 01, the output bit is 0; if it is 10, the output bit is 1; and if it is 00 or 11, it is discarded. The mathematical principle behind this method is that even if the probabilities of 0 and 1 in the original bits are unequal (let's say p and 1-p), the probabilities of 01 and 10 are both p(1-p), thus the corrected output has strict equal probability. The debiased bitstream is further processed by an XOR hybrid whitening circuit, which XORs the debiased bits from different ring oscillator groups bit by bit to eliminate any remaining weak correlation between the outputs, ultimately generating a high-quality random bitstream that meets statistical randomness requirements and writing it into a buffer FIFO.

[0032] The probability distribution transformation module reads uniformly distributed random parameters from a buffer FIFO and transforms them into target probability distribution random parameters that conform to the characteristics of various random factors in the power system. This module contains multiple parallel distribution transformation channels, each dedicated to a specific probability distribution type. For the normal distribution, a hardware implementation of the Box-Muller transform is used, employing the CORDIC algorithm to calculate trigonometric and logarithmic functions. For the Weibull and exponential distributions, an inverse transformation method is used, calculating the inverse cumulative distribution function through a piecewise linear approximation lookup table stored in on-chip ROM. For the Beta distribution, a hardware implementation of the accept-reject method is used. The parameters of each transformation channel (such as the mean and standard deviation of the normal distribution, and the shape and scale parameters of the Weibull distribution) are set online through the configuration register of the global control module. The module supports configuring the random parameter update cycle: determining whether various random parameters are generated and refreshed during simulation operation in a manner such as "every step," "every several steps," or "initialized only once."

[0033] The probability distribution transformation module employs different transformation methods for different distribution types, including the Weibull distribution for simulating wind speed changes, the Beta distribution for simulating light intensity changes, the normal distribution for simulating load fluctuations, and the exponential distribution for simulating fault occurrence times. Distribution transformation is implemented in hardware using an inverse transformation method based on lookup tables (LUTs) or an acceptance-rejection method, minimizing logic resource consumption while ensuring accuracy. The transformed random parameters are distributed to each parallel simulation instance via an on-chip interconnect network. Considering the different physical time scales of various random factors, this application supports an on-demand random parameter driving method: device discrete parameters and fault occurrence times can be generated all at once when the simulation starts; slow-changing disturbances such as wind speed, light intensity, and load can be refreshed according to a preset random parameter update cycle (e.g., every several electromagnetic transient steps or at fixed physical time intervals); refresh is only configured for each electromagnetic transient step when absolutely necessary. Each simulation instance obtains a set of independent random disturbance parameters, including wind speed disturbance, light intensity disturbance, load disturbance, device parameter offset, and fault triggering conditions.

[0034] Figure 2 This demonstrates the working principle of probability distribution transformation and parameter allocation. Uniformly distributed random numbers are input from a buffered FIFO and then enter either the Box-Muller normal transformation channel, the inverse Weibull / exponential transformation channel, or the accept-rejection Beta transformation channel, depending on the target distribution type. These channels operate in parallel, and the output target distribution random parameters are distributed to each simulation processing unit via a crossbar network at the configured refresh time. This architecture supports hardware-based transformation and flexible routing for random parameters of multiple different distribution types simultaneously. The specific transformation processes for different distribution types are as follows: For a normal distribution N(μ,σ²), this application employs a hardware implementation of the Box-Muller transform. The Box-Muller transform utilizes two independent uniformly distributed random numbers U1 and U2 to generate a normally distributed random variable using the formula X = μ + σ × √(-2lnU1) × cos(2πU2). In the hardware implementation, the calculation of the logarithmic function ln and the square root function √ uses a piecewise linear approximation lookup table, while the calculation of the trigonometric function cos uses the CORDIC iterative algorithm. The overall transformation pipeline delay is controlled within 10 to 20 clock cycles.

[0035] For the Weibull distribution (shape parameter k, scale parameter λ), the inverse transform method is used, and the distribution is directly calculated using the formula X = λ × (-lnU)^(1 / k). In the hardware implementation, both the logarithm and the power function are implemented using lookup tables and linear interpolation.

[0036] For the exponential distribution (rate parameter λ), the inverse transformation method X = -ln(U) / λ is the simplest and most efficient.

[0037] For the Beta distribution (parameters α, β), since its inverse cumulative distribution function has no analytical expression, this application adopts the hardware implementation of the Jöhnk algorithm: generate two independent uniform random numbers U1 and U2, calculate the intermediate parameters V1 = U1^(1 / α) and V2 = U2^(1 / β), if V1 + V2 ≤ 1, then output X = V1 / (V1 + V2), otherwise reject and regenerate. This process is executed iteratively in hardware through a state machine control.

[0038] The parameter allocation interconnection network module is responsible for distributing the random parameters output by the probability distribution transformation module to each simulation processing unit according to a predetermined mapping rule. The interconnection network adopts a crossbar structure, supporting flexible one-to-many and many-to-one mappings. Before the random parameter update time arrives, each simulation processing unit receives a complete set of random disturbance parameters through the interconnection network. This set includes wind speed disturbance increments, light intensity disturbance increments, power disturbance increments at each load node, power device parameter offsets, and fault trigger flags, etc. The bandwidth design of the interconnection network must ensure that the allocation and transmission of all parameters are completed within the configured update window.

[0039] The parameter allocation interconnection network module adopts a Crossbar switch structure. Its working principle is as follows: each output port of the transformation module is connected to the parameter input ports of each SPE through a switch matrix. The configuration of the switch matrix is ​​set by the global control module according to the simulation scenario. At each random parameter refresh time (configurable for simulation initialization, every few steps, or every step), the Crossbar sequentially transmits each random parameter to the corresponding SPE according to a preset routing table. The transmission process can be completed within multiple clock cycles using time-division multiplexing.

[0040] The simulation processing unit array module is the core of parallel electromagnetic transient simulation calculations, consisting of an array of multiple identical but parameter-independent simulation processing units (SPEs). Each SPE contains four sub-modules: a component model library, a node conductance matrix assembler, a linear equation solver, and a nonlinear iterator. The component model library pre-stores equivalent conductance model parameters and difference equation coefficients for common power components such as resistors, inductors, capacitors, transmission lines, switches, diodes, and IGBTs. The node conductance matrix assembler assembles the corrected node conductance matrix and injected current vector at each step based on the circuit topology and component parameters (including parameters after random perturbations). The linear equation solver uses hardware implementations of LU decomposition or sparse direct solution methods to solve for node voltages. The nonlinear iterator handles the characteristics of nonlinear components such as diodes and IGBTs, using a compensation method to perform several iterations within each step until convergence. Each SPE shares the same circuit topology information but independently maintains its state variables (historical values ​​of inductor current, capacitor voltage, etc.) to ensure the independence of each simulation instance.

[0041] Each SPE in the simulation processing unit array module implements a complete electromagnetic transient simulation calculation process. Its working principle is based on the equivalent conductance method (also known as the adjoint circuit method or Dommel method). The core idea of ​​the equivalent conductance method is to discretize the differential equations of various dynamic components (inductors, capacitors, transmission lines, etc.) in the power system within a simulation step Δt using the trapezoidal integral method or the backward Euler method, thus representing the dynamic component as a parallel combination of a conductance and a historical current source. After discretization, the entire power system is equivalent to a pure resistive network (including current sources) within each simulation step. The voltage v of each node can be obtained by solving the linear equation system G·v = i, where G is the node conductance matrix and i is the injected current vector (including the contribution of historical current sources).

[0042] The workflow of each SPE within a simulation step is as follows: At the beginning of the step, the currently valid component parameters and perturbation parameters are read (the perturbation parameters are updated at the configured refresh time, otherwise the values ​​from the previous refresh time are used); then, based on the updated component parameters and the state variables (historical values ​​of inductor current and capacitor voltage) saved in the previous step, the equivalent conductance and historical current source values ​​of each component are calculated; next, the node conductance matrix G and the injected current vector i are assembled; then, the linear equation system is solved using LU decomposition to obtain the voltage of each node; finally, the current and power of each branch are inferred from the node voltages, and the state variables are updated to prepare for the next step. For circuits containing nonlinear switching components such as diodes and IGBTs, the SPE also needs to perform compensation iteration within each step: first, a prediction solution is performed assuming the switching state remains unchanged, then the port conditions of each switching component are checked to see if they meet their switching criteria (such as the forward conduction condition or reverse cutoff condition of a diode). If not, the switching state is corrected and the solution is re-solved, iterating until all switching states converge.

[0043] All SPEs share the same circuit topology description (node ​​numbers, component connections, etc., stored in the FPGA on-chip ROM), but each maintains its own independent parameter set and state variable storage space (stored in the FPGA on-chip BRAM). The global control module triggers "result snapshot writing" at the step boundary, thereby ensuring the consistency of electrical quantity data of all simulation instances obtained at the same time section during the statistical processing stage.

[0044] The hardware statistical processing module receives electrical quantity data from all SPE outputs (from a snapshot of the result buffer for that step) after each simulation step and performs online statistical calculations. This module includes three parallel processing channels: a mean-variance recursion channel, a histogram accumulation channel, and a quantile calculation channel. The mean-variance recursion channel uses the Welford online algorithm to pipeline the output values ​​of each SPE and recursively update the mean and variance. The histogram accumulation channel assigns the output values ​​of each SPE to the corresponding histogram bars according to a preset interval width for estimating the probability density function. The quantile calculation channel can use a hardware sorting network or a selection network to extract specified quantiles for a given number of parallel instances N to calculate the upper and lower bounds of the confidence interval. The results of the statistical processing are updated and written to the result buffer after the completion of the statistical period corresponding to each step.

[0045] Figure 3The working principle of the hardware statistical processing module is demonstrated. After each simulation step, each SPE writes its output electrical quantity to a result snapshot buffer. The statistical processing module reads the data from the snapshot buffer and simultaneously performs Welford algorithm mean-variance recursion, histogram interval count accumulation, and quantile extraction through three parallel channels. The processing results from the three channels are then combined and output to the host computer via a high-speed communication interface. This architecture supports parallel overlap of statistical operations and subsequent step-by-step simulation calculations, ensuring online output capability.

[0046] Specifically, the hardware statistical processing module performs online statistical calculations on the "result snapshots" of each simulation step. The mean and variance are calculated using the Welford online recursive algorithm. Its working principle is as follows: Assuming that n SPE output values ​​have been processed so far, and the mean M_n and auxiliary quantity S_n are already known, when the output value x{n+1} of the (n+1)th SPE is received, M{n+1} = M_n + (x{n+1} - M_n) / (n+1) and S{n+1} = S_n + (x{n+1} - M_n)(x{n+1} - M_{n+1}) are recursively updated, and the final variance σ² = S_N / N. This algorithm only requires one iteration through all data and has good numerical stability, making it very suitable for hardware pipeline implementation.

[0047] The working principle of histogram estimation is as follows: The range of values ​​for the monitored electrical quantities and the number of intervals are pre-defined (typically 64 to 256 intervals). A counter is allocated for each interval in the FPGA's on-chip BRAM. Whenever an output value of a SPE is received, a comparator determines its corresponding interval number, and the counter for that interval is incremented by 1. After all SPE data has been processed, the count value of each interval divided by the total number of instances yields the histogram estimate of the probability density function.

[0048] The working principle of quantile calculation is as follows: when the number of parallel instances N is fixed or within a configurable range, a hardware sorting network (such as a bitonic sorting network) or a hardware selection network can be used to extract specified quantiles from the output values ​​of all SPEs. For example, for a 95% confidence interval of N instances, the upper bound is the quantile. 0.975N The value is the nth value, and the lower bound is the nth value. 0.025N The sorting delay of the bitonic sorting network increases with N by an order of O(log²N), and real-time statistical requirements can be met through pipelined and parallel comparison structures.

[0049] As a further improvement, the system also includes a global control and synchronization module. This module is responsible for the timing control of the entire system and the synchronization coordination between modules. The global controller generates simulation step-size clock signals and control enable signals for each stage, ensuring that the SPE executes in an orderly manner according to the simulation calculation process within each step, and takes snapshots of the results at the step-size boundaries for the statistics module to read. For random parameter updates, the controller inserts a "parameter refresh and allocation" process at the corresponding step-size boundaries according to the configured update cycle, aligning parameter switching with the step-size boundaries and avoiding data inconsistencies introduced during step-size calculations. The global controller is also responsible for receiving configuration commands and start / stop control signals from the host computer and managing the simulation running status.

[0050] As a further improvement, the system also includes a high-speed communication interface module. This module enables data interaction between the FPGA and the host computer. Uplink, it transmits statistical processing results to the host computer, while downlink, it receives configuration parameters and control commands from the host computer. The interface uses PCIe Gen3 x8 or 10 Gigabit Ethernet, and the uplink bandwidth must meet the data rate requirements for outputting statistical results according to the configuration. The results processed by the hardware statistical processing module are sent to the host computer through the high-speed communication interface module. The high-speed communication interface module uses DMA to batch transfer statistical data from the result buffer to the host computer's memory. The host computer software reads the data and then performs waveform plotting, probability distribution curve display, and report generation. Since the statistical module reads a snapshot of the results at the completed step size, the SPE can simultaneously advance subsequent step size simulation calculations, achieving overlap between calculation and statistics / communication.

[0051] Compared with software Monte Carlo electromagnetic transient simulation schemes based on general-purpose CPU / GPU platforms, this application has significant advantages in three dimensions: computational efficiency, randomness quality, and system practicality. In terms of computational efficiency, existing technologies are limited by the number of CPU cores (usually several to dozens) or the insufficient adaptability of GPU architecture to electromagnetic transient simulation algorithms, resulting in a limited number of parallel simulation instances. Completing thousands of Monte Carlo simulations can take hours to days. This application constructs a large-scale SPE parallel array on an FPGA, capable of running 64 to 256 independent simulation instances simultaneously. It also utilizes hardware deterministic timing and parallel pipeline structures to reduce the overhead of software scheduling, memory management, and thread synchronization, thereby significantly improving the overall throughput. Combining the increased parallelism and single-instance hardware acceleration, this application can reduce the total computation time of Monte Carlo simulation from hours / days to seconds / minutes, enabling probabilistic electromagnetic transient simulations to be executed online.

[0052] Regarding the quality of randomness, existing technologies rely on software pseudo-random number generators. Their deterministic algorithm-based nature leads to potential statistical correlations between multiple random sequences during large-scale parallel sampling, resulting in insufficient coverage of Monte Carlo sampling and affecting the accuracy of probability distribution estimation and confidence interval calculation. This application utilizes the internal physical noise source of an FPGA to construct a true random number generator. The random bit stream generated by each ring oscillator is driven by an independent physical process, satisfying the statistical independence requirement. The parallel operation of multiple true random number generators provides a high-quality, independent source of random numbers for parallel simulation instances, fundamentally eliminating the periodicity and inter-sequence correlation problems of pseudo-random numbers, making the statistical conclusions of probabilistic simulations more reliable. Simultaneously, the hardware-based probability distribution transformation module employs a high-precision lookup table and the CORDIC algorithm. The transformation accuracy has been verified by the Kolmogorov-Smirnov test, ensuring the accuracy of the distribution characteristics of the random parameters.

[0053] Please refer to Figure 4 This application provides a probabilistic electromagnetic transient simulation method for power systems, applied to the aforementioned probabilistic electromagnetic transient simulation system for power systems. The method includes: Step 110: Instantiate multiple ring oscillators inside the FPGA, and sample the high-speed oscillation signal output by the ring oscillators using a slow sampling clock to obtain the original random bit stream; This application utilizes the inherent physical noise sources within the FPGA chip to construct a True Random Number Generator (TRNG). Specifically, due to the influence of transistor thermal noise, the oscillation period of the ring oscillator inside the FPGA exhibits unpredictable micro-jitter, which constitutes a high-quality physical entropy source. This application instantiates multiple sets of ring oscillators in the FPGA logic, each set consisting of an odd number of cascaded inverters. A slow sampling clock is used to sample the high-speed oscillation signal, capturing the phase jitter information of the oscillator to obtain the original random bit stream.

[0054] Step 120: Perform debiasing and whitening on the original random bitstream to obtain uniformly distributed random parameters; To further improve the randomness quality and eliminate potential bias and weak correlation in the ring oscillator outputs, the original random bitstream needs to undergo debiasing and whitening processing via post-processing circuitry. Specifically, the original outputs from multiple ring oscillators are first fed into a von Neumann corrector for debiasing. The von Neumann corrector works by treating two consecutive bits in the input bitstream as a pair; if the pair is 01, the output bit is 0; if it is 10, the output bit is 1; and if it is 00 or 11, it is discarded. The mathematical principle behind this method is that even if the probabilities of 0 and 1 in the original bits are unequal (let's say p and 1-p), the probabilities of 01 and 10 are both p(1-p), thus the corrected output has strict equal probability. The debiased bitstream is then further processed by an XOR hybrid whitening circuit, which XORs the debiased bits from different ring oscillator groups bit by bit to eliminate any remaining weak correlation between the outputs, ultimately generating a high-quality random bitstream that meets the statistical randomness requirements and writing it into a buffer FIFO. After the post-processed random bitstream is verified by the NIST SP 800-22 randomness test, it is stored in the on-chip random number buffer FIFO for later retrieval. By deploying multiple independent TRNG cores on the FPGA, statistically independent high-quality true random number sequences can be provided simultaneously for a large number of parallel simulation instances, fundamentally eliminating the periodicity and correlation problems between sequences in pseudo-random number generators.

[0055] Step 130: Transform the uniformly distributed random parameters into target probability distribution random parameters that conform to the characteristics of various random factors in the power system; The uniformly distributed random number U (range 0 to 1) output from the TRNG needs to be converted into random parameters X that conform to the probability distribution characteristics of various random factors in the power system. Different transformation methods are used for different distribution types, including the Weibull distribution for simulating wind speed changes, the Beta distribution for simulating light intensity changes, the normal distribution for simulating load fluctuations, and the exponential distribution for simulating fault occurrence times. The distribution transformation is implemented in hardware using an inverse transformation method based on lookup tables (LUTs) or an acceptance-rejection method, minimizing logic resource consumption while ensuring accuracy. The transformed random parameters are distributed to each parallel simulation instance through an on-chip interconnect network. Considering the different physical time scales of different random factors, this application supports an on-demand updated random parameter driving mode: device discrete parameters and fault occurrence times can be generated all at once when the simulation starts; slow-changing disturbances such as wind speed, light intensity, and load can be refreshed according to a preset random parameter update cycle (e.g., every several electromagnetic transient steps or at a fixed physical time interval); refresh is only configured for each electromagnetic transient step when there is a genuine need. Each simulation instance obtains a set of independent random disturbance parameters, including wind speed disturbance, illumination disturbance, load disturbance, device parameter offset, and fault triggering conditions. The specific transformation process for different distribution types is as follows: For a normal distribution N(μ,σ²), this application employs a hardware implementation of the Box-Muller transform. The Box-Muller transform utilizes two independent uniformly distributed random numbers U1 and U2 to generate a normally distributed random variable using the formula X = μ + σ × √(-2lnU1) × cos(2πU2). In the hardware implementation, the calculation of the logarithmic function ln and the square root function √ uses a piecewise linear approximation lookup table, while the calculation of the trigonometric function cos uses the CORDIC iterative algorithm. The overall transformation pipeline delay is controlled within 10 to 20 clock cycles.

[0056] For the Weibull distribution (shape parameter k, scale parameter λ), the inverse transform method is used, and the distribution is directly calculated using the formula X = λ × (-lnU)^(1 / k). In the hardware implementation, both the logarithm and the power function are implemented using lookup tables and linear interpolation.

[0057] For the exponential distribution (rate parameter λ), the inverse transformation method X = -ln(U) / λ is the simplest and most efficient.

[0058] For the Beta distribution (parameters α, β), since its inverse cumulative distribution function has no analytical expression, this application adopts the hardware implementation of the Jöhnk algorithm: generate two independent uniform random numbers U1 and U2, calculate the intermediate parameters V1 = U1^(1 / α) and V2 = U2^(1 / β), and if V1 + V2 ≤ 1, output X = V1 / (V1 + V2); otherwise, reject and regenerate. This process is executed iteratively in hardware through a state machine.

[0059] Step 140: Distribute the random parameters of the target probability distribution to each parallel simulation processing unit for electromagnetic transient simulation, and execute a pipelined online statistical algorithm on the simulation results output by each simulation processing unit to generate the probability distribution characteristics and confidence intervals of each electrical quantity at the current time. This application constructs an electromagnetic transient simulation computing array on an FPGA, containing multiple independent Simulation Processing Elements (SPEs). Each SPE implements a complete electromagnetic transient simulation algorithm flow, including power element modeling based on the equivalent conductance method, assembly of nodal conductance matrices, solving of linear equations, and iterative convergence processing of nonlinear elements. Within each electromagnetic transient simulation step, all SPEs synchronously advance the simulation calculation; when the random parameter update cycle arrives, each SPE receives its updated random perturbation parameters before the start of the corresponding step. There are no data dependencies between the SPEs, enabling fully parallel execution. Through a reasonable resource allocation strategy, tens to hundreds of SPEs can be deployed simultaneously on current mainstream FPGA devices, achieving an order-of-magnitude improvement in parallelism compared to the limited parallelism of CPU / GPU platforms.

[0060] At the end of each simulation step, each SPE writes the simulation results (node ​​voltages, branch currents, and other electrical quantities) of that step into a step result buffer (using a ping-pong double-buffered or multi-buffered structure to form a time-section snapshot). The hardware statistical processing module reads the parallel simulation instance output from the result buffer of the "previous completed step" and executes a pipelined online statistical algorithm, including recursive calculation of mean and variance, histogram estimation of probability density function, and quantile calculation, thereby generating the probability distribution characteristics and confidence intervals of each electrical quantity at the current moment in real time. The statistical processing module and SPE perform the calculation of the "next step" in parallel and overlap in time, without requiring SPE to wait for the statistical processing to complete, thus not increasing the overall simulation throughput latency.

[0061] Furthermore, the probability distribution results after statistical processing can be transmitted to the host computer via the FPGA's on-chip bus and high-speed interfaces (such as PCIe or Ethernet). The host computer software is responsible for visualizing, storing, archiving, and further analyzing the results. Simultaneously, the host computer can dynamically adjust configuration information such as the probability distribution type and parameters of random parameters, the number of parallel simulation instances, the random parameter update cycle, and the statistical processing method during simulation. This online parameter adjustment is achieved by writing the configuration registers in the FPGA through the downlink channel.

[0062] The feasibility of implementing electromagnetic transient simulation using FPGAs has been well-established through existing research. The equivalent conductance method reduces the core computation of electromagnetic transient simulation to solving a system of linear equations. This computation exhibits good regularity and determinism, making it suitable for hardware implementation on FPGAs. For medium-sized power systems (with tens to hundreds of nodes), the dimension of the node conductance matrix is ​​controllable, and the hardware implementation of LU decomposition is feasible in terms of resource consumption and timing constraints. Building upon this foundation, this application innovatively introduces a true random number generator and a massively parallel architecture, extending deterministic FPGA simulation to a probabilistic simulation platform. This application presents a probabilistic electromagnetic transient simulation method for power systems based on an FPGA hardware random number generator. It addresses the issue of insufficient randomness quality in software pseudo-random number generators by constructing a true random number generator using the physical noise source within the FPGA. Furthermore, by building a large-scale parallel simulation array on the FPGA, multiple simulation instances with different random disturbances are run simultaneously while maintaining microsecond-level step-size accuracy in electromagnetic transient simulation, thus improving the computational efficiency of Monte Carlo simulation by several orders of magnitude. Finally, a hardware-level statistical processing module summarizes the parallel simulation results in real time, outputting the probability distribution and confidence intervals of electrical quantities, upgrading probabilistic electromagnetic transient analysis from an offline research tool to a practical tool that can be executed online.

[0063] In addition to the above solutions, other alternative solutions can be adopted: Alternative Solution 1: A solution based on an external dedicated TRNG chip for the FPGA can replace the above solution. A commercial TRNG chip (such as the TRNG module integrated in the Infineon OPTIGA TPM series or the IDQuantique QRNG quantum random number generator chip) is used as the random number source, connected to the FPGA via SPI or I²C interface. The advantages of this solution are that the TRNG chip is professionally certified, ensuring randomness quality, and it does not consume internal FPGA logic resources. The disadvantages are: the interface bandwidth between the external chip and the FPGA is limited (typical SPI rate 10 to 50 Mbps), making it difficult to meet the high throughput random number requirements of large-scale parallel simulations; inter-chip communication introduces additional latency, affecting the overall throughput of online simulations; and the multi-chip solution increases PCB design complexity and system cost. Compared to the on-chip FPGA ring oscillator TRNG solution used in this invention, the external solution is inferior in terms of random number throughput and system integration, and is not practical for applications requiring hundreds of parallel instances.

[0064] Alternative Solution 2: A hybrid random number generation strategy. This approach uses a small number of on-chip TRNG cores on the FPGA to provide a seed, combined with a hardware-implemented cryptographically secure pseudo-random number generator (CSPRNG, such as a PRNG based on AES-CTR mode or the ChaCha20 algorithm) for random number expansion. The TRNG provides an unpredictable initial seed, and the CSPRNG uses this seed as an initial state to rapidly generate a large number of pseudo-random number sequences. The advantages of this approach are that it can achieve high throughput random number output with relatively few TRNG hardware resources, and the cryptographic security of the CSPRNG ensures good performance of the output sequences in statistical tests. The disadvantages are: the CSPRNG is essentially still a deterministic algorithm, and theoretically, it may be distinguished from truly random numbers at extremely large sampling scales (millions or more); the hardware implementation of the CSPRNG (especially AES round operations) consumes significant DSP and logic resources; and the choice of seed update frequency requires a trade-off between security and performance. Compared to the pure TRNG approach of this invention, the hybrid approach is slightly inferior in terms of the physical nature of randomness, but it can be considered a compromise in scenarios with higher parallelism or higher random parameter refresh frequencies and limited FPGA logic resources.

[0065] The probabilistic electromagnetic transient simulation method for power systems provided in this application can be applied to the following scenarios: Application Scenario 1: Safety Assessment of Power Systems with a High Proportion of New Energy Sources. In power systems with large-scale wind and solar power grid connection, random fluctuations in wind speed and solar intensity lead to significant uncertainties in new energy output. Utilizing the probabilistic electromagnetic transient simulation method of this invention, the probabilistic distribution characteristics of electrical quantities such as voltage at key nodes and current in key lines of the power system can be quickly quantified and analyzed under different wind and solar power output scenarios. This allows for the assessment of the probability of voltage exceeding limits and current overload, providing probabilistic safety indicators for system planning and operational decisions.

[0066] Application Scenario 2: Probabilistic Reliability Analysis of Power Electronic Devices. The parameters (such as on-resistance, switching delay, and threshold voltage) of semiconductor devices like IGBTs and MOSFETs in power electronic converters exhibit random deviations due to manufacturing process variations. Using the method of this invention, random offsets of device parameters can be injected in batches at the electromagnetic transient simulation level. The probabilistic impact of these offsets on the converter's output waveform quality, efficiency, and thermal stress distribution can be analyzed, providing a quantitative basis for device selection and redundancy design.

[0067] Application Scenario 3: Probabilistic Impact Assessment of Power System Faults. The timing, location (specific location along the transmission line), and type (single-phase grounding, two-phase short circuit, three-phase short circuit, etc.) of short-circuit faults in power systems are all random. Using the method of this invention, fault parameters can be modeled as random variables. Through extensive parallel simulations, the probability distribution of the system's transient response under different fault scenarios can be obtained. The probability of correct operation and maloperation / failure of relay protection devices can be calculated, and the probabilistic transient stability margin of the system can be assessed.

[0068] The following is a specific embodiment of the complete process provided in this application, covering hardware system construction, TRNG configuration and verification, simulation model loading, parallel simulation execution, and statistical result acquisition.

[0069] Step 1: Hardware Platform Setup and FPGA Basic Configuration. Select a high-end FPGA development platform with sufficient logic resources, on-chip memory resources (BRAM / UltraRAM, etc.), and a sufficient number of DSP slices as the hardware foundation. Xilinx Virtex UltraScale+ series or equivalent devices are recommended. Configure the Basic Clock Management Unit (CMT) on the FPGA to generate the global system clock (typical frequency 200 to 300 MHz), sampling clock (for TRNG sampling, typical frequency 5 MHz), and interface clock (for PCIe or Ethernet communication). Deploy a PCIe Gen3 x8 hard-core IP or 10 Gigabit Ethernet MAC / PHY IP as the communication channel with the host computer. Depending on the simulation scale, a DDR4 external memory controller can be selected for extended caching of large-scale circuit topology data and statistical results. Install drivers and configuration management software on the host computer side, establish the communication link between the FPGA and the host computer, and complete functional verification.

[0070] Step Two: Deployment, Configuration, and Randomness Verification of the True Random Number Generator. Instantiate 128 ring oscillators in the FPGA logic design. Each group consists of 5 LUTs configured as inverters, and layout constraints ensure uniform trace delays in the cascaded loops and even distribution of each group across the FPGA chip. Configure a D flip-flop as a sampler for each ring oscillator, using the 5MHz clock generated in Step One for sampling. Deploy 128 von Neumann correctors to debias the original bitstreams of each group, then merge the debiased bitstreams into multiple whitened, high-quality random bitstreams using an XOR tree. Write the multiple random bitstreams into the random number buffer FIFO in parallel. After deployment, read the random bit data from the FIFO using host computer software and run the NIST SP 800-22 standard test suite (including 15 tests such as frequency testing, intra-block frequency testing, run-length testing, matrix rank testing, and discrete Fourier transform testing). Confirm that the P-value of all tests is greater than the pass threshold of 0.01, verifying that the randomness of the TRNG output meets the requirements. If the test fails, the number of ring oscillator stages, sampling clock frequency, or post-processing method need to be adjusted until all tests are passed.

[0071] Step 3: Configuration and Calibration of the Probability Distribution Transformation Module. Based on the type and probability distribution characteristics of random factors in the power system to be simulated, configure the type and parameters of each transformation channel. Typical configurations include: Channel 1 is a Weibull distribution (shape parameter k=2.0, scale parameter λ=8.5m / s, used for random wind speed fluctuations); Channel 2 is a Beta distribution (α=2.0, β=5.0, used for random light intensity fluctuations); Channel 3 is a normal distribution (μ=0, σ=0.05pu, used for random load power fluctuations); Channel 4 is a normal distribution (μ=0, σ=0.02, used for random device parameter discretization); Channel 5 is an exponential distribution (λ=0.1 / s, used for the randomness of fault occurrence). The lookup table data (piecewise linear approximation coefficients) for each channel are pre-calculated by the host computer software and then downloaded to the FPGA on-chip ROM. After configuration, run the calibration procedure: sample a large number of output values ​​from each channel and perform Kolmogorov-Smirnov and chi-square tests against the theoretical probability distribution to confirm that the transformation accuracy meets the requirements (KS statistic is less than the critical value). If the accuracy is insufficient, increase the number of segments in the lookup table or increase the number of CORDIC iterations to correct it. Configure the random parameter update cycle according to the application scenario: for example, device discrete and fault parameters "only initialized once", and wind speed / light intensity / load "refreshed every fixed physical time interval (corresponding to several EMT steps)".

[0072] Step 4: Loading the Electromagnetic Transient Simulation Model of the Power System and Initializing the SPE Array. An electromagnetic transient simulation model of the power system to be simulated is established in the host computer software. The simulation model description includes: circuit topology information (node ​​number, branch connection relationship, component type), nominal parameters of each component (resistance value, inductance value, capacitance value, transmission line impedance and propagation delay, turn-on and turn-off thresholds of switching elements, etc.), random disturbance mapping relationships of each node and branch (specifying which component parameters are affected by the output of which random transformation channel, the disturbance superposition method, and the disturbance refresh period), simulation control parameters (simulation step size Δt, total simulation duration T, number of parallel instances N), and statistical monitoring point configuration (specifying the node voltage and branch current that need to be statistically processed). The host computer software encodes the simulation model data into a binary format recognizable by the FPGA and downloads it to the FPGA's on-chip ROM and BRAM via the PCIe interface. Specifically, the circuit topology and component nominal parameters are stored in a shared ROM area (shared and read by all SPEs), the initial values ​​of the state variables of each SPE are stored in the BRAM area dedicated to each SPE, and the random perturbation mapping table and routing table are stored in the configuration register of the parameter allocation interconnection network. The global control module enables the SPE array according to the number of parallel instances N, activating only the number of SPEs actually used (e.g., when N=128, 128 SPEs are activated, and the remaining SPEs are in a low-power sleep state). After loading is complete, a single-step debugging mode is run to verify whether the calculation results of each SPE are correct: all perturbation amplitudes are set to zero or fixed values, a simulation step is executed, and the outputs of each SPE are compared with the deterministic simulation results of the host computer reference model. After confirming consistency, the formal simulation stage begins.

[0073] Step 5: Execution of Parallel Probabilistic Electromagnetic Transient Simulation. After the host computer software issues the simulation start command, the global control module begins to drive the entire system to run according to the simulation step size clock. During the simulation, the system proceeds mainly along the "step size calculation" line, and inserts parameter refresh processes at the configured random parameter update times, forming an overlapping pipelined execution: Random parameter generation and allocation (triggering on demand): TRNG continuously generates random bit streams to fill the buffer FIFO; when the refresh time of a certain type of parameter is reached (such as simulation initialization or every several steps), the probability distribution transformation module takes random numbers from the FIFO and transforms them into target distribution parameters. The parameter allocation interconnection network routes each parameter to the corresponding SPE and completes the boundary alignment update.

[0074] Parallel simulation calculation (execution per step): Each SPE performs component parameter reading / updating, equivalent conductance calculation, nodal conductance matrix assembly, LU decomposition equation system solution, nonlinear component compensation iteration, and state variable update according to the equivalent conductance method algorithm flow.

[0075] Step-size result snapshot (executed at every step-size boundary): All SPEs write the monitored electrical quantities to the result snapshot buffer (ping-pong double buffer) at the step-size boundary for the statistics module to read.

[0076] Statistical processing and result output (overlapping with simulation calculations): The hardware statistical processing module reads snapshot data from the previous completed step, updates the mean and variance using the Welford recursive algorithm, estimates the cumulative probability density using a histogram counter, and calculates quantiles using a sorting / selection network. Statistical results are written to a result buffer and transferred to the host computer's memory via a PCIe interface by the DMA controller. Statistical processing and communication overlap with subsequent step-size simulation calculations in time, thus masking the impact of statistical and communication delays on overall throughput.

[0077] The simulation continues to run until the preset total simulation time T corresponds to the number of steps T / Δt. The global controller then sends a simulation end signal and transmits the final statistical results to the host computer.

[0078] Step Six: Statistical Analysis and Display of Simulation Results. After receiving the statistical results data for each simulation step transmitted by the FPGA, the host computer software performs subsequent analysis and visualization. Specific processing includes: plotting the mean waveform of each monitored electrical quantity and its uncertainty band diagram with the upper and lower bounds of the confidence interval as envelopes; displaying the probability density function histogram and fitted curve of each electrical quantity at key moments (such as the instant of fault occurrence, the instant of fault clearance, etc.); calculating the probability of electrical quantities exceeding safety thresholds (such as the probability of bus voltage dropping below 0.8 pu) as a probabilistic evaluation index of system safety; and generating a complete probabilistic electromagnetic transient simulation analysis report. Users can adjust the probability distribution settings of random parameters or the power system operation scheme based on the analysis results and re-execute the simulation for comparative analysis.

[0079] Step Seven: Continuous Simulation and Dynamic Parameter Adjustment in Online Operation Mode. In online operation scenarios, the FPGA system continuously runs probabilistic simulations. The host computer can dynamically adjust the following parameters through the downlink communication channel during simulation without interrupting the simulation: distribution parameters of each probability distribution transformation channel (e.g., updating the shape and scale parameters of the Weibull distribution of wind speed based on real-time weather forecasts), the amplitude scaling factor of random disturbances (e.g., increasing or decreasing the standard deviation of load disturbances), the random parameter update cycle, the selection of statistical monitoring points, and the histogram interval division method, etc. Dynamic parameter adjustment is achieved through the shadow register mechanism of the global control module: the host computer writes new parameters to the shadow register, and at the step size boundary, the global controller switches the value of the shadow register to the working register, ensuring that parameter switching does not introduce data inconsistency during step size calculation.

[0080] This application achieves a significantly higher random bit throughput than a single TRNG by deploying a large-scale ring oscillator array (64 to 256 groups) within FPGA logic. Each group samples independently and is then aggregated after post-processing. In a typical configuration, 128 ring oscillators, with a sampling frequency of 5MHz and an effective output rate of approximately 25% after von Neumann correction, can provide a high-quality true random bit stream of approximately 160Mbps. This throughput enables the generation and refresh of necessary random parameters and random event conditions (such as device discreteness, fault occurrence time / type / location, and refresh values ​​of slowly changing perturbations) for dozens to hundreds of parallel simulation instances during the simulation initialization phase or within random parameter update cycles of milliseconds or longer. Compared to solutions using external dedicated TRNG chips, on-chip integration eliminates inter-chip communication latency and interface bandwidth bottlenecks, and allows for flexible adjustment of the number of ring oscillator groups according to the simulation scale.

[0081] This application implements hardware pipelines for various probability distribution transformation methods on an FPGA, including the Box-Muller normal transform, the inverse Weibull / exponential transform, and the accept-rejection Beta transform. Each transformation channel adopts a fully pipelined structure with 10 to 20 pipeline stages, outputting a target distribution random parameter each clock cycle. Multiple transformation channels operate in parallel, simultaneously generating corresponding distribution random parameters for different types of random factors. The combination of lookup tables and the CORDIC algorithm ensures transformation accuracy (error less than 0.1%) while keeping logic resource consumption within an acceptable range. The number and type of transformation channels can be flexibly adjusted through FPGA reconfiguration to adapt to the needs of different simulation scenarios.

[0082] This application constructs a simulation array by replicating multiple structurally identical SPEs on an FPGA. Each SPE implements a complete electromagnetic transient simulation algorithm based on the equivalent conductance method. Each SPE uses independent random perturbation parameters and performs simulation calculations synchronously. To ensure statistical consistency, this application employs a step-size boundary result snapshot mechanism: all SPEs write their outputs to a snapshot buffer at the same simulation step-size boundary, and the statistical module performs calculations based on snapshots from the same time segment, thus guaranteeing the consistency and validity of statistical conclusions. On high-end FPGA devices, through reasonable resource allocation and timing optimization, 64 to 256 SPEs can be deployed to achieve large-scale parallel Monte Carlo simulation.

[0083] This application implements pipelined scheduling for statistical processing and simulation computation: while the statistical processing module performs statistical calculations on the snapshot of the results at step k, each SPE has already begun executing the simulation computation at step k+1, with the two processes overlapping in time. This pipelined design masks the latency of statistical processing with the latency of simulation computation, without reducing the overall system throughput. Simultaneously, the Welford online algorithm and histogram accumulation are suitable for streaming processing; quantile extraction can be achieved using a sorting / selection network to output online confidence intervals with acceptable hardware costs and latency, thus enabling real-time generation and output of statistical results.

[0084] This application also provides an electronic device, which includes a processor and a memory; The memory is used to store program code and transfer the program code to the processor; The processor is used to execute the probabilistic electromagnetic transient simulation method for power systems in the foregoing method embodiments according to the instructions in the program code.

[0085] This application also provides a computer-readable storage medium for storing program code, which, when executed by a processor, implements the probabilistic electromagnetic transient simulation method for power systems in the aforementioned method embodiments.

[0086] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working process of the method described above can be referred to the corresponding process in the aforementioned system embodiments, and will not be repeated here.

[0087] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product, or apparatus.

[0088] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0089] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0090] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0091] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0092] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for executing all or part of the steps of the methods described in the various embodiments of this application through a computer device (which may be a personal computer, server, or network device, etc.). The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, optical disks, and other media capable of storing program code.

[0093] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A probabilistic electromagnetic transient simulation system for power systems, characterized in that, include: A ring oscillator entropy source array module, consisting of multiple ring oscillators instantiated within the FPGA, is used to sample the high-speed oscillation signal output by the ring oscillators using a slow sampling clock to obtain the original random bit stream. The random bit post-processing module is used to perform debiasing and whitening processing on the original random bit stream to obtain uniformly distributed random parameters; The probability distribution transformation module is used to transform the uniformly distributed random parameters into target probability distribution random parameters that conform to the characteristics of various random factors in the power system. The parameter allocation interconnection network module is used to allocate the random parameters of the target probability distribution to the parallel simulation processing units inside the FPGA according to a predetermined mapping rule. The simulation processing unit array module includes multiple parallel simulation processing units, which are used to perform electromagnetic transient simulations based on the random parameters of the target probability distribution and output simulation results. The hardware statistical processing module is used to execute a pipelined online statistical algorithm on the simulation results to generate the probability distribution characteristics and confidence intervals of each electrical quantity at the current time.

2. The probabilistic electromagnetic transient simulation system for power systems according to claim 1, characterized in that, The random bit post-processing module is specifically used for: Read adjacent raw random bit streams in pairs. If the adjacent raw random bit streams are 01, output 0; if the adjacent raw random bit streams are 10, output 1; if the adjacent raw random bit streams are 00 or 11, discard them. Perform an XOR operation on the debiased random bit stream to obtain uniformly distributed random parameters.

3. The probabilistic electromagnetic transient simulation system for power systems according to claim 1, characterized in that, The probability distribution transformation module is specifically used for: For a normal distribution, the Box-Muller transform is used to generate normal distribution random parameters using two independent uniform distribution random parameters; For Weibull distribution or exponential distribution, the inverse transformation method is used to transform the uniform distribution random parameters into Weibull distribution random parameters or exponential distribution random parameters; For the Beta distribution, obtain two independent uniformly distributed random parameters U1 and U2, calculate the intermediate parameters V1 = U1^(1 / α) and V2 = U2^(1 / β). If V1+V2≤1, output the Beta distribution random parameter X = V1 / (V1+V2); otherwise, regenerate.

4. The probabilistic electromagnetic transient simulation system for power systems according to claim 1, characterized in that, The simulation processing unit is specifically used for: At the start of the simulation step, the currently valid component parameters are read as the updated component parameters, which include the target probability distribution random parameters; The equivalent conductance and historical current source values ​​of each component are calculated based on the updated component parameters and the state variables saved from the previous simulation step, and the conductance matrix and injected current vector are generated; the state variables include inductor current and capacitor voltage. The voltages at each node are obtained by solving the linear equations using LU decomposition. The currents and power of each branch are then inferred from the voltages at each node, and the state variables are updated.

5. The probabilistic electromagnetic transient simulation system for power systems according to claim 1, characterized in that, The hardware statistical processing module is specifically used for: Welford's online algorithm is used to accumulate the simulation results output by each simulation processing unit in a pipeline manner and recursively update the mean and variance. The simulation results output by each simulation processing unit are assigned to the corresponding histogram bars according to the preset interval width, which are used to estimate the probability density function. A hardware sorting network or a hardware selection network is used to extract specified quantiles for a given number of parallel instances N, in order to calculate the upper and lower bounds of the confidence interval.

6. The probabilistic electromagnetic transient simulation system for power systems according to claim 1, characterized in that, The system also includes: The global control and synchronization module is used to generate simulation step clock signals and control enable signals for each stage, ensuring that the simulation processing unit executes in an orderly manner according to the simulation calculation process within each step, and takes a snapshot of the simulation results at the step boundary for the hardware statistical processing module to read.

7. The probabilistic electromagnetic transient simulation system for power systems according to claim 1, characterized in that, The system also includes: The high-speed communication interface module is used to receive configuration parameters and control commands from the host computer, as well as transmit the probability distribution characteristics and confidence intervals of each electrical quantity at the current moment to the host computer for waveform drawing, probability distribution curve display, and report generation.

8. A probabilistic electromagnetic transient simulation method for power systems, characterized in that, include: Multiple ring oscillators are instantiated inside the FPGA, and the high-speed oscillation signal output by the ring oscillators is sampled by a slow sampling clock to obtain the original random bit stream. The original random bitstream is debiased and whitened to obtain uniformly distributed random parameters; The uniformly distributed random parameters are transformed into target probability distribution random parameters that conform to the characteristics of various random factors in the power system; The random parameters of the target probability distribution are allocated to parallel simulation processing units on the FPGA according to a predetermined mapping rule for electromagnetic transient simulation. A pipelined online statistical algorithm is executed on the simulation results output by each simulation processing unit to generate the probability distribution characteristics and confidence intervals of each electrical quantity at the current moment.

9. An electronic device, characterized in that, The device includes a processor and a memory; The memory is used to store program code and transmit the program code to the processor; The processor is used to execute the probabilistic electromagnetic transient simulation method for power systems according to the instructions in the program code as described in claim 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store program code, which, when executed by a processor, implements the probabilistic electromagnetic transient simulation method for power systems as described in claim 8.

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