Plasma processing apparatus

Abstract

Provided is a technique capable of suppressing variation in the angle of incidence of ions at the edge portion of a substrate in plasma processing. A plasma processing apparatus includes: a chamber; a substrate support portion; an RF generator configured to generate an RF signal for generating plasma in the chamber; a substrate bias signal generator electrically connected to a substrate bias electrode and configured to generate a substrate bias signal having a plurality of first voltage pulse trains; and a ring bias signal generator electrically connected to a ring bias electrode and configured to generate a ring bias signal having a plurality of second voltage pulse trains, each of the plurality of second voltage pulse trains including a plurality of voltage pulses having gradually decreasing voltage levels.

Description

Technical Field

[0001] Exemplary embodiments of this disclosure relate to plasma processing apparatus. Background Technology

[0002] In plasma processing apparatus, as a technique to mitigate the effect of the phase difference between the electrical bias voltage for the substrate and the electrical bias voltage for the edge ring on plasma processing, there exists the technique described in Patent Document 1.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-158134 Summary of the Invention

[0006] This disclosure provides a technique for suppressing variations in the incident angle (tilt angle) of ions at the edge portion of a substrate (hereinafter also referred to as "ion incident angle") during plasma processing.

[0007] The plasma processing apparatus in one exemplary embodiment of this disclosure includes: a chamber; a substrate support disposed within the chamber, the substrate support including: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and a ring support surface; an edge ring disposed on the ring support surface to surround a substrate on the substrate support surface; a substrate bias electrode disposed within the electrostatic chuck below the substrate support surface; and a ring bias electrode disposed within the electrostatic chuck below the ring support surface; a radio frequency generator configured to generate a radio frequency signal for generating plasma within the chamber; a substrate bias signal generator electrically connected to the substrate bias electrode and configured to generate a substrate bias signal having a plurality of first voltage pulse trains; and a ring bias signal generator electrically connected to the ring bias electrode and configured to generate a ring bias signal having a plurality of second voltage pulse trains, each of the plurality of second voltage pulse trains including a plurality of voltage pulses having a gradually decreasing voltage level.

[0008] Invention Effects

[0009] According to an exemplary embodiment of this disclosure, a technique can be provided to suppress variations in the ion incident angle at the edge portion of a substrate during plasma processing. Attached Figure Description

[0010] Figure 1 This is a diagram illustrating a structural example of a plasma processing system.

[0011] Figure 2 This is a diagram illustrating an example of the structure of a plasma processing device.

[0012] Figure 3This is a diagram illustrating an example of the structure of electrodes and power sources in the substrate support portion.

[0013] Figure 4 This is a top view illustrating an example of the structure of the bias electrode in the substrate support portion.

[0014] Figure 5 This is a diagram illustrating an example of the waveforms of the substrate bias signal, the ring bias signal, and the radio frequency signal.

[0015] Figure 6 This is a diagram illustrating an example of multiple voltage pulses in a first voltage pulse train and a second voltage pulse train.

[0016] Figure 7 It is a graph illustrating the decrease in voltage level between adjacent voltage pulses.

[0017] Figure 8 This is a diagram used to illustrate the variation of the ion incident angle in plasma processing.

[0018] Figure 9 This is a diagram illustrating an example of waveforms when the substrate bias signal and the ring bias signal are out of sync with the radio frequency signal.

[0019] Figure 10 This is a diagram illustrating other structural examples of electrodes and power sources in the substrate support portion.

[0020] Explanation of reference numerals in the attached figures

[0021] 1…Plasma processing apparatus; 10…Cavity; 11…Substrate support; 31a…First radio frequency generation unit; 1111…Electrostatic chuck; 250…Edge ring; 300…Substrate bias electrode; 301…Ring bias electrode; 350…First DC power supply; 351…Substrate bias signal generator; 352…Second DC power supply; 353…Ring bias signal generator; W…Substrate. Detailed Implementation

[0022] The following describes various embodiments of this disclosure.

[0023] In one exemplary embodiment, a plasma processing apparatus is provided, comprising: a chamber; a substrate support disposed within the chamber, the substrate support including: a conductive base; an electrostatic chuck disposed on the conductive base and having a substrate support surface and a ring support surface; an edge ring disposed on the ring support surface to surround a substrate on the substrate support surface; a substrate bias electrode disposed within the electrostatic chuck below the substrate support surface; and a ring bias electrode disposed within the electrostatic chuck below the ring support surface; a radio frequency generator configured to generate a radio frequency signal for generating plasma within the chamber; a substrate bias signal generator electrically connected to the substrate bias electrode and configured to generate a substrate bias signal having a plurality of first voltage pulse trains; and a ring bias signal generator electrically connected to the ring bias electrode and configured to generate a ring bias signal having a plurality of second voltage pulse trains, each of the plurality of second voltage pulse trains including a plurality of voltage pulses having a gradually decreasing voltage level.

[0024] In one exemplary embodiment, each of the plurality of first voltage pulse trains includes a plurality of voltage pulses having the same voltage level.

[0025] In one exemplary embodiment, each of the plurality of first voltage pulse trains includes voltage pulses with negative polarity, and each of the plurality of second voltage pulse trains includes voltage pulses with negative polarity.

[0026] In one exemplary embodiment, a first DC power supply configured to generate a first DC signal is also included, and a substrate bias signal generator is configured to generate a plurality of first voltage pulse trains from the first DC signal.

[0027] In one exemplary embodiment, a second DC power supply configured to generate a second DC signal is also included, and a loop bias signal generator is configured to generate a plurality of second voltage pulse trains from the second DC signal.

[0028] In one exemplary embodiment, a second DC power supply configured to generate a second DC signal is also included, and the loop bias signal generator is configured to generate a plurality of second voltage pulse trains from a combination of the first DC signal and the second DC signal.

[0029] In one exemplary embodiment, the voltage level difference between the first and last voltage pulses in each of the plurality of second voltage pulse trains is in the range of 50V to 100V.

[0030] In one exemplary embodiment, the duration of each of the plurality of second voltage pulse trains is in the range of more than 100 microseconds and less than 150 microseconds.

[0031] In one exemplary embodiment, a plurality of first voltage pulse trains are synchronized with a plurality of second voltage pulse trains.

[0032] In one exemplary embodiment, a plasma processing apparatus is provided, comprising: a plasma processing chamber; a substrate support disposed within the plasma processing chamber and having a substrate support surface; an edge ring disposed to surround a substrate on the substrate support surface; a substrate bias electrode disposed below the substrate support surface; a ring bias electrode disposed below the edge ring; a substrate bias signal generator electrically connected to the substrate bias electrode and configured to generate a substrate bias signal having a plurality of first voltage pulse trains; and a ring bias signal generator electrically connected to the ring bias electrode and configured to generate a ring bias signal having a plurality of second voltage pulse trains, each of the plurality of second voltage pulse trains comprising a plurality of voltage pulses having gradually decreasing voltage levels.

[0033] In one exemplary embodiment, each of the plurality of first voltage pulse trains includes a plurality of voltage pulses having the same voltage level.

[0034] In one exemplary embodiment, each of the plurality of first voltage pulse trains includes voltage pulses with negative polarity, and each of the plurality of second voltage pulse trains includes voltage pulses with negative polarity.

[0035] In one exemplary embodiment, a first DC power supply configured to generate a first DC signal is also included, and a substrate bias signal generator is configured to generate a plurality of first voltage pulse trains from the first DC signal.

[0036] In one exemplary embodiment, a second DC power supply configured to generate a second DC signal is also included, and a loop bias signal generator is configured to generate a plurality of second voltage pulse trains from the second DC signal.

[0037] In one exemplary embodiment, a second DC power supply configured to generate a second DC signal is also included, and the loop bias signal generator is configured to generate a plurality of second voltage pulse trains from a combination of the first DC signal and the second DC signal.

[0038] In one exemplary embodiment, the voltage level difference between the first and last voltage pulses in each of the plurality of second voltage pulse trains is in the range of 50V to 100V.

[0039] In one exemplary embodiment, the duration of each of the plurality of second voltage pulse trains is in the range of more than 100 microseconds and less than 150 microseconds.

[0040] In one exemplary embodiment, a plurality of first voltage pulse trains are synchronized with a plurality of second voltage pulse trains.

[0041] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. Furthermore, the same or identical elements will be labeled with the same symbols in the drawings, and repeated descriptions will be omitted. Unless otherwise specified, positional relationships such as up, down, left, and right will be described based on the positional relationships shown in the drawings. The dimensions in the drawings are not actual scales, and actual scales are not limited to the scales shown.

[0042] <An Example of a Plasma Processing System>

[0043] Figure 1 This is a diagram illustrating a structural example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a controller 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support portion 11, and a plasma generation portion 12. The plasma processing chamber 10 has a plasma processing space. Furthermore, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas into the plasma processing space and at least one gas outlet for discharging gas from the plasma processing space. The gas supply port is connected to the gas supply portion 20 (described later), and the gas outlet is connected to the exhaust system 40 (described later). The substrate support portion 11 is disposed within the plasma processing space and has a substrate support surface for supporting the substrate.

[0044] The plasma generation unit 12 is configured to generate plasma from at least one processing gas supplied to the plasma processing space. The plasma generated in the plasma processing space can be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Furthermore, various types of plasma generation units, including alternating current (AC) and direct current (DC) plasma generation units, can also be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0045] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 can be configured to control the various elements of the plasma processing apparatus 1 to perform the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 can be configured to perform various control operations by reading a program from the storage unit 2a2 and executing the read program. The program may be pre-stored in the storage unit 2a2 or retrieved via a medium when needed. The retrieved program is stored in the storage unit 2a2 and read and executed by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or a communication loop connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (HardDisk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may also communicate with the plasma processing device 1 via a communication loop such as a LAN (Local Area Network).

[0046] Hereinafter, a structural example of a capacitively coupled plasma processing apparatus, which is one example of plasma processing apparatus 1, will be described. Figure 2 This is a diagram illustrating a structural example of a capacitively coupled plasma processing device 1.

[0047] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10 (hereinafter referred to as the "chamber"), a gas supply unit 20, a power supply 30, and an exhaust system 40. Furthermore, the substrate processing apparatus 1 includes a substrate support unit 11 and a gas inlet unit. The gas inlet unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet unit includes a nozzle 13. The substrate support unit 11 is disposed within the plasma processing chamber 10. The nozzle 13 is disposed above the substrate support unit 11. In one embodiment, the nozzle 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the nozzle 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The nozzle 13 and the substrate support unit 11 are electrically insulated from the frame of the plasma processing chamber 10.

[0048] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting the substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the main body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the main body portion 111 in such a way that it surrounds the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as an annular support surface for supporting the ring assembly 112.

[0049] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b disposed within the ceramic component 1111a. The ceramic component 1111a has a central region 111a. In one embodiment, the ceramic component 1111a also includes an annular region 111b. Alternatively, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may also have an annular region 111b. In this case, a ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating component, and may be disposed on both the electrostatic chuck 1111 and the annular insulating component. Additionally, at least one radio frequency / DC electrode coupled to the radio frequency power supply 31 and / or DC power supply 32 described later may also be disposed within the ceramic component 1111a. In this configuration, at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or DC signal, described later, is supplied to at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Additionally, the conductive components of the base 1110 and the at least one RF / DC electrode can also function as multiple lower electrodes. Furthermore, the electrostatic electrode 1111b can function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

[0050] The ring assembly 112 includes one or more annular components. In one embodiment, the one or more annular components include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0051] Additionally, the substrate support 11 may also include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid, such as brine or gas, flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed within the base 1110, and one or more heaters are disposed within the ceramic component 1111a of the electrostatic chuck 1111. Furthermore, the substrate support 11 may also include a heat transfer gas supply section configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

[0052] The nozzle 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The nozzle 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s through the gas diffusion chamber 13b and the plurality of gas inlets 13c. Furthermore, the nozzle 13 includes at least one upper electrode. In addition to the nozzle 13, the gas inlet unit may include one or more side gas injectors (SGIs) mounted on one or more openings formed on the sidewall 10a.

[0053] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from each corresponding gas source 21 to the nozzle 13 via each corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include one or more flow modulation devices for modulating or pulsedizing the flow rate of the at least one processing gas.

[0054] The power supply 30 includes a radio frequency (RF) power supply 31, which is coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to provide at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. Plasma is thus formed by at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation section 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential is generated on the substrate W, enabling the introduction of ionic components from the formed plasma into the substrate W.

[0055] In one embodiment, the radio frequency (RF) power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is configured to be coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may also be configured to generate multiple source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0056] The second radio frequency (RF) generation unit 31b is configured to couple to at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than that of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 100 MHz. In one embodiment, the second RF generation unit 31b may also be configured to generate multiple bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. Furthermore, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0057] Furthermore, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is configured to be connected to at least one lower electrode to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generating unit 32b is configured to be connected to at least one upper electrode to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

[0058] In various embodiments, the first and second DC signals can be pulsed. In this case, a voltage pulse sequence is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have rectangular, trapezoidal, triangular, or combinations thereof pulse waveforms. In one embodiment, a waveform generation unit for generating a voltage pulse sequence from the DC signal is connected between the first DC generation unit 32a and at least one lower electrode. Therefore, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses can have positive or negative polarity. Furthermore, the voltage pulse sequence can include one or more positive voltage pulses and one or more negative voltage pulses in one cycle. Additionally, the first and second DC generation units 32a and 32b can be configured based on the RF power supply 31, and the first DC generation unit 32a can also be configured instead of the second RF generation unit 31b.

[0059] The exhaust system 40 may be connected, for example, to a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0060] like Figure 3 As shown, in one embodiment, the substrate support portion 11 includes a substrate suction cup electrode 200, at least one annular suction cup electrode 201, a substrate bias electrode 300, and an annular bias electrode 301.

[0061] The substrate chuck electrode 200 is disposed within the electrostatic chuck 1111 below the substrate support surface (central region 111a). In one embodiment, the substrate chuck electrode 200 may be circular. In one embodiment, the substrate chuck electrode 200 is electrically connected to a direct current (DC) power supply 200b via a switch 200a. When a DC voltage from the DC power supply 200b is applied to the substrate chuck electrode 200, an electrostatic attraction (Coulomb force) is generated between the substrate chuck electrode 200 and the substrate W. The substrate W is attracted by the electrostatic chuck 1111 by its electrostatic attraction and is held by the substrate support surface.

[0062] The annular suction cup electrode 201 is disposed within the electrostatic chuck 1111 below the annular support surface (annular region 111b). The annular support surface supports at least one edge ring 250 of the ring assembly 112. In one embodiment, the annular suction cup electrode 201 includes an inner annular suction cup electrode 210 and an outer annular suction cup electrode 211. In one embodiment, the inner annular suction cup electrode 210 is electrically connected to a DC power supply 210b via a switch 210a. In one embodiment, the outer annular suction cup electrode 211 is disposed outside the inner annular suction cup electrode 210. In one embodiment, the outer annular suction cup electrode 211 is electrically connected to a DC power supply 211b via a switch 211a. In one embodiment, the annular suction cup electrode 201 generates a potential difference between the inner annular suction cup electrode 210 and the outer annular suction cup electrode 211, and the edge ring 250 is attracted and held to the annular support surface by this potential difference. In one embodiment, the polarity of the first ring suction cup voltage applied to the inner ring suction cup electrode 210 is different from the polarity of the second ring suction cup voltage applied to the outer ring suction cup electrode 211.

[0063] The substrate bias electrode 300 is disposed within the electrostatic chuck 1111 below the substrate support surface. The substrate bias electrode 300 can be disposed below the substrate chuck electrode 200. The ring bias electrode 301 is disposed within the electrostatic chuck 1111 below the ring support surface. The ring bias electrode 301 can be disposed below the ring chuck electrode 201. The substrate bias electrode 300 and the ring bias electrode 301 can be disposed at the same height.

[0064] like Figure 4 As shown, in one embodiment, the substrate bias electrode 300 may be circular. The ring bias electrode 301 may have an annular shape with a width in the radial direction. In one embodiment, the ring bias electrode 301 has a larger diameter than the substrate bias electrode 300 and is disposed outside the substrate bias electrode 300.

[0065] like Figure 3 As shown, in one embodiment, the DC power supply 32 includes a first DC power supply 350, a substrate bias signal generator 351, a second DC power supply 352, and a ring bias signal generator 353.

[0066] The first DC power supply 350 is configured to generate a first DC signal DC1. The first DC signal DC1 may have a first primary voltage level (V1). The first primary voltage level (V1) may have a negative polarity. The first DC power supply 350 is electrically connected to the substrate bias signal generator 351. The first DC power supply 350 can supply the generated first DC signal DC1 to the substrate bias signal generator 351.

[0067] The substrate bias signal generator 351 is configured to generate a substrate bias signal DC2 from a first DC signal DC1. The substrate bias signal DC2 may have a first voltage level. This first voltage level may be the same as the first primary voltage level (V1). The substrate bias signal DC2 has multiple first voltage pulse trains. These first voltage pulse trains may be an example of a voltage pulse sequence. The substrate bias signal generator 351 is electrically connected to the substrate bias electrode 300 via an impedance matching device or a switch. The substrate bias signal generator 351 can supply the generated substrate bias signal DC2 to the substrate bias electrode 300. By applying multiple first voltage pulse trains of the substrate bias signal DC2 to the substrate bias electrode 300, ionic components from the plasma formed on the substrate support surface can be introduced into the substrate W.

[0068] The second DC power supply 352 is configured to generate a second DC signal DC3. The second DC signal DC3 may have a second primary voltage level (V2). The second primary voltage level (V2) may have a negative polarity. The second DC power supply 352 is electrically connected to the loop bias signal generator 353. The second DC power supply 352 can supply the generated second DC signal DC3 to the loop bias signal generator 353.

[0069] The ring bias signal generator 353 is configured to generate a ring bias signal DC4 from a second DC signal DC3. The ring bias signal DC4 may have a second voltage level. This second voltage level may be the same as the second primary voltage level (V2). The ring bias signal DC4 has multiple second voltage pulse trains. These second voltage pulse trains may be an example of a voltage pulse sequence. The ring bias signal generator 353 is electrically connected to the ring bias electrode 301 via an impedance matching device or a switch. The ring bias signal generator 353 can supply the generated ring bias signal DC4 to the ring bias electrode 301. By applying multiple second voltage pulse trains of the ring bias signal DC4 to the ring bias electrode 301, ionic components from the plasma formed on the edge portion of the substrate W can be introduced into the edge portion of the substrate W.

[0070] Figure 5 and Figure 6 This example illustrates the waveforms of the substrate bias signal DC2 and the ring bias signal DC4. The substrate bias signal DC2 has a first voltage pulse train PS1 during the first state S1 (period TS1) within the repetition period T, and a reference voltage during the second state S2 within the repetition period T. For example... Figure 6 As shown, the first voltage pulse train PS1 comprises a sequence of multiple voltage pulses P1 having a first voltage level V1. Figure 5 and Figure 6In the example, the first voltage level V1 is constant in each first voltage pulse train PS1. That is, in one embodiment, the multiple voltage pulses P1 included in each first voltage pulse train PS1 have the same voltage level V1. The reference voltage has a reference voltage level V. ref Reference voltage level V ref The absolute value of V is less than the absolute value of the first voltage level V1. In one embodiment, the first voltage level V1 has a negative polarity. In one embodiment, the reference voltage level V in the substrate bias signal DC2 is... ref It has a zero voltage level.

[0071] The loop bias signal DC4 has a second voltage pulse train PS2 during the first state S1 (period TS1) within the repetition period T, and a reference voltage during the second state S2 within the repetition period T. For example... Figure 6 As shown, the second voltage pulse train PS2 has a sequence of multiple voltage pulses P2-1, P2-2, P2-3…P2-N with gradually decreasing voltage levels V2-1, V2-2, V2-3…V2-N (N is a natural number) during the first state S1. The reference voltage has a reference voltage level V. ref Reference voltage level V ref The absolute value is less than the absolute value of each voltage level V2-1, V2-2, V2-3, ... V2-N of the plurality of voltage pulses included in the second voltage pulse train PS2. In one embodiment, each voltage level V2-1, V2-2, V2-3... V2-N of the plurality of voltage pulses P2-1, P2-2, P2-3... P2-N included in the second voltage pulse train PS2 has a negative polarity. The reference voltage level V in the substrate bias signal DC2 ref The reference voltage level V in the loop bias signal DC4 ref They can be the same or different. In one implementation, the reference voltage level V in the loop bias signal DC4 is... ref It has a zero voltage level.

[0072] In one embodiment, the voltage level difference ΔV between the initial voltage pulse P2-1 and the final voltage pulse P2-N in each second voltage pulse train PS2 is in the range of 50V to 100V. In one embodiment, the voltage level V2-1 of the first voltage pulse P2-1 in the second voltage pulse train PS2 is greater than the first voltage level V1 of the voltage pulse P1 in the first voltage pulse train PS1. In one embodiment, the voltage level V2-N of the final voltage pulse P2-N in the second voltage pulse train PS2 is the same as the first voltage level V1 of the voltage pulse P1 in the first voltage pulse train PS1. In one embodiment, the voltage level V2-N of the final voltage pulse P2-N in the second voltage pulse train PS2 is less than the first voltage level V1 of the voltage pulse P1 in the first voltage pulse train PS1. In one embodiment, the individual voltage levels V2-1, V2-2, V2-3…V2-N in the plurality of voltage pulses P2-1, P2-2, P2-3…P2-N in the second voltage pulse train PS2 gradually decrease between periods TS1. Figure 7 As shown, the reduction amount Δd per stage of the multiple voltage levels V2-1, V2-2, V2-3, ... V2-N of the multiple voltage pulses P2-1, P2-2, P2-3, ... P2-N in the second voltage pulse train PS2 (the difference between the voltage level V2-k of voltage pulse P2-k and the voltage level V2-(k+1) of voltage pulse P2-(k+1) (k is a natural number)) can be constant. In one embodiment, the reduction amount Δd per stage of the multiple voltage levels V2-1, V2-2, V2-3... P2-N of the multiple voltage pulses P2-1, P2-2, P2-3... P2-N in the second voltage pulse train PS2 can gradually decrease between periods TS1. For example, the reduction amount Δd per stage can decrease exponentially between periods TS1. In one embodiment, the period TS1 is in the range of 100 microseconds to 150 microseconds.

[0073] In one embodiment, the first voltage pulse train PS1 of the substrate bias signal DC2 and the second voltage pulse train PS2 of the loop bias signal DC4 are synchronized. Figure 5 , Figure 6 In the example, the substrate bias signal DC2 has a voltage pulse train PS1 during the first state S1 within the repetition period T, and a reference voltage during the second state S2 within the repetition period T. The ring bias signal DC4 is synchronized with the substrate bias signal DC2, has a voltage pulse train PS2 during the first state S1 within the repetition period T, and a reference voltage during the second state S2 within the repetition period T. That is, the substrate bias signal DC2 and the ring bias signal DC4 have voltage pulse trains PS1 and PS2 during the first state S1 within the repetition period T, and a reference voltage during the second state S2 within the repetition period T.

[0074] In one implementation, Figure 5 In the example shown, the voltage pulse trains of the substrate bias signal DC2 and the ring bias signal DC4 are synchronized with the radio frequency signals for plasma generation supplied from the first radio frequency generation unit 31a (radio frequency generator) of the radio frequency power supply 31 to the lower electrode and / or the upper electrode. That is, during the first state S1 period (when voltage pulse trains PS1 and PS2 are applied) within the repetition period T of the substrate bias signal DC2 and the ring bias signal DC4, the radio frequency signal is supplied (the radio frequency signal is ON), and during the second state S2 period (when the reference voltage is applied) within the repetition period T, the supply of the radio frequency signal is stopped (the radio frequency signal is OFF).

[0075] <An example of plasma treatment methods>

[0076] The plasma processing method includes an etching process that uses plasma to etch a film on a substrate W. In one embodiment, the plasma processing method is performed by a control unit 2 in a plasma processing apparatus 1.

[0077] First, the substrate W is moved into the chamber 10 by a conveyor arm, and then placed on the substrate support 11 by a lift. Figure 2 As shown, it is adsorbed and held in the substrate support portion 11.

[0078] Next, the plasma generation unit 12 generates plasma in the plasma processing space 10s. First, processing gas is supplied to the nozzle 13 through the gas supply unit 20, and then supplied from the nozzle 13 to the plasma processing space 10s. The processing gas supplied at this time contains gases containing active species required for the etching process of the substrate W.

[0079] A source radio frequency signal is supplied from the radio frequency power supply 31 to the upper electrode and / or the lower electrode. A bias DC signal is supplied from the DC power supply 32 to the lower electrode. The ambient gas in the plasma processing space 10s is discharged from the gas outlet 10e, and the interior of the plasma processing space 10s is depressurized. On the substrate support portion 11 of the plasma processing space 10s, plasma generated by the processing gas is used to etch the substrate W.

[0080] When generating plasma, the first radio frequency generation unit 31a of the radio frequency power supply 31 supplies radio frequency signals to the upper electrode and / or the lower electrode, and through... Figure 4 The substrate bias signal generator 351 shown supplies the substrate bias signal DC2 to the substrate bias electrode 300. For example... Figure 6 As shown, the substrate bias signal DC2 has multiple first voltage pulse trains PS1. By applying the multiple first voltage pulse trains PS1 to the substrate bias electrode 300, the ionic components in the plasma formed on the substrate support surface are introduced into the substrate W.

[0081] In addition, through Figure 4 The loop bias signal generator 353 shown supplies the loop bias signal DC4 to the loop bias electrode 301. Figure 6 As shown, the ring bias signal DC4 has multiple second voltage pulse trains PS2. By applying multiple second voltage pulse trains PS2 to the ring bias electrode 301, the ionic components in the plasma formed on the edge portion of the substrate W are introduced into the edge portion of the substrate W.

[0082] At this point, as time progresses, the voltage level (V2) of the multiple voltage pulses P2 in each second voltage pulse train PS2 gradually decreases. The voltage level difference ΔV1 between the initial voltage pulse P2-1 and the last voltage pulse P2-2 in each second voltage pulse train PS2 can be in the range of above 50V and below 100V. The voltage level (V1) of the multiple voltage pulses P1 in each first voltage pulse train PS1 can be constant.

[0083] Assuming that the voltage levels of multiple voltage pulses P2 in each second voltage pulse train PS2 are kept constant, at the edge portion of the substrate W, Figure 8 The ion incident angle of the plasma shown by the arrow gradually shifts from the inside (towards the substrate side) to the outside (towards the edge ring 250 side). This is presumably due to variations in plasma density during plasma processing or the charging of the edge ring 250, causing the plasma sheath at the edge of the substrate W to gradually rise relative to the plasma sheath at the center of the substrate W. Furthermore, in one embodiment, by gradually reducing the voltage level (V2) of the multiple voltage pulses P2 in each of the second voltage pulse trains PS2, the relative rise of the plasma sheath at the edge of the substrate W can be suppressed. As a result, variations in the ion incident angle at the edge of the substrate W can be suppressed during plasma processing.

[0084] According to this exemplary embodiment, the plasma processing apparatus 1 includes a substrate bias signal generator 351 and a ring bias signal generator 353. The substrate bias signal generator 351 is configured to generate a substrate bias signal DC2 having a plurality of first voltage pulse trains PS1, and the ring bias signal generator 353 is configured to generate a ring bias signal DC4 having a plurality of second voltage pulse trains PS2. Each second voltage pulse train PS2 includes a plurality of voltage pulses P2 having gradually decreasing voltage levels. Therefore, variations in the ion incident angle at the edge portion of the substrate W can be suppressed during plasma processing, resulting in suppression of variations in the plasma processing result.

[0085] In the above embodiments, the substrate bias signal DC2 and the ring bias signal DC4 can be out of sync with the radio frequency signal used to generate plasma. For example... Figure 9As shown, for example, during the first state S1 period (when voltage pulse trains PS1 and PS2 are applied) within the repetition period T of the substrate bias signal DC2 and the ring bias signal DC4, the supply of the radio frequency signal can be stopped (the radio frequency signal is OFF), and during the second state S2 period (when the reference voltage is applied) within the repetition period T, the radio frequency signal can be supplied (the radio frequency signal is ON).

[0086] In the above embodiments, the ring bias signal generator 353 can be configured to generate multiple second voltage pulse trains PS2 by a combination of a first DC signal DC1 and a second DC signal DC3. For example... Figure 10 As shown, for example, the loop bias signal generator 353 is configured to generate a loop bias signal DC4 having multiple second voltage pulse trains PS2 from a first DC signal DC1 and a second DC signal DC3. The multiple second voltage pulse trains PS2 can have a second voltage level V3 (V1+V2) obtained by adding the first primary voltage level V1 of the first DC signal DC1 and the second primary voltage level V2 of the second DC signal DC3.

[0087] As an example, when the voltage levels V2-1, V2-2, V2-3, ... V2-N of the multiple voltage pulses P2-1, P2-2, P2-3, P2-N in each second voltage pulse train PS2 are gradually reduced, the second voltage level V3 can be gradually reduced by gradually reducing the second primary voltage level V2. In each second voltage pulse train PS2, the second primary voltage level V2 can be gradually reduced. The first primary voltage level V1 can be kept constant, and the first voltage level V1 of the multiple voltage pulses P1 in each first voltage pulse train PS1 can also be kept constant.

[0088] In addition to capacitively coupled plasma processing devices, plasma processing apparatuses can also be plasma processing devices using any plasma source such as inductively coupled plasma or microwave plasma. The substrate support portion, as long as it has a substrate support surface, does not need to have a conductive base and an electrostatic chuck structure.

[0089] The embodiments of this disclosure also include the following aspects.

[0090] (Note 1)

[0091] A plasma processing apparatus, comprising:

[0092] chamber;

[0093] A substrate support portion is disposed within the cavity, the substrate support portion comprising:

[0094] Conductive substrate;

[0095] An electrostatic chuck is disposed on the conductive base and has a substrate support surface and a ring support surface;

[0096] An edge ring is disposed on the ring support surface in such a way as to surround the substrate on the substrate support surface;

[0097] A substrate bias electrode is disposed within the electrostatic chuck below the substrate support surface; and

[0098] A ring bias electrode is disposed below the ring support surface within the electrostatic chuck;

[0099] A radio frequency generator is configured to generate a radio frequency signal for generating plasma within the cavity;

[0100] A substrate bias signal generator, electrically connected to the substrate bias electrode, is configured to generate a substrate bias signal having multiple first voltage pulse trains; and

[0101] A loop bias signal generator, electrically connected to the loop bias electrode, is configured to generate a loop bias signal having multiple second voltage pulse trains, each of the multiple second voltage pulse trains comprising multiple voltage pulses having gradually decreasing voltage levels.

[0102] (Note 2)

[0103] According to the plasma processing apparatus described in Appendix 1, each of the plurality of first voltage pulse trains comprises a plurality of voltage pulses having the same voltage level.

[0104] (Note 3)

[0105] According to the plasma processing apparatus described in Appendix 1 or 2, each of the plurality of first voltage pulse trains includes a voltage pulse with negative polarity.

[0106] Each of the plurality of second voltage pulse trains includes a voltage pulse with negative polarity.

[0107] (Note 4)

[0108] The plasma processing apparatus according to any one of Appendices 1 to 3, wherein the plasma processing apparatus further includes a first DC power supply configured to generate a first DC signal.

[0109] The substrate bias signal generator is configured to generate the plurality of first voltage pulse trains from the first DC signal.

[0110] (Note 5)

[0111] According to the plasma processing apparatus described in Appendix 4, the plasma processing apparatus further includes a second DC power supply configured to generate a second DC signal.

[0112] The ring bias signal generator is configured to generate the plurality of second voltage pulse trains from the second DC signal.

[0113] (Note 6)

[0114] According to the plasma processing apparatus described in Appendix 4, the plasma processing apparatus further includes a second DC power supply configured to generate a second DC signal.

[0115] The ring bias signal generator is configured to generate the plurality of second voltage pulse trains by a combination of the first DC signal and the second DC signal.

[0116] (Note 7)

[0117] According to any one of Appendices 1 to 6, in the plasma processing apparatus, the voltage level difference between the initial voltage pulse and the final voltage pulse in each of the plurality of second voltage pulse trains is in the range of 50V to 100V.

[0118] (Note 8)

[0119] According to any one of Appendices 1 to 7, the plasma processing apparatus wherein the respective duration of the plurality of second voltage pulse trains is in the range of 100 microseconds to 150 microseconds.

[0120] (Note 9)

[0121] According to any one of Appendices 1 to 8, the plasma processing apparatus wherein the plurality of first voltage pulse trains are synchronized with the plurality of second voltage pulse trains.

[0122] (Postscript 10)

[0123] A plasma processing apparatus, comprising:

[0124] Plasma processing chamber;

[0125] A substrate support portion is disposed within the plasma processing chamber and has a substrate support surface;

[0126] An edge ring is configured to surround the substrate on the substrate support surface;

[0127] A substrate bias electrode is disposed below the substrate support surface;

[0128] A ring bias electrode is disposed below the edge ring;

[0129] A substrate bias signal generator, electrically connected to the substrate bias electrode, is configured to generate a substrate bias signal having multiple first voltage pulse trains; and

[0130] A loop bias signal generator, electrically connected to the loop bias electrode, is configured to generate a loop bias signal having multiple second voltage pulse trains, each of the multiple second voltage pulse trains comprising multiple voltage pulses having gradually decreasing voltage levels.

[0131] (Postscript 11)

[0132] According to the plasma processing apparatus described in Appendix 10, each of the plurality of first voltage pulse trains comprises a plurality of voltage pulses having the same voltage level.

[0133] (Postscript 12)

[0134] According to the plasma processing apparatus described in Appendix 10 or 11, each of the plurality of first voltage pulse trains includes a voltage pulse with negative polarity.

[0135] Each of the plurality of second voltage pulse trains includes a voltage pulse with negative polarity.

[0136] (Postscript 13)

[0137] The plasma processing apparatus according to any one of Appendices 10 to 12, wherein the plasma processing apparatus further includes a first DC power supply configured to generate a first DC signal.

[0138] The substrate bias signal generator is configured to generate the plurality of first voltage pulse trains from the first DC signal.

[0139] (Postscript 14)

[0140] According to the plasma processing apparatus described in Appendix 13, the plasma processing apparatus further includes a second DC power supply configured to generate a second DC signal.

[0141] The ring bias signal generator is configured to generate the plurality of second voltage pulse trains from the second DC signal.

[0142] (Postscript 15)

[0143] According to the plasma processing apparatus described in Appendix 13, the plasma processing apparatus further includes a second DC power supply configured to generate a second DC signal.

[0144] The ring bias signal generator is configured to generate the plurality of second voltage pulse trains by a combination of the first DC signal and the second DC signal.

[0145] (Postscript 16)

[0146] According to any one of Appendices 10 to 15, the plasma processing apparatus wherein the voltage level difference between the initial voltage pulse and the final voltage pulse in each of the plurality of second voltage pulse trains is in the range of 50V to 100V.

[0147] (Postscript 17)

[0148] According to any one of Appendices 10 to 16, the plasma processing apparatus wherein the respective duration of the plurality of second voltage pulse trains is in the range of 100 microseconds to 150 microseconds.

[0149] (Postscript 18)

[0150] According to any one of Appendices 10 to 17, the plasma processing apparatus wherein the plurality of first voltage pulse trains are synchronized with the plurality of second voltage pulse trains.

[0151] The above embodiments have been described for illustrative purposes and are not intended to limit the scope of this disclosure. Various modifications can be made to each embodiment without departing from the scope and spirit of this disclosure. For example, some components of one embodiment may be added to other embodiments. Additionally, some components of one embodiment may be replaced with corresponding components of other embodiments.

Claims

1. A plasma processing apparatus, comprising: chamber; A substrate support portion is disposed within the cavity, the substrate support portion comprising: Conductive substrate; An electrostatic chuck is disposed on the conductive base and has a substrate support surface and a ring support surface; An edge ring is disposed on the ring support surface in such a way as to surround the substrate on the substrate support surface; A substrate bias electrode is disposed within the electrostatic chuck below the substrate support surface; and A ring bias electrode is disposed below the ring support surface within the electrostatic chuck; A radio frequency generator is configured to generate a radio frequency signal for generating plasma within the cavity; A substrate bias signal generator, electrically connected to the substrate bias electrode, is configured to generate a substrate bias signal having multiple first voltage pulse trains; and A loop bias signal generator, electrically connected to the loop bias electrode, is configured to generate a loop bias signal having multiple second voltage pulse trains, each of the multiple second voltage pulse trains comprising multiple voltage pulses having gradually decreasing voltage levels.

2. The plasma processing apparatus according to claim 1, wherein, Each of the plurality of first voltage pulse trains comprises a plurality of voltage pulses having the same voltage level.

3. The plasma processing apparatus according to claim 2, wherein, Each of the plurality of first voltage pulse trains includes voltage pulses with negative polarity. Each of the plurality of second voltage pulse trains includes a voltage pulse with negative polarity.

4. The plasma processing apparatus according to claim 3, wherein, The plasma processing apparatus also includes a first DC power supply configured to generate a first DC signal. The substrate bias signal generator is configured to generate the plurality of first voltage pulse trains from the first DC signal.

5. The plasma processing apparatus according to claim 4, wherein, The plasma processing apparatus also includes a second DC power supply configured to generate a second DC signal. The ring bias signal generator is configured to generate the plurality of second voltage pulse trains from the second DC signal.

6. The plasma processing apparatus according to claim 4, wherein, The plasma processing apparatus also includes a second DC power supply configured to generate a second DC signal. The ring bias signal generator is configured to generate the plurality of second voltage pulse trains by a combination of the first DC signal and the second DC signal.

7. The plasma processing apparatus according to any one of claims 1 to 6, wherein, The voltage level difference between the first and last voltage pulses in each of the plurality of second voltage pulse trains is in the range of 50V to 100V.

8. The plasma processing apparatus according to claim 7, wherein, The duration of each of the plurality of second voltage pulse trains is in the range of 100 microseconds to 150 microseconds.

9. The plasma processing apparatus according to claim 8, wherein, The plurality of first voltage pulse trains are synchronized with the plurality of second voltage pulse trains.

10. A plasma processing apparatus, comprising: Plasma processing chamber; A substrate support portion is disposed within the plasma processing chamber and has a substrate support surface; An edge ring is configured to surround the substrate on the substrate support surface; A substrate bias electrode is disposed below the substrate support surface; A ring bias electrode is disposed below the edge ring; A substrate bias signal generator is electrically connected to the substrate bias electrode and is configured to generate a substrate bias signal having multiple first voltage pulse trains. and A loop bias signal generator, electrically connected to the loop bias electrode, is configured to generate a loop bias signal having multiple second voltage pulse trains, each of the multiple second voltage pulse trains comprising multiple voltage pulses having gradually decreasing voltage levels.

11. The plasma processing apparatus according to claim 10, wherein, Each of the plurality of first voltage pulse trains comprises a plurality of voltage pulses having the same voltage level.

12. The plasma processing apparatus according to claim 11, wherein, Each of the plurality of first voltage pulse trains includes voltage pulses with negative polarity. Each of the plurality of second voltage pulse trains includes a voltage pulse with negative polarity.

13. The plasma processing apparatus according to claim 12, wherein, The plasma processing apparatus also includes a first DC power supply configured to generate a first DC signal. The substrate bias signal generator is configured to generate the plurality of first voltage pulse trains from the first DC signal.

14. The plasma processing apparatus according to claim 13, wherein, The plasma processing apparatus also includes a second DC power supply configured to generate a second DC signal. The ring bias signal generator is configured to generate the plurality of second voltage pulse trains from the second DC signal.

15. The plasma processing apparatus according to claim 13, wherein, The plasma processing apparatus also includes a second DC power supply configured to generate a second DC signal. The ring bias signal generator is configured to generate the plurality of second voltage pulse trains by a combination of the first DC signal and the second DC signal.

16. The plasma processing apparatus according to any one of claims 10 to 15, wherein, The voltage level difference between the first and last voltage pulses in each of the plurality of second voltage pulse trains is in the range of 50V to 100V.

17. The plasma processing apparatus according to claim 16, wherein, The duration of each of the plurality of second voltage pulse trains is in the range of 100 microseconds to 150 microseconds.

18. The plasma processing apparatus according to claim 17, wherein, The plurality of first voltage pulse trains are synchronized with the plurality of second voltage pulse trains.

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