High-speed spectral confocal signal processing system and method based on zynq

Abstract

The application discloses a high-speed spectral confocal signal processing system and method based on Zynq, which comprises the following steps: 1, collecting original linear array spectral images through a parallel multi-path source synchronous interface and decoding and receiving; 2, loading a pre-calibration dark signal to a hardware cache through a soft and hard collaborative mechanism to perform pixel-by-pixel operation to subtract the dark signal in real time; 3, extracting and counting electrical black reference pixel values in real time, and dynamically correcting the electronic background noise; 4, adopting a Savitzky-Golay filter with fixed-point solidification and logic optimization, random noise is smoothed under the premise of retaining spectral peak characteristics; 5, a sub-pixel peak searching method is deployed in hardware, which is a low-delay and high-precision sub-pixel peak searching method realized through dynamic adjustment of a local peak searching interval by cross-frame threshold prediction, based on first-order central difference and weighted linear fitting. According to the characteristics of high-speed spectral confocal measurement, the application efficiently adapts programmable logic resources, realizes pipeline processing in a soft and hard collaborative manner, and can meet the requirements of high-speed and high-precision and low-cost industrial measurement.

Description

Technical Field

[0001] This invention belongs to the field of spectral confocal signal processing, specifically a high-speed spectral confocal signal processing system and method based on Zynq. Background Technology

[0002] Spectral confocal measurement is a high-precision non-contact measurement technology based on optical dispersion and confocal filtering principles, primarily used for precise geometric measurements such as displacement, thickness, and surface morphology. By calculating the peak wavelength of the spectrum received by the detector and utilizing the one-to-one correspondence between wavelength and displacement, non-contact geometric measurement can be achieved. It offers advantages such as insensitivity to the measured material, high measurement accuracy, and strong anti-interference capabilities, making it widely used in semiconductor manufacturing, precision electronics, and other industrial fields. Spectral confocal signal processing typically includes denoising, filtering, and peak finding. Its core lies in peak coordinate extraction. Traditional peak coordinate extraction algorithms can be summarized as extremum methods, centroid methods, fitting methods, and other improved methods. Extremum methods are fast and simple, but have poor accuracy and cannot achieve sub-pixel-level peak finding. Centroid methods treat the spectral signal as a mass distribution, calculating its "centroid" position as the peak coordinate using light intensity as the weight. This is simple and direct, but susceptible to noise interference and has poor repeatability. Fitting methods offer the highest relative accuracy. Depending on the fitting function, they can be categorized into Sinc² function fitting, polynomial function fitting, and Gaussian function fitting, among others. Gaussian fitting is particularly accurate and is often used as a benchmark in research. However, it involves complex mathematical calculations, and fitting methods generally require traversing all data points to be fitted (patents CN116089824B and CN116989664B), resulting in low computational efficiency. Therefore, finding a balance between speed and accuracy is one of the key challenges in spectral signal processing algorithms.

[0003] With the increasing level of industrial automation, the demand for measurement speed is rising. High-speed measurements generate a large amount of spectral data waiting to be processed, and the short exposure time caused by high-speed measurements significantly reduces the signal-to-noise ratio. Therefore, higher demands are placed on the data transmission, conversion, and analysis capabilities of the subsequent systems. Traditional data processing methods are difficult to meet the needs of high-speed measurement scenarios. This approach has the following bottlenecks: 1. The transmission of massive amounts of raw data puts enormous pressure on interface bandwidth, limiting the improvement of the system sampling rate; 2. The execution of PC-based pure software processing algorithms has uncertain and relatively long delays, making it difficult to meet the requirements of online closed-loop control with extremely high real-time requirements; 3. Existing spectral signal processing methods usually involve a large number of high-order complex calculations, making them difficult to deploy and run on edge hardware resources. This makes it difficult to achieve an optimal balance between resource consumption, processing speed, and accuracy, especially in high-precision sub-pixel peak finding under strong background noise and short exposure conditions. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention proposes a high-speed spectral confocal signal processing system and method based on Zynq. This system aims to efficiently adapt programmable logic resources to the characteristics of high-speed spectral confocal measurements, and achieve pipelined processing through hardware and software collaboration to balance high speed, high precision, and low cost in industrial measurement. This improves the real-time performance of spectral confocal measurement and processing, and solves the problems of high cost, large transmission delay, and poor real-time signal processing in traditional solutions.

[0005] To achieve the above-mentioned objectives, the present invention adopts the following technical solution: The present invention provides a high-speed spectral confocal signal processing system based on Zynq, which includes: a linear array image acquisition module, a Zynq main control module, and an external memory module. The linear array image acquisition module includes: a linear array image sensor and an LVDS transmission interface; The Zynq master control module includes a PL terminal and a PS terminal, wherein the PL terminal and the PS terminal are connected via an AXI on-chip interconnect bus; The external storage module includes: dynamic random access memory and non-volatile memory, both of which are connected to the memory controller internally configured in the PS terminal; The linear array image sensor acquires the spectral confocal optical signal reflected by the object under test and converts it into a high-speed serial digital image, which is then transmitted to the PL terminal through the LVDS transmission interface. The PL terminal decodes the received high-speed serial digital image and converts it into a parallel spectral data stream; The PS terminal reads the spectral confocal dark signal stored in the non-volatile memory through the memory controller, and loads the spectral confocal dark signal into the BRAM resource of the PL terminal through the AXI on-chip interconnect bus; The PL terminal reads the spectral confocal dark signal from the BRAM resource and subtracts the spectral confocal dark signal pixel by pixel in the parallel spectral data stream to obtain the darkened spectral data stream. The PL terminal transmits the darkened spectral data stream to the memory controller of the PS terminal through the AXI on-chip interconnect bus, and under the drive control of the memory controller, the darkened spectral data stream is cached in the dynamic random access memory. Based on the cached content in the dynamic random access memory, the PL terminal performs dynamic black level correction, Savitzky-Golay filtering, and subpixel-level peak finding on the darkened spectral data stream, and finally obtains the subpixel absolute coordinates of the spectral fitting peak.

[0006] The present invention provides a high-speed spectral confocal signal processing method based on Zynq, characterized in that it is applied to a spectral confocal signal processing system consisting of a linear image acquisition module, a Zynq main control module, and an external memory module, and includes the following steps: Step S1: The linear array image acquisition module uses the linear array image sensor to convert the spectral confocal optical signal reflected by the object under test into a high-speed serial digital image, and transmits the high-speed serial digital image to the PL terminal in the Zynq main control module in a source-synchronous manner through a multi-parallel LVDS transmission interface. Step S2: The PL terminal uses multiple sets of internal input differential buffers to perform differential-to-single-ended buffering on the differential serial data stream and differential source synchronization clock in the high-speed serial digital image, respectively, to obtain the single-ended serial data stream and single-ended source synchronization clock. The PL terminal uses multiple internal serial-to-parallel converters to convert the single-ended serial data stream and the single-ended source synchronization clock into serial-to-parallel data stream and parallel source synchronization clock respectively. The PL terminal performs training alignment on the parallel data stream by detecting the offset of the training code output by the LVDS transmission interface during idle periods, and obtains the aligned parallel data stream. Driven by the parallel source synchronization clock, the PL terminal parses the aligned parallel data stream according to the link layer protocol, thereby outputting the parallel spectral data stream, synchronization drive clock, frame start signal and frame end signal; The PL terminal uses the global reset signal input from the spectral confocal signal processing system and the frame end signal as trigger conditions. When the global reset signal is valid or the frame end signal is valid, the PL terminal re-executes the training alignment of the parallel data stream. Step S3: Under the control of the synchronous drive clock, the PL terminal performs real-time dark signal subtraction operation on the parallel spectral data stream to obtain the darkened spectral data stream. Step S31: Keep the measurement environment unchanged and remove the object under test. Then, use the linear array image sensor to continuously acquire multiple frames of high-speed serial digital images without the object under test and perform arithmetic averaging to obtain the spectral confocal dark signal and store it in the non-volatile memory. Step S32: The PS terminal in the Zynq main control module reads the spectral confocal dark signal in the non-volatile memory through the memory controller, and transmits and caches the spectral confocal dark signal in the BRAM resource of the PL terminal through the AXI on-chip interconnect bus in the Zynq main control module. Step S33: The PL terminal uses the frame start signal as the synchronization reference and reads the spectral confocal dark signal from the BRAM resource under the beat of the synchronization drive clock. The parallel spectral data stream is subtracted from the data in the spectral confocal dark signal one by one. When the difference is less than zero, the calculation result is forced to zero, thereby obtaining the darkened spectral data stream. Step S4: The PL end performs discrimination based on the global coordinates of the data in the darkened spectral data stream to obtain the effective pixel group and dark pixel group in each frame of the darkened spectral data stream; extracts the median of the dark pixel group to obtain the dark reference value of each frame of the darkened spectral data stream; calculates the average value of the dark reference value of the darkened spectral data stream for N consecutive frames to obtain the real-time black level correction value of each frame in the N consecutive frames; subtracts the real-time black level correction value of the corresponding frame from the effective pixel group of each frame pixel by pixel to obtain the spectral data stream after dynamic black level correction. Step S5: The PL terminal performs Savitzky-Golay filtering on the dynamically black-level corrected spectral data stream to obtain the filtered spectral data stream. Step S51: Based on the full width at half maximum (FWHM) of the spectral confocal optical signal, determine the optimal window size of the Savitzky-Golay filter as N, and configure the polynomial order as K. Based on the optimal window size N and the polynomial order K, the Savitzky-Golay filter is instantiated as a set of floating-point format convolution coefficients; Multiply the convolution coefficients in the floating-point format by the quantization factor and then round them to the nearest integer to obtain a sequence of fixed-point constant weights. Step S52: The PL terminal forms a filtered data window with the same length as the optimal window size N through the internal shift register chain to store the spectral data stream after dynamic black level correction, thereby obtaining the data in the current filtered data window; By utilizing the symmetry of the fixed-point constant weight sequence, the data at symmetrical positions within the current filtered data window are pre-added using an adder to obtain the pre-added result under the current filtered data window; Step S53: Multiply and add the pre-added result under the current filtered data window with the fixed-point constant weight to obtain the filtered multiply-add result; After introducing a compensation number into the filtered multiply-accumulate result, an arithmetic right shift operation is performed to output the filtered value under the current filtered data window. The filtered spectral data stream is composed of the filtered values ​​under all filtered data windows. Step S6: Perform sub-pixel-level peak finding calculation on the filtered spectral data stream at the PL terminal to obtain the sub-pixel absolute coordinates of the spectral fitting peaks: Step S61: If the filtered spectral data stream belongs to one of the initial first M frames, then execute step S62; otherwise, execute step S68. Step S62: The PL terminal determines the maximum value of the filtered spectral data stream and multiplies the maximum value by a preset initial truncation coefficient to obtain the initial truncation threshold. The initial truncation threshold is compared one by one with the pixel data in the filtered spectral data stream. If the initial truncation threshold is less than the current pixel data, a valid enable signal is output; otherwise, an invalid enable signal is output; thus, the valid range of the enable signal is obtained. Step S63: Based on the effective range of the enable signal, the filtered spectral data stream is truncated to determine the local fitting range; Within the effective range of the enable signal, the rising edges of the synchronous drive clock are incremented to map the global coordinates of each pixel data in the filtered spectral data stream within the local fitting interval to local coordinates, and to obtain the global coordinates of the starting point of the local fitting interval. ; Step S64: Use equation (1) to obtain the local coordinates within the local fitting interval. pixel data Performing a first-order central difference yields the local coordinates as follows: Differential results of pixel data : (1) In equation (1), For three adjacent local coordinates, For local coordinates pixel data, For local coordinates Pixel data; Step S65: Calculate the sum of five constant terms for all pixel data within the local fitting interval using equation (2). : (2) In equation (2), The length of the local fitting interval; Step S66: Calculate the sub-pixel local coordinates of the spectral fitting peak using equation (3). : (3) Step S67: Calculate the sub-pixel absolute coordinates of the spectral fitting peak. And record it at the PL end, so that the sub-pixel absolute coordinates of the M consecutive spectral fitting peaks are combined into a coordinate cache table; Step S68: The PL terminal performs a first-order linear fit on the sub-pixel absolute coordinates of the spectral fitting peak in the coordinate cache table to obtain the predicted value of the spectral peak coordinates. Step S69: Extract the predicted values ​​of the spectral peaks from the filtered spectral data stream based on the predicted values ​​of the spectral peak coordinates. Step S610: Multiply the predicted value of the spectral peak by a configurable cutoff coefficient to obtain the dynamic cutoff threshold; Step S611: Compare the dynamic truncation threshold with the pixel data in the filtered spectral data stream one by one. If the dynamic truncation threshold is less than the current pixel data, output a valid enable signal; otherwise, output an invalid enable signal; thereby obtaining the valid range of the enable signal. Step S612: Process according to steps S63 to S611 until the stop signal of the spectral confocal signal processing system is valid.

[0007] Compared with the prior art, the beneficial effects that the present invention can achieve are: 1. This invention proposes a high-precision sub-pixel peak-finding algorithm adapted to hardware parallel computing, balancing accuracy and efficiency: This method achieves a single-pass scanning mechanism through cross-frame peak threshold prediction, enabling the algorithm to dynamically extract the fitting interval and complete all accumulation operations during a single data flow, eliminating the need for frame-level buffering and secondary traversal. The weighted least squares sub-pixel peak-finding method based on first-order central difference incorporates hardware-oriented design at the algorithm principle level. It avoids the complex computations such as iterative operations and matrix inversion required by traditional Gaussian nonlinear fitting, eliminates the half-pixel-level systematic phase shift introduced by forward or backward differencing, and imparts higher fitting confidence to high signal-to-noise ratio data points near the peak. While maintaining high accuracy, it reduces computational complexity and improves computational efficiency.

[0008] 2. This invention constructs a complete signal preprocessing chain at the hardware level, effectively improving the measurement robustness under short exposure and low signal-to-noise ratio conditions: To address the problem of severe signal-to-noise ratio (SNR) degradation in single-frame signals caused by short exposures in high-speed spectral confocal measurements, this invention designs a multi-stage preprocessing pipeline, including original image decoding and reception, real-time dark signal subtraction, dynamic black level correction, and fixed-point Savitzky-Golay filtering. This helps eliminate stray reflections and fixed-mode noise, electronic noise floor, and high-frequency random interference within the optical system, thereby improving the measurement accuracy and repeatability of the system under low SNR conditions.

[0009] 3. This invention enables integrated processing of spectral confocal signals on a single-board hardware, significantly reducing system costs and providing offline independent operation capability: This invention integrates the spectral signal processing workflow into the programmable logic of a Zynq heterogeneous SoC in a fully hardware pipeline, achieving integrated acquisition, processing, and computation. The complete conversion from signal to computation result is performed at the data source, with only the final computation result transmitted to the host computer, significantly reducing dependence on transmission bandwidth and host computer computing power. This architecture allows the system to operate independently of a high-performance PC, reducing the cost of additional DSP or GPU hardware. Its small size and low power consumption make it particularly suitable for industrial field online measurement or distributed deployment scenarios. Attached Figure Description

[0010] Figure 1 This is a block diagram of a high-speed spectral confocal signal processing system based on Zynq. Figure 2 A flowchart illustrating the steps involved in pipelined processing of high-speed spectral confocal signals. Figure 3 Design diagram for high-speed differential LVDS signal reception and decoding; Figure 4 This is a diagram of a specific hardware architecture for Savitzky-Golay filtering; Figure 5 This is a comparison chart of the errors of various sub-pixel peak finding algorithms. Figure 5 Part (a) represents the absolute error curves of different algorithms under the test sequence; Figure 5 Part (b) represents the mean absolute error of the peak coordinates for different algorithms. Detailed Implementation

[0012] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0013] In this embodiment, a high-speed spectral confocal signal processing system based on Zynq includes: a linear array image acquisition module, a Zynq main control module, and an external memory module; See Figure 1The linear array image acquisition module includes a linear array image sensor and an LVDS transmission interface. The hardware circuitry related to the linear array image sensor includes a linear array CMOS circuit, a power management circuit, an analog signal conditioning circuit, and an ADC circuit. Specifically, the power management circuit provides the corresponding operating voltage and timing for the relevant modules. The linear array CMOS sensor is located at the receiving end of the spectral confocal optical system, continuously detecting spectral confocal optical signals and converting them into analog signals. These signals are then biased and amplified by an analog signal conditioning circuit composed of an LM358, etc. The ADC circuit converts the analog signals into a high-speed serial digital image, which is then output through the LVDS interface. The linear array image acquisition module uses the linear array image sensor to acquire spectral confocal optical signals, converts them into high-speed serial digital images, and transmits these high-speed serial digital images to the Zynq main control module via the LVDS transmission interface.

[0014] The Zynq main control module includes a PL (Programmer) terminal and a PS (Power Switch) terminal, which are connected via an AXI (Automatic Interconnection) bus. In this embodiment, the specific Zynq chip model is xc7z020. Zynq is a heterogeneous platform composed of the PL and PS terminals. The PL terminal is suitable for receiving high-speed data streams and parallel computing, while the PS terminal is suitable for collaborative computing and flexible peripheral control interaction via ARM. To enable Zynq configuration, debugging, and normal operation, the main control module also needs to include other necessary circuits, including a JTAG interface circuit for programming and debugging the lower-level machine code running on the Zynq; a 50MHz crystal oscillator circuit to provide a stable reference clock to the Zynq's PS terminal; and the PL terminal can obtain a 100MHz signal generated internally by the chip via the PS. A reset circuit is used to reset the entire main control module, and a FLASH circuit is used to harden the lower-level machine program code.

[0015] The external storage module includes dynamic random access memory (DRAM) and non-volatile memory (NDRAM), both of which are connected to the memory controller internally located on the PS side. Specifically, the DRAM mainly consists of a DDR3 SDRAM memory chip and its power supply and termination resistor network. In this embodiment, the MT41K256M16TW-107 IT:P chip is used, with a storage capacity of 4Gb (256M×16bit) and a data rate of 1600Mbps. The DDR3 chip is connected to the Zynq's PS-side DDR controller via the address bus (A[14:0]), address lines (BA[2:0]), control signal lines (including CS#, RAS#, CAS#, WE#, CKE, ODT, etc.), and data mask signal lines (DQM). At the same time, the data bus (DQ[15:0]) and differential clock lines (CLK / CLK#) are connected to the Zynq through strictly equal-length wiring to ensure high-speed signal integrity. The data caching module temporarily stores intermediate results generated during the parallel spectral data stream processing steps, as well as intermediate calculation results generated by Zynq when running the spectral confocal algorithm. This implements ping-pong buffering of the data stream, preventing data loss and ensuring the real-time performance and stability of the system when processing high-frame-rate spectral signals. Optionally, the non-volatile memory is an SD card, and the PS end has a MicroSD card interface circuit built based on the SDIO protocol. It can serve as a storage center for large-capacity configuration and calibration data, storing multi-frame spectral confocal dark signals and their processing results involved in spectral confocal measurements. The SD card has a large capacity and is easily replaceable, meeting the engineering requirements for the measurement system to operate independently of a host computer.

[0016] The PL terminal of the Zynq master control module decodes the received high-speed serial digital image and converts it into a parallel spectral data stream. The PS terminal of the Zynq master control module reads the spectral confocal dark signal stored in the non-volatile memory through the memory controller, and loads the spectral confocal dark signal into the BRAM resource of the PL terminal through the AXI on-chip interconnect bus. In this embodiment, the non-volatile memory is specifically an SD card, and the PS reads the spectral confocal dark signal data stored in the SD card through the internally deployed FATFS file management system.

[0017] The PL terminal reads the spectral confocal dark signal from the BRAM resources and subtracts the spectral confocal dark signal pixel by pixel in the parallel spectral data stream to obtain the darkened spectral data stream. Subsequently, the PL terminal transmits the darkened spectral data stream to the memory controller of the PS terminal through the AXI on-chip interconnect bus, and under the drive control of the memory controller, the darkened spectral data stream is cached in the dynamic random access memory. Based on the cached content in the dynamic random access memory, the PL terminal performs dynamic black level correction, Savitzky-Golay filtering, and subpixel-level peak finding on the darkened spectral data stream, and finally obtains the subpixel absolute coordinates of the spectral fitting peak.

[0018] In this embodiment, a Zynq-based high-speed spectral confocal signal processing method is applied to the aforementioned Zynq-based high-speed spectral confocal signal processing system. (See [link to relevant documentation]). Figure 2 The data processing method includes steps such as original image decoding and reception, real-time dark signal subtraction, dynamic black level correction, Savitzky-Golay filtering, and subpixel-level spectral peak finding. These steps are executed in a pipelined manner according to a time-series relationship, ultimately converting the input original image data into subpixel absolute coordinates of the spectral fitting peaks. The specific steps are as follows: Step S1: The linear array image acquisition module uses the linear array image sensor to convert the spectral confocal optical signal reflected by the object under test into a high-speed serial digital image, and transmits the high-speed serial digital image to the PL terminal in the Zynq main control module in a source-synchronous manner through a multi-parallel LVDS transmission interface. Step S2: The PL terminal utilizes multiple internal input differential buffers to perform differential-to-single-ended buffering on the differential serial data stream and differential source synchronization clock in the high-speed serial digital image, respectively, to obtain the single-ended serial data stream and single-ended source synchronization clock; see [link to relevant documentation]. Figure 3 The block diagram of the original image decoding and receiving logic is given. In this example, the input differential buffer IBUFGDS and IBUFDS at the PL end are used to process the differential serial data stream and the differential source synchronization clock, respectively. The single-ended clock obtained after the differential source synchronization clock is processed by the input differential buffer IBUFGDS is connected to the clock management resource at the PL end for phase adjustment of the single-ended clock. The adjusted output is the single-ended source synchronization clock. The PL terminal utilizes multiple internal serial-to-parallel converters to convert single-ended serial data streams and single-ended source synchronous clocks into parallel data streams and parallel source synchronous clocks, respectively. In this example, the high-speed serial-to-parallel converter is specifically an ISERDESE2, with each group cascaded in master-slave configuration using two ISERDESE2 converters to achieve serial-to-parallel conversion with a width of 8 bits or more. For 4 LVDS data lines and 1 clock line, a total of 5 master-slave cascaded ISERDESE2 converters are configured. The PL end performs training alignment on the parallel data stream by detecting the offset of the training code output by the LVDS transmission interface during idle periods, resulting in an aligned parallel data stream. Specifically, after the parallel data is deserialized by the cascaded ISERDESE2, the output word boundaries are random and uncontrollable in the initial stage after system power-on or reset, meaning the first bit position during serial-to-parallel conversion may be misaligned. Taking 12-bit parallel pixel data after conversion as an example, when truncating and splicing the high-speed serial data stream, the first bit of the serial-to-parallel conversion at the start of ISERDESE2 is uncertain, with at most 12 possibilities. The segment captures the output data of each channel in real time and compares it with the preset training code. If the data does not match, the state machine will simultaneously send bitslip pulse signals to the master and slave ISERDESE2 modules. For each bitslip pulse received, the internal shift register will shift the sampling boundary by one bit. This process iterates until the feature word output in parallel is completely consistent with the standard alignment code, indicating successful word alignment. This ensures correct alignment when receiving subsequent valid image data streams.

[0019] In this embodiment, the LVDS transmission interface in the optical signal acquisition module is configured with 1 to 4 channels of LVDS differential data output, each channel containing one differential data line and a corresponding clock DCLK. The PL terminal implementation includes: the clock is connected via a dedicated clock input pin to receive the differential clock DCLK through an IBUFGDS buffer; the PLL (phase-locked loop) inside the Zynq is used to generate a serial sampling clock and a parallel processing clock to meet the timing constraints of low clock jitter. The differential data is converted to a single-ended signal through the IBUFDS buffer. Data alignment training is also required for the high-speed channels. Specifically, during the power-on initialization phase, the main control module sends a training mode command to the CMOS sensor, and the sensor continuously outputs alignment codes. The ISERDESE2 primitive at the PL terminal performs a Bitslip operation on each channel's data, automatically scanning for the optimal sampling phase, completing word boundary alignment and channel de-skewing, ensuring that the data bit width of each channel is aligned to 14 bits. After data alignment, ISERDESE2 converts the 600Mbps serial data into 150MHz parallel data in a 1:4 mode and outputs it to the next-level protocol parsing unit.

[0020] Preferably, during high-speed real-time measurement, electrical interference or clock jitter may cause slight deviations in the trained and aligned channels, leading to word boundary misalignment and incorrect sampling of shifted pixel data. To address this issue, a reset signal and a frame end signal are used as conditions to trigger the re-execution of word boundary alignment. The currently sampled training code is compared with a preset training code; if the data does not match, the PL terminal re-executes the training alignment of the high-speed serial data stream. Furthermore, the LVDS transmission interface module also includes a link status monitoring unit, which calculates the CRC check error rate of each channel in real time. If the error rate of a single channel exceeds the standard, the active configuration image acquisition module is triggered to restart the training process. Simultaneously, the PL terminal uses the global reset signal and frame end signal input from the spectral confocal signal processing system as trigger conditions. When the global reset signal or the frame end signal is valid, the PL terminal re-executes the training alignment of the parallel data stream; after word boundary alignment of multiple parallel spectral data streams, the channels are aligned with each other through a snapshot register method. Driven by the parallel source synchronization clock, the PL terminal parses the aligned parallel data stream according to the link layer protocol, thereby outputting the parallel spectral data stream, synchronization drive clock, frame start signal, and frame end signal. The protocol parsing state machine identifies the frame start and frame end symbols defined by the LVDS transmission interface, extracting the effective pixel region located in bytes 20 to 2067 of the frame structure and multiple electrical black reference pixel regions at the end. The effective pixel region corresponds to the spectral confocal signal, and the electrical black reference pixel regions are used for baseline estimation of real-time electrical noise. The parsed data is synchronized across clock domains from the 150MHz acquisition clock domain to the 100MHz processing clock domain via an asynchronous FIFO (depth 512×14bit), avoiding metastability. The frame start and frame end signals mark the beginning and end of a frame of parallel spectral data stream, respectively, facilitating identification and processing by subsequent modules.

[0021] In summary, the PL end performs word boundary alignment of the parallel spectral data stream by detecting the training code output by the LVDS transmission interface and using a bit shifting iteration mechanism, and performs channel binding and link layer protocol parsing to provide a regular parallel spectral data stream for subsequent processing.

[0022] In step S3, under the control of the synchronous drive clock, the PL terminal performs real-time dark signal subtraction on the parallel spectral data stream to obtain the darkened spectral data stream. This step is used to eliminate static substrate noise caused by stray light and other factors within the optical system.

[0023] Step S31: During the system calibration stage, keep the measurement environment unchanged and remove the object under test. Then, use a linear array image sensor to continuously acquire multiple frames of high-speed serial digital images without the object under test and perform arithmetic averaging to obtain the spectral confocal dark signal and store it in non-volatile memory. Step S32, System Initialization Phase: The PS terminal in the Zynq main control module reads the spectral confocal dark signal from the non-volatile memory through the memory controller, and transmits and caches the spectral confocal dark signal to the BRAM resource of the PL terminal through the AXI on-chip interconnect bus in the Zynq main control module. In this embodiment, the non-volatile memory is specifically an SD card, and the PS reads the spectral confocal dark signal data stored in the SD card through the internally deployed FATFS file management system.

[0024] Step S33: During real-time measurement, the PL terminal uses the frame start signal as the synchronization reference. While receiving the valid spectral data stream, it reads the spectral confocal dark signal from the BRAM resource according to the beat of the synchronous drive clock. It subtracts the data in the spectral confocal dark signal from the parallel spectral data stream one by one. When the difference is less than zero, the operation logic has an embedded hardware-level underflow protection mechanism to force the operation result to zero, thereby obtaining the darkened spectral data stream.

[0025] Step S4: Perform dynamic black level correction on the darkened spectral data stream to eliminate electronic background noise that drifts with temperature, introduced by internal sensor thermal excitation and analog-to-digital converter sampling. The PL terminal discriminates based on the global coordinates of the data in the darkened spectral data stream to obtain the effective pixel group and dark pixel group in each frame of the darkened spectral data stream; the median of the dark pixel group is extracted to obtain the dark reference value for each frame of the darkened spectral data stream; the average value of the dark reference values ​​of N consecutive frames of the darkened spectral data stream is calculated to obtain the real-time black level correction value for each frame in the N consecutive frames; in this embodiment, to achieve hardware-friendly statistical calculation, 16 frames of spectral data are continuously acquired, the median of the EB pixels in each frame is extracted and accumulated, and finally, the average value of multiple frames is obtained by right-shifting by 4 bits to obtain the real-time black level correction value for each frame. This value reflects the electronic background noise in the current effective pixel group. The step of subtracting the real-time black level correction value of the corresponding frame from each effective pixel group also requires data stream delay alignment and underflow protection. The black level reference value is updated every 16 frames to track and cancel the noise of the linear array image sensor, thus obtaining the spectral data stream after dynamic black level correction.

[0026] Step S5: Random noise from the light source system, circuit system, and test environment can all be superimposed on the measured confocal spectral signal. Random noise directly reduces the signal-to-noise ratio of the spectral signal, and noise superposition causes spikes and distortions in the original confocal spectral curve. The randomness of noise distribution can lead to random shifts in the peak wavelength extraction results, resulting in decreased displacement measurement accuracy and repeatability. Therefore, Savitzky-Golay filtering is needed on the spectral data stream after dynamic black level correction using the PL terminal to obtain the filtered spectral data stream. Savitzky-Golay filtering can better maintain the spectral contour, improve the smoothness of the spectrum, and effectively reduce noise interference. It only requires setting the filter window size and the order of the polynomial fitting.

[0027] Step S51: Based on the full width at half maximum (FW) of the spectral confocal optical signal, determine the optimal window size N of the Savitzky-Golay filter and configure the polynomial order as K; preferably, based on the measured results, N should generally be less than half of FW.

[0028] Based on the determined optimal window size N and polynomial order K, the Savitzky-Golay filter can be instantiated as a set of floating-point convolution coefficients by offline calculation, which is obtained by pre-calculation based on Savitzky-Golay polynomial fitting offline solution. Multiply the floating-point convolution coefficients by the quantization factor ,in To quantize the bit width, fixed-point rounding is used to obtain a fixed-point constant weight sequence.

[0029] Step S52: The PL terminal forms a filtered data window with the same length as the optimal window size N through the internal shift register chain to store the spectral data stream after dynamic black level correction, thereby obtaining the data in the current filtered data window; By utilizing the symmetry of the fixed-point constant weight sequence, the data at symmetrical positions within the current filtered data window are pre-added using an adder to obtain the pre-added result for the current filtered data window.

[0030] Preferably, it is necessary to combine signal characteristics and the resource overhead of the underlying hardware logic to first determine constants and fix parameters. In this embodiment, the selected... As a specific example of parameter configuration, high-speed data throughput can be achieved by instantiating a linear finite impulse response filter within the FPGA. Based on this specific set of Savitzky-Golay parameters, the coefficient sequence can be obtained as follows: .like Figure 4As shown, the system first converts the serially input spectral pixel data into a 5-channel pipelined register through a shift register chain of depth 5. To optimize the critical path and increase the clock frequency, the design utilizes the even symmetry of the filter's fixed weights. A pre-adder network pre-adds pixels at symmetrical positions, extending the bit width to 16 bits, thus reducing the number of subsequent multiplication units to 3. After the aforementioned symmetrical addition logic calculation, the pre-addition result for the current filtered data window is obtained.

[0031] Step S53: Multiply and add the pre-added result under the current filtered data window to the corresponding fixed-point constant weights to obtain the filtered multiply-added result; after introducing the compensation number into the filtered multiply-added result, perform an arithmetic right shift operation; see [link to relevant documentation]. Figure 4 In this embodiment, the pre-added result is synchronized with the center point data to the multiplication unit, multiplied and accumulated with the coefficients in the fixed-point constant weight sequence, and after adding the constant 128, the high bits are directly truncated. The specific calculation can be equivalent to arithmetic right shift by 8 bits to replace the division operation, thereby obtaining the filtered value under the current filtered data window. The filtered spectral data stream is composed of the filtered values ​​under all filtered data windows. Preferably, when the window slides to the beginning of the frame... One pixel or tail after When the number of pixels is less than one, the window will exceed the boundary of the effective signal, resulting in insufficient data input for the filtered data window, making direct symmetric operations impossible. Since the effective spectral signal is concentrated in the middle of the CMOS sensor while the edges are mostly dark noise, this design employs a low-hardware-overhead symmetric mirror boundary filling method to solve this problem. The effective data within the boundary is mirrored with the boundary pixel as the symmetry axis and used to fill the area outside the window. This occurs before the frame start signal. After each pixel clock and frame end signal Each pixel clock uses a symmetrical mirror filling method to copy and fill the empty positions in the shift register chain with valid data within the boundary, ensuring that the boundary pixels can complete the filtering operation normally.

[0032] Step S6: Perform sub-pixel-level peak finding calculation on the filtered spectral data stream at the PL end to obtain the sub-pixel absolute coordinates of the spectral fitting peaks. This step achieves adaptive threshold prediction through cross-frame prediction mode, and peak finding calculation is used to overcome the physical pixel resolution limitation and extract high-precision peak coordinates.

[0033] Step S61: If the filtered spectral data stream belongs to one of the initial first M frames, then execute step S62; otherwise, execute step S68. In this embodiment, M=5 and is configured by the PS terminal by sending instructions as a configurable parameter. Step S62: The PL terminal determines the maximum value of the filtered spectral data stream by traversing the spectral data stream. In this embodiment, for the initial first 5 frames of spectral data, the ARM processor located at the processing system end writes a preset initialization truncation coefficient of 0.45 to the control register of the programmable logic end via the AXI bus. The obtained maximum value is multiplied by the preset initialization truncation coefficient to obtain the initialization truncation threshold.

[0034] The initial truncation threshold is compared one by one with the pixel data in the filtered spectral data stream. If the initial truncation threshold is less than the current pixel data, a valid enable signal is output; otherwise, an invalid enable signal is output, thus obtaining the valid range of the enable signal.

[0035] Step S63: Based on the effective range of the enable signal, the filtered spectral data stream is truncated to determine the local fitting range; Within the effective range of the enable signal, the rising edges of the synchronous drive clock are incremented to map the global coordinates of each pixel data in the filtered spectral data stream within the local fitting interval to local coordinates, and to obtain the global coordinates of the starting point of the local fitting interval. By establishing local coordinates, the data bit width can be reduced, thus reducing resource consumption.

[0036] Step S64: For the processing of the spectral data stream, considering its approximate Gaussian fitting characteristics, the first derivative is obtained by taking the logarithm of the Gaussian fitting expression. Through logarithmic derivative transformation, the complex curve peak search problem is transformed into a root-finding or zero-crossing problem of a linear equation. In discrete numerical analysis, the difference is used to approximate the continuous derivative. This design uses the first-order central difference to construct the difference sequence and performs the first-order central difference on the spectral signal within the effective peak-finding interval. Using equation (1), the local coordinates within the local fitting interval are... pixel data The calculation yields the local coordinates as follows: Differential results of pixel data : (1) In equation (1), For three adjacent local coordinates, For local coordinates pixel data, For local coordinates Pixel data.

[0037] Introduce the square of the current pixel data As a weight, this weight gives higher confidence to high signal-to-noise ratio data near the peak region; construct the weighted least squares objective function as shown in equation (2): (2) In equation (2), and The parameters to be solved are... The length of the effective fitting interval is given; a normal return path is constructed with minimizing equation (2) as the fitting objective, and the fitting model of the linear equation is obtained. Based on the fitting model of the linear equation, the zero-crossing points of the linear equation are thus determined.

[0038] Step S65: Calculate the sum of five constant terms for all pixel data within the local fitting interval using equation (3). : (3) In equation (3), is the length of the local fitting interval.

[0039] Step S66: Calculate the sub-pixel local coordinates of the spectral fitting peak using equation (4). : (4) Step S67: Calculate the sub-pixel absolute coordinates of the spectral fitting peak. The values ​​are recorded at the PL terminal, thus forming a coordinate cache table by combining the sub-pixel absolute coordinates of the M consecutive spectral fitting peaks.

[0040] In step S68, the PL terminal performs a first-order linear fit on the sub-pixel absolute coordinates of the spectral fitting peaks in the coordinate cache table to obtain the predicted values ​​of the spectral peak coordinates. In this embodiment, starting from the 6th frame, the system automatically switches to cross-frame prediction mode. In cross-frame prediction mode, a sliding window of length 5 is stored and maintained to cache the sub-pixel coordinates of the spectral fitting peaks latched after the processing of the most recent 5 consecutive frames. Based on the data of these 5 frames, a first-order linear fit is performed to calculate the slope of the light intensity change over time, and the predicted values ​​of the sub-pixel coordinates of the spectral fitting peaks of the current frame are obtained by linear extrapolation.

[0041] Step S69: Extract the predicted values ​​of the spectral peaks from the filtered spectral data stream based on the predicted values ​​of the spectral peak coordinates. Preferably, to prevent abnormal predicted values ​​caused by abrupt changes in the measured surface, the absolute value of the difference between the predicted value of the current frame's spectral fitting peak and the predicted value of the previous frame's spectral fitting peak is calculated. When the absolute value is lower than the lower limit or higher than the upper limit, the global maximum light intensity value of the current frame is automatically used as the predicted value of the spectral peak.

[0042] Step S610: Multiply the predicted value of the spectral peak by a configurable cutoff coefficient. Thus, the dynamic truncation threshold is obtained. .

[0043] Step S611: Compare the dynamic truncation threshold with the pixel data in the filtered spectral data stream one by one. If the dynamic truncation threshold is less than the current pixel data, output a valid enable signal; otherwise, output an invalid enable signal; thus obtaining the valid range of the enable signal.

[0044] Step S612: Process according to steps S63 to S611 until the stop signal of the spectral confocal signal processing system is valid.

[0045] To further verify the peak coordinate extraction effect of the peak-finding algorithm proposed in this invention, multiple sets of continuous spectral confocal signals from Example 2 were imported as excitation. While maintaining the same front-end preprocessing module, the subsequent processing modules were replaced with various peak-finding algorithms, which were then deployed and run on a computer and Zynq, respectively. The calculation results were statistically analyzed. The "hardware implementation of this invention" described in this embodiment refers to the deployment and implementation of the peak-finding algorithm in Zynq hardware resources after logical design. See also... Figure 5 The results show that the standard centroid method is susceptible to noise interference and exhibits significant fluctuations. The weighted centroid method is an improvement on the standard centroid method, resulting in increased accuracy. Gaussian fitting, through its refined computation, achieves relatively high peak-finding accuracy. In this set of test sequences, the mean absolute error of the peak coordinates of the algorithm of this invention is 0.082 pixels, while the mean absolute error of the peak coordinates implemented in Zynq is 0.088 pixels. This demonstrates that the hardware deployment of the peak-finding algorithm does not result in excessive loss of accuracy due to fixed-point computation. The peak-finding stability and mean absolute error are significantly better than the traditional centroid method and the weighted centroid method, and approach those of the Gaussian fitting method.

[0046] The foregoing has only described certain exemplary embodiments of the present invention by way of illustration. It should be understood that those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the above drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A high-speed spectral confocal signal processing system based on Zynq, characterized in that, include: Linear image acquisition module, Zynq main control module, external memory module; The linear array image acquisition module includes: a linear array image sensor and an LVDS transmission interface; The Zynq master control module includes a PL terminal and a PS terminal, wherein the PL terminal and the PS terminal are connected via an AXI on-chip interconnect bus; The external storage module includes: dynamic random access memory and non-volatile memory, both of which are connected to the memory controller internally configured in the PS terminal; The linear array image sensor acquires the spectral confocal optical signal reflected by the object under test and converts it into a high-speed serial digital image, which is then transmitted to the PL terminal through the LVDS transmission interface. The PL terminal decodes the received high-speed serial digital image and converts it into a parallel spectral data stream; The PS terminal reads the spectral confocal dark signal stored in the non-volatile memory through the memory controller, and loads the spectral confocal dark signal into the BRAM resource of the PL terminal through the AXI on-chip interconnect bus; The PL terminal reads the spectral confocal dark signal from the BRAM resource and subtracts the spectral confocal dark signal pixel by pixel in the parallel spectral data stream to obtain the darkened spectral data stream. The PL terminal transmits the darkened spectral data stream to the memory controller of the PS terminal through the AXI on-chip interconnect bus, and under the drive control of the memory controller, the darkened spectral data stream is cached in the dynamic random access memory. Based on the cached content in the dynamic random access memory, the PL terminal performs dynamic black level correction, Savitzky-Golay filtering, and subpixel-level peak finding on the darkened spectral data stream, and finally obtains the subpixel absolute coordinates of the spectral fitting peak.

2. A high-speed spectral confocal signal processing method based on Zynq, characterized in that, This method is applied to a spectral confocal signal processing system consisting of a linear image acquisition module, a Zynq main control module, and an external memory module, and includes the following steps: Step S1: The linear array image acquisition module uses the linear array image sensor to convert the spectral confocal optical signal reflected by the object under test into a high-speed serial digital image, and transmits the high-speed serial digital image to the PL terminal in the Zynq main control module in a source-synchronous manner through a multi-parallel LVDS transmission interface. Step S2: The PL terminal uses multiple sets of internal input differential buffers to perform differential-to-single-ended buffering on the differential serial data stream and differential source synchronization clock in the high-speed serial digital image, respectively, to obtain the single-ended serial data stream and single-ended source synchronization clock. The PL terminal uses multiple internal serial-to-parallel converters to convert the single-ended serial data stream and the single-ended source synchronization clock into serial-to-parallel data stream and parallel source synchronization clock respectively. The PL terminal performs training alignment on the parallel data stream by detecting the offset of the training code output by the LVDS transmission interface during idle periods, and obtains the aligned parallel data stream. Driven by the parallel source synchronization clock, the PL terminal parses the aligned parallel data stream according to the link layer protocol, thereby outputting the parallel spectral data stream, synchronization drive clock, frame start signal and frame end signal; The PL terminal uses the global reset signal input from the spectral confocal signal processing system and the frame end signal as trigger conditions. When the global reset signal is valid or the frame end signal is valid, the PL terminal re-executes the training alignment of the parallel data stream. Step S3: Under the control of the synchronous drive clock, the PL terminal performs real-time dark signal subtraction operation on the parallel spectral data stream to obtain the darkened spectral data stream. Step S31: Keep the measurement environment unchanged and remove the object under test. Then, use the linear array image sensor to continuously acquire multiple frames of high-speed serial digital images without the object under test and perform arithmetic averaging to obtain the spectral confocal dark signal and store it in the non-volatile memory. Step S32: The PS terminal in the Zynq main control module reads the spectral confocal dark signal in the non-volatile memory through the memory controller, and transmits and caches the spectral confocal dark signal in the BRAM resource of the PL terminal through the AXI on-chip interconnect bus in the Zynq main control module. Step S33: The PL terminal uses the frame start signal as the synchronization reference and reads the spectral confocal dark signal from the BRAM resource under the beat of the synchronization drive clock. The parallel spectral data stream is subtracted from the data in the spectral confocal dark signal one by one. When the difference is less than zero, the calculation result is forced to zero, thereby obtaining the darkened spectral data stream. Step S4: The PL end performs discrimination based on the global coordinates of the data in the darkened spectral data stream to obtain the effective pixel group and dark pixel group in each frame of the darkened spectral data stream; the median of the dark pixel group is extracted to obtain the dark reference value of each frame of the darkened spectral data stream. The average value of the dark reference value of the darkened spectral data stream of N consecutive frames is calculated to obtain the real-time black level correction value of each frame in the N consecutive frames; the real-time black level correction value of the corresponding frame is subtracted pixel by pixel from the effective pixel group of each frame to obtain the spectral data stream after dynamic black level correction. Step S5: The PL terminal performs Savitzky-Golay filtering on the dynamically black-level corrected spectral data stream to obtain the filtered spectral data stream. Step S51: Based on the full width at half maximum (FWHM) of the spectral confocal optical signal, determine the optimal window size of the Savitzky-Golay filter as N, and configure the polynomial order as K. Based on the optimal window size N and the polynomial order K, the Savitzky-Golay filter is instantiated as a set of floating-point format convolution coefficients; Multiply the convolution coefficients in the floating-point format by the quantization factor and then round them to the nearest integer to obtain a sequence of fixed-point constant weights. Step S52: The PL terminal forms a filtered data window with the same length as the optimal window size N through the internal shift register chain to store the spectral data stream after dynamic black level correction, thereby obtaining the data in the current filtered data window; By utilizing the symmetry of the fixed-point constant weight sequence, the data at symmetrical positions within the current filtered data window are pre-added using an adder to obtain the pre-added result under the current filtered data window; Step S53: Multiply and add the pre-added result under the current filtered data window with the fixed-point constant weight to obtain the filtered multiply-add result; After introducing a compensation number into the filtered multiply-accumulate result, an arithmetic right shift operation is performed to output the filtered value under the current filtered data window. The filtered spectral data stream is composed of the filtered values ​​under all filtered data windows. Step S6: Perform sub-pixel-level peak finding calculation on the filtered spectral data stream at the PL terminal to obtain the sub-pixel absolute coordinates of the spectral fitting peaks: Step S61: If the filtered spectral data stream belongs to one of the initial first M frames, then execute step S62; otherwise, execute step S68. Step S62: The PL terminal determines the maximum value of the filtered spectral data stream and multiplies the maximum value by a preset initial truncation coefficient to obtain the initial truncation threshold. The initial truncation threshold is compared with the pixel data in the filtered spectral data stream one by one. If the initial truncation threshold is less than the current pixel data, a valid enable signal is output; otherwise, an invalid enable signal is output. This yields the effective range of the enable signal; Step S63: Based on the effective range of the enable signal, the filtered spectral data stream is truncated to determine the local fitting range; Within the effective range of the enable signal, the rising edges of the synchronous drive clock are incremented to map the global coordinates of each pixel data in the filtered spectral data stream within the local fitting interval to local coordinates, and to obtain the global coordinates of the starting point of the local fitting interval. ; Step S64: Use equation (1) to obtain the local coordinates within the local fitting interval. pixel data Performing a first-order central difference yields the local coordinates as follows: Differential results of pixel data : (1) In equation (1), For three adjacent local coordinates, For local coordinates pixel data, For local coordinates Pixel data; Step S65: Calculate the sum of five constant terms for all pixel data within the local fitting interval using equation (2). : (2) In equation (2), The length of the local fitting interval; Step S66: Calculate the sub-pixel local coordinates of the spectral fitting peak using equation (3). : (3) Step S67: Calculate the sub-pixel absolute coordinates of the spectral fitting peak. And record it at the PL end, so that the sub-pixel absolute coordinates of the M consecutive spectral fitting peaks are combined into a coordinate cache table; Step S68: The PL terminal performs a first-order linear fit on the sub-pixel absolute coordinates of the spectral fitting peak in the coordinate cache table to obtain the predicted value of the spectral peak coordinates. Step S69: Extract the predicted values ​​of the spectral peaks from the filtered spectral data stream based on the predicted values ​​of the spectral peak coordinates. Step S610: Multiply the predicted value of the spectral peak by a configurable cutoff coefficient to obtain the dynamic cutoff threshold; Step S611: Compare the dynamic truncation threshold with the pixel data in the filtered spectral data stream one by one. If the dynamic truncation threshold is less than the current pixel data, output a valid enable signal; otherwise, output an invalid enable signal; thereby obtaining the valid range of the enable signal. Step S612: Process according to steps S63 to S611 until the stop signal of the spectral confocal signal processing system is valid.

Images